VirtualBox

Ignore:
Timestamp:
Jul 11, 2024 10:30:56 AM (5 months ago)
Author:
vboxsync
Message:

VMM/IEM: Replaced IEMNATIVEEXITREASON with IEMNATIVELABELTYPE, since it's always been a super set of it. Some source code width adjustments. bugref:10677

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h

    r105251 r105271  
    247247    pReNative->fMc    = 0; \
    248248    pReNative->fCImpl = (a_fFlags); \
    249     return iemNativeEmitCImplCall0(pReNative, off, pCallEntry->idxInstr, a_fGstShwFlush, (uintptr_t)a_pfnCImpl, a_cbInstr) /** @todo not used ... */
     249    return iemNativeEmitCImplCall0(pReNative, off, pCallEntry->idxInstr, a_fGstShwFlush, (uintptr_t)a_pfnCImpl, \
     250                                   a_cbInstr) /** @todo not used ... */
    250251
    251252
     
    319320#ifdef IEMNATIVE_WITH_LIVENESS_ANALYSIS
    320321    AssertMsg(   pReNative->idxCurCall == 0
    321               || IEMLIVENESS_STATE_IS_INPUT_EXPECTED(iemNativeLivenessGetStateByGstRegEx(&pReNative->paLivenessEntries[pReNative->idxCurCall - 1], IEMLIVENESSBIT_IDX_EFL_OTHER)),
    322               ("Efl_Other - %u\n", iemNativeLivenessGetStateByGstRegEx(&pReNative->paLivenessEntries[pReNative->idxCurCall - 1], IEMLIVENESSBIT_IDX_EFL_OTHER)));
     322              || IEMLIVENESS_STATE_IS_INPUT_EXPECTED(iemNativeLivenessGetStateByGstRegEx(&pReNative->paLivenessEntries[pReNative->idxCurCall - 1],
     323                                                                                         IEMLIVENESSBIT_IDX_EFL_OTHER)),
     324              ("Efl_Other - %u\n", iemNativeLivenessGetStateByGstRegEx(&pReNative->paLivenessEntries[pReNative->idxCurCall - 1],
     325                                                                       IEMLIVENESSBIT_IDX_EFL_OTHER)));
    323326#endif
    324327
     
    334337    off = iemNativeEmitTestAnyBitsInGprAndTbExitIfAnySet(pReNative, off, idxEflReg,
    335338                                                         X86_EFL_TF | CPUMCTX_DBG_HIT_DRX_MASK | CPUMCTX_DBG_DBGF_MASK,
    336                                                          kIemNativeExitReason_ReturnWithFlags);
     339                                                         kIemNativeLabelType_ReturnWithFlags);
    337340    off = iemNativeEmitAndGpr32ByImm(pReNative, off, idxEflReg, ~(uint32_t)(X86_EFL_RF | CPUMCTX_INHIBIT_SHADOW));
    338341    off = iemNativeEmitStoreGprToVCpuU32(pReNative, off, idxEflReg, RT_UOFFSETOF(VMCPU, cpum.GstCtx.eflags));
     
    394397                                             RT_UOFFSETOF(VMCPU, iem.s.ppTbLookupEntryR3));
    395398
    396         return iemNativeEmitTbExit(pReNative, off, kIemNativeExitReason_ReturnBreak);
     399        return iemNativeEmitTbExit(pReNative, off, kIemNativeLabelType_ReturnBreak);
    397400
    398401#else
     
    440443
    441444                if (pReNative->idxLastCheckIrqCallNo != UINT32_MAX)
    442                     return iemNativeEmitTbExit(pReNative, off, kIemNativeExitReason_ReturnBreakViaLookup);
    443                 return iemNativeEmitTbExit(pReNative, off, kIemNativeExitReason_ReturnBreakViaLookupWithIrq);
     445                    return iemNativeEmitTbExit(pReNative, off, kIemNativeLabelType_ReturnBreakViaLookup);
     446                return iemNativeEmitTbExit(pReNative, off, kIemNativeLabelType_ReturnBreakViaLookupWithIrq);
    444447            }
    445448        }
    446449        if (pReNative->idxLastCheckIrqCallNo != UINT32_MAX)
    447             return iemNativeEmitTbExit(pReNative, off, kIemNativeExitReason_ReturnBreakViaLookupWithTlb);
    448         return iemNativeEmitTbExit(pReNative, off, kIemNativeExitReason_ReturnBreakViaLookupWithTlbAndIrq);
     450            return iemNativeEmitTbExit(pReNative, off, kIemNativeLabelType_ReturnBreakViaLookupWithTlb);
     451        return iemNativeEmitTbExit(pReNative, off, kIemNativeLabelType_ReturnBreakViaLookupWithTlbAndIrq);
    449452#endif
    450453    }
     
    15941597
    15951598/*********************************************************************************************************************************
    1596 *   Emitters for changing PC/RIP/EIP/IP with a RETN (Iw) instruction (IEM_MC_RETN_AND_FINISH) (requires stack emmiters).    *
     1599*   Emitters for changing PC/RIP/EIP/IP with a RETN (Iw) instruction (IEM_MC_RETN_AND_FINISH) (requires stack emmiters).         *
    15971600*********************************************************************************************************************************/
    15981601
     
    17191722                                        : (uintptr_t)iemNativeHlpStackFetchU16;
    17201723    uint8_t   const idxRegRsp       = iemNativeRegAllocTmpForGuestReg(pReNative, &off, IEMNATIVEGSTREG_GPR(X86_GREG_xSP),
    1721                                                                       fFlat ? kIemNativeGstRegUse_ForUpdate : kIemNativeGstRegUse_Calculation,
     1724                                                                      fFlat ? kIemNativeGstRegUse_ForUpdate
     1725                                                                            : kIemNativeGstRegUse_Calculation,
    17221726                                                                      true /*fNoVolatileRegs*/);
    17231727    uint8_t   const idxRegEffSp     = fFlat ? idxRegRsp : iemNativeRegAllocTmp(pReNative, &off);
    17241728    /** @todo can do a better job picking the register here. For cbMem >= 4 this
    17251729     *        will be the resulting register value. */
    1726     uint8_t   const idxRegMemResult = iemNativeRegAllocTmp(pReNative, &off); /* pointer then value; arm64 SP += 2/4 helper too.  */
     1730    uint8_t   const idxRegMemResult = iemNativeRegAllocTmp(pReNative, &off); /* pointer then value; arm64 SP += 2/4 helper too. */
    17271731
    17281732    uint32_t        offFixupJumpToUseOtherBitSp = UINT32_MAX;
     
    19561960
    19571961        /* Allocate a temporary CR0 register. */
    1958         uint8_t const idxCr0Reg       = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Cr0, kIemNativeGstRegUse_ReadOnly);
     1962        uint8_t const idxCr0Reg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Cr0,
     1963                                                                  kIemNativeGstRegUse_ReadOnly);
    19591964
    19601965        /*
     
    19631968         */
    19641969        /* Test and jump. */
    1965         off = iemNativeEmitTestAnyBitsInGprAndTbExitIfAnySet(pReNative, off, idxCr0Reg, X86_CR0_EM | X86_CR0_TS, kIemNativeExitReason_RaiseNm);
     1970        off = iemNativeEmitTestAnyBitsInGprAndTbExitIfAnySet(pReNative, off, idxCr0Reg, X86_CR0_EM | X86_CR0_TS,
     1971                                                             kIemNativeLabelType_RaiseNm);
    19661972
    19671973        /* Free but don't flush the CR0 register. */
     
    20132019
    20142020        /* Allocate a temporary CR0 register. */
    2015         uint8_t const idxCr0Reg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Cr0, kIemNativeGstRegUse_Calculation);
     2021        uint8_t const idxCr0Reg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Cr0,
     2022                                                                  kIemNativeGstRegUse_Calculation);
    20162023
    20172024        /*
     
    20212028        off = iemNativeEmitAndGpr32ByImm(pReNative, off, idxCr0Reg, X86_CR0_MP | X86_CR0_TS);
    20222029        /* Test and jump. */
    2023         off = iemNativeEmitTestIfGpr32EqualsImmAndTbExit(pReNative, off, idxCr0Reg, X86_CR0_MP | X86_CR0_TS, kIemNativeExitReason_RaiseNm);
     2030        off = iemNativeEmitTestIfGpr32EqualsImmAndTbExit(pReNative, off, idxCr0Reg, X86_CR0_MP | X86_CR0_TS,
     2031                                                         kIemNativeLabelType_RaiseNm);
    20242032
    20252033        /* Free the CR0 register. */
     
    20652073
    20662074    /* Allocate a temporary FSW register. */
    2067     uint8_t const idxFpuFswReg    = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_FpuFsw, kIemNativeGstRegUse_ReadOnly);
     2075    uint8_t const idxFpuFswReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_FpuFsw,
     2076                                                                 kIemNativeGstRegUse_ReadOnly);
    20682077
    20692078    /*
     
    20722081     */
    20732082    /* Test and jump. */
    2074     off = iemNativeEmitTestBitInGprAndTbExitIfSet(pReNative, off, idxFpuFswReg, X86_FSW_ES_BIT, kIemNativeExitReason_RaiseMf);
     2083    off = iemNativeEmitTestBitInGprAndTbExitIfSet(pReNative, off, idxFpuFswReg, X86_FSW_ES_BIT, kIemNativeLabelType_RaiseMf);
    20752084
    20762085    /* Free but don't flush the FSW register. */
     
    21362145        off = iemNativeEmitAndGpr32ByImmEx(pCodeBuf, off,   idxTmpReg, X86_CR0_EM | X86_CR0_TS | X86_CR4_OSFXSR);
    21372146        off = iemNativeEmitXorGpr32ByImmEx(pCodeBuf, off,   idxTmpReg, X86_CR4_OSFXSR);
    2138         off = iemNativeEmitJccTbExitEx(pReNative, pCodeBuf, off, kIemNativeExitReason_RaiseSseRelated, kIemNativeInstrCond_ne);
     2147        off = iemNativeEmitJccTbExitEx(pReNative, pCodeBuf, off, kIemNativeLabelType_RaiseSseRelated, kIemNativeInstrCond_ne);
    21392148
    21402149#elif defined(RT_ARCH_ARM64)
     
    21542163        /* -> idxTmpReg[0]=~OSFXSR; idxTmpReg[2]=EM; idxTmpReg[3]=TS; (the rest is zero) */
    21552164        off = iemNativeEmitTestIfGprIsNotZeroAndTbExitEx(pReNative, pCodeBuf, off, idxTmpReg, false /*f64Bit*/,
    2156                                                          kIemNativeExitReason_RaiseSseRelated);
     2165                                                         kIemNativeLabelType_RaiseSseRelated);
    21572166
    21582167#else
     
    22422251        off = iemNativeEmitXorGpr32ByImmEx(pCodeBuf, off,                idxTmpReg, ((XSAVE_C_YMM | XSAVE_C_SSE) << 2) | 2);
    22432252        /* -> idxTmpReg[0]=CR0.TS idxTmpReg[1]=~CR4.OSXSAVE; idxTmpReg[2]=0; idxTmpReg[3]=~SSE; idxTmpReg[4]=~YMM; */
    2244         off = iemNativeEmitJccTbExitEx(pReNative, pCodeBuf, off, kIemNativeExitReason_RaiseAvxRelated, kIemNativeInstrCond_ne);
     2253        off = iemNativeEmitJccTbExitEx(pReNative, pCodeBuf, off, kIemNativeLabelType_RaiseAvxRelated, kIemNativeInstrCond_ne);
    22452254
    22462255#elif defined(RT_ARCH_ARM64)
     
    22612270        /* -> idxTmpReg[0]=CR0.TS; idxTmpReg[1]=~CR4.OSXSAVE; idxTmpReg[2]=~SSE; idxTmpReg[3]=~YMM; (the rest is zero) */
    22622271        off = iemNativeEmitTestIfGprIsNotZeroAndTbExitEx(pReNative, pCodeBuf, off, idxTmpReg, false /*f64Bit*/,
    2263                                                          kIemNativeExitReason_RaiseAvxRelated);
     2272                                                         kIemNativeLabelType_RaiseAvxRelated);
    22642273
    22652274#else
     
    23022311#endif
    23032312
    2304     uint8_t const idxRegMxCsr = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_MxCsr, kIemNativeGstRegUse_ReadOnly);
     2313    uint8_t const idxRegMxCsr = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_MxCsr,
     2314                                                                kIemNativeGstRegUse_ReadOnly);
    23052315    uint8_t const idxRegTmp   = iemNativeRegAllocTmp(pReNative, &off);
    23062316
     
    23162326    off = iemNativeEmitAndGpr32ByGpr32(pReNative, off, idxRegTmp, idxRegMxCsr);
    23172327    off = iemNativeEmitTestAnyBitsInGprAndTbExitIfAnySet(pReNative, off, idxRegTmp, X86_MXCSR_XCPT_FLAGS,
    2318                                                          kIemNativeExitReason_RaiseSseAvxFpRelated);
     2328                                                         kIemNativeLabelType_RaiseSseAvxFpRelated);
    23192329
    23202330    /* Free but don't flush the MXCSR register. */
     
    23532363
    23542364    /* raise \#DE exception unconditionally. */
    2355     return iemNativeEmitTbExit(pReNative, off, kIemNativeExitReason_RaiseDe);
     2365    return iemNativeEmitTbExit(pReNative, off, kIemNativeLabelType_RaiseDe);
    23562366}
    23572367
     
    23712381 */
    23722382DECL_INLINE_THROW(uint32_t)
    2373 iemNativeEmitRaiseGp0IfEffAddrUnaligned(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr, uint8_t idxVarEffAddr, uint8_t cbAlign)
     2383iemNativeEmitRaiseGp0IfEffAddrUnaligned(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr,
     2384                                        uint8_t idxVarEffAddr, uint8_t cbAlign)
    23742385{
    23752386    IEMNATIVE_ASSERT_VAR_IDX(pReNative, idxVarEffAddr);
     
    23902401
    23912402    off = iemNativeEmitTestAnyBitsInGprAndTbExitIfAnySet(pReNative, off, idxVarReg, cbAlign - 1,
    2392                                                          kIemNativeExitReason_RaiseGp0);
     2403                                                         kIemNativeLabelType_RaiseGp0);
    23932404
    23942405    iemNativeVarRegisterRelease(pReNative, idxVarEffAddr);
     
    34303441#endif
    34313442    fGstShwFlush = iemNativeCImplFlagsToGuestShadowFlushMask(pReNative->fCImpl, fGstShwFlush | RT_BIT_64(kIemNativeGstReg_Pc));
    3432     if (!(pReNative->fMc & IEM_MC_F_WITHOUT_FLAGS)) /** @todo We don't emit with-flags/without-flags variations for CIMPL calls.  */
     3443    if (!(pReNative->fMc & IEM_MC_F_WITHOUT_FLAGS)) /** @todo We don't emit with-flags/without-flags variations for CIMPL calls. */
    34333444        fGstShwFlush |= RT_BIT_64(kIemNativeGstReg_EFlags);
    34343445    iemNativeRegFlushGuestShadows(pReNative, fGstShwFlush);
     
    52105221
    52115222/** Handles IEM_MC_SET_EFL_BIT/IEM_MC_CLEAR_EFL_BIT/IEM_MC_FLIP_EFL_BIT. */
    5212 DECL_INLINE_THROW(uint32_t) iemNativeEmitModifyEFlagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fEflBit, IEMNATIVEMITEFLOP enmOp)
     5223DECL_INLINE_THROW(uint32_t)
     5224iemNativeEmitModifyEFlagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fEflBit, IEMNATIVEMITEFLOP enmOp)
    52135225{
    52145226    uint8_t const idxEflReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
     
    66796691         */
    66806692        /* Allocate a temporary PC register. */
    6681         uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc, kIemNativeGstRegUse_ForUpdate);
     6693        uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc,
     6694                                                                 kIemNativeGstRegUse_ForUpdate);
    66826695
    66836696        /* Restore the original value. */
     
    80108023            AssertMsg(   pReNative->idxCurCall == 0
    80118024                      || IEMLIVENESS_STATE_IS_CLOBBER_EXPECTED(iemNativeLivenessGetPrevStateByGstReg(pReNative, IEMNATIVEGSTREG_GPR(idxGReg))),
    8012                       ("%s - %u\n", g_aGstShadowInfo[idxGReg].pszName, iemNativeLivenessGetPrevStateByGstReg(pReNative, IEMNATIVEGSTREG_GPR(idxGReg))));
     8025                      ("%s - %u\n", g_aGstShadowInfo[idxGReg].pszName,
     8026                       iemNativeLivenessGetPrevStateByGstReg(pReNative, IEMNATIVEGSTREG_GPR(idxGReg))));
    80138027#endif
    80148028            iemNativeRegClearAndMarkAsGstRegShadow(pReNative, idxRegMemResult,  IEMNATIVEGSTREG_GPR(idxGReg), off);
     
    88668880        /* Allocate destination and source register. */
    88678881        uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXRegDst),
    8868                                                                               kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForFullWrite);
     8882                                                                              kIemNativeGstSimdRegLdStSz_Low128,
     8883                                                                              kIemNativeGstRegUse_ForFullWrite);
    88698884        uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXRegSrc),
    8870                                                                               kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
     8885                                                                              kIemNativeGstSimdRegLdStSz_Low128,
     8886                                                                              kIemNativeGstRegUse_ReadOnly);
    88718887
    88728888        off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxSimdRegSrc);
     
    89208936
    89218937    uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    8922                                                                           kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
     8938                                                                          kIemNativeGstSimdRegLdStSz_Low128,
     8939                                                                          kIemNativeGstRegUse_ReadOnly);
    89238940
    89248941    iemNativeVarSetKindToStack(pReNative, idxDstVar);
     
    89498966
    89508967    uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    8951                                                                           kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
     8968                                                                          kIemNativeGstSimdRegLdStSz_Low128,
     8969                                                                          kIemNativeGstRegUse_ReadOnly);
    89528970
    89538971    iemNativeVarSetKindToStack(pReNative, idxDstVar);
     
    89758993
    89768994    uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    8977                                                                           kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
     8995                                                                          kIemNativeGstSimdRegLdStSz_Low128,
     8996                                                                          kIemNativeGstRegUse_ReadOnly);
    89788997
    89798998    iemNativeVarSetKindToStack(pReNative, idxDstVar);
     
    90019020
    90029021    uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    9003                                                                           kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
     9022                                                                          kIemNativeGstSimdRegLdStSz_Low128,
     9023                                                                          kIemNativeGstRegUse_ReadOnly);
    90049024
    90059025    iemNativeVarSetKindToStack(pReNative, idxDstVar);
     
    90329052
    90339053    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    9034                                                                           kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForFullWrite);
     9054                                                                          kIemNativeGstSimdRegLdStSz_Low128,
     9055                                                                          kIemNativeGstRegUse_ForFullWrite);
    90359056    uint8_t const idxVarReg     = iemNativeVarSimdRegisterAcquire(pReNative, idxSrcVar, &off, true /*fInitialized*/);
    90369057
     
    90839104
    90849105    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    9085                                                                           kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForUpdate);
     9106                                                                          kIemNativeGstSimdRegLdStSz_Low128,
     9107                                                                          kIemNativeGstRegUse_ForUpdate);
    90869108    uint8_t const idxVarReg     = iemNativeVarRegisterAcquire(pReNative, idxDstVar, &off, true /*fInitialized*/);
    90879109
     
    91149136
    91159137    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    9116                                                                           kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForUpdate);
     9138                                                                          kIemNativeGstSimdRegLdStSz_Low128,
     9139                                                                          kIemNativeGstRegUse_ForUpdate);
    91179140    uint8_t const idxVarReg     = iemNativeVarRegisterAcquire(pReNative, idxDstVar, &off, true /*fInitialized*/);
    91189141
     
    91409163
    91419164    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    9142                                                                           kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForUpdate);
     9165                                                                          kIemNativeGstSimdRegLdStSz_Low128,
     9166                                                                          kIemNativeGstRegUse_ForUpdate);
    91439167    uint8_t const idxVarReg     = iemNativeVarRegisterAcquire(pReNative, idxDstVar, &off, true /*fInitialized*/);
    91449168
     
    91679191
    91689192    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    9169                                                                           kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForUpdate);
     9193                                                                          kIemNativeGstSimdRegLdStSz_Low128,
     9194                                                                          kIemNativeGstRegUse_ForUpdate);
    91709195    uint8_t const idxVarReg     = iemNativeVarSimdRegisterAcquire(pReNative, idxSrcVar, &off, true /*fInitialized*/);
    91719196
     
    91899214{
    91909215    /*
    9191      * The iYRegSrc == iYRegDst case needs to be treated differently here, because if iYRegDst gets allocated first for the full write
    9192      * it won't load the actual value from CPUMCTX. When allocating iYRegSrc afterwards it will get duplicated from the already
    9193      * allocated host register for iYRegDst containing garbage. This will be catched by the guest register value checking in debug builds.
     9216     * The iYRegSrc == iYRegDst case needs to be treated differently here, because
     9217     * if iYRegDst gets allocated first for the full write  it won't load the
     9218     * actual value from CPUMCTX.  When allocating iYRegSrc afterwards it will get
     9219     * duplicated from the already allocated host register for iYRegDst containing
     9220     * garbage.  This will be catched by the guest register value checking in debug
     9221     * builds.
    91949222     */
    91959223    if (iYRegDst != iYRegSrc)
     
    92149242        /* This effectively only clears the upper 128-bits of the register. */
    92159243        uint8_t const idxSimdReg = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegDst),
    9216                                                                            kIemNativeGstSimdRegLdStSz_High128, kIemNativeGstRegUse_ForFullWrite);
     9244                                                                           kIemNativeGstSimdRegLdStSz_High128,
     9245                                                                           kIemNativeGstRegUse_ForFullWrite);
    92179246
    92189247        off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdReg);
     
    92349263{
    92359264    /*
    9236      * The iYRegSrc == iYRegDst case needs to be treated differently here, because if iYRegDst gets allocated first for the full write
    9237      * it won't load the actual value from CPUMCTX. When allocating iYRegSrc afterwards it will get duplicated from the already
    9238      * allocated host register for iYRegDst containing garbage. This will be catched by the guest register value checking in debug builds.
    9239      * iYRegSrc == iYRegDst would effectively only clear any upper 256-bits for a zmm register we don't support yet, so this is just a nop.
     9265     * The iYRegSrc == iYRegDst case needs to be treated differently here, because
     9266     * if iYRegDst gets allocated first for the full write it won't load the
     9267     * actual value from CPUMCTX.  When allocating iYRegSrc afterwards it will get
     9268     * duplicated from the already allocated host register for iYRegDst containing
     9269     * garbage. This will be catched by the guest register value checking in debug
     9270     * builds. iYRegSrc == iYRegDst would effectively only clear any upper 256-bits
     9271     * for a zmm register we don't support yet, so this is just a nop.
    92409272     */
    92419273    if (iYRegDst != iYRegSrc)
     
    92439275        /* Allocate destination and source register. */
    92449276        uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegSrc),
    9245                                                                               kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ReadOnly);
     9277                                                                              kIemNativeGstSimdRegLdStSz_256,
     9278                                                                              kIemNativeGstRegUse_ReadOnly);
    92469279        uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegDst),
    9247                                                                               kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9280                                                                              kIemNativeGstSimdRegLdStSz_256,
     9281                                                                              kIemNativeGstRegUse_ForFullWrite);
    92489282
    92499283        off = iemNativeEmitSimdLoadVecRegFromVecRegU256(pReNative, off, idxSimdRegDst, idxSimdRegSrc);
     
    93579391{
    93589392    uint8_t const idxSimdReg = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
    9359                                                                        kIemNativeGstSimdRegLdStSz_High128, kIemNativeGstRegUse_ForFullWrite);
     9393                                                                       kIemNativeGstSimdRegLdStSz_High128,
     9394                                                                       kIemNativeGstRegUse_ForFullWrite);
    93609395
    93619396    off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdReg);
     
    94119446
    94129447    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
    9413                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9448                                                                          kIemNativeGstSimdRegLdStSz_256,
     9449                                                                          kIemNativeGstRegUse_ForFullWrite);
    94149450
    94159451    uint8_t const idxVarReg = iemNativeVarSimdRegisterAcquire(pReNative, idxSrcVar, &off);
     
    94379473
    94389474    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    9439                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9475                                                                          kIemNativeGstSimdRegLdStSz_256,
     9476                                                                          kIemNativeGstRegUse_ForFullWrite);
    94409477
    94419478    uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
     
    94629499
    94639500    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    9464                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9501                                                                          kIemNativeGstSimdRegLdStSz_256,
     9502                                                                          kIemNativeGstRegUse_ForFullWrite);
    94659503
    94669504    uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
     
    94889526
    94899527    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    9490                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9528                                                                          kIemNativeGstSimdRegLdStSz_256,
     9529                                                                          kIemNativeGstRegUse_ForFullWrite);
    94919530
    94929531    uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
     
    95149553
    95159554    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    9516                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9555                                                                          kIemNativeGstSimdRegLdStSz_256,
     9556                                                                          kIemNativeGstRegUse_ForFullWrite);
    95179557
    95189558    uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
     
    95409580
    95419581    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
    9542                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9582                                                                          kIemNativeGstSimdRegLdStSz_256,
     9583                                                                          kIemNativeGstRegUse_ForFullWrite);
    95439584
    95449585    uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
     
    95649605
    95659606    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
    9566                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9607                                                                          kIemNativeGstSimdRegLdStSz_256,
     9608                                                                          kIemNativeGstRegUse_ForFullWrite);
    95679609
    95689610    uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
     
    95889630
    95899631    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
    9590                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9632                                                                          kIemNativeGstSimdRegLdStSz_256,
     9633                                                                          kIemNativeGstRegUse_ForFullWrite);
    95919634
    95929635    uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
     
    96139656
    96149657    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
    9615                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9658                                                                          kIemNativeGstSimdRegLdStSz_256,
     9659                                                                          kIemNativeGstRegUse_ForFullWrite);
    96169660
    96179661    uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
     
    96389682
    96399683    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
    9640                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9684                                                                          kIemNativeGstSimdRegLdStSz_256,
     9685                                                                          kIemNativeGstRegUse_ForFullWrite);
    96419686
    96429687    uint8_t const idxVarReg = iemNativeVarSimdRegisterAcquire(pReNative, idxSrcVar, &off);
     
    96639708
    96649709    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
    9665                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9710                                                                          kIemNativeGstSimdRegLdStSz_256,
     9711                                                                          kIemNativeGstRegUse_ForFullWrite);
    96669712
    96679713    uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
     
    96899735
    96909736    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
    9691                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9737                                                                          kIemNativeGstSimdRegLdStSz_256,
     9738                                                                          kIemNativeGstRegUse_ForFullWrite);
    96929739
    96939740    uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
     
    97159762
    97169763    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegDst),
    9717                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9764                                                                          kIemNativeGstSimdRegLdStSz_256,
     9765                                                                          kIemNativeGstRegUse_ForFullWrite);
    97189766    uint8_t const idxSimdRegSrcHx = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegSrcHx),
    9719                                                                             kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
     9767                                                                            kIemNativeGstSimdRegLdStSz_Low128,
     9768                                                                            kIemNativeGstRegUse_ReadOnly);
    97209769    uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
    97219770
     
    97449793
    97459794    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegDst),
    9746                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9795                                                                          kIemNativeGstSimdRegLdStSz_256,
     9796                                                                          kIemNativeGstRegUse_ForFullWrite);
    97479797    uint8_t const idxSimdRegSrcHx = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegSrcHx),
    9748                                                                             kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
     9798                                                                            kIemNativeGstSimdRegLdStSz_Low128,
     9799                                                                            kIemNativeGstRegUse_ReadOnly);
    97499800    uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
    97509801
     
    97719822{
    97729823    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
    9773                                                                           kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForUpdate);
     9824                                                                          kIemNativeGstSimdRegLdStSz_Low128,
     9825                                                                          kIemNativeGstRegUse_ForUpdate);
    97749826
    97759827    /** @todo r=aeichner For certain bit combinations we could reduce the number of emitted instructions. */
     
    98049856
    98059857    uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegSrc),
    9806                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ReadOnly);
     9858                                                                          kIemNativeGstSimdRegLdStSz_256,
     9859                                                                          kIemNativeGstRegUse_ReadOnly);
    98079860    uint8_t const idxVarReg = iemNativeVarSimdRegisterAcquire(pReNative, idxDstVar, &off);
    98089861
     
    98319884
    98329885    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegDst),
    9833                                                                           kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
     9886                                                                          kIemNativeGstSimdRegLdStSz_256,
     9887                                                                          kIemNativeGstRegUse_ForFullWrite);
    98349888    uint8_t const idxVarRegSrc  = iemNativeVarSimdRegisterAcquire(pReNative, idxSrcVar, &off, true /*fInitalized*/);
    98359889
     
    997410028     * Do all the call setup and cleanup.
    997510029     */
    9976     off = iemNativeEmitCallCommon(pReNative, off, cArgs + IEM_SSE_AIMPL_HIDDEN_ARGS, IEM_SSE_AIMPL_HIDDEN_ARGS, false /*fFlushPendingWrites*/);
     10030    off = iemNativeEmitCallCommon(pReNative, off, cArgs + IEM_SSE_AIMPL_HIDDEN_ARGS, IEM_SSE_AIMPL_HIDDEN_ARGS,
     10031                                  false /*fFlushPendingWrites*/);
    997710032
    997810033    /*
     
    1002010075/** Emits code for IEM_MC_CALL_SSE_AIMPL_3. */
    1002110076DECL_INLINE_THROW(uint32_t)
    10022 iemNativeEmitCallSseAImpl3(PIEMRECOMPILERSTATE pReNative, uint32_t off, uintptr_t pfnAImpl, uint8_t idxArg0, uint8_t idxArg1, uint8_t idxArg2)
     10077iemNativeEmitCallSseAImpl3(PIEMRECOMPILERSTATE pReNative, uint32_t off, uintptr_t pfnAImpl,
     10078                           uint8_t idxArg0, uint8_t idxArg1, uint8_t idxArg2)
    1002310079{
    1002410080    IEMNATIVE_ASSERT_ARG_VAR_IDX(pReNative, idxArg0, 0 + IEM_SSE_AIMPL_HIDDEN_ARGS);
     
    1005110107/** Emits code for IEM_MC_CALL_AVX_AIMPL_3. */
    1005210108DECL_INLINE_THROW(uint32_t)
    10053 iemNativeEmitCallAvxAImpl3(PIEMRECOMPILERSTATE pReNative, uint32_t off, uintptr_t pfnAImpl, uint8_t idxArg0, uint8_t idxArg1, uint8_t idxArg2)
     10109iemNativeEmitCallAvxAImpl3(PIEMRECOMPILERSTATE pReNative, uint32_t off, uintptr_t pfnAImpl,
     10110                           uint8_t idxArg0, uint8_t idxArg1, uint8_t idxArg2)
    1005410111{
    1005510112    IEMNATIVE_ASSERT_ARG_VAR_IDX(pReNative, idxArg0, 0 + IEM_AVX_AIMPL_HIDDEN_ARGS);
     
    1005810115    return iemNativeEmitCallSseAvxAImplCommon(pReNative, off, pfnAImpl, 3);
    1005910116}
     10117
     10118
    1006010119#endif /* IEMNATIVE_WITH_SIMD_REG_ALLOCATOR */
    1006110120
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