Index: trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h	(revision 105251)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h	(revision 105271)
@@ -247,5 +247,6 @@
     pReNative->fMc    = 0; \
     pReNative->fCImpl = (a_fFlags); \
-    return iemNativeEmitCImplCall0(pReNative, off, pCallEntry->idxInstr, a_fGstShwFlush, (uintptr_t)a_pfnCImpl, a_cbInstr) /** @todo not used ... */
+    return iemNativeEmitCImplCall0(pReNative, off, pCallEntry->idxInstr, a_fGstShwFlush, (uintptr_t)a_pfnCImpl, \
+                                   a_cbInstr) /** @todo not used ... */
 
 
@@ -319,6 +320,8 @@
 #ifdef IEMNATIVE_WITH_LIVENESS_ANALYSIS
     AssertMsg(   pReNative->idxCurCall == 0
-              || IEMLIVENESS_STATE_IS_INPUT_EXPECTED(iemNativeLivenessGetStateByGstRegEx(&pReNative->paLivenessEntries[pReNative->idxCurCall - 1], IEMLIVENESSBIT_IDX_EFL_OTHER)),
-              ("Efl_Other - %u\n", iemNativeLivenessGetStateByGstRegEx(&pReNative->paLivenessEntries[pReNative->idxCurCall - 1], IEMLIVENESSBIT_IDX_EFL_OTHER)));
+              || IEMLIVENESS_STATE_IS_INPUT_EXPECTED(iemNativeLivenessGetStateByGstRegEx(&pReNative->paLivenessEntries[pReNative->idxCurCall - 1],
+                                                                                         IEMLIVENESSBIT_IDX_EFL_OTHER)),
+              ("Efl_Other - %u\n", iemNativeLivenessGetStateByGstRegEx(&pReNative->paLivenessEntries[pReNative->idxCurCall - 1],
+                                                                       IEMLIVENESSBIT_IDX_EFL_OTHER)));
 #endif
 
@@ -334,5 +337,5 @@
     off = iemNativeEmitTestAnyBitsInGprAndTbExitIfAnySet(pReNative, off, idxEflReg,
                                                          X86_EFL_TF | CPUMCTX_DBG_HIT_DRX_MASK | CPUMCTX_DBG_DBGF_MASK,
-                                                         kIemNativeExitReason_ReturnWithFlags);
+                                                         kIemNativeLabelType_ReturnWithFlags);
     off = iemNativeEmitAndGpr32ByImm(pReNative, off, idxEflReg, ~(uint32_t)(X86_EFL_RF | CPUMCTX_INHIBIT_SHADOW));
     off = iemNativeEmitStoreGprToVCpuU32(pReNative, off, idxEflReg, RT_UOFFSETOF(VMCPU, cpum.GstCtx.eflags));
@@ -394,5 +397,5 @@
                                              RT_UOFFSETOF(VMCPU, iem.s.ppTbLookupEntryR3));
 
-        return iemNativeEmitTbExit(pReNative, off, kIemNativeExitReason_ReturnBreak);
+        return iemNativeEmitTbExit(pReNative, off, kIemNativeLabelType_ReturnBreak);
 
 #else
@@ -440,11 +443,11 @@
 
                 if (pReNative->idxLastCheckIrqCallNo != UINT32_MAX)
-                    return iemNativeEmitTbExit(pReNative, off, kIemNativeExitReason_ReturnBreakViaLookup);
-                return iemNativeEmitTbExit(pReNative, off, kIemNativeExitReason_ReturnBreakViaLookupWithIrq);
+                    return iemNativeEmitTbExit(pReNative, off, kIemNativeLabelType_ReturnBreakViaLookup);
+                return iemNativeEmitTbExit(pReNative, off, kIemNativeLabelType_ReturnBreakViaLookupWithIrq);
             }
         }
         if (pReNative->idxLastCheckIrqCallNo != UINT32_MAX)
-            return iemNativeEmitTbExit(pReNative, off, kIemNativeExitReason_ReturnBreakViaLookupWithTlb);
-        return iemNativeEmitTbExit(pReNative, off, kIemNativeExitReason_ReturnBreakViaLookupWithTlbAndIrq);
+            return iemNativeEmitTbExit(pReNative, off, kIemNativeLabelType_ReturnBreakViaLookupWithTlb);
+        return iemNativeEmitTbExit(pReNative, off, kIemNativeLabelType_ReturnBreakViaLookupWithTlbAndIrq);
 #endif
     }
@@ -1594,5 +1597,5 @@
 
 /*********************************************************************************************************************************
-*   Emitters for changing PC/RIP/EIP/IP with a RETN (Iw) instruction (IEM_MC_RETN_AND_FINISH) (requires stack emmiters).    *
+*   Emitters for changing PC/RIP/EIP/IP with a RETN (Iw) instruction (IEM_MC_RETN_AND_FINISH) (requires stack emmiters).         *
 *********************************************************************************************************************************/
 
@@ -1719,10 +1722,11 @@
                                         : (uintptr_t)iemNativeHlpStackFetchU16;
     uint8_t   const idxRegRsp       = iemNativeRegAllocTmpForGuestReg(pReNative, &off, IEMNATIVEGSTREG_GPR(X86_GREG_xSP),
-                                                                      fFlat ? kIemNativeGstRegUse_ForUpdate : kIemNativeGstRegUse_Calculation,
+                                                                      fFlat ? kIemNativeGstRegUse_ForUpdate
+                                                                            : kIemNativeGstRegUse_Calculation,
                                                                       true /*fNoVolatileRegs*/);
     uint8_t   const idxRegEffSp     = fFlat ? idxRegRsp : iemNativeRegAllocTmp(pReNative, &off);
     /** @todo can do a better job picking the register here. For cbMem >= 4 this
      *        will be the resulting register value. */
-    uint8_t   const idxRegMemResult = iemNativeRegAllocTmp(pReNative, &off); /* pointer then value; arm64 SP += 2/4 helper too.  */
+    uint8_t   const idxRegMemResult = iemNativeRegAllocTmp(pReNative, &off); /* pointer then value; arm64 SP += 2/4 helper too. */
 
     uint32_t        offFixupJumpToUseOtherBitSp = UINT32_MAX;
@@ -1956,5 +1960,6 @@
 
         /* Allocate a temporary CR0 register. */
-        uint8_t const idxCr0Reg       = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Cr0, kIemNativeGstRegUse_ReadOnly);
+        uint8_t const idxCr0Reg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Cr0,
+                                                                  kIemNativeGstRegUse_ReadOnly);
 
         /*
@@ -1963,5 +1968,6 @@
          */
         /* Test and jump. */
-        off = iemNativeEmitTestAnyBitsInGprAndTbExitIfAnySet(pReNative, off, idxCr0Reg, X86_CR0_EM | X86_CR0_TS, kIemNativeExitReason_RaiseNm);
+        off = iemNativeEmitTestAnyBitsInGprAndTbExitIfAnySet(pReNative, off, idxCr0Reg, X86_CR0_EM | X86_CR0_TS,
+                                                             kIemNativeLabelType_RaiseNm);
 
         /* Free but don't flush the CR0 register. */
@@ -2013,5 +2019,6 @@
 
         /* Allocate a temporary CR0 register. */
-        uint8_t const idxCr0Reg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Cr0, kIemNativeGstRegUse_Calculation);
+        uint8_t const idxCr0Reg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Cr0,
+                                                                  kIemNativeGstRegUse_Calculation);
 
         /*
@@ -2021,5 +2028,6 @@
         off = iemNativeEmitAndGpr32ByImm(pReNative, off, idxCr0Reg, X86_CR0_MP | X86_CR0_TS);
         /* Test and jump. */
-        off = iemNativeEmitTestIfGpr32EqualsImmAndTbExit(pReNative, off, idxCr0Reg, X86_CR0_MP | X86_CR0_TS, kIemNativeExitReason_RaiseNm);
+        off = iemNativeEmitTestIfGpr32EqualsImmAndTbExit(pReNative, off, idxCr0Reg, X86_CR0_MP | X86_CR0_TS,
+                                                         kIemNativeLabelType_RaiseNm);
 
         /* Free the CR0 register. */
@@ -2065,5 +2073,6 @@
 
     /* Allocate a temporary FSW register. */
-    uint8_t const idxFpuFswReg    = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_FpuFsw, kIemNativeGstRegUse_ReadOnly);
+    uint8_t const idxFpuFswReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_FpuFsw,
+                                                                 kIemNativeGstRegUse_ReadOnly);
 
     /*
@@ -2072,5 +2081,5 @@
      */
     /* Test and jump. */
-    off = iemNativeEmitTestBitInGprAndTbExitIfSet(pReNative, off, idxFpuFswReg, X86_FSW_ES_BIT, kIemNativeExitReason_RaiseMf);
+    off = iemNativeEmitTestBitInGprAndTbExitIfSet(pReNative, off, idxFpuFswReg, X86_FSW_ES_BIT, kIemNativeLabelType_RaiseMf);
 
     /* Free but don't flush the FSW register. */
@@ -2136,5 +2145,5 @@
         off = iemNativeEmitAndGpr32ByImmEx(pCodeBuf, off,   idxTmpReg, X86_CR0_EM | X86_CR0_TS | X86_CR4_OSFXSR);
         off = iemNativeEmitXorGpr32ByImmEx(pCodeBuf, off,   idxTmpReg, X86_CR4_OSFXSR);
-        off = iemNativeEmitJccTbExitEx(pReNative, pCodeBuf, off, kIemNativeExitReason_RaiseSseRelated, kIemNativeInstrCond_ne);
+        off = iemNativeEmitJccTbExitEx(pReNative, pCodeBuf, off, kIemNativeLabelType_RaiseSseRelated, kIemNativeInstrCond_ne);
 
 #elif defined(RT_ARCH_ARM64)
@@ -2154,5 +2163,5 @@
         /* -> idxTmpReg[0]=~OSFXSR; idxTmpReg[2]=EM; idxTmpReg[3]=TS; (the rest is zero) */
         off = iemNativeEmitTestIfGprIsNotZeroAndTbExitEx(pReNative, pCodeBuf, off, idxTmpReg, false /*f64Bit*/,
-                                                         kIemNativeExitReason_RaiseSseRelated);
+                                                         kIemNativeLabelType_RaiseSseRelated);
 
 #else
@@ -2242,5 +2251,5 @@
         off = iemNativeEmitXorGpr32ByImmEx(pCodeBuf, off,                idxTmpReg, ((XSAVE_C_YMM | XSAVE_C_SSE) << 2) | 2);
         /* -> idxTmpReg[0]=CR0.TS idxTmpReg[1]=~CR4.OSXSAVE; idxTmpReg[2]=0; idxTmpReg[3]=~SSE; idxTmpReg[4]=~YMM; */
-        off = iemNativeEmitJccTbExitEx(pReNative, pCodeBuf, off, kIemNativeExitReason_RaiseAvxRelated, kIemNativeInstrCond_ne);
+        off = iemNativeEmitJccTbExitEx(pReNative, pCodeBuf, off, kIemNativeLabelType_RaiseAvxRelated, kIemNativeInstrCond_ne);
 
 #elif defined(RT_ARCH_ARM64)
@@ -2261,5 +2270,5 @@
         /* -> idxTmpReg[0]=CR0.TS; idxTmpReg[1]=~CR4.OSXSAVE; idxTmpReg[2]=~SSE; idxTmpReg[3]=~YMM; (the rest is zero) */
         off = iemNativeEmitTestIfGprIsNotZeroAndTbExitEx(pReNative, pCodeBuf, off, idxTmpReg, false /*f64Bit*/,
-                                                         kIemNativeExitReason_RaiseAvxRelated);
+                                                         kIemNativeLabelType_RaiseAvxRelated);
 
 #else
@@ -2302,5 +2311,6 @@
 #endif
 
-    uint8_t const idxRegMxCsr = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_MxCsr, kIemNativeGstRegUse_ReadOnly);
+    uint8_t const idxRegMxCsr = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_MxCsr,
+                                                                kIemNativeGstRegUse_ReadOnly);
     uint8_t const idxRegTmp   = iemNativeRegAllocTmp(pReNative, &off);
 
@@ -2316,5 +2326,5 @@
     off = iemNativeEmitAndGpr32ByGpr32(pReNative, off, idxRegTmp, idxRegMxCsr);
     off = iemNativeEmitTestAnyBitsInGprAndTbExitIfAnySet(pReNative, off, idxRegTmp, X86_MXCSR_XCPT_FLAGS,
-                                                         kIemNativeExitReason_RaiseSseAvxFpRelated);
+                                                         kIemNativeLabelType_RaiseSseAvxFpRelated);
 
     /* Free but don't flush the MXCSR register. */
@@ -2353,5 +2363,5 @@
 
     /* raise \#DE exception unconditionally. */
-    return iemNativeEmitTbExit(pReNative, off, kIemNativeExitReason_RaiseDe);
+    return iemNativeEmitTbExit(pReNative, off, kIemNativeLabelType_RaiseDe);
 }
 
@@ -2371,5 +2381,6 @@
  */
 DECL_INLINE_THROW(uint32_t)
-iemNativeEmitRaiseGp0IfEffAddrUnaligned(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr, uint8_t idxVarEffAddr, uint8_t cbAlign)
+iemNativeEmitRaiseGp0IfEffAddrUnaligned(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr,
+                                        uint8_t idxVarEffAddr, uint8_t cbAlign)
 {
     IEMNATIVE_ASSERT_VAR_IDX(pReNative, idxVarEffAddr);
@@ -2390,5 +2401,5 @@
 
     off = iemNativeEmitTestAnyBitsInGprAndTbExitIfAnySet(pReNative, off, idxVarReg, cbAlign - 1,
-                                                         kIemNativeExitReason_RaiseGp0);
+                                                         kIemNativeLabelType_RaiseGp0);
 
     iemNativeVarRegisterRelease(pReNative, idxVarEffAddr);
@@ -3430,5 +3441,5 @@
 #endif
     fGstShwFlush = iemNativeCImplFlagsToGuestShadowFlushMask(pReNative->fCImpl, fGstShwFlush | RT_BIT_64(kIemNativeGstReg_Pc));
-    if (!(pReNative->fMc & IEM_MC_F_WITHOUT_FLAGS)) /** @todo We don't emit with-flags/without-flags variations for CIMPL calls.  */
+    if (!(pReNative->fMc & IEM_MC_F_WITHOUT_FLAGS)) /** @todo We don't emit with-flags/without-flags variations for CIMPL calls. */
         fGstShwFlush |= RT_BIT_64(kIemNativeGstReg_EFlags);
     iemNativeRegFlushGuestShadows(pReNative, fGstShwFlush);
@@ -5210,5 +5221,6 @@
 
 /** Handles IEM_MC_SET_EFL_BIT/IEM_MC_CLEAR_EFL_BIT/IEM_MC_FLIP_EFL_BIT. */
-DECL_INLINE_THROW(uint32_t) iemNativeEmitModifyEFlagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fEflBit, IEMNATIVEMITEFLOP enmOp)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitModifyEFlagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fEflBit, IEMNATIVEMITEFLOP enmOp)
 {
     uint8_t const idxEflReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
@@ -6679,5 +6691,6 @@
          */
         /* Allocate a temporary PC register. */
-        uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc, kIemNativeGstRegUse_ForUpdate);
+        uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc,
+                                                                 kIemNativeGstRegUse_ForUpdate);
 
         /* Restore the original value. */
@@ -8010,5 +8023,6 @@
             AssertMsg(   pReNative->idxCurCall == 0
                       || IEMLIVENESS_STATE_IS_CLOBBER_EXPECTED(iemNativeLivenessGetPrevStateByGstReg(pReNative, IEMNATIVEGSTREG_GPR(idxGReg))),
-                      ("%s - %u\n", g_aGstShadowInfo[idxGReg].pszName, iemNativeLivenessGetPrevStateByGstReg(pReNative, IEMNATIVEGSTREG_GPR(idxGReg))));
+                      ("%s - %u\n", g_aGstShadowInfo[idxGReg].pszName,
+                       iemNativeLivenessGetPrevStateByGstReg(pReNative, IEMNATIVEGSTREG_GPR(idxGReg))));
 #endif
             iemNativeRegClearAndMarkAsGstRegShadow(pReNative, idxRegMemResult,  IEMNATIVEGSTREG_GPR(idxGReg), off);
@@ -8866,7 +8880,9 @@
         /* Allocate destination and source register. */
         uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXRegDst),
-                                                                              kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForFullWrite);
+                                                                              kIemNativeGstSimdRegLdStSz_Low128,
+                                                                              kIemNativeGstRegUse_ForFullWrite);
         uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXRegSrc),
-                                                                              kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
+                                                                              kIemNativeGstSimdRegLdStSz_Low128,
+                                                                              kIemNativeGstRegUse_ReadOnly);
 
         off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxSimdRegSrc);
@@ -8920,5 +8936,6 @@
 
     uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
+                                                                          kIemNativeGstSimdRegLdStSz_Low128,
+                                                                          kIemNativeGstRegUse_ReadOnly);
 
     iemNativeVarSetKindToStack(pReNative, idxDstVar);
@@ -8949,5 +8966,6 @@
 
     uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
+                                                                          kIemNativeGstSimdRegLdStSz_Low128,
+                                                                          kIemNativeGstRegUse_ReadOnly);
 
     iemNativeVarSetKindToStack(pReNative, idxDstVar);
@@ -8975,5 +8993,6 @@
 
     uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
+                                                                          kIemNativeGstSimdRegLdStSz_Low128,
+                                                                          kIemNativeGstRegUse_ReadOnly);
 
     iemNativeVarSetKindToStack(pReNative, idxDstVar);
@@ -9001,5 +9020,6 @@
 
     uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
+                                                                          kIemNativeGstSimdRegLdStSz_Low128,
+                                                                          kIemNativeGstRegUse_ReadOnly);
 
     iemNativeVarSetKindToStack(pReNative, idxDstVar);
@@ -9032,5 +9052,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_Low128,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
     uint8_t const idxVarReg     = iemNativeVarSimdRegisterAcquire(pReNative, idxSrcVar, &off, true /*fInitialized*/);
 
@@ -9083,5 +9104,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForUpdate);
+                                                                          kIemNativeGstSimdRegLdStSz_Low128,
+                                                                          kIemNativeGstRegUse_ForUpdate);
     uint8_t const idxVarReg     = iemNativeVarRegisterAcquire(pReNative, idxDstVar, &off, true /*fInitialized*/);
 
@@ -9114,5 +9136,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForUpdate);
+                                                                          kIemNativeGstSimdRegLdStSz_Low128,
+                                                                          kIemNativeGstRegUse_ForUpdate);
     uint8_t const idxVarReg     = iemNativeVarRegisterAcquire(pReNative, idxDstVar, &off, true /*fInitialized*/);
 
@@ -9140,5 +9163,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForUpdate);
+                                                                          kIemNativeGstSimdRegLdStSz_Low128,
+                                                                          kIemNativeGstRegUse_ForUpdate);
     uint8_t const idxVarReg     = iemNativeVarRegisterAcquire(pReNative, idxDstVar, &off, true /*fInitialized*/);
 
@@ -9167,5 +9191,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForUpdate);
+                                                                          kIemNativeGstSimdRegLdStSz_Low128,
+                                                                          kIemNativeGstRegUse_ForUpdate);
     uint8_t const idxVarReg     = iemNativeVarSimdRegisterAcquire(pReNative, idxSrcVar, &off, true /*fInitialized*/);
 
@@ -9189,7 +9214,10 @@
 {
     /*
-     * The iYRegSrc == iYRegDst case needs to be treated differently here, because if iYRegDst gets allocated first for the full write
-     * it won't load the actual value from CPUMCTX. When allocating iYRegSrc afterwards it will get duplicated from the already
-     * allocated host register for iYRegDst containing garbage. This will be catched by the guest register value checking in debug builds.
+     * The iYRegSrc == iYRegDst case needs to be treated differently here, because
+     * if iYRegDst gets allocated first for the full write  it won't load the
+     * actual value from CPUMCTX.  When allocating iYRegSrc afterwards it will get
+     * duplicated from the already allocated host register for iYRegDst containing
+     * garbage.  This will be catched by the guest register value checking in debug
+     * builds.
      */
     if (iYRegDst != iYRegSrc)
@@ -9214,5 +9242,6 @@
         /* This effectively only clears the upper 128-bits of the register. */
         uint8_t const idxSimdReg = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegDst),
-                                                                           kIemNativeGstSimdRegLdStSz_High128, kIemNativeGstRegUse_ForFullWrite);
+                                                                           kIemNativeGstSimdRegLdStSz_High128,
+                                                                           kIemNativeGstRegUse_ForFullWrite);
 
         off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdReg);
@@ -9234,8 +9263,11 @@
 {
     /*
-     * The iYRegSrc == iYRegDst case needs to be treated differently here, because if iYRegDst gets allocated first for the full write
-     * it won't load the actual value from CPUMCTX. When allocating iYRegSrc afterwards it will get duplicated from the already
-     * allocated host register for iYRegDst containing garbage. This will be catched by the guest register value checking in debug builds.
-     * iYRegSrc == iYRegDst would effectively only clear any upper 256-bits for a zmm register we don't support yet, so this is just a nop.
+     * The iYRegSrc == iYRegDst case needs to be treated differently here, because
+     * if iYRegDst gets allocated first for the full write it won't load the
+     * actual value from CPUMCTX.  When allocating iYRegSrc afterwards it will get
+     * duplicated from the already allocated host register for iYRegDst containing
+     * garbage. This will be catched by the guest register value checking in debug
+     * builds. iYRegSrc == iYRegDst would effectively only clear any upper 256-bits
+     * for a zmm register we don't support yet, so this is just a nop.
      */
     if (iYRegDst != iYRegSrc)
@@ -9243,7 +9275,9 @@
         /* Allocate destination and source register. */
         uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegSrc),
-                                                                              kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ReadOnly);
+                                                                              kIemNativeGstSimdRegLdStSz_256,
+                                                                              kIemNativeGstRegUse_ReadOnly);
         uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegDst),
-                                                                              kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                              kIemNativeGstSimdRegLdStSz_256,
+                                                                              kIemNativeGstRegUse_ForFullWrite);
 
         off = iemNativeEmitSimdLoadVecRegFromVecRegU256(pReNative, off, idxSimdRegDst, idxSimdRegSrc);
@@ -9357,5 +9391,6 @@
 {
     uint8_t const idxSimdReg = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
-                                                                       kIemNativeGstSimdRegLdStSz_High128, kIemNativeGstRegUse_ForFullWrite);
+                                                                       kIemNativeGstSimdRegLdStSz_High128,
+                                                                       kIemNativeGstRegUse_ForFullWrite);
 
     off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdReg);
@@ -9411,5 +9446,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
 
     uint8_t const idxVarReg = iemNativeVarSimdRegisterAcquire(pReNative, idxSrcVar, &off);
@@ -9437,5 +9473,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
 
     uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
@@ -9462,5 +9499,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
 
     uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
@@ -9488,5 +9526,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
 
     uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
@@ -9514,5 +9553,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
 
     uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
@@ -9540,5 +9580,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
 
     uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
@@ -9564,5 +9605,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
 
     uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
@@ -9588,5 +9630,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
 
     uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
@@ -9613,5 +9656,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
 
     uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
@@ -9638,5 +9682,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
 
     uint8_t const idxVarReg = iemNativeVarSimdRegisterAcquire(pReNative, idxSrcVar, &off);
@@ -9663,5 +9708,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
 
     uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
@@ -9689,5 +9735,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
 
     uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
@@ -9715,7 +9762,9 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegDst),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
     uint8_t const idxSimdRegSrcHx = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegSrcHx),
-                                                                            kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
+                                                                            kIemNativeGstSimdRegLdStSz_Low128,
+                                                                            kIemNativeGstRegUse_ReadOnly);
     uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
 
@@ -9744,7 +9793,9 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegDst),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
     uint8_t const idxSimdRegSrcHx = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegSrcHx),
-                                                                            kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ReadOnly);
+                                                                            kIemNativeGstSimdRegLdStSz_Low128,
+                                                                            kIemNativeGstRegUse_ReadOnly);
     uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxSrcVar, &off);
 
@@ -9771,5 +9822,6 @@
 {
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
-                                                                          kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForUpdate);
+                                                                          kIemNativeGstSimdRegLdStSz_Low128,
+                                                                          kIemNativeGstRegUse_ForUpdate);
 
     /** @todo r=aeichner For certain bit combinations we could reduce the number of emitted instructions. */
@@ -9804,5 +9856,6 @@
 
     uint8_t const idxSimdRegSrc = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegSrc),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ReadOnly);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ReadOnly);
     uint8_t const idxVarReg = iemNativeVarSimdRegisterAcquire(pReNative, idxDstVar, &off);
 
@@ -9831,5 +9884,6 @@
 
     uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYRegDst),
-                                                                          kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite);
+                                                                          kIemNativeGstSimdRegLdStSz_256,
+                                                                          kIemNativeGstRegUse_ForFullWrite);
     uint8_t const idxVarRegSrc  = iemNativeVarSimdRegisterAcquire(pReNative, idxSrcVar, &off, true /*fInitalized*/);
 
@@ -9974,5 +10028,6 @@
      * Do all the call setup and cleanup.
      */
-    off = iemNativeEmitCallCommon(pReNative, off, cArgs + IEM_SSE_AIMPL_HIDDEN_ARGS, IEM_SSE_AIMPL_HIDDEN_ARGS, false /*fFlushPendingWrites*/);
+    off = iemNativeEmitCallCommon(pReNative, off, cArgs + IEM_SSE_AIMPL_HIDDEN_ARGS, IEM_SSE_AIMPL_HIDDEN_ARGS,
+                                  false /*fFlushPendingWrites*/);
 
     /*
@@ -10020,5 +10075,6 @@
 /** Emits code for IEM_MC_CALL_SSE_AIMPL_3. */
 DECL_INLINE_THROW(uint32_t)
-iemNativeEmitCallSseAImpl3(PIEMRECOMPILERSTATE pReNative, uint32_t off, uintptr_t pfnAImpl, uint8_t idxArg0, uint8_t idxArg1, uint8_t idxArg2)
+iemNativeEmitCallSseAImpl3(PIEMRECOMPILERSTATE pReNative, uint32_t off, uintptr_t pfnAImpl,
+                           uint8_t idxArg0, uint8_t idxArg1, uint8_t idxArg2)
 {
     IEMNATIVE_ASSERT_ARG_VAR_IDX(pReNative, idxArg0, 0 + IEM_SSE_AIMPL_HIDDEN_ARGS);
@@ -10051,5 +10107,6 @@
 /** Emits code for IEM_MC_CALL_AVX_AIMPL_3. */
 DECL_INLINE_THROW(uint32_t)
-iemNativeEmitCallAvxAImpl3(PIEMRECOMPILERSTATE pReNative, uint32_t off, uintptr_t pfnAImpl, uint8_t idxArg0, uint8_t idxArg1, uint8_t idxArg2)
+iemNativeEmitCallAvxAImpl3(PIEMRECOMPILERSTATE pReNative, uint32_t off, uintptr_t pfnAImpl,
+                           uint8_t idxArg0, uint8_t idxArg1, uint8_t idxArg2)
 {
     IEMNATIVE_ASSERT_ARG_VAR_IDX(pReNative, idxArg0, 0 + IEM_AVX_AIMPL_HIDDEN_ARGS);
@@ -10058,4 +10115,6 @@
     return iemNativeEmitCallSseAvxAImplCommon(pReNative, off, pfnAImpl, 3);
 }
+
+
 #endif /* IEMNATIVE_WITH_SIMD_REG_ALLOCATOR */
 
