Changeset 105399 in vbox for trunk/include
- Timestamp:
- Jul 18, 2024 12:16:59 PM (4 months ago)
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- 1 edited
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trunk/include/iprt/armv8.h
r105386 r105399 4891 4891 4892 4892 4893 /** 4894 * A64: Encodes SHLL/SHLL2/USHLL/USHLL2 (vector, register). 4895 * 4896 * @returns The encoded instruction. 4897 * @param iVecRegDst The vector register to put the result into. 4898 * @param iVecRegSrc The vector source register. 4899 * @param cShift Number of bits to shift. 4900 * @param enmSz Element size of the source vector register, the destination vector register 4901 * element size is twice as large, kArmv8InstrShiftSz_U64 is invalid. 4902 * @param fUnsigned Flag whether this is an unsigned shift left (true, default) or signed (false). 4903 * @param fUpper Flag whether this operates on the lower half (false, default) of the source vector register 4904 * or the upper half (true). 4905 */ 4906 DECL_FORCE_INLINE(uint32_t) Armv8A64MkVecInstrUShll(uint32_t iVecRegDst, uint32_t iVecRegSrc, uint8_t cShift, ARMV8INSTRUSHIFTSZ enmSz, 4907 bool fUnsigned = true, bool fUpper = false) 4908 { 4909 Assert(iVecRegDst < 32); Assert(iVecRegSrc < 32); 4910 Assert( (enmSz == kArmv8InstrShiftSz_U8 && cShift < 8) 4911 || (enmSz == kArmv8InstrShiftSz_U16 && cShift < 16) 4912 || (enmSz == kArmv8InstrShiftSz_U32 && cShift < 32)); 4913 4914 return UINT32_C(0x0f00a400) 4915 | ((uint32_t)fUpper << 30) 4916 | ((uint32_t)fUnsigned << 29) 4917 | (((uint32_t)enmSz | cShift) << 16) 4918 | (iVecRegSrc << 5) 4919 | iVecRegDst; 4920 } 4921 4922 4893 4923 /** Armv8 vector arith ops element size. */ 4894 4924 typedef enum ARMV8INSTRVECARITHSZ
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