Changeset 105670 in vbox for trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/Library/MtrrLib
- Timestamp:
- Aug 14, 2024 1:16:30 PM (9 months ago)
- svn:sync-xref-src-repo-rev:
- 164367
- Location:
- trunk/src/VBox/Devices/EFI/FirmwareNew
- Files:
-
- 4 edited
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- Removed
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trunk/src/VBox/Devices/EFI/FirmwareNew
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trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
r101291 r105670 6 6 except for MtrrSetAllMtrrs() which is used to sync BSP's MTRR setting to APs. 7 7 8 Copyright (c) 2008 - 202 0, Intel Corporation. All rights reserved.<BR>8 Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.<BR> 9 9 SPDX-License-Identifier: BSD-2-Clause-Patent 10 10 … … 34 34 // 35 35 typedef struct { 36 UINTN Cr4; 37 BOOLEAN InterruptState; 36 UINTN Cr4; 37 BOOLEAN InterruptState; 38 MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType; 38 39 } MTRR_CONTEXT; 39 40 … … 142 143 143 144 /** 145 Return whether MTRR is supported. 146 147 @param[out] FixedMtrrSupported Return whether fixed MTRR is supported. 148 @param[out] VariableMtrrCount Return the max number of variable MTRRs. 149 150 @retval TRUE MTRR is supported when either fixed MTRR is supported or max number 151 of variable MTRRs is not 0. 152 @retval FALSE MTRR is not supported when both fixed MTRR is not supported and max 153 number of variable MTRRs is 0. 154 **/ 155 BOOLEAN 156 MtrrLibIsMtrrSupported ( 157 OUT BOOLEAN *FixedMtrrSupported OPTIONAL, 158 OUT UINT32 *VariableMtrrCount OPTIONAL 159 ) 160 { 161 CPUID_VERSION_INFO_EDX Edx; 162 MSR_IA32_MTRRCAP_REGISTER MtrrCap; 163 164 // 165 // Check CPUID(1).EDX[12] for MTRR capability 166 // 167 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &Edx.Uint32); 168 if (Edx.Bits.MTRR == 0) { 169 if (FixedMtrrSupported != NULL) { 170 *FixedMtrrSupported = FALSE; 171 } 172 173 if (VariableMtrrCount != NULL) { 174 *VariableMtrrCount = 0; 175 } 176 177 return FALSE; 178 } 179 180 // 181 // Check the number of variable MTRRs and determine whether fixed MTRRs exist. 182 // If the count of variable MTRRs is zero and there are no fixed MTRRs, 183 // then return false 184 // 185 MtrrCap.Uint64 = AsmReadMsr64 (MSR_IA32_MTRRCAP); 186 ASSERT (MtrrCap.Bits.VCNT <= ARRAY_SIZE (((MTRR_VARIABLE_SETTINGS *)0)->Mtrr)); 187 if (FixedMtrrSupported != NULL) { 188 *FixedMtrrSupported = (BOOLEAN)(MtrrCap.Bits.FIX == 1); 189 } 190 191 if (VariableMtrrCount != NULL) { 192 *VariableMtrrCount = MtrrCap.Bits.VCNT; 193 } 194 195 if ((MtrrCap.Bits.VCNT == 0) && (MtrrCap.Bits.FIX == 0)) { 196 return FALSE; 197 } 198 199 return TRUE; 200 } 201 202 /** 144 203 Worker function returns the variable MTRR count for the CPU. 145 204 … … 234 293 MTRR_MEMORY_CACHE_TYPE 235 294 MtrrGetDefaultMemoryTypeWorker ( 236 IN MTRR_SETTINGS *MtrrSetting295 IN CONST MTRR_SETTINGS *MtrrSetting 237 296 ) 238 297 { … … 305 364 306 365 // 307 // Disable MTRRs 308 // 309 DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE); 310 DefType.Bits.E = 0; 366 // Save current MTRR default type and disable MTRRs 367 // 368 MtrrContext->DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE); 369 DefType.Uint64 = MtrrContext->DefType.Uint64; 370 DefType.Bits.E = 0; 311 371 AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64); 312 372 } … … 361 421 ) 362 422 { 363 MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType;364 365 423 // 366 424 // Enable Cache MTRR 367 // 368 DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);369 DefType.Bits.E = 1;370 DefType.Bits.FE = 1;371 AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64);425 // Note: It's possible that MTRR was not enabled earlier. 426 // But it will be enabled here unconditionally. 427 // 428 MtrrContext->DefType.Bits.E = 1; 429 AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, MtrrContext->DefType.Uint64); 372 430 373 431 MtrrLibPostMtrrChangeEnableCache (MtrrContext); … … 411 469 ) 412 470 { 413 if (!IsMtrrSupported ()) { 471 BOOLEAN FixedMtrrSupported; 472 473 MtrrLibIsMtrrSupported (&FixedMtrrSupported, NULL); 474 475 if (!FixedMtrrSupported) { 414 476 return FixedSettings; 415 477 } … … 629 691 UINT32 630 692 MtrrLibGetRawVariableRanges ( 631 IN MTRR_VARIABLE_SETTINGS *VariableSettings,632 IN UINTN VariableMtrrCount,633 IN UINT64 MtrrValidBitsMask,634 IN UINT64 MtrrValidAddressMask,635 OUT MTRR_MEMORY_RANGE *VariableMtrr693 IN CONST MTRR_VARIABLE_SETTINGS *VariableSettings, 694 IN UINTN VariableMtrrCount, 695 IN UINT64 MtrrValidBitsMask, 696 IN UINT64 MtrrValidAddressMask, 697 OUT MTRR_MEMORY_RANGE *VariableMtrr 636 698 ) 637 699 { … … 996 1058 UINTN EndIndex; 997 1059 UINTN DeltaCount; 1060 1061 ASSERT (Length != 0); 998 1062 999 1063 LengthRight = 0; … … 1761 1825 RETURN_STATUS 1762 1826 MtrrLibApplyFixedMtrrs ( 1763 IN MTRR_FIXED_SETTINGS *Fixed,1764 IN OUT MTRR_MEMORY_RANGE *Ranges,1765 IN UINTN RangeCapacity,1766 IN OUT UINTN *RangeCount1827 IN CONST MTRR_FIXED_SETTINGS *Fixed, 1828 IN OUT MTRR_MEMORY_RANGE *Ranges, 1829 IN UINTN RangeCapacity, 1830 IN OUT UINTN *RangeCount 1767 1831 ) 1768 1832 { … … 2275 2339 UINT64 BaseAddress; 2276 2340 UINT64 Length; 2277 BOOLEAN Above1MbExist;2341 BOOLEAN VariableMtrrNeeded; 2278 2342 2279 2343 UINT64 MtrrValidBitsMask; … … 2292 2356 BOOLEAN VariableSettingModified[ARRAY_SIZE (MtrrSetting->Variables.Mtrr)]; 2293 2357 2294 UINT64 ClearMasks[ARRAY_SIZE (mMtrrLibFixedMtrrTable)]; 2295 UINT64 OrMasks[ARRAY_SIZE (mMtrrLibFixedMtrrTable)]; 2358 UINT64 FixedMtrrMemoryLimit; 2359 BOOLEAN FixedMtrrSupported; 2360 UINT64 ClearMasks[ARRAY_SIZE (mMtrrLibFixedMtrrTable)]; 2361 UINT64 OrMasks[ARRAY_SIZE (mMtrrLibFixedMtrrTable)]; 2296 2362 2297 2363 MTRR_CONTEXT MtrrContext; … … 2309 2375 // TRUE indicating the caller requests to set variable MTRRs. 2310 2376 // 2311 Above1MbExist= FALSE;2377 VariableMtrrNeeded = FALSE; 2312 2378 OriginalVariableMtrrCount = 0; 2313 2379 … … 2338 2404 // 1. Validate the parameters. 2339 2405 // 2340 if (! IsMtrrSupported ()) {2406 if (!MtrrLibIsMtrrSupported (&FixedMtrrSupported, &OriginalVariableMtrrCount)) { 2341 2407 Status = RETURN_UNSUPPORTED; 2342 2408 goto Exit; 2343 2409 } 2410 2411 FixedMtrrMemoryLimit = FixedMtrrSupported ? BASE_1MB : 0; 2344 2412 2345 2413 for (Index = 0; Index < RangeCount; Index++) { … … 2372 2440 } 2373 2441 2374 if (Ranges[Index].BaseAddress + Ranges[Index].Length > BASE_1MB) {2375 Above1MbExist= TRUE;2442 if (Ranges[Index].BaseAddress + Ranges[Index].Length > FixedMtrrMemoryLimit) { 2443 VariableMtrrNeeded = TRUE; 2376 2444 } 2377 2445 } … … 2380 2448 // 2. Apply the above-1MB memory attribute settings. 2381 2449 // 2382 if ( Above1MbExist) {2450 if (VariableMtrrNeeded) { 2383 2451 // 2384 2452 // 2.1. Read all variable MTRRs and convert to Ranges. 2385 2453 // 2386 OriginalVariableMtrrCount = GetVariableMtrrCountWorker ();2387 2454 MtrrGetVariableMtrrWorker (MtrrSetting, OriginalVariableMtrrCount, &VariableSettings); 2388 2455 MtrrLibGetRawVariableRanges ( … … 2416 2483 // 2.2. Force [0, 1M) to UC, so that it doesn't impact subtraction algorithm. 2417 2484 // 2418 Status = MtrrLibSetMemoryType ( 2419 WorkingRanges, 2420 ARRAY_SIZE (WorkingRanges), 2421 &WorkingRangeCount, 2422 0, 2423 SIZE_1MB, 2424 CacheUncacheable 2425 ); 2426 ASSERT (Status != RETURN_OUT_OF_RESOURCES); 2485 if (FixedMtrrMemoryLimit != 0) { 2486 Status = MtrrLibSetMemoryType ( 2487 WorkingRanges, 2488 ARRAY_SIZE (WorkingRanges), 2489 &WorkingRangeCount, 2490 0, 2491 FixedMtrrMemoryLimit, 2492 CacheUncacheable 2493 ); 2494 ASSERT (Status != RETURN_OUT_OF_RESOURCES); 2495 } 2427 2496 2428 2497 // … … 2433 2502 BaseAddress = Ranges[Index].BaseAddress; 2434 2503 Length = Ranges[Index].Length; 2435 if (BaseAddress < BASE_1MB) {2436 if (Length <= BASE_1MB- BaseAddress) {2504 if (BaseAddress < FixedMtrrMemoryLimit) { 2505 if (Length <= FixedMtrrMemoryLimit - BaseAddress) { 2437 2506 continue; 2438 2507 } 2439 2508 2440 Length -= BASE_1MB- BaseAddress;2441 BaseAddress = BASE_1MB;2509 Length -= FixedMtrrMemoryLimit - BaseAddress; 2510 BaseAddress = FixedMtrrMemoryLimit; 2442 2511 } 2443 2512 … … 2484 2553 // 2485 2554 for (Index = 0; Index < WorkingVariableMtrrCount; Index++) { 2486 if ((WorkingVariableMtrr[Index].BaseAddress == 0) && (WorkingVariableMtrr[Index].Length == SIZE_1MB)) {2555 if ((WorkingVariableMtrr[Index].BaseAddress == 0) && (WorkingVariableMtrr[Index].Length == FixedMtrrMemoryLimit)) { 2487 2556 ASSERT (WorkingVariableMtrr[Index].Type == CacheUncacheable); 2488 2557 WorkingVariableMtrrCount--; … … 2523 2592 ZeroMem (OrMasks, sizeof (OrMasks)); 2524 2593 for (Index = 0; Index < RangeCount; Index++) { 2525 if (Ranges[Index].BaseAddress >= BASE_1MB) {2594 if (Ranges[Index].BaseAddress >= FixedMtrrMemoryLimit) { 2526 2595 continue; 2527 2596 } … … 2546 2615 if (ClearMasks[Index] != 0) { 2547 2616 if (MtrrSetting != NULL) { 2548 MtrrSetting->Fixed.Mtrr[Index] = (MtrrSetting->Fixed.Mtrr[Index] & ~ClearMasks[Index]) | OrMasks[Index]; 2617 // 2618 // Fixed MTRR is modified indicating fixed MTRR should be enabled in the end of MTRR programming. 2619 // 2620 ((MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&MtrrSetting->MtrrDefType)->Bits.FE = 1; 2621 MtrrSetting->Fixed.Mtrr[Index] = (MtrrSetting->Fixed.Mtrr[Index] & ~ClearMasks[Index]) | OrMasks[Index]; 2549 2622 } else { 2550 2623 if (!MtrrContextValid) { 2551 2624 MtrrLibPreMtrrChange (&MtrrContext); 2552 MtrrContextValid = TRUE; 2625 // 2626 // Fixed MTRR is modified indicating fixed MTRR should be enabled in the end of MTRR programming. 2627 // 2628 MtrrContext.DefType.Bits.FE = 1; 2629 MtrrContextValid = TRUE; 2553 2630 } 2554 2631 … … 2593 2670 2594 2671 if (MtrrSetting != NULL) { 2595 ((MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&MtrrSetting->MtrrDefType)->Bits.E = 1; 2596 ((MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&MtrrSetting->MtrrDefType)->Bits.FE = 1; 2672 // 2673 // Enable MTRR unconditionally 2674 // 2675 ((MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&MtrrSetting->MtrrDefType)->Bits.E = 1; 2597 2676 } else { 2598 2677 if (MtrrContextValid) { … … 2767 2846 ) 2768 2847 { 2769 if (!IsMtrrSupported ()) { 2848 BOOLEAN FixedMtrrSupported; 2849 UINT32 VariableMtrrCount; 2850 MSR_IA32_MTRR_DEF_TYPE_REGISTER *MtrrDefType; 2851 2852 ZeroMem (MtrrSetting, sizeof (*MtrrSetting)); 2853 2854 MtrrDefType = (MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&MtrrSetting->MtrrDefType; 2855 if (!MtrrLibIsMtrrSupported (&FixedMtrrSupported, &VariableMtrrCount)) { 2770 2856 return MtrrSetting; 2771 2857 } 2772 2858 2773 2859 // 2860 // Get MTRR_DEF_TYPE value 2861 // 2862 MtrrDefType->Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE); 2863 2864 // 2865 // Enabling the Fixed MTRR bit when unsupported is not allowed. 2866 // 2867 ASSERT (FixedMtrrSupported || (MtrrDefType->Bits.FE == 0)); 2868 2869 // 2774 2870 // Get fixed MTRRs 2775 2871 // 2776 MtrrGetFixedMtrrWorker (&MtrrSetting->Fixed); 2872 if (MtrrDefType->Bits.FE == 1) { 2873 MtrrGetFixedMtrrWorker (&MtrrSetting->Fixed); 2874 } 2777 2875 2778 2876 // … … 2781 2879 MtrrGetVariableMtrrWorker ( 2782 2880 NULL, 2783 GetVariableMtrrCountWorker (),2881 VariableMtrrCount, 2784 2882 &MtrrSetting->Variables 2785 2883 ); 2786 2884 2787 //2788 // Get MTRR_DEF_TYPE value2789 //2790 MtrrSetting->MtrrDefType = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);2791 2792 2885 return MtrrSetting; 2793 2886 } 2794 2887 2795 2888 /** 2796 This function sets all MTRRs (variable and fixed) 2889 This function sets all MTRRs includes Variable and Fixed. 2890 2891 The behavior of this function is to program everything in MtrrSetting to hardware. 2892 MTRRs might not be enabled because the enable bit is clear in MtrrSetting->MtrrDefType. 2797 2893 2798 2894 @param[in] MtrrSetting A buffer holding all MTRRs content. … … 2807 2903 ) 2808 2904 { 2809 MTRR_CONTEXT MtrrContext; 2810 2811 if (!IsMtrrSupported ()) { 2905 BOOLEAN FixedMtrrSupported; 2906 MSR_IA32_MTRR_DEF_TYPE_REGISTER *MtrrDefType; 2907 MTRR_CONTEXT MtrrContext; 2908 2909 MtrrDefType = (MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&MtrrSetting->MtrrDefType; 2910 if (!MtrrLibIsMtrrSupported (&FixedMtrrSupported, NULL)) { 2812 2911 return MtrrSetting; 2813 2912 } … … 2816 2915 2817 2916 // 2818 // Set fixed MTRRs 2819 // 2820 MtrrSetFixedMtrrWorker (&MtrrSetting->Fixed); 2821 2822 // 2823 // Set variable MTRRs 2917 // Enabling the Fixed MTRR bit when unsupported is not allowed. 2918 // 2919 ASSERT (FixedMtrrSupported || (MtrrDefType->Bits.FE == 0)); 2920 2921 // 2922 // If the hardware supports Fixed MTRR, it is sufficient 2923 // to set MTRRs regardless of whether Fixed MTRR bit is enabled. 2924 // 2925 if (FixedMtrrSupported) { 2926 MtrrSetFixedMtrrWorker (&MtrrSetting->Fixed); 2927 } 2928 2929 // 2930 // Set Variable MTRRs 2824 2931 // 2825 2932 MtrrSetVariableMtrrWorker (&MtrrSetting->Variables); … … 2848 2955 ) 2849 2956 { 2850 CPUID_VERSION_INFO_EDX Edx; 2851 MSR_IA32_MTRRCAP_REGISTER MtrrCap; 2852 2853 // 2854 // Check CPUID(1).EDX[12] for MTRR capability 2855 // 2856 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &Edx.Uint32); 2857 if (Edx.Bits.MTRR == 0) { 2858 return FALSE; 2859 } 2860 2861 // 2862 // Check number of variable MTRRs and fixed MTRRs existence. 2863 // If number of variable MTRRs is zero, or fixed MTRRs do not 2864 // exist, return false. 2865 // 2866 MtrrCap.Uint64 = AsmReadMsr64 (MSR_IA32_MTRRCAP); 2867 if ((MtrrCap.Bits.VCNT == 0) || (MtrrCap.Bits.FIX == 0)) { 2868 return FALSE; 2869 } 2870 2871 return TRUE; 2872 } 2873 2874 /** 2875 Worker function prints all MTRRs for debugging. 2876 2877 If MtrrSetting is not NULL, print MTRR settings from input MTRR 2878 settings buffer. 2879 If MtrrSetting is NULL, print MTRR settings from MTRRs. 2880 2881 @param MtrrSetting A buffer holding all MTRRs content. 2882 **/ 2883 VOID 2884 MtrrDebugPrintAllMtrrsWorker ( 2885 IN MTRR_SETTINGS *MtrrSetting 2886 ) 2887 { 2888 DEBUG_CODE_BEGIN (); 2889 MTRR_SETTINGS LocalMtrrs; 2890 MTRR_SETTINGS *Mtrrs; 2891 UINTN Index; 2892 UINTN RangeCount; 2893 UINT64 MtrrValidBitsMask; 2894 UINT64 MtrrValidAddressMask; 2895 UINT32 VariableMtrrCount; 2896 BOOLEAN ContainVariableMtrr; 2897 MTRR_MEMORY_RANGE Ranges[ 2898 ARRAY_SIZE (mMtrrLibFixedMtrrTable) * sizeof (UINT64) + 2 * ARRAY_SIZE (Mtrrs->Variables.Mtrr) + 1 2957 return MtrrLibIsMtrrSupported (NULL, NULL); 2958 } 2959 2960 /** 2961 This function returns a Ranges array containing the memory cache types 2962 of all memory addresses. 2963 2964 @param[in] MtrrSetting MTRR setting buffer to parse. 2965 @param[out] Ranges Pointer to an array of MTRR_MEMORY_RANGE. 2966 @param[in,out] RangeCount Count of MTRR_MEMORY_RANGE. 2967 On input, the maximum entries the Ranges can hold. 2968 On output, the actual entries that the function returns. 2969 2970 @retval RETURN_INVALID_PARAMETER RangeCount is NULL. 2971 @retval RETURN_INVALID_PARAMETER *RangeCount is not 0 but Ranges is NULL. 2972 @retval RETURN_BUFFER_TOO_SMALL *RangeCount is too small. 2973 @retval RETURN_SUCCESS Ranges are successfully returned. 2974 **/ 2975 RETURN_STATUS 2976 EFIAPI 2977 MtrrGetMemoryAttributesInMtrrSettings ( 2978 IN CONST MTRR_SETTINGS *MtrrSetting OPTIONAL, 2979 OUT MTRR_MEMORY_RANGE *Ranges, 2980 IN OUT UINTN *RangeCount 2981 ) 2982 { 2983 RETURN_STATUS Status; 2984 MTRR_SETTINGS LocalMtrrs; 2985 CONST MTRR_SETTINGS *Mtrrs; 2986 MSR_IA32_MTRR_DEF_TYPE_REGISTER *MtrrDefType; 2987 UINTN LocalRangeCount; 2988 UINT64 MtrrValidBitsMask; 2989 UINT64 MtrrValidAddressMask; 2990 UINT32 VariableMtrrCount; 2991 MTRR_MEMORY_RANGE RawVariableRanges[ARRAY_SIZE (Mtrrs->Variables.Mtrr)]; 2992 MTRR_MEMORY_RANGE LocalRanges[ 2993 ARRAY_SIZE (mMtrrLibFixedMtrrTable) * sizeof (UINT64) + 2 * ARRAY_SIZE (Mtrrs->Variables.Mtrr) + 1 2899 2994 ]; 2900 MTRR_MEMORY_RANGE RawVariableRanges[ARRAY_SIZE (Mtrrs->Variables.Mtrr)]; 2901 2902 if (!IsMtrrSupported ()) { 2903 return; 2904 } 2905 2906 VariableMtrrCount = GetVariableMtrrCountWorker (); 2995 2996 if (RangeCount == NULL) { 2997 return RETURN_INVALID_PARAMETER; 2998 } 2999 3000 if ((*RangeCount != 0) && (Ranges == NULL)) { 3001 return RETURN_INVALID_PARAMETER; 3002 } 2907 3003 2908 3004 if (MtrrSetting != NULL) { … … 2913 3009 } 2914 3010 3011 MtrrDefType = (MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&Mtrrs->MtrrDefType; 3012 3013 LocalRangeCount = 1; 3014 MtrrLibInitializeMtrrMask (&MtrrValidBitsMask, &MtrrValidAddressMask); 3015 LocalRanges[0].BaseAddress = 0; 3016 LocalRanges[0].Length = MtrrValidBitsMask + 1; 3017 3018 if (MtrrDefType->Bits.E == 0) { 3019 LocalRanges[0].Type = CacheUncacheable; 3020 } else { 3021 LocalRanges[0].Type = MtrrGetDefaultMemoryTypeWorker (Mtrrs); 3022 3023 VariableMtrrCount = GetVariableMtrrCountWorker (); 3024 ASSERT (VariableMtrrCount <= ARRAY_SIZE (MtrrSetting->Variables.Mtrr)); 3025 3026 MtrrLibGetRawVariableRanges ( 3027 &Mtrrs->Variables, 3028 VariableMtrrCount, 3029 MtrrValidBitsMask, 3030 MtrrValidAddressMask, 3031 RawVariableRanges 3032 ); 3033 Status = MtrrLibApplyVariableMtrrs ( 3034 RawVariableRanges, 3035 VariableMtrrCount, 3036 LocalRanges, 3037 ARRAY_SIZE (LocalRanges), 3038 &LocalRangeCount 3039 ); 3040 ASSERT_RETURN_ERROR (Status); 3041 3042 if (MtrrDefType->Bits.FE == 1) { 3043 MtrrLibApplyFixedMtrrs (&Mtrrs->Fixed, LocalRanges, ARRAY_SIZE (LocalRanges), &LocalRangeCount); 3044 } 3045 } 3046 3047 if (*RangeCount < LocalRangeCount) { 3048 *RangeCount = LocalRangeCount; 3049 return RETURN_BUFFER_TOO_SMALL; 3050 } 3051 3052 CopyMem (Ranges, LocalRanges, LocalRangeCount * sizeof (LocalRanges[0])); 3053 *RangeCount = LocalRangeCount; 3054 return RETURN_SUCCESS; 3055 } 3056 3057 /** 3058 Worker function prints all MTRRs for debugging. 3059 3060 If MtrrSetting is not NULL, print MTRR settings from input MTRR 3061 settings buffer. 3062 If MtrrSetting is NULL, print MTRR settings from MTRRs. 3063 3064 @param MtrrSetting A buffer holding all MTRRs content. 3065 **/ 3066 VOID 3067 MtrrDebugPrintAllMtrrsWorker ( 3068 IN MTRR_SETTINGS *MtrrSetting 3069 ) 3070 { 3071 DEBUG_CODE_BEGIN (); 3072 UINT32 Index; 3073 MTRR_SETTINGS LocalMtrrs; 3074 MTRR_SETTINGS *Mtrrs; 3075 RETURN_STATUS Status; 3076 UINTN RangeCount; 3077 BOOLEAN ContainVariableMtrr; 3078 MTRR_MEMORY_RANGE Ranges[ 3079 ARRAY_SIZE (mMtrrLibFixedMtrrTable) * sizeof (UINT64) + 2 * ARRAY_SIZE (Mtrrs->Variables.Mtrr) + 1 3080 ]; 3081 3082 if (MtrrSetting != NULL) { 3083 Mtrrs = MtrrSetting; 3084 } else { 3085 MtrrGetAllMtrrs (&LocalMtrrs); 3086 Mtrrs = &LocalMtrrs; 3087 } 3088 3089 RangeCount = ARRAY_SIZE (Ranges); 3090 Status = MtrrGetMemoryAttributesInMtrrSettings (Mtrrs, Ranges, &RangeCount); 3091 if (RETURN_ERROR (Status)) { 3092 DEBUG ((DEBUG_CACHE, "MTRR is not enabled.\n")); 3093 return; 3094 } 3095 2915 3096 // 2916 3097 // Dump RAW MTRR contents … … 2924 3105 2925 3106 ContainVariableMtrr = FALSE; 2926 for (Index = 0; Index < VariableMtrrCount; Index++) {3107 for (Index = 0; Index < ARRAY_SIZE (Mtrrs->Variables.Mtrr); Index++) { 2927 3108 if ((Mtrrs->Variables.Mtrr[Index].Mask & BIT11) == 0) { 2928 3109 // … … 2953 3134 DEBUG ((DEBUG_CACHE, "Memory Ranges:\n")); 2954 3135 DEBUG ((DEBUG_CACHE, "====================================\n")); 2955 MtrrLibInitializeMtrrMask (&MtrrValidBitsMask, &MtrrValidAddressMask);2956 Ranges[0].BaseAddress = 0;2957 Ranges[0].Length = MtrrValidBitsMask + 1;2958 Ranges[0].Type = MtrrGetDefaultMemoryTypeWorker (Mtrrs);2959 RangeCount = 1;2960 2961 MtrrLibGetRawVariableRanges (2962 &Mtrrs->Variables,2963 VariableMtrrCount,2964 MtrrValidBitsMask,2965 MtrrValidAddressMask,2966 RawVariableRanges2967 );2968 MtrrLibApplyVariableMtrrs (2969 RawVariableRanges,2970 VariableMtrrCount,2971 Ranges,2972 ARRAY_SIZE (Ranges),2973 &RangeCount2974 );2975 2976 MtrrLibApplyFixedMtrrs (&Mtrrs->Fixed, Ranges, ARRAY_SIZE (Ranges), &RangeCount);2977 2978 3136 for (Index = 0; Index < RangeCount; Index++) { 2979 3137 DEBUG (( -
trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/Library/MtrrLib/UnitTest/MtrrLibUnitTest.c
r101291 r105670 14 14 15 15 STATIC MTRR_LIB_SYSTEM_PARAMETER mSystemParameters[] = { 16 { 38, TRUE, TRUE, CacheUncacheable, 12 }, 17 { 38, TRUE, TRUE, CacheWriteBack, 12 }, 18 { 38, TRUE, TRUE, CacheWriteThrough, 12 }, 19 { 38, TRUE, TRUE, CacheWriteProtected, 12 }, 20 { 38, TRUE, TRUE, CacheWriteCombining, 12 }, 21 22 { 42, TRUE, TRUE, CacheUncacheable, 12 }, 23 { 42, TRUE, TRUE, CacheWriteBack, 12 }, 24 { 42, TRUE, TRUE, CacheWriteThrough, 12 }, 25 { 42, TRUE, TRUE, CacheWriteProtected, 12 }, 26 { 42, TRUE, TRUE, CacheWriteCombining, 12 }, 27 28 { 48, TRUE, TRUE, CacheUncacheable, 12 }, 29 { 48, TRUE, TRUE, CacheWriteBack, 12 }, 30 { 48, TRUE, TRUE, CacheWriteThrough, 12 }, 31 { 48, TRUE, TRUE, CacheWriteProtected, 12 }, 32 { 48, TRUE, TRUE, CacheWriteCombining, 12 }, 33 34 { 48, TRUE, TRUE, CacheWriteBack, 12, 7}, // 7 bits for MKTME 16 { 38, TRUE, TRUE, CacheUncacheable, 12 }, 17 { 38, TRUE, TRUE, CacheWriteBack, 12 }, 18 { 38, TRUE, TRUE, CacheWriteThrough, 12 }, 19 { 38, TRUE, TRUE, CacheWriteProtected, 12 }, 20 { 38, TRUE, TRUE, CacheWriteCombining, 12 }, 21 22 { 42, TRUE, TRUE, CacheUncacheable, 12 }, 23 { 42, TRUE, TRUE, CacheWriteBack, 12 }, 24 { 42, TRUE, TRUE, CacheWriteThrough, 12 }, 25 { 42, TRUE, TRUE, CacheWriteProtected, 12 }, 26 { 42, TRUE, TRUE, CacheWriteCombining, 12 }, 27 28 { 48, TRUE, TRUE, CacheUncacheable, 12 }, 29 { 48, TRUE, TRUE, CacheWriteBack, 12 }, 30 { 48, TRUE, TRUE, CacheWriteThrough, 12 }, 31 { 48, TRUE, TRUE, CacheWriteProtected, 12 }, 32 { 48, TRUE, TRUE, CacheWriteCombining, 12 }, 33 34 { 48, TRUE, FALSE, CacheUncacheable, 12 }, 35 { 48, TRUE, FALSE, CacheWriteBack, 12 }, 36 { 48, TRUE, FALSE, CacheWriteThrough, 12 }, 37 { 48, TRUE, FALSE, CacheWriteProtected, 12 }, 38 { 48, TRUE, FALSE, CacheWriteCombining, 12 }, 39 { 48, TRUE, TRUE, CacheWriteBack, 12, 7}, // 7 bits for MKTME 35 40 }; 36 41 … … 173 178 174 179 /** 175 Unit test of MtrrLib service MtrrSetMemoryAttribute() 180 Unit test of MtrrLib service MtrrGetMemoryAttributesInMtrrSettings() and 181 MtrrSetMemoryAttributesInMtrrSettings() 176 182 177 183 @param[in] Context Ignored … … 184 190 UNIT_TEST_STATUS 185 191 EFIAPI 186 UnitTestMtrrSet MemoryAttributesInMtrrSettings (192 UnitTestMtrrSetAndGetMemoryAttributesInMtrrSettings ( 187 193 IN UNIT_TEST_CONTEXT Context 188 194 ) … … 209 215 UINT32 ActualVariableMtrrUsage; 210 216 UINTN ActualMemoryRangesCount; 217 218 MTRR_MEMORY_RANGE ReturnedMemoryRanges[MTRR_NUMBER_OF_FIXED_MTRR * sizeof (UINT64) + 2 * MTRR_NUMBER_OF_VARIABLE_MTRR + 1]; 219 UINTN ReturnedMemoryRangesCount; 211 220 212 221 MTRR_SETTINGS *Mtrrs[2]; … … 294 303 UT_ASSERT_TRUE (ExpectedVariableMtrrUsage >= ActualVariableMtrrUsage); 295 304 305 ReturnedMemoryRangesCount = ARRAY_SIZE (ReturnedMemoryRanges); 306 Status = MtrrGetMemoryAttributesInMtrrSettings ( 307 Mtrrs[MtrrIndex], 308 ReturnedMemoryRanges, 309 &ReturnedMemoryRangesCount 310 ); 311 UT_ASSERT_STATUS_EQUAL (Status, RETURN_SUCCESS); 312 UT_LOG_INFO ("--- Returned Memory Ranges [%d] ---\n", ReturnedMemoryRangesCount); 313 DumpMemoryRanges (ReturnedMemoryRanges, ReturnedMemoryRangesCount); 314 VerifyMemoryRanges (ExpectedMemoryRanges, ExpectedMemoryRangesCount, ReturnedMemoryRanges, ReturnedMemoryRangesCount); 315 296 316 ZeroMem (&LocalMtrrs, sizeof (LocalMtrrs)); 297 317 } … … 400 420 SystemParameter.FixedMtrrSupported = TRUE; 401 421 InitializeMtrrRegs (&SystemParameter); 402 UT_ASSERT_ FALSE (IsMtrrSupported ());422 UT_ASSERT_TRUE (IsMtrrSupported ()); 403 423 404 424 // … … 409 429 SystemParameter.FixedMtrrSupported = FALSE; 410 430 InitializeMtrrRegs (&SystemParameter); 411 UT_ASSERT_ FALSE (IsMtrrSupported ());431 UT_ASSERT_TRUE (IsMtrrSupported ()); 412 432 413 433 // … … 551 571 PatchPcdSet32 (PcdCpuNumberOfReservedVariableMtrrs, 2); 552 572 Result = GetFirmwareVariableMtrrCount (); 553 UT_ASSERT_EQUAL (Result, 0);573 UT_ASSERT_EQUAL (Result, SystemParameter.VariableMtrrCount - 2); 554 574 555 575 // … … 646 666 UT_ASSERT_MEM_EQUAL (&ExpectedFixedSettings, &FixedSettings, sizeof (ExpectedFixedSettings)); 647 667 648 return UNIT_TEST_PASSED; 668 // 669 // Negative test case when Fixed MTRRs are not supported 670 // 671 SystemParameter.MtrrSupported = TRUE; 672 SystemParameter.FixedMtrrSupported = FALSE; 673 InitializeMtrrRegs (&SystemParameter); 674 675 ZeroMem (&FixedSettings, sizeof (FixedSettings)); 676 ZeroMem (&ExpectedFixedSettings, sizeof (ExpectedFixedSettings)); 677 Result = MtrrGetFixedMtrr (&FixedSettings); 678 UT_ASSERT_EQUAL ((UINTN)Result, (UINTN)&FixedSettings); 679 UT_ASSERT_MEM_EQUAL (&ExpectedFixedSettings, &FixedSettings, sizeof (ExpectedFixedSettings)); 680 681 return UNIT_TEST_PASSED; 682 } 683 684 /** 685 Set Random Variable and Fixed MTRRs Settings for 686 unit test of UnitTestMtrrGetAllMtrrs. 687 688 @param SystemParameter System parameter that controls the MTRR registers initialization. 689 @param ExpectedMtrrs Expected Fixed and Variable MTRRs. 690 **/ 691 VOID 692 SetRandomlyGeneratedMtrrSettings ( 693 IN MTRR_LIB_SYSTEM_PARAMETER *SystemParameter, 694 IN MTRR_SETTINGS *ExpectedMtrrs 695 ) 696 { 697 UINT32 Index; 698 UINTN MsrIndex; 699 UINTN ByteIndex; 700 UINT64 MsrValue; 701 MSR_IA32_MTRR_DEF_TYPE_REGISTER Default; 702 703 AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, ExpectedMtrrs->MtrrDefType); 704 // 705 // Randomly generate Variable MTRR BASE/MASK for a specified type and write to MSR. 706 // 707 for (Index = 0; Index < SystemParameter->VariableMtrrCount; Index++) { 708 GenerateRandomMtrrPair (SystemParameter->PhysicalAddressBits, GenerateRandomCacheType (), &ExpectedMtrrs->Variables.Mtrr[Index], NULL); 709 AsmWriteMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1), ExpectedMtrrs->Variables.Mtrr[Index].Base); 710 AsmWriteMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1), ExpectedMtrrs->Variables.Mtrr[Index].Mask); 711 } 712 713 // 714 // Set Fixed MTRRs when the Fixed MTRRs is enabled and the MTRRs is supported. 715 // 716 Default.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE); 717 if ((Default.Bits.FE == 1) && (SystemParameter->MtrrSupported == TRUE)) { 718 for (MsrIndex = 0; MsrIndex < ARRAY_SIZE (mFixedMtrrsIndex); MsrIndex++) { 719 MsrValue = 0; 720 for (ByteIndex = 0; ByteIndex < sizeof (UINT64); ByteIndex++) { 721 MsrValue = MsrValue | LShiftU64 (GenerateRandomCacheType (), ByteIndex * 8); 722 } 723 724 ExpectedMtrrs->Fixed.Mtrr[MsrIndex] = MsrValue; 725 AsmWriteMsr64 (mFixedMtrrsIndex[MsrIndex], MsrValue); 726 } 727 } 649 728 } 650 729 … … 665 744 ) 666 745 { 667 MTRR_SETTINGS *Result; 668 MTRR_SETTINGS Mtrrs; 669 MTRR_SETTINGS ExpectedMtrrs; 670 MTRR_VARIABLE_SETTING VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR]; 671 UINT32 Index; 672 MTRR_LIB_SYSTEM_PARAMETER SystemParameter; 673 MTRR_LIB_TEST_CONTEXT *LocalContext; 746 MTRR_SETTINGS *Result; 747 MTRR_SETTINGS Mtrrs; 748 MTRR_SETTINGS ExpectedMtrrs; 749 MTRR_LIB_SYSTEM_PARAMETER SystemParameter; 750 MTRR_LIB_TEST_CONTEXT *LocalContext; 751 MSR_IA32_MTRR_DEF_TYPE_REGISTER Default; 674 752 675 753 LocalContext = (MTRR_LIB_TEST_CONTEXT *)Context; 676 754 677 755 CopyMem (&SystemParameter, LocalContext->SystemParameter, sizeof (SystemParameter)); 678 InitializeMtrrRegs (&SystemParameter); 679 680 for (Index = 0; Index < SystemParameter.VariableMtrrCount; Index++) { 681 GenerateRandomMtrrPair (SystemParameter.PhysicalAddressBits, GenerateRandomCacheType (), &VariableMtrr[Index], NULL); 682 AsmWriteMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1), VariableMtrr[Index].Base); 683 AsmWriteMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1), VariableMtrr[Index].Mask); 684 } 685 756 757 // 758 // For the case that Fixed MTRRs is NOT enabled 759 // 760 SystemParameter.MtrrSupported = TRUE; 761 SystemParameter.FixedMtrrSupported = FALSE; 762 InitializeMtrrRegs (&SystemParameter); 763 Default.Uint64 = 0; 764 Default.Bits.E = 1; 765 Default.Bits.FE = 0; 766 ZeroMem (&ExpectedMtrrs, sizeof (ExpectedMtrrs)); 767 ExpectedMtrrs.MtrrDefType = Default.Uint64; 768 // 769 // Randomly generate expected MtrrSettings and set to MSR. 770 // 771 SetRandomlyGeneratedMtrrSettings (&SystemParameter, &ExpectedMtrrs); 686 772 Result = MtrrGetAllMtrrs (&Mtrrs); 687 UT_ASSERT_EQUAL ((UINTN)Result, (UINTN)&Mtrrs); 688 UT_ASSERT_MEM_EQUAL (Mtrrs.Variables.Mtrr, VariableMtrr, sizeof (MTRR_VARIABLE_SETTING) * SystemParameter.VariableMtrrCount); 773 UT_ASSERT_MEM_EQUAL (&ExpectedMtrrs.Fixed, &Mtrrs.Fixed, sizeof (MTRR_FIXED_SETTINGS)); 774 UT_ASSERT_MEM_EQUAL (Mtrrs.Variables.Mtrr, ExpectedMtrrs.Variables.Mtrr, sizeof (MTRR_VARIABLE_SETTING) * (SystemParameter.VariableMtrrCount)); 775 776 // 777 // For the case that Fixed MTRRs is enabled 778 // 779 SystemParameter.MtrrSupported = TRUE; 780 SystemParameter.FixedMtrrSupported = TRUE; 781 InitializeMtrrRegs (&SystemParameter); 782 Default.Uint64 = 0; 783 Default.Bits.E = 1; 784 Default.Bits.FE = 1; 785 ZeroMem (&ExpectedMtrrs, sizeof (ExpectedMtrrs)); 786 ExpectedMtrrs.MtrrDefType = Default.Uint64; 787 SetRandomlyGeneratedMtrrSettings (&SystemParameter, &ExpectedMtrrs); 788 Result = MtrrGetAllMtrrs (&Mtrrs); 789 UT_ASSERT_MEM_EQUAL (&ExpectedMtrrs.Fixed, &Mtrrs.Fixed, sizeof (MTRR_FIXED_SETTINGS)); 790 UT_ASSERT_MEM_EQUAL (Mtrrs.Variables.Mtrr, ExpectedMtrrs.Variables.Mtrr, sizeof (MTRR_VARIABLE_SETTING) * (SystemParameter.VariableMtrrCount)); 689 791 690 792 // … … 713 815 /** 714 816 Unit test of MtrrLib service MtrrSetAllMtrrs() 715 716 817 @param[in] Context Ignored 717 718 818 @retval UNIT_TEST_PASSED The Unit test has completed and the test 719 819 case was successful. 720 820 @retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has failed. 721 722 821 **/ 723 822 UNIT_TEST_STATUS … … 728 827 { 729 828 MTRR_SETTINGS *Result; 730 MTRR_SETTINGS Mtrrs;829 MTRR_SETTINGS ExpectedMtrrs; 731 830 UINT32 Index; 732 831 MSR_IA32_MTRR_DEF_TYPE_REGISTER Default; 733 832 MTRR_LIB_SYSTEM_PARAMETER SystemParameter; 734 833 MTRR_LIB_TEST_CONTEXT *LocalContext; 834 UINTN MsrIndex; 835 UINTN ByteIndex; 836 UINT64 MsrValue; 735 837 736 838 LocalContext = (MTRR_LIB_TEST_CONTEXT *)Context; 737 738 839 CopyMem (&SystemParameter, LocalContext->SystemParameter, sizeof (SystemParameter)); 739 840 InitializeMtrrRegs (&SystemParameter); 740 741 841 Default.Uint64 = 0; 742 842 Default.Bits.E = 1; 743 843 Default.Bits.FE = 1; 744 844 Default.Bits.Type = GenerateRandomCacheType (); 745 746 ZeroMem (&Mtrrs, sizeof (Mtrrs)); 747 Mtrrs.MtrrDefType = Default.Uint64; 845 ZeroMem (&ExpectedMtrrs, sizeof (ExpectedMtrrs)); 846 ExpectedMtrrs.MtrrDefType = Default.Uint64; 748 847 for (Index = 0; Index < SystemParameter.VariableMtrrCount; Index++) { 749 GenerateRandomMtrrPair (SystemParameter.PhysicalAddressBits, GenerateRandomCacheType (), &Mtrrs.Variables.Mtrr[Index], NULL); 750 } 751 752 Result = MtrrSetAllMtrrs (&Mtrrs); 753 UT_ASSERT_EQUAL ((UINTN)Result, (UINTN)&Mtrrs); 754 755 UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE), Mtrrs.MtrrDefType); 848 GenerateRandomMtrrPair (SystemParameter.PhysicalAddressBits, GenerateRandomCacheType (), &ExpectedMtrrs.Variables.Mtrr[Index], NULL); 849 } 850 851 for (MsrIndex = 0; MsrIndex < ARRAY_SIZE (mFixedMtrrsIndex); MsrIndex++) { 852 MsrValue = 0; 853 for (ByteIndex = 0; ByteIndex < sizeof (UINT64); ByteIndex++) { 854 MsrValue = MsrValue | LShiftU64 (GenerateRandomCacheType (), ByteIndex * 8); 855 } 856 857 ExpectedMtrrs.Fixed.Mtrr[MsrIndex] = MsrValue; 858 } 859 860 Result = MtrrSetAllMtrrs (&ExpectedMtrrs); 861 UT_ASSERT_EQUAL ((UINTN)Result, (UINTN)&ExpectedMtrrs); 862 UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE), ExpectedMtrrs.MtrrDefType); 756 863 for (Index = 0; Index < SystemParameter.VariableMtrrCount; Index++) { 757 UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1)), Mtrrs.Variables.Mtrr[Index].Base);758 UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1)), Mtrrs.Variables.Mtrr[Index].Mask);864 UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1)), ExpectedMtrrs.Variables.Mtrr[Index].Base); 865 UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1)), ExpectedMtrrs.Variables.Mtrr[Index].Mask); 759 866 } 760 867 … … 905 1012 UT_ASSERT_EQUAL (Result, CacheUncacheable); 906 1013 1014 // 1015 // If MTRRs are supported, but Fixed MTRRs are not supported. 1016 // 907 1017 SystemParameter.MtrrSupported = TRUE; 908 1018 SystemParameter.FixedMtrrSupported = FALSE; 909 1019 InitializeMtrrRegs (&SystemParameter); 910 1020 Result = MtrrGetDefaultMemoryType (); 911 UT_ASSERT_EQUAL (Result, CacheUncacheable); 912 1021 UT_ASSERT_EQUAL (Result, SystemParameter.DefaultCacheType); 1022 1023 // 1024 // If MTRRs are supported, but Variable MTRRs are not supported. 1025 // 913 1026 SystemParameter.MtrrSupported = TRUE; 914 1027 SystemParameter.FixedMtrrSupported = TRUE; … … 916 1029 InitializeMtrrRegs (&SystemParameter); 917 1030 Result = MtrrGetDefaultMemoryType (); 918 UT_ASSERT_EQUAL (Result, CacheUncacheable); 919 920 return UNIT_TEST_PASSED; 921 } 922 923 /** 924 Unit test of MtrrLib service MtrrSetMemoryAttributeInMtrrSettings(). 1031 UT_ASSERT_EQUAL (Result, SystemParameter.DefaultCacheType); 1032 1033 return UNIT_TEST_PASSED; 1034 } 1035 1036 /** 1037 Unit test of MtrrLib service MtrrSetMemoryAttributeInMtrrSettings() and 1038 MtrrGetMemoryAttributesInMtrrSettings(). 925 1039 926 1040 @param[in] Context Ignored … … 933 1047 UNIT_TEST_STATUS 934 1048 EFIAPI 935 UnitTestMtrrSetMemoryAttribute InMtrrSettings (1049 UnitTestMtrrSetMemoryAttributeAndGetMemoryAttributesInMtrrSettings ( 936 1050 IN UNIT_TEST_CONTEXT Context 937 1051 ) … … 957 1071 UINT32 ActualVariableMtrrUsage; 958 1072 UINTN ActualMemoryRangesCount; 1073 1074 MTRR_MEMORY_RANGE ReturnedMemoryRanges[MTRR_NUMBER_OF_FIXED_MTRR * sizeof (UINT64) + 2 * MTRR_NUMBER_OF_VARIABLE_MTRR + 1]; 1075 UINTN ReturnedMemoryRangesCount; 959 1076 960 1077 MTRR_SETTINGS *Mtrrs[2]; … … 1034 1151 UT_ASSERT_TRUE (ExpectedVariableMtrrUsage >= ActualVariableMtrrUsage); 1035 1152 1153 ReturnedMemoryRangesCount = ARRAY_SIZE (ReturnedMemoryRanges); 1154 Status = MtrrGetMemoryAttributesInMtrrSettings ( 1155 &LocalMtrrs, 1156 ReturnedMemoryRanges, 1157 &ReturnedMemoryRangesCount 1158 ); 1159 UT_ASSERT_STATUS_EQUAL (Status, RETURN_SUCCESS); 1160 UT_LOG_INFO ("--- Returned Memory Ranges [%d] ---\n", ReturnedMemoryRangesCount); 1161 DumpMemoryRanges (ReturnedMemoryRanges, ReturnedMemoryRangesCount); 1162 VerifyMemoryRanges (ExpectedMemoryRanges, ExpectedMemoryRangesCount, ReturnedMemoryRanges, ReturnedMemoryRangesCount); 1163 1036 1164 ZeroMem (&LocalMtrrs, sizeof (LocalMtrrs)); 1037 1165 } … … 1142 1270 for (Index = 0; Index < Iteration; Index++) { 1143 1271 AddTestCase (MtrrApiTests, "Test InvalidMemoryLayouts", "InvalidMemoryLayouts", UnitTestInvalidMemoryLayouts, InitializeSystem, NULL, &mSystemParameters[SystemIndex]); 1144 AddTestCase (MtrrApiTests, "Test MtrrSetMemoryAttributeInMtrrSettings ", "MtrrSetMemoryAttributeInMtrrSettings", UnitTestMtrrSetMemoryAttributeInMtrrSettings, InitializeSystem, NULL, &mSystemParameters[SystemIndex]);1145 AddTestCase (MtrrApiTests, "Test MtrrSetMemoryAttributesInMtrrSettings ", "MtrrSetMemoryAttributesInMtrrSettings", UnitTestMtrrSetMemoryAttributesInMtrrSettings, InitializeSystem, NULL, &mSystemParameters[SystemIndex]);1272 AddTestCase (MtrrApiTests, "Test MtrrSetMemoryAttributeInMtrrSettings and MtrrGetMemoryAttributesInMtrrSettings", "MtrrSetMemoryAttributeInMtrrSettings and MtrrGetMemoryAttributesInMtrrSettings", UnitTestMtrrSetMemoryAttributeAndGetMemoryAttributesInMtrrSettings, InitializeSystem, NULL, &mSystemParameters[SystemIndex]); 1273 AddTestCase (MtrrApiTests, "Test MtrrSetMemoryAttributesInMtrrSettings and MtrrGetMemoryAttributesInMtrrSettings", "MtrrSetMemoryAttributesInMtrrSettings and MtrrGetMemoryAttributesInMtrrSetting", UnitTestMtrrSetAndGetMemoryAttributesInMtrrSettings, InitializeSystem, NULL, &mSystemParameters[SystemIndex]); 1146 1274 } 1147 1275 } -
trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/Library/MtrrLib/UnitTest/Support.c
r101291 r105670 44 44 return rand (); 45 45 } else { 46 DEBUG ((DEBUG_INFO, "random: %d\n", mNumberIndex));47 46 return mNumbers[mNumberIndex++ % (mNumberCount - 1)]; 48 47 } … … 237 236 UINT32 Index; 238 237 238 UT_ASSERT_EQUAL (mCpuidVersionInfoEdx.Bits.MTRR, 1); 239 239 240 for (Index = 0; Index < ARRAY_SIZE (mFixedMtrrsValue); Index++) { 240 241 if (MsrIndex == mFixedMtrrsIndex[Index]) { 242 UT_ASSERT_EQUAL (mMtrrCapMsr.Bits.FIX, 1); 241 243 return mFixedMtrrsValue[Index]; 242 244 } … … 246 248 (MsrIndex <= MSR_IA32_MTRR_PHYSMASK0 + (MTRR_NUMBER_OF_VARIABLE_MTRR << 1))) 247 249 { 250 UT_ASSERT_TRUE (((MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1) < mMtrrCapMsr.Bits.VCNT); 248 251 if (MsrIndex % 2 == 0) { 249 252 Index = (MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1; … … 300 303 UINT32 Index; 301 304 305 UT_ASSERT_EQUAL (mCpuidVersionInfoEdx.Bits.MTRR, 1); 306 302 307 for (Index = 0; Index < ARRAY_SIZE (mFixedMtrrsValue); Index++) { 303 308 if (MsrIndex == mFixedMtrrsIndex[Index]) { 309 UT_ASSERT_EQUAL (mMtrrCapMsr.Bits.FIX, 1); 304 310 mFixedMtrrsValue[Index] = Value; 305 311 return Value; … … 310 316 (MsrIndex <= MSR_IA32_MTRR_PHYSMASK0 + (MTRR_NUMBER_OF_VARIABLE_MTRR << 1))) 311 317 { 318 UT_ASSERT_TRUE (((MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1) < mMtrrCapMsr.Bits.VCNT); 312 319 if (MsrIndex % 2 == 0) { 313 320 Index = (MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1; … … 322 329 323 330 if (MsrIndex == MSR_IA32_MTRR_DEF_TYPE) { 331 if (((MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&Value)->Bits.FE == 1) { 332 UT_ASSERT_EQUAL (mMtrrCapMsr.Bits.FIX, 1); 333 } 334 324 335 mDefTypeMsr.Uint64 = Value; 325 336 return Value; … … 354 365 355 366 for (Index = 0; Index < ARRAY_SIZE (mVariableMtrrsPhysBase); Index++) { 356 mVariableMtrrsPhysBase[Index].Uint64 = 0; 357 mVariableMtrrsPhysBase[Index].Bits.Type = SystemParameter->DefaultCacheType; 358 mVariableMtrrsPhysBase[Index].Bits.Reserved1 = 0; 359 360 mVariableMtrrsPhysMask[Index].Uint64 = 0; 361 mVariableMtrrsPhysMask[Index].Bits.V = 0; 362 mVariableMtrrsPhysMask[Index].Bits.Reserved1 = 0; 367 mVariableMtrrsPhysBase[Index].Uint64 = 0; 368 mVariableMtrrsPhysMask[Index].Uint64 = 0; 363 369 } 364 370 365 371 mDefTypeMsr.Bits.E = 1; 366 mDefTypeMsr.Bits.FE = 1;372 mDefTypeMsr.Bits.FE = 0; 367 373 mDefTypeMsr.Bits.Type = SystemParameter->DefaultCacheType; 368 374 mDefTypeMsr.Bits.Reserved1 = 0;
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