VirtualBox

Ignore:
Timestamp:
Aug 14, 2024 1:16:30 PM (9 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
164367
Message:

Devices/EFI/FirmwareNew: Merge edk2-stable-202405 and make it build on aarch64, bugref:4643

Location:
trunk/src/VBox/Devices/EFI/FirmwareNew
Files:
4 edited

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  • trunk/src/VBox/Devices/EFI/FirmwareNew

  • trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/Library/MtrrLib/MtrrLib.c

    r101291 r105670  
    66    except for MtrrSetAllMtrrs() which is used to sync BSP's MTRR setting to APs.
    77
    8   Copyright (c) 2008 - 2020, Intel Corporation. All rights reserved.<BR>
     8  Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.<BR>
    99  SPDX-License-Identifier: BSD-2-Clause-Patent
    1010
     
    3434//
    3535typedef struct {
    36   UINTN      Cr4;
    37   BOOLEAN    InterruptState;
     36  UINTN                              Cr4;
     37  BOOLEAN                            InterruptState;
     38  MSR_IA32_MTRR_DEF_TYPE_REGISTER    DefType;
    3839} MTRR_CONTEXT;
    3940
     
    142143
    143144/**
     145  Return whether MTRR is supported.
     146
     147  @param[out]  FixedMtrrSupported   Return whether fixed MTRR is supported.
     148  @param[out]  VariableMtrrCount    Return the max number of variable MTRRs.
     149
     150  @retval TRUE  MTRR is supported when either fixed MTRR is supported or max number
     151                of variable MTRRs is not 0.
     152  @retval FALSE MTRR is not supported when both fixed MTRR is not supported and max
     153                number of variable MTRRs is 0.
     154**/
     155BOOLEAN
     156MtrrLibIsMtrrSupported (
     157  OUT BOOLEAN  *FixedMtrrSupported  OPTIONAL,
     158  OUT UINT32   *VariableMtrrCount   OPTIONAL
     159  )
     160{
     161  CPUID_VERSION_INFO_EDX     Edx;
     162  MSR_IA32_MTRRCAP_REGISTER  MtrrCap;
     163
     164  //
     165  // Check CPUID(1).EDX[12] for MTRR capability
     166  //
     167  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &Edx.Uint32);
     168  if (Edx.Bits.MTRR == 0) {
     169    if (FixedMtrrSupported != NULL) {
     170      *FixedMtrrSupported = FALSE;
     171    }
     172
     173    if (VariableMtrrCount != NULL) {
     174      *VariableMtrrCount = 0;
     175    }
     176
     177    return FALSE;
     178  }
     179
     180  //
     181  // Check the number of variable MTRRs and determine whether fixed MTRRs exist.
     182  // If the count of variable MTRRs is zero and there are no fixed MTRRs,
     183  // then return false
     184  //
     185  MtrrCap.Uint64 = AsmReadMsr64 (MSR_IA32_MTRRCAP);
     186  ASSERT (MtrrCap.Bits.VCNT <= ARRAY_SIZE (((MTRR_VARIABLE_SETTINGS *)0)->Mtrr));
     187  if (FixedMtrrSupported != NULL) {
     188    *FixedMtrrSupported = (BOOLEAN)(MtrrCap.Bits.FIX == 1);
     189  }
     190
     191  if (VariableMtrrCount != NULL) {
     192    *VariableMtrrCount = MtrrCap.Bits.VCNT;
     193  }
     194
     195  if ((MtrrCap.Bits.VCNT == 0) && (MtrrCap.Bits.FIX == 0)) {
     196    return FALSE;
     197  }
     198
     199  return TRUE;
     200}
     201
     202/**
    144203  Worker function returns the variable MTRR count for the CPU.
    145204
     
    234293MTRR_MEMORY_CACHE_TYPE
    235294MtrrGetDefaultMemoryTypeWorker (
    236   IN MTRR_SETTINGS  *MtrrSetting
     295  IN CONST MTRR_SETTINGS  *MtrrSetting
    237296  )
    238297{
     
    305364
    306365  //
    307   // Disable MTRRs
    308   //
    309   DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
    310   DefType.Bits.E = 0;
     366  // Save current MTRR default type and disable MTRRs
     367  //
     368  MtrrContext->DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
     369  DefType.Uint64              = MtrrContext->DefType.Uint64;
     370  DefType.Bits.E              = 0;
    311371  AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64);
    312372}
     
    361421  )
    362422{
    363   MSR_IA32_MTRR_DEF_TYPE_REGISTER  DefType;
    364 
    365423  //
    366424  // Enable Cache MTRR
    367   //
    368   DefType.Uint64  = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
    369   DefType.Bits.E  = 1;
    370   DefType.Bits.FE = 1;
    371   AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64);
     425  // Note: It's possible that MTRR was not enabled earlier.
     426  //       But it will be enabled here unconditionally.
     427  //
     428  MtrrContext->DefType.Bits.E = 1;
     429  AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, MtrrContext->DefType.Uint64);
    372430
    373431  MtrrLibPostMtrrChangeEnableCache (MtrrContext);
     
    411469  )
    412470{
    413   if (!IsMtrrSupported ()) {
     471  BOOLEAN  FixedMtrrSupported;
     472
     473  MtrrLibIsMtrrSupported (&FixedMtrrSupported, NULL);
     474
     475  if (!FixedMtrrSupported) {
    414476    return FixedSettings;
    415477  }
     
    629691UINT32
    630692MtrrLibGetRawVariableRanges (
    631   IN  MTRR_VARIABLE_SETTINGS  *VariableSettings,
    632   IN  UINTN                   VariableMtrrCount,
    633   IN  UINT64                  MtrrValidBitsMask,
    634   IN  UINT64                  MtrrValidAddressMask,
    635   OUT MTRR_MEMORY_RANGE       *VariableMtrr
     693  IN  CONST MTRR_VARIABLE_SETTINGS  *VariableSettings,
     694  IN  UINTN                         VariableMtrrCount,
     695  IN  UINT64                        MtrrValidBitsMask,
     696  IN  UINT64                        MtrrValidAddressMask,
     697  OUT MTRR_MEMORY_RANGE             *VariableMtrr
    636698  )
    637699{
     
    9961058  UINTN   EndIndex;
    9971059  UINTN   DeltaCount;
     1060
     1061  ASSERT (Length != 0);
    9981062
    9991063  LengthRight = 0;
     
    17611825RETURN_STATUS
    17621826MtrrLibApplyFixedMtrrs (
    1763   IN     MTRR_FIXED_SETTINGS  *Fixed,
    1764   IN OUT MTRR_MEMORY_RANGE    *Ranges,
    1765   IN     UINTN                RangeCapacity,
    1766   IN OUT UINTN                *RangeCount
     1827  IN     CONST MTRR_FIXED_SETTINGS  *Fixed,
     1828  IN OUT MTRR_MEMORY_RANGE          *Ranges,
     1829  IN     UINTN                      RangeCapacity,
     1830  IN OUT UINTN                      *RangeCount
    17671831  )
    17681832{
     
    22752339  UINT64         BaseAddress;
    22762340  UINT64         Length;
    2277   BOOLEAN        Above1MbExist;
     2341  BOOLEAN        VariableMtrrNeeded;
    22782342
    22792343  UINT64                  MtrrValidBitsMask;
     
    22922356  BOOLEAN                 VariableSettingModified[ARRAY_SIZE (MtrrSetting->Variables.Mtrr)];
    22932357
    2294   UINT64  ClearMasks[ARRAY_SIZE (mMtrrLibFixedMtrrTable)];
    2295   UINT64  OrMasks[ARRAY_SIZE (mMtrrLibFixedMtrrTable)];
     2358  UINT64   FixedMtrrMemoryLimit;
     2359  BOOLEAN  FixedMtrrSupported;
     2360  UINT64   ClearMasks[ARRAY_SIZE (mMtrrLibFixedMtrrTable)];
     2361  UINT64   OrMasks[ARRAY_SIZE (mMtrrLibFixedMtrrTable)];
    22962362
    22972363  MTRR_CONTEXT  MtrrContext;
     
    23092375  // TRUE indicating the caller requests to set variable MTRRs.
    23102376  //
    2311   Above1MbExist             = FALSE;
     2377  VariableMtrrNeeded        = FALSE;
    23122378  OriginalVariableMtrrCount = 0;
    23132379
     
    23382404  // 1. Validate the parameters.
    23392405  //
    2340   if (!IsMtrrSupported ()) {
     2406  if (!MtrrLibIsMtrrSupported (&FixedMtrrSupported, &OriginalVariableMtrrCount)) {
    23412407    Status = RETURN_UNSUPPORTED;
    23422408    goto Exit;
    23432409  }
     2410
     2411  FixedMtrrMemoryLimit = FixedMtrrSupported ? BASE_1MB : 0;
    23442412
    23452413  for (Index = 0; Index < RangeCount; Index++) {
     
    23722440    }
    23732441
    2374     if (Ranges[Index].BaseAddress + Ranges[Index].Length > BASE_1MB) {
    2375       Above1MbExist = TRUE;
     2442    if (Ranges[Index].BaseAddress + Ranges[Index].Length > FixedMtrrMemoryLimit) {
     2443      VariableMtrrNeeded = TRUE;
    23762444    }
    23772445  }
     
    23802448  // 2. Apply the above-1MB memory attribute settings.
    23812449  //
    2382   if (Above1MbExist) {
     2450  if (VariableMtrrNeeded) {
    23832451    //
    23842452    // 2.1. Read all variable MTRRs and convert to Ranges.
    23852453    //
    2386     OriginalVariableMtrrCount = GetVariableMtrrCountWorker ();
    23872454    MtrrGetVariableMtrrWorker (MtrrSetting, OriginalVariableMtrrCount, &VariableSettings);
    23882455    MtrrLibGetRawVariableRanges (
     
    24162483    // 2.2. Force [0, 1M) to UC, so that it doesn't impact subtraction algorithm.
    24172484    //
    2418     Status = MtrrLibSetMemoryType (
    2419                WorkingRanges,
    2420                ARRAY_SIZE (WorkingRanges),
    2421                &WorkingRangeCount,
    2422                0,
    2423                SIZE_1MB,
    2424                CacheUncacheable
    2425                );
    2426     ASSERT (Status != RETURN_OUT_OF_RESOURCES);
     2485    if (FixedMtrrMemoryLimit != 0) {
     2486      Status = MtrrLibSetMemoryType (
     2487                 WorkingRanges,
     2488                 ARRAY_SIZE (WorkingRanges),
     2489                 &WorkingRangeCount,
     2490                 0,
     2491                 FixedMtrrMemoryLimit,
     2492                 CacheUncacheable
     2493                 );
     2494      ASSERT (Status != RETURN_OUT_OF_RESOURCES);
     2495    }
    24272496
    24282497    //
     
    24332502      BaseAddress = Ranges[Index].BaseAddress;
    24342503      Length      = Ranges[Index].Length;
    2435       if (BaseAddress < BASE_1MB) {
    2436         if (Length <= BASE_1MB - BaseAddress) {
     2504      if (BaseAddress < FixedMtrrMemoryLimit) {
     2505        if (Length <= FixedMtrrMemoryLimit - BaseAddress) {
    24372506          continue;
    24382507        }
    24392508
    2440         Length     -= BASE_1MB - BaseAddress;
    2441         BaseAddress = BASE_1MB;
     2509        Length     -= FixedMtrrMemoryLimit - BaseAddress;
     2510        BaseAddress = FixedMtrrMemoryLimit;
    24422511      }
    24432512
     
    24842553      //
    24852554      for (Index = 0; Index < WorkingVariableMtrrCount; Index++) {
    2486         if ((WorkingVariableMtrr[Index].BaseAddress == 0) && (WorkingVariableMtrr[Index].Length == SIZE_1MB)) {
     2555        if ((WorkingVariableMtrr[Index].BaseAddress == 0) && (WorkingVariableMtrr[Index].Length == FixedMtrrMemoryLimit)) {
    24872556          ASSERT (WorkingVariableMtrr[Index].Type == CacheUncacheable);
    24882557          WorkingVariableMtrrCount--;
     
    25232592  ZeroMem (OrMasks, sizeof (OrMasks));
    25242593  for (Index = 0; Index < RangeCount; Index++) {
    2525     if (Ranges[Index].BaseAddress >= BASE_1MB) {
     2594    if (Ranges[Index].BaseAddress >= FixedMtrrMemoryLimit) {
    25262595      continue;
    25272596    }
     
    25462615    if (ClearMasks[Index] != 0) {
    25472616      if (MtrrSetting != NULL) {
    2548         MtrrSetting->Fixed.Mtrr[Index] = (MtrrSetting->Fixed.Mtrr[Index] & ~ClearMasks[Index]) | OrMasks[Index];
     2617        //
     2618        // Fixed MTRR is modified indicating fixed MTRR should be enabled in the end of MTRR programming.
     2619        //
     2620        ((MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&MtrrSetting->MtrrDefType)->Bits.FE = 1;
     2621        MtrrSetting->Fixed.Mtrr[Index]                                          = (MtrrSetting->Fixed.Mtrr[Index] & ~ClearMasks[Index]) | OrMasks[Index];
    25492622      } else {
    25502623        if (!MtrrContextValid) {
    25512624          MtrrLibPreMtrrChange (&MtrrContext);
    2552           MtrrContextValid = TRUE;
     2625          //
     2626          // Fixed MTRR is modified indicating fixed MTRR should be enabled in the end of MTRR programming.
     2627          //
     2628          MtrrContext.DefType.Bits.FE = 1;
     2629          MtrrContextValid            = TRUE;
    25532630        }
    25542631
     
    25932670
    25942671  if (MtrrSetting != NULL) {
    2595     ((MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&MtrrSetting->MtrrDefType)->Bits.E  = 1;
    2596     ((MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&MtrrSetting->MtrrDefType)->Bits.FE = 1;
     2672    //
     2673    // Enable MTRR unconditionally
     2674    //
     2675    ((MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&MtrrSetting->MtrrDefType)->Bits.E = 1;
    25972676  } else {
    25982677    if (MtrrContextValid) {
     
    27672846  )
    27682847{
    2769   if (!IsMtrrSupported ()) {
     2848  BOOLEAN                          FixedMtrrSupported;
     2849  UINT32                           VariableMtrrCount;
     2850  MSR_IA32_MTRR_DEF_TYPE_REGISTER  *MtrrDefType;
     2851
     2852  ZeroMem (MtrrSetting, sizeof (*MtrrSetting));
     2853
     2854  MtrrDefType = (MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&MtrrSetting->MtrrDefType;
     2855  if (!MtrrLibIsMtrrSupported (&FixedMtrrSupported, &VariableMtrrCount)) {
    27702856    return MtrrSetting;
    27712857  }
    27722858
    27732859  //
     2860  // Get MTRR_DEF_TYPE value
     2861  //
     2862  MtrrDefType->Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
     2863
     2864  //
     2865  // Enabling the Fixed MTRR bit when unsupported is not allowed.
     2866  //
     2867  ASSERT (FixedMtrrSupported || (MtrrDefType->Bits.FE == 0));
     2868
     2869  //
    27742870  // Get fixed MTRRs
    27752871  //
    2776   MtrrGetFixedMtrrWorker (&MtrrSetting->Fixed);
     2872  if (MtrrDefType->Bits.FE == 1) {
     2873    MtrrGetFixedMtrrWorker (&MtrrSetting->Fixed);
     2874  }
    27772875
    27782876  //
     
    27812879  MtrrGetVariableMtrrWorker (
    27822880    NULL,
    2783     GetVariableMtrrCountWorker (),
     2881    VariableMtrrCount,
    27842882    &MtrrSetting->Variables
    27852883    );
    27862884
    2787   //
    2788   // Get MTRR_DEF_TYPE value
    2789   //
    2790   MtrrSetting->MtrrDefType = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
    2791 
    27922885  return MtrrSetting;
    27932886}
    27942887
    27952888/**
    2796   This function sets all MTRRs (variable and fixed)
     2889  This function sets all MTRRs includes Variable and Fixed.
     2890
     2891  The behavior of this function is to program everything in MtrrSetting to hardware.
     2892  MTRRs might not be enabled because the enable bit is clear in MtrrSetting->MtrrDefType.
    27972893
    27982894  @param[in]  MtrrSetting  A buffer holding all MTRRs content.
     
    28072903  )
    28082904{
    2809   MTRR_CONTEXT  MtrrContext;
    2810 
    2811   if (!IsMtrrSupported ()) {
     2905  BOOLEAN                          FixedMtrrSupported;
     2906  MSR_IA32_MTRR_DEF_TYPE_REGISTER  *MtrrDefType;
     2907  MTRR_CONTEXT                     MtrrContext;
     2908
     2909  MtrrDefType = (MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&MtrrSetting->MtrrDefType;
     2910  if (!MtrrLibIsMtrrSupported (&FixedMtrrSupported, NULL)) {
    28122911    return MtrrSetting;
    28132912  }
     
    28162915
    28172916  //
    2818   // Set fixed MTRRs
    2819   //
    2820   MtrrSetFixedMtrrWorker (&MtrrSetting->Fixed);
    2821 
    2822   //
    2823   // Set variable MTRRs
     2917  // Enabling the Fixed MTRR bit when unsupported is not allowed.
     2918  //
     2919  ASSERT (FixedMtrrSupported || (MtrrDefType->Bits.FE == 0));
     2920
     2921  //
     2922  // If the hardware supports Fixed MTRR, it is sufficient
     2923  // to set MTRRs regardless of whether Fixed MTRR bit is enabled.
     2924  //
     2925  if (FixedMtrrSupported) {
     2926    MtrrSetFixedMtrrWorker (&MtrrSetting->Fixed);
     2927  }
     2928
     2929  //
     2930  // Set Variable MTRRs
    28242931  //
    28252932  MtrrSetVariableMtrrWorker (&MtrrSetting->Variables);
     
    28482955  )
    28492956{
    2850   CPUID_VERSION_INFO_EDX     Edx;
    2851   MSR_IA32_MTRRCAP_REGISTER  MtrrCap;
    2852 
    2853   //
    2854   // Check CPUID(1).EDX[12] for MTRR capability
    2855   //
    2856   AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &Edx.Uint32);
    2857   if (Edx.Bits.MTRR == 0) {
    2858     return FALSE;
    2859   }
    2860 
    2861   //
    2862   // Check number of variable MTRRs and fixed MTRRs existence.
    2863   // If number of variable MTRRs is zero, or fixed MTRRs do not
    2864   // exist, return false.
    2865   //
    2866   MtrrCap.Uint64 = AsmReadMsr64 (MSR_IA32_MTRRCAP);
    2867   if ((MtrrCap.Bits.VCNT == 0) || (MtrrCap.Bits.FIX == 0)) {
    2868     return FALSE;
    2869   }
    2870 
    2871   return TRUE;
    2872 }
    2873 
    2874 /**
    2875   Worker function prints all MTRRs for debugging.
    2876 
    2877   If MtrrSetting is not NULL, print MTRR settings from input MTRR
    2878   settings buffer.
    2879   If MtrrSetting is NULL, print MTRR settings from MTRRs.
    2880 
    2881   @param  MtrrSetting    A buffer holding all MTRRs content.
    2882 **/
    2883 VOID
    2884 MtrrDebugPrintAllMtrrsWorker (
    2885   IN MTRR_SETTINGS  *MtrrSetting
    2886   )
    2887 {
    2888   DEBUG_CODE_BEGIN ();
    2889   MTRR_SETTINGS      LocalMtrrs;
    2890   MTRR_SETTINGS      *Mtrrs;
    2891   UINTN              Index;
    2892   UINTN              RangeCount;
    2893   UINT64             MtrrValidBitsMask;
    2894   UINT64             MtrrValidAddressMask;
    2895   UINT32             VariableMtrrCount;
    2896   BOOLEAN            ContainVariableMtrr;
    2897   MTRR_MEMORY_RANGE  Ranges[
    2898                             ARRAY_SIZE (mMtrrLibFixedMtrrTable) * sizeof (UINT64) + 2 * ARRAY_SIZE (Mtrrs->Variables.Mtrr) + 1
     2957  return MtrrLibIsMtrrSupported (NULL, NULL);
     2958}
     2959
     2960/**
     2961  This function returns a Ranges array containing the memory cache types
     2962  of all memory addresses.
     2963
     2964  @param[in]      MtrrSetting  MTRR setting buffer to parse.
     2965  @param[out]     Ranges       Pointer to an array of MTRR_MEMORY_RANGE.
     2966  @param[in,out]  RangeCount   Count of MTRR_MEMORY_RANGE.
     2967                               On input, the maximum entries the Ranges can hold.
     2968                               On output, the actual entries that the function returns.
     2969
     2970  @retval RETURN_INVALID_PARAMETER RangeCount is NULL.
     2971  @retval RETURN_INVALID_PARAMETER *RangeCount is not 0 but Ranges is NULL.
     2972  @retval RETURN_BUFFER_TOO_SMALL  *RangeCount is too small.
     2973  @retval RETURN_SUCCESS           Ranges are successfully returned.
     2974**/
     2975RETURN_STATUS
     2976EFIAPI
     2977MtrrGetMemoryAttributesInMtrrSettings (
     2978  IN CONST MTRR_SETTINGS      *MtrrSetting OPTIONAL,
     2979  OUT      MTRR_MEMORY_RANGE  *Ranges,
     2980  IN OUT   UINTN              *RangeCount
     2981  )
     2982{
     2983  RETURN_STATUS                    Status;
     2984  MTRR_SETTINGS                    LocalMtrrs;
     2985  CONST MTRR_SETTINGS              *Mtrrs;
     2986  MSR_IA32_MTRR_DEF_TYPE_REGISTER  *MtrrDefType;
     2987  UINTN                            LocalRangeCount;
     2988  UINT64                           MtrrValidBitsMask;
     2989  UINT64                           MtrrValidAddressMask;
     2990  UINT32                           VariableMtrrCount;
     2991  MTRR_MEMORY_RANGE                RawVariableRanges[ARRAY_SIZE (Mtrrs->Variables.Mtrr)];
     2992  MTRR_MEMORY_RANGE                LocalRanges[
     2993                                               ARRAY_SIZE (mMtrrLibFixedMtrrTable) * sizeof (UINT64) + 2 * ARRAY_SIZE (Mtrrs->Variables.Mtrr) + 1
    28992994  ];
    2900   MTRR_MEMORY_RANGE  RawVariableRanges[ARRAY_SIZE (Mtrrs->Variables.Mtrr)];
    2901 
    2902   if (!IsMtrrSupported ()) {
    2903     return;
    2904   }
    2905 
    2906   VariableMtrrCount = GetVariableMtrrCountWorker ();
     2995
     2996  if (RangeCount == NULL) {
     2997    return RETURN_INVALID_PARAMETER;
     2998  }
     2999
     3000  if ((*RangeCount != 0) && (Ranges == NULL)) {
     3001    return RETURN_INVALID_PARAMETER;
     3002  }
    29073003
    29083004  if (MtrrSetting != NULL) {
     
    29133009  }
    29143010
     3011  MtrrDefType = (MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&Mtrrs->MtrrDefType;
     3012
     3013  LocalRangeCount = 1;
     3014  MtrrLibInitializeMtrrMask (&MtrrValidBitsMask, &MtrrValidAddressMask);
     3015  LocalRanges[0].BaseAddress = 0;
     3016  LocalRanges[0].Length      = MtrrValidBitsMask + 1;
     3017
     3018  if (MtrrDefType->Bits.E == 0) {
     3019    LocalRanges[0].Type = CacheUncacheable;
     3020  } else {
     3021    LocalRanges[0].Type = MtrrGetDefaultMemoryTypeWorker (Mtrrs);
     3022
     3023    VariableMtrrCount = GetVariableMtrrCountWorker ();
     3024    ASSERT (VariableMtrrCount <= ARRAY_SIZE (MtrrSetting->Variables.Mtrr));
     3025
     3026    MtrrLibGetRawVariableRanges (
     3027      &Mtrrs->Variables,
     3028      VariableMtrrCount,
     3029      MtrrValidBitsMask,
     3030      MtrrValidAddressMask,
     3031      RawVariableRanges
     3032      );
     3033    Status = MtrrLibApplyVariableMtrrs (
     3034               RawVariableRanges,
     3035               VariableMtrrCount,
     3036               LocalRanges,
     3037               ARRAY_SIZE (LocalRanges),
     3038               &LocalRangeCount
     3039               );
     3040    ASSERT_RETURN_ERROR (Status);
     3041
     3042    if (MtrrDefType->Bits.FE == 1) {
     3043      MtrrLibApplyFixedMtrrs (&Mtrrs->Fixed, LocalRanges, ARRAY_SIZE (LocalRanges), &LocalRangeCount);
     3044    }
     3045  }
     3046
     3047  if (*RangeCount < LocalRangeCount) {
     3048    *RangeCount = LocalRangeCount;
     3049    return RETURN_BUFFER_TOO_SMALL;
     3050  }
     3051
     3052  CopyMem (Ranges, LocalRanges, LocalRangeCount * sizeof (LocalRanges[0]));
     3053  *RangeCount = LocalRangeCount;
     3054  return RETURN_SUCCESS;
     3055}
     3056
     3057/**
     3058  Worker function prints all MTRRs for debugging.
     3059
     3060  If MtrrSetting is not NULL, print MTRR settings from input MTRR
     3061  settings buffer.
     3062  If MtrrSetting is NULL, print MTRR settings from MTRRs.
     3063
     3064  @param  MtrrSetting    A buffer holding all MTRRs content.
     3065**/
     3066VOID
     3067MtrrDebugPrintAllMtrrsWorker (
     3068  IN MTRR_SETTINGS  *MtrrSetting
     3069  )
     3070{
     3071  DEBUG_CODE_BEGIN ();
     3072  UINT32             Index;
     3073  MTRR_SETTINGS      LocalMtrrs;
     3074  MTRR_SETTINGS      *Mtrrs;
     3075  RETURN_STATUS      Status;
     3076  UINTN              RangeCount;
     3077  BOOLEAN            ContainVariableMtrr;
     3078  MTRR_MEMORY_RANGE  Ranges[
     3079                            ARRAY_SIZE (mMtrrLibFixedMtrrTable) * sizeof (UINT64) + 2 * ARRAY_SIZE (Mtrrs->Variables.Mtrr) + 1
     3080  ];
     3081
     3082  if (MtrrSetting != NULL) {
     3083    Mtrrs = MtrrSetting;
     3084  } else {
     3085    MtrrGetAllMtrrs (&LocalMtrrs);
     3086    Mtrrs = &LocalMtrrs;
     3087  }
     3088
     3089  RangeCount = ARRAY_SIZE (Ranges);
     3090  Status     = MtrrGetMemoryAttributesInMtrrSettings (Mtrrs, Ranges, &RangeCount);
     3091  if (RETURN_ERROR (Status)) {
     3092    DEBUG ((DEBUG_CACHE, "MTRR is not enabled.\n"));
     3093    return;
     3094  }
     3095
    29153096  //
    29163097  // Dump RAW MTRR contents
     
    29243105
    29253106  ContainVariableMtrr = FALSE;
    2926   for (Index = 0; Index < VariableMtrrCount; Index++) {
     3107  for (Index = 0; Index < ARRAY_SIZE (Mtrrs->Variables.Mtrr); Index++) {
    29273108    if ((Mtrrs->Variables.Mtrr[Index].Mask & BIT11) == 0) {
    29283109      //
     
    29533134  DEBUG ((DEBUG_CACHE, "Memory Ranges:\n"));
    29543135  DEBUG ((DEBUG_CACHE, "====================================\n"));
    2955   MtrrLibInitializeMtrrMask (&MtrrValidBitsMask, &MtrrValidAddressMask);
    2956   Ranges[0].BaseAddress = 0;
    2957   Ranges[0].Length      = MtrrValidBitsMask + 1;
    2958   Ranges[0].Type        = MtrrGetDefaultMemoryTypeWorker (Mtrrs);
    2959   RangeCount            = 1;
    2960 
    2961   MtrrLibGetRawVariableRanges (
    2962     &Mtrrs->Variables,
    2963     VariableMtrrCount,
    2964     MtrrValidBitsMask,
    2965     MtrrValidAddressMask,
    2966     RawVariableRanges
    2967     );
    2968   MtrrLibApplyVariableMtrrs (
    2969     RawVariableRanges,
    2970     VariableMtrrCount,
    2971     Ranges,
    2972     ARRAY_SIZE (Ranges),
    2973     &RangeCount
    2974     );
    2975 
    2976   MtrrLibApplyFixedMtrrs (&Mtrrs->Fixed, Ranges, ARRAY_SIZE (Ranges), &RangeCount);
    2977 
    29783136  for (Index = 0; Index < RangeCount; Index++) {
    29793137    DEBUG ((
  • trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/Library/MtrrLib/UnitTest/MtrrLibUnitTest.c

    r101291 r105670  
    1414
    1515STATIC MTRR_LIB_SYSTEM_PARAMETER  mSystemParameters[] = {
    16   { 38, TRUE, TRUE, CacheUncacheable,    12 },
    17   { 38, TRUE, TRUE, CacheWriteBack,      12 },
    18   { 38, TRUE, TRUE, CacheWriteThrough,   12 },
    19   { 38, TRUE, TRUE, CacheWriteProtected, 12 },
    20   { 38, TRUE, TRUE, CacheWriteCombining, 12 },
    21 
    22   { 42, TRUE, TRUE, CacheUncacheable,    12 },
    23   { 42, TRUE, TRUE, CacheWriteBack,      12 },
    24   { 42, TRUE, TRUE, CacheWriteThrough,   12 },
    25   { 42, TRUE, TRUE, CacheWriteProtected, 12 },
    26   { 42, TRUE, TRUE, CacheWriteCombining, 12 },
    27 
    28   { 48, TRUE, TRUE, CacheUncacheable,    12 },
    29   { 48, TRUE, TRUE, CacheWriteBack,      12 },
    30   { 48, TRUE, TRUE, CacheWriteThrough,   12 },
    31   { 48, TRUE, TRUE, CacheWriteProtected, 12 },
    32   { 48, TRUE, TRUE, CacheWriteCombining, 12 },
    33 
    34   { 48, TRUE, TRUE, CacheWriteBack,      12, 7}, // 7 bits for MKTME
     16  { 38, TRUE, TRUE,  CacheUncacheable,    12 },
     17  { 38, TRUE, TRUE,  CacheWriteBack,      12 },
     18  { 38, TRUE, TRUE,  CacheWriteThrough,   12 },
     19  { 38, TRUE, TRUE,  CacheWriteProtected, 12 },
     20  { 38, TRUE, TRUE,  CacheWriteCombining, 12 },
     21
     22  { 42, TRUE, TRUE,  CacheUncacheable,    12 },
     23  { 42, TRUE, TRUE,  CacheWriteBack,      12 },
     24  { 42, TRUE, TRUE,  CacheWriteThrough,   12 },
     25  { 42, TRUE, TRUE,  CacheWriteProtected, 12 },
     26  { 42, TRUE, TRUE,  CacheWriteCombining, 12 },
     27
     28  { 48, TRUE, TRUE,  CacheUncacheable,    12 },
     29  { 48, TRUE, TRUE,  CacheWriteBack,      12 },
     30  { 48, TRUE, TRUE,  CacheWriteThrough,   12 },
     31  { 48, TRUE, TRUE,  CacheWriteProtected, 12 },
     32  { 48, TRUE, TRUE,  CacheWriteCombining, 12 },
     33
     34  { 48, TRUE, FALSE, CacheUncacheable,    12 },
     35  { 48, TRUE, FALSE, CacheWriteBack,      12 },
     36  { 48, TRUE, FALSE, CacheWriteThrough,   12 },
     37  { 48, TRUE, FALSE, CacheWriteProtected, 12 },
     38  { 48, TRUE, FALSE, CacheWriteCombining, 12 },
     39  { 48, TRUE, TRUE,  CacheWriteBack,      12, 7},  // 7 bits for MKTME
    3540};
    3641
     
    173178
    174179/**
    175   Unit test of MtrrLib service MtrrSetMemoryAttribute()
     180  Unit test of MtrrLib service MtrrGetMemoryAttributesInMtrrSettings() and
     181  MtrrSetMemoryAttributesInMtrrSettings()
    176182
    177183  @param[in]  Context    Ignored
     
    184190UNIT_TEST_STATUS
    185191EFIAPI
    186 UnitTestMtrrSetMemoryAttributesInMtrrSettings (
     192UnitTestMtrrSetAndGetMemoryAttributesInMtrrSettings (
    187193  IN UNIT_TEST_CONTEXT  Context
    188194  )
     
    209215  UINT32             ActualVariableMtrrUsage;
    210216  UINTN              ActualMemoryRangesCount;
     217
     218  MTRR_MEMORY_RANGE  ReturnedMemoryRanges[MTRR_NUMBER_OF_FIXED_MTRR   * sizeof (UINT64) + 2 * MTRR_NUMBER_OF_VARIABLE_MTRR + 1];
     219  UINTN              ReturnedMemoryRangesCount;
    211220
    212221  MTRR_SETTINGS  *Mtrrs[2];
     
    294303    UT_ASSERT_TRUE (ExpectedVariableMtrrUsage >= ActualVariableMtrrUsage);
    295304
     305    ReturnedMemoryRangesCount = ARRAY_SIZE (ReturnedMemoryRanges);
     306    Status                    = MtrrGetMemoryAttributesInMtrrSettings (
     307                                  Mtrrs[MtrrIndex],
     308                                  ReturnedMemoryRanges,
     309                                  &ReturnedMemoryRangesCount
     310                                  );
     311    UT_ASSERT_STATUS_EQUAL (Status, RETURN_SUCCESS);
     312    UT_LOG_INFO ("--- Returned Memory Ranges [%d] ---\n", ReturnedMemoryRangesCount);
     313    DumpMemoryRanges (ReturnedMemoryRanges, ReturnedMemoryRangesCount);
     314    VerifyMemoryRanges (ExpectedMemoryRanges, ExpectedMemoryRangesCount, ReturnedMemoryRanges, ReturnedMemoryRangesCount);
     315
    296316    ZeroMem (&LocalMtrrs, sizeof (LocalMtrrs));
    297317  }
     
    400420  SystemParameter.FixedMtrrSupported = TRUE;
    401421  InitializeMtrrRegs (&SystemParameter);
    402   UT_ASSERT_FALSE (IsMtrrSupported ());
     422  UT_ASSERT_TRUE (IsMtrrSupported ());
    403423
    404424  //
     
    409429  SystemParameter.FixedMtrrSupported = FALSE;
    410430  InitializeMtrrRegs (&SystemParameter);
    411   UT_ASSERT_FALSE (IsMtrrSupported ());
     431  UT_ASSERT_TRUE (IsMtrrSupported ());
    412432
    413433  //
     
    551571  PatchPcdSet32 (PcdCpuNumberOfReservedVariableMtrrs, 2);
    552572  Result = GetFirmwareVariableMtrrCount ();
    553   UT_ASSERT_EQUAL (Result, 0);
     573  UT_ASSERT_EQUAL (Result, SystemParameter.VariableMtrrCount - 2);
    554574
    555575  //
     
    646666  UT_ASSERT_MEM_EQUAL (&ExpectedFixedSettings, &FixedSettings, sizeof (ExpectedFixedSettings));
    647667
    648   return UNIT_TEST_PASSED;
     668  //
     669  // Negative test case when Fixed MTRRs are not supported
     670  //
     671  SystemParameter.MtrrSupported      = TRUE;
     672  SystemParameter.FixedMtrrSupported = FALSE;
     673  InitializeMtrrRegs (&SystemParameter);
     674
     675  ZeroMem (&FixedSettings, sizeof (FixedSettings));
     676  ZeroMem (&ExpectedFixedSettings, sizeof (ExpectedFixedSettings));
     677  Result = MtrrGetFixedMtrr (&FixedSettings);
     678  UT_ASSERT_EQUAL ((UINTN)Result, (UINTN)&FixedSettings);
     679  UT_ASSERT_MEM_EQUAL (&ExpectedFixedSettings, &FixedSettings, sizeof (ExpectedFixedSettings));
     680
     681  return UNIT_TEST_PASSED;
     682}
     683
     684/**
     685  Set Random Variable and Fixed MTRRs Settings for
     686  unit test of UnitTestMtrrGetAllMtrrs.
     687
     688  @param SystemParameter      System parameter that controls the MTRR registers initialization.
     689  @param ExpectedMtrrs        Expected Fixed and Variable MTRRs.
     690**/
     691VOID
     692SetRandomlyGeneratedMtrrSettings (
     693  IN MTRR_LIB_SYSTEM_PARAMETER  *SystemParameter,
     694  IN MTRR_SETTINGS              *ExpectedMtrrs
     695  )
     696{
     697  UINT32                           Index;
     698  UINTN                            MsrIndex;
     699  UINTN                            ByteIndex;
     700  UINT64                           MsrValue;
     701  MSR_IA32_MTRR_DEF_TYPE_REGISTER  Default;
     702
     703  AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, ExpectedMtrrs->MtrrDefType);
     704  //
     705  // Randomly generate Variable MTRR BASE/MASK for a specified type and write to MSR.
     706  //
     707  for (Index = 0; Index < SystemParameter->VariableMtrrCount; Index++) {
     708    GenerateRandomMtrrPair (SystemParameter->PhysicalAddressBits, GenerateRandomCacheType (), &ExpectedMtrrs->Variables.Mtrr[Index], NULL);
     709    AsmWriteMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1), ExpectedMtrrs->Variables.Mtrr[Index].Base);
     710    AsmWriteMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1), ExpectedMtrrs->Variables.Mtrr[Index].Mask);
     711  }
     712
     713  //
     714  // Set Fixed MTRRs when the Fixed MTRRs is enabled and the MTRRs is supported.
     715  //
     716  Default.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
     717  if ((Default.Bits.FE == 1) && (SystemParameter->MtrrSupported == TRUE)) {
     718    for (MsrIndex = 0; MsrIndex < ARRAY_SIZE (mFixedMtrrsIndex); MsrIndex++) {
     719      MsrValue = 0;
     720      for (ByteIndex = 0; ByteIndex < sizeof (UINT64); ByteIndex++) {
     721        MsrValue = MsrValue | LShiftU64 (GenerateRandomCacheType (), ByteIndex * 8);
     722      }
     723
     724      ExpectedMtrrs->Fixed.Mtrr[MsrIndex] = MsrValue;
     725      AsmWriteMsr64 (mFixedMtrrsIndex[MsrIndex], MsrValue);
     726    }
     727  }
    649728}
    650729
     
    665744  )
    666745{
    667   MTRR_SETTINGS              *Result;
    668   MTRR_SETTINGS              Mtrrs;
    669   MTRR_SETTINGS              ExpectedMtrrs;
    670   MTRR_VARIABLE_SETTING      VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
    671   UINT32                     Index;
    672   MTRR_LIB_SYSTEM_PARAMETER  SystemParameter;
    673   MTRR_LIB_TEST_CONTEXT      *LocalContext;
     746  MTRR_SETTINGS                    *Result;
     747  MTRR_SETTINGS                    Mtrrs;
     748  MTRR_SETTINGS                    ExpectedMtrrs;
     749  MTRR_LIB_SYSTEM_PARAMETER        SystemParameter;
     750  MTRR_LIB_TEST_CONTEXT            *LocalContext;
     751  MSR_IA32_MTRR_DEF_TYPE_REGISTER  Default;
    674752
    675753  LocalContext = (MTRR_LIB_TEST_CONTEXT *)Context;
    676754
    677755  CopyMem (&SystemParameter, LocalContext->SystemParameter, sizeof (SystemParameter));
    678   InitializeMtrrRegs (&SystemParameter);
    679 
    680   for (Index = 0; Index < SystemParameter.VariableMtrrCount; Index++) {
    681     GenerateRandomMtrrPair (SystemParameter.PhysicalAddressBits, GenerateRandomCacheType (), &VariableMtrr[Index], NULL);
    682     AsmWriteMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1), VariableMtrr[Index].Base);
    683     AsmWriteMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1), VariableMtrr[Index].Mask);
    684   }
    685 
     756
     757  //
     758  // For the case that Fixed MTRRs is NOT enabled
     759  //
     760  SystemParameter.MtrrSupported      = TRUE;
     761  SystemParameter.FixedMtrrSupported = FALSE;
     762  InitializeMtrrRegs (&SystemParameter);
     763  Default.Uint64  = 0;
     764  Default.Bits.E  = 1;
     765  Default.Bits.FE = 0;
     766  ZeroMem (&ExpectedMtrrs, sizeof (ExpectedMtrrs));
     767  ExpectedMtrrs.MtrrDefType = Default.Uint64;
     768  //
     769  // Randomly generate expected MtrrSettings and set to MSR.
     770  //
     771  SetRandomlyGeneratedMtrrSettings (&SystemParameter, &ExpectedMtrrs);
    686772  Result = MtrrGetAllMtrrs (&Mtrrs);
    687   UT_ASSERT_EQUAL ((UINTN)Result, (UINTN)&Mtrrs);
    688   UT_ASSERT_MEM_EQUAL (Mtrrs.Variables.Mtrr, VariableMtrr, sizeof (MTRR_VARIABLE_SETTING) * SystemParameter.VariableMtrrCount);
     773  UT_ASSERT_MEM_EQUAL (&ExpectedMtrrs.Fixed, &Mtrrs.Fixed, sizeof (MTRR_FIXED_SETTINGS));
     774  UT_ASSERT_MEM_EQUAL (Mtrrs.Variables.Mtrr, ExpectedMtrrs.Variables.Mtrr, sizeof (MTRR_VARIABLE_SETTING) * (SystemParameter.VariableMtrrCount));
     775
     776  //
     777  // For the case that Fixed MTRRs is enabled
     778  //
     779  SystemParameter.MtrrSupported      = TRUE;
     780  SystemParameter.FixedMtrrSupported = TRUE;
     781  InitializeMtrrRegs (&SystemParameter);
     782  Default.Uint64  = 0;
     783  Default.Bits.E  = 1;
     784  Default.Bits.FE = 1;
     785  ZeroMem (&ExpectedMtrrs, sizeof (ExpectedMtrrs));
     786  ExpectedMtrrs.MtrrDefType = Default.Uint64;
     787  SetRandomlyGeneratedMtrrSettings (&SystemParameter, &ExpectedMtrrs);
     788  Result = MtrrGetAllMtrrs (&Mtrrs);
     789  UT_ASSERT_MEM_EQUAL (&ExpectedMtrrs.Fixed, &Mtrrs.Fixed, sizeof (MTRR_FIXED_SETTINGS));
     790  UT_ASSERT_MEM_EQUAL (Mtrrs.Variables.Mtrr, ExpectedMtrrs.Variables.Mtrr, sizeof (MTRR_VARIABLE_SETTING) * (SystemParameter.VariableMtrrCount));
    689791
    690792  //
     
    713815/**
    714816  Unit test of MtrrLib service MtrrSetAllMtrrs()
    715 
    716817  @param[in]  Context    Ignored
    717 
    718818  @retval  UNIT_TEST_PASSED             The Unit test has completed and the test
    719819                                        case was successful.
    720820  @retval  UNIT_TEST_ERROR_TEST_FAILED  A test case assertion has failed.
    721 
    722821**/
    723822UNIT_TEST_STATUS
     
    728827{
    729828  MTRR_SETTINGS                    *Result;
    730   MTRR_SETTINGS                    Mtrrs;
     829  MTRR_SETTINGS                    ExpectedMtrrs;
    731830  UINT32                           Index;
    732831  MSR_IA32_MTRR_DEF_TYPE_REGISTER  Default;
    733832  MTRR_LIB_SYSTEM_PARAMETER        SystemParameter;
    734833  MTRR_LIB_TEST_CONTEXT            *LocalContext;
     834  UINTN                            MsrIndex;
     835  UINTN                            ByteIndex;
     836  UINT64                           MsrValue;
    735837
    736838  LocalContext = (MTRR_LIB_TEST_CONTEXT *)Context;
    737 
    738839  CopyMem (&SystemParameter, LocalContext->SystemParameter, sizeof (SystemParameter));
    739840  InitializeMtrrRegs (&SystemParameter);
    740 
    741841  Default.Uint64    = 0;
    742842  Default.Bits.E    = 1;
    743843  Default.Bits.FE   = 1;
    744844  Default.Bits.Type = GenerateRandomCacheType ();
    745 
    746   ZeroMem (&Mtrrs, sizeof (Mtrrs));
    747   Mtrrs.MtrrDefType = Default.Uint64;
     845  ZeroMem (&ExpectedMtrrs, sizeof (ExpectedMtrrs));
     846  ExpectedMtrrs.MtrrDefType = Default.Uint64;
    748847  for (Index = 0; Index < SystemParameter.VariableMtrrCount; Index++) {
    749     GenerateRandomMtrrPair (SystemParameter.PhysicalAddressBits, GenerateRandomCacheType (), &Mtrrs.Variables.Mtrr[Index], NULL);
    750   }
    751 
    752   Result = MtrrSetAllMtrrs (&Mtrrs);
    753   UT_ASSERT_EQUAL ((UINTN)Result, (UINTN)&Mtrrs);
    754 
    755   UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE), Mtrrs.MtrrDefType);
     848    GenerateRandomMtrrPair (SystemParameter.PhysicalAddressBits, GenerateRandomCacheType (), &ExpectedMtrrs.Variables.Mtrr[Index], NULL);
     849  }
     850
     851  for (MsrIndex = 0; MsrIndex < ARRAY_SIZE (mFixedMtrrsIndex); MsrIndex++) {
     852    MsrValue = 0;
     853    for (ByteIndex = 0; ByteIndex < sizeof (UINT64); ByteIndex++) {
     854      MsrValue = MsrValue | LShiftU64 (GenerateRandomCacheType (), ByteIndex * 8);
     855    }
     856
     857    ExpectedMtrrs.Fixed.Mtrr[MsrIndex] = MsrValue;
     858  }
     859
     860  Result = MtrrSetAllMtrrs (&ExpectedMtrrs);
     861  UT_ASSERT_EQUAL ((UINTN)Result, (UINTN)&ExpectedMtrrs);
     862  UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE), ExpectedMtrrs.MtrrDefType);
    756863  for (Index = 0; Index < SystemParameter.VariableMtrrCount; Index++) {
    757     UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1)), Mtrrs.Variables.Mtrr[Index].Base);
    758     UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1)), Mtrrs.Variables.Mtrr[Index].Mask);
     864    UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1)), ExpectedMtrrs.Variables.Mtrr[Index].Base);
     865    UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1)), ExpectedMtrrs.Variables.Mtrr[Index].Mask);
    759866  }
    760867
     
    9051012  UT_ASSERT_EQUAL (Result, CacheUncacheable);
    9061013
     1014  //
     1015  // If MTRRs are supported, but Fixed MTRRs are not supported.
     1016  //
    9071017  SystemParameter.MtrrSupported      = TRUE;
    9081018  SystemParameter.FixedMtrrSupported = FALSE;
    9091019  InitializeMtrrRegs (&SystemParameter);
    9101020  Result = MtrrGetDefaultMemoryType ();
    911   UT_ASSERT_EQUAL (Result, CacheUncacheable);
    912 
     1021  UT_ASSERT_EQUAL (Result, SystemParameter.DefaultCacheType);
     1022
     1023  //
     1024  // If MTRRs are supported, but Variable MTRRs are not supported.
     1025  //
    9131026  SystemParameter.MtrrSupported      = TRUE;
    9141027  SystemParameter.FixedMtrrSupported = TRUE;
     
    9161029  InitializeMtrrRegs (&SystemParameter);
    9171030  Result = MtrrGetDefaultMemoryType ();
    918   UT_ASSERT_EQUAL (Result, CacheUncacheable);
    919 
    920   return UNIT_TEST_PASSED;
    921 }
    922 
    923 /**
    924   Unit test of MtrrLib service MtrrSetMemoryAttributeInMtrrSettings().
     1031  UT_ASSERT_EQUAL (Result, SystemParameter.DefaultCacheType);
     1032
     1033  return UNIT_TEST_PASSED;
     1034}
     1035
     1036/**
     1037  Unit test of MtrrLib service MtrrSetMemoryAttributeInMtrrSettings() and
     1038  MtrrGetMemoryAttributesInMtrrSettings().
    9251039
    9261040  @param[in]  Context    Ignored
     
    9331047UNIT_TEST_STATUS
    9341048EFIAPI
    935 UnitTestMtrrSetMemoryAttributeInMtrrSettings (
     1049UnitTestMtrrSetMemoryAttributeAndGetMemoryAttributesInMtrrSettings (
    9361050  IN UNIT_TEST_CONTEXT  Context
    9371051  )
     
    9571071  UINT32             ActualVariableMtrrUsage;
    9581072  UINTN              ActualMemoryRangesCount;
     1073
     1074  MTRR_MEMORY_RANGE  ReturnedMemoryRanges[MTRR_NUMBER_OF_FIXED_MTRR * sizeof (UINT64) + 2 * MTRR_NUMBER_OF_VARIABLE_MTRR + 1];
     1075  UINTN              ReturnedMemoryRangesCount;
    9591076
    9601077  MTRR_SETTINGS  *Mtrrs[2];
     
    10341151    UT_ASSERT_TRUE (ExpectedVariableMtrrUsage >= ActualVariableMtrrUsage);
    10351152
     1153    ReturnedMemoryRangesCount = ARRAY_SIZE (ReturnedMemoryRanges);
     1154    Status                    = MtrrGetMemoryAttributesInMtrrSettings (
     1155                                  &LocalMtrrs,
     1156                                  ReturnedMemoryRanges,
     1157                                  &ReturnedMemoryRangesCount
     1158                                  );
     1159    UT_ASSERT_STATUS_EQUAL (Status, RETURN_SUCCESS);
     1160    UT_LOG_INFO ("--- Returned Memory Ranges [%d] ---\n", ReturnedMemoryRangesCount);
     1161    DumpMemoryRanges (ReturnedMemoryRanges, ReturnedMemoryRangesCount);
     1162    VerifyMemoryRanges (ExpectedMemoryRanges, ExpectedMemoryRangesCount, ReturnedMemoryRanges, ReturnedMemoryRangesCount);
     1163
    10361164    ZeroMem (&LocalMtrrs, sizeof (LocalMtrrs));
    10371165  }
     
    11421270    for (Index = 0; Index < Iteration; Index++) {
    11431271      AddTestCase (MtrrApiTests, "Test InvalidMemoryLayouts", "InvalidMemoryLayouts", UnitTestInvalidMemoryLayouts, InitializeSystem, NULL, &mSystemParameters[SystemIndex]);
    1144       AddTestCase (MtrrApiTests, "Test MtrrSetMemoryAttributeInMtrrSettings", "MtrrSetMemoryAttributeInMtrrSettings", UnitTestMtrrSetMemoryAttributeInMtrrSettings, InitializeSystem, NULL, &mSystemParameters[SystemIndex]);
    1145       AddTestCase (MtrrApiTests, "Test MtrrSetMemoryAttributesInMtrrSettings", "MtrrSetMemoryAttributesInMtrrSettings", UnitTestMtrrSetMemoryAttributesInMtrrSettings, InitializeSystem, NULL, &mSystemParameters[SystemIndex]);
     1272      AddTestCase (MtrrApiTests, "Test MtrrSetMemoryAttributeInMtrrSettings and MtrrGetMemoryAttributesInMtrrSettings", "MtrrSetMemoryAttributeInMtrrSettings and MtrrGetMemoryAttributesInMtrrSettings", UnitTestMtrrSetMemoryAttributeAndGetMemoryAttributesInMtrrSettings, InitializeSystem, NULL, &mSystemParameters[SystemIndex]);
     1273      AddTestCase (MtrrApiTests, "Test MtrrSetMemoryAttributesInMtrrSettings and MtrrGetMemoryAttributesInMtrrSettings", "MtrrSetMemoryAttributesInMtrrSettings and MtrrGetMemoryAttributesInMtrrSetting", UnitTestMtrrSetAndGetMemoryAttributesInMtrrSettings, InitializeSystem, NULL, &mSystemParameters[SystemIndex]);
    11461274    }
    11471275  }
  • trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/Library/MtrrLib/UnitTest/Support.c

    r101291 r105670  
    4444    return rand ();
    4545  } else {
    46     DEBUG ((DEBUG_INFO, "random: %d\n", mNumberIndex));
    4746    return mNumbers[mNumberIndex++ % (mNumberCount - 1)];
    4847  }
     
    237236  UINT32  Index;
    238237
     238  UT_ASSERT_EQUAL (mCpuidVersionInfoEdx.Bits.MTRR, 1);
     239
    239240  for (Index = 0; Index < ARRAY_SIZE (mFixedMtrrsValue); Index++) {
    240241    if (MsrIndex == mFixedMtrrsIndex[Index]) {
     242      UT_ASSERT_EQUAL (mMtrrCapMsr.Bits.FIX, 1);
    241243      return mFixedMtrrsValue[Index];
    242244    }
     
    246248      (MsrIndex <= MSR_IA32_MTRR_PHYSMASK0 + (MTRR_NUMBER_OF_VARIABLE_MTRR << 1)))
    247249  {
     250    UT_ASSERT_TRUE (((MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1) < mMtrrCapMsr.Bits.VCNT);
    248251    if (MsrIndex % 2 == 0) {
    249252      Index = (MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1;
     
    300303  UINT32  Index;
    301304
     305  UT_ASSERT_EQUAL (mCpuidVersionInfoEdx.Bits.MTRR, 1);
     306
    302307  for (Index = 0; Index < ARRAY_SIZE (mFixedMtrrsValue); Index++) {
    303308    if (MsrIndex == mFixedMtrrsIndex[Index]) {
     309      UT_ASSERT_EQUAL (mMtrrCapMsr.Bits.FIX, 1);
    304310      mFixedMtrrsValue[Index] = Value;
    305311      return Value;
     
    310316      (MsrIndex <= MSR_IA32_MTRR_PHYSMASK0 + (MTRR_NUMBER_OF_VARIABLE_MTRR << 1)))
    311317  {
     318    UT_ASSERT_TRUE (((MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1) < mMtrrCapMsr.Bits.VCNT);
    312319    if (MsrIndex % 2 == 0) {
    313320      Index                                = (MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1;
     
    322329
    323330  if (MsrIndex == MSR_IA32_MTRR_DEF_TYPE) {
     331    if (((MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&Value)->Bits.FE == 1) {
     332      UT_ASSERT_EQUAL (mMtrrCapMsr.Bits.FIX, 1);
     333    }
     334
    324335    mDefTypeMsr.Uint64 = Value;
    325336    return Value;
     
    354365
    355366  for (Index = 0; Index < ARRAY_SIZE (mVariableMtrrsPhysBase); Index++) {
    356     mVariableMtrrsPhysBase[Index].Uint64         = 0;
    357     mVariableMtrrsPhysBase[Index].Bits.Type      = SystemParameter->DefaultCacheType;
    358     mVariableMtrrsPhysBase[Index].Bits.Reserved1 = 0;
    359 
    360     mVariableMtrrsPhysMask[Index].Uint64         = 0;
    361     mVariableMtrrsPhysMask[Index].Bits.V         = 0;
    362     mVariableMtrrsPhysMask[Index].Bits.Reserved1 = 0;
     367    mVariableMtrrsPhysBase[Index].Uint64 = 0;
     368    mVariableMtrrsPhysMask[Index].Uint64 = 0;
    363369  }
    364370
    365371  mDefTypeMsr.Bits.E         = 1;
    366   mDefTypeMsr.Bits.FE        = 1;
     372  mDefTypeMsr.Bits.FE        = 0;
    367373  mDefTypeMsr.Bits.Type      = SystemParameter->DefaultCacheType;
    368374  mDefTypeMsr.Bits.Reserved1 = 0;
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