Changeset 105724 in vbox for trunk/src/VBox/VMM/VMMR3
- Timestamp:
- Aug 19, 2024 1:27:44 PM (5 months ago)
- Location:
- trunk/src/VBox/VMM/VMMR3
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/DBGFDisas.cpp
r105352 r105724 609 609 pDisState->pCurInstr = State.Dis.pCurInstr; 610 610 pDisState->cbInstr = State.Dis.cbInstr; 611 pDisState->Param1 = State.Dis. Param1;612 pDisState->Param2 = State.Dis. Param2;613 pDisState->Param3 = State.Dis. Param3;614 pDisState->Param4 = State.Dis. Param4;611 pDisState->Param1 = State.Dis.aParams[0]; 612 pDisState->Param2 = State.Dis.aParams[1]; 613 pDisState->Param3 = State.Dis.aParams[2]; 614 pDisState->Param4 = State.Dis.aParams[3]; 615 615 } 616 616 -
trunk/src/VBox/VMM/VMMR3/HM.cpp
r104511 r105724 2347 2347 pPatch->cbOp = cbOp; 2348 2348 2349 if (Dis. Param1.fUse == DISUSE_DISPLACEMENT32)2349 if (Dis.aParams[0].fUse == DISUSE_DISPLACEMENT32) 2350 2350 { 2351 2351 /* write. */ 2352 if (Dis. Param2.fUse == DISUSE_REG_GEN32)2352 if (Dis.aParams[1].fUse == DISUSE_REG_GEN32) 2353 2353 { 2354 2354 pPatch->enmType = HMTPRINSTR_WRITE_REG; 2355 pPatch->uSrcOperand = Dis. Param2.x86.Base.idxGenReg;2356 Log(("hmR3ReplaceTprInstr: HMTPRINSTR_WRITE_REG %u\n", Dis. Param2.x86.Base.idxGenReg));2355 pPatch->uSrcOperand = Dis.aParams[1].x86.Base.idxGenReg; 2356 Log(("hmR3ReplaceTprInstr: HMTPRINSTR_WRITE_REG %u\n", Dis.aParams[1].x86.Base.idxGenReg)); 2357 2357 } 2358 2358 else 2359 2359 { 2360 Assert(Dis. Param2.fUse == DISUSE_IMMEDIATE32);2360 Assert(Dis.aParams[1].fUse == DISUSE_IMMEDIATE32); 2361 2361 pPatch->enmType = HMTPRINSTR_WRITE_IMM; 2362 pPatch->uSrcOperand = Dis. Param2.uValue;2363 Log(("hmR3ReplaceTprInstr: HMTPRINSTR_WRITE_IMM %#llx\n", Dis. Param2.uValue));2362 pPatch->uSrcOperand = Dis.aParams[1].uValue; 2363 Log(("hmR3ReplaceTprInstr: HMTPRINSTR_WRITE_IMM %#llx\n", Dis.aParams[1].uValue)); 2364 2364 } 2365 2365 rc = PGMPhysSimpleWriteGCPtr(pVCpu, pCtx->rip, s_abVMMCall, sizeof(s_abVMMCall)); … … 2380 2380 * shr eax, 4 2381 2381 */ 2382 Assert(Dis. Param1.fUse == DISUSE_REG_GEN32);2383 2384 uint8_t const idxMmioReg = Dis. Param1.x86.Base.idxGenReg;2382 Assert(Dis.aParams[0].fUse == DISUSE_REG_GEN32); 2383 2384 uint8_t const idxMmioReg = Dis.aParams[0].x86.Base.idxGenReg; 2385 2385 uint8_t const cbOpMmio = cbOp; 2386 2386 uint64_t const uSavedRip = pCtx->rip; … … 2393 2393 if ( rc == VINF_SUCCESS 2394 2394 && Dis.pCurInstr->uOpcode == OP_SHR 2395 && Dis. Param1.fUse == DISUSE_REG_GEN322396 && Dis. Param1.x86.Base.idxGenReg == idxMmioReg2397 && Dis. Param2.fUse == DISUSE_IMMEDIATE82398 && Dis. Param2.uValue == 42395 && Dis.aParams[0].fUse == DISUSE_REG_GEN32 2396 && Dis.aParams[0].x86.Base.idxGenReg == idxMmioReg 2397 && Dis.aParams[1].fUse == DISUSE_IMMEDIATE8 2398 && Dis.aParams[1].uValue == 4 2399 2399 && cbOpMmio + cbOp < sizeof(pVM->hm.s.aPatches[idx].aOpcode)) 2400 2400 { … … 2412 2412 abInstr[1] = 0x0f; 2413 2413 abInstr[2] = 0x20; 2414 abInstr[3] = 0xc0 | Dis. Param1.x86.Base.idxGenReg;2414 abInstr[3] = 0xc0 | Dis.aParams[0].x86.Base.idxGenReg; 2415 2415 for (unsigned i = 4; i < pPatch->cbOp; i++) 2416 2416 abInstr[i] = 0x90; /* nop */ … … 2525 2525 pPatch->enmType = HMTPRINSTR_JUMP_REPLACEMENT; 2526 2526 2527 if (Dis. Param1.fUse == DISUSE_DISPLACEMENT32)2527 if (Dis.aParams[0].fUse == DISUSE_DISPLACEMENT32) 2528 2528 { 2529 2529 /* … … 2544 2544 * jmp return_address [E9 return_address] 2545 2545 */ 2546 bool fUsesEax = (Dis. Param2.fUse == DISUSE_REG_GEN32 && Dis.Param2.x86.Base.idxGenReg == DISGREG_EAX);2546 bool fUsesEax = (Dis.aParams[1].fUse == DISUSE_REG_GEN32 && Dis.aParams[1].x86.Base.idxGenReg == DISGREG_EAX); 2547 2547 2548 2548 aPatch[off++] = 0x51; /* push ecx */ … … 2552 2552 aPatch[off++] = 0x31; /* xor edx, edx */ 2553 2553 aPatch[off++] = 0xd2; 2554 if (Dis. Param2.fUse == DISUSE_REG_GEN32)2554 if (Dis.aParams[1].fUse == DISUSE_REG_GEN32) 2555 2555 { 2556 2556 if (!fUsesEax) 2557 2557 { 2558 2558 aPatch[off++] = 0x89; /* mov eax, src_reg */ 2559 aPatch[off++] = MAKE_MODRM(3, Dis. Param2.x86.Base.idxGenReg, DISGREG_EAX);2559 aPatch[off++] = MAKE_MODRM(3, Dis.aParams[1].x86.Base.idxGenReg, DISGREG_EAX); 2560 2560 } 2561 2561 } 2562 2562 else 2563 2563 { 2564 Assert(Dis. Param2.fUse == DISUSE_IMMEDIATE32);2564 Assert(Dis.aParams[1].fUse == DISUSE_IMMEDIATE32); 2565 2565 aPatch[off++] = 0xb8; /* mov eax, immediate */ 2566 *(uint32_t *)&aPatch[off] = Dis. Param2.uValue;2566 *(uint32_t *)&aPatch[off] = Dis.aParams[1].uValue; 2567 2567 off += sizeof(uint32_t); 2568 2568 } … … 2594 2594 * jmp return_address [E9 return_address] 2595 2595 */ 2596 Assert(Dis. Param1.fUse == DISUSE_REG_GEN32);2597 2598 if (Dis. Param1.x86.Base.idxGenReg != DISGREG_ECX)2596 Assert(Dis.aParams[0].fUse == DISUSE_REG_GEN32); 2597 2598 if (Dis.aParams[0].x86.Base.idxGenReg != DISGREG_ECX) 2599 2599 aPatch[off++] = 0x51; /* push ecx */ 2600 if (Dis. Param1.x86.Base.idxGenReg != DISGREG_EDX )2600 if (Dis.aParams[0].x86.Base.idxGenReg != DISGREG_EDX ) 2601 2601 aPatch[off++] = 0x52; /* push edx */ 2602 if (Dis. Param1.x86.Base.idxGenReg != DISGREG_EAX)2602 if (Dis.aParams[0].x86.Base.idxGenReg != DISGREG_EAX) 2603 2603 aPatch[off++] = 0x50; /* push eax */ 2604 2604 … … 2613 2613 aPatch[off++] = 0x32; 2614 2614 2615 if (Dis. Param1.x86.Base.idxGenReg != DISGREG_EAX)2615 if (Dis.aParams[0].x86.Base.idxGenReg != DISGREG_EAX) 2616 2616 { 2617 2617 aPatch[off++] = 0x89; /* mov dst_reg, eax */ 2618 aPatch[off++] = MAKE_MODRM(3, DISGREG_EAX, Dis. Param1.x86.Base.idxGenReg);2618 aPatch[off++] = MAKE_MODRM(3, DISGREG_EAX, Dis.aParams[0].x86.Base.idxGenReg); 2619 2619 } 2620 2620 2621 if (Dis. Param1.x86.Base.idxGenReg != DISGREG_EAX)2621 if (Dis.aParams[0].x86.Base.idxGenReg != DISGREG_EAX) 2622 2622 aPatch[off++] = 0x58; /* pop eax */ 2623 if (Dis. Param1.x86.Base.idxGenReg != DISGREG_EDX )2623 if (Dis.aParams[0].x86.Base.idxGenReg != DISGREG_EDX ) 2624 2624 aPatch[off++] = 0x5a; /* pop edx */ 2625 if (Dis. Param1.x86.Base.idxGenReg != DISGREG_ECX)2625 if (Dis.aParams[0].x86.Base.idxGenReg != DISGREG_ECX) 2626 2626 aPatch[off++] = 0x59; /* pop ecx */ 2627 2627 }
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