- Timestamp:
- Aug 19, 2024 4:57:30 PM (5 months ago)
- Location:
- trunk
- Files:
-
- 5 edited
-
include/VBox/dis-armv8.h (modified) (3 diffs)
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src/VBox/Disassembler/DisasmCore-armv8.cpp (modified) (17 diffs)
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src/VBox/Disassembler/DisasmFormatArmV8.cpp (modified) (6 diffs)
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src/VBox/Disassembler/DisasmInternal-armv8.h (modified) (2 diffs)
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src/VBox/Disassembler/DisasmTables-armv8-a64.cpp (modified) (24 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/dis-armv8.h
r101539 r105731 61 61 * or DISUSE_REG_GEN64 is set in fUse. */ 62 62 uint8_t idxGenReg; 63 /** IPRT System register encoding. */ 64 uint32_t idSysReg; 63 65 } Reg; 64 66 /** Scale factor. */ … … 77 79 78 80 81 /** Pointer to a constant instruction class descriptor. */ 82 typedef const struct DISARMV8INSNCLASS *PCDISARMV8INSNCLASS; 83 84 79 85 /** 80 86 * The armv8 specific disassembler state and result. … … 82 88 typedef struct 83 89 { 84 uint8_t bDummy; 90 /** Internal: Pointer to the instruction class table. */ 91 PCDISARMV8INSNCLASS pInsnClass; 85 92 } DIS_STATE_ARMV8_T; 86 93 AssertCompile(sizeof(DIS_STATE_ARMV8_T) <= 32); -
trunk/src/VBox/Disassembler/DisasmCore-armv8.cpp
r105724 r105731 33 33 #include <VBox/dis.h> 34 34 #include <VBox/log.h> 35 #include <iprt/armv8.h> 35 36 #include <iprt/assert.h> 36 37 #include <iprt/errcore.h> … … 48 49 * @remark no DECLCALLBACK() here because it's considered to be internal and 49 50 * there is no point in enforcing CDECL. */ 50 typedef int FNDISPARSEARMV8(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit);51 typedef int FNDISPARSEARMV8(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit); 51 52 /** Pointer to a disassembler parser function. */ 52 53 typedef FNDISPARSEARMV8 *PFNDISPARSEARMV8; … … 72 73 * @{ */ 73 74 static FNDISPARSEARMV8 disArmV8ParseIllegal; 75 static FNDISPARSEARMV8 disArmV8ParseIs32Bit; 74 76 static FNDISPARSEARMV8 disArmV8ParseImm; 75 77 static FNDISPARSEARMV8 disArmV8ParseImmRel; … … 80 82 static FNDISPARSEARMV8 disArmV8ParseCond; 81 83 static FNDISPARSEARMV8 disArmV8ParsePState; 84 static FNDISPARSEARMV8 disArmV8ParseSysReg; 82 85 /** @} */ 83 86 … … 97 100 { 98 101 disArmV8ParseIllegal, 102 disArmV8ParseIs32Bit, 99 103 disArmV8ParseImm, 100 104 disArmV8ParseImmRel, … … 105 109 disArmV8ParseCond, 106 110 disArmV8ParsePState, 111 NULL, 112 disArmV8ParseSysReg 107 113 }; 108 114 … … 135 141 136 142 137 static int disArmV8ParseIllegal(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)138 { 139 RT_NOREF(pDis, u32Insn, pInsnClass, pParam, pInsnParm, f64Bit);143 static int disArmV8ParseIllegal(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 144 { 145 RT_NOREF(pDis, u32Insn, pInsnClass, pParam, pInsnParm, pf64Bit); 140 146 AssertFailed(); 141 147 return VERR_INTERNAL_ERROR; … … 143 149 144 150 145 static int disArmV8ParseImm(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit) 146 { 147 RT_NOREF(pDis, pInsnClass, f64Bit); 151 static int disArmV8ParseIs32Bit(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 152 { 153 RT_NOREF(pDis, pInsnClass, pParam); 154 155 AssertReturn(pInsnParm->idxBitStart < 32 && pInsnParm->cBits == 1, VERR_INTERNAL_ERROR_2); 156 *pf64Bit = RT_BOOL(u32Insn & RT_BIT_32(pInsnParm->idxBitStart)); 157 return VINF_SUCCESS; 158 } 159 160 161 static int disArmV8ParseImm(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 162 { 163 RT_NOREF(pDis, pInsnClass, pf64Bit); 148 164 149 165 AssertReturn(pInsnParm->idxBitStart + pInsnParm->cBits < 32, VERR_INTERNAL_ERROR_2); … … 172 188 173 189 174 static int disArmV8ParseImmRel(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)175 { 176 RT_NOREF(pDis, pInsnClass, f64Bit);190 static int disArmV8ParseImmRel(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 191 { 192 RT_NOREF(pDis, pInsnClass, pf64Bit); 177 193 178 194 AssertReturn(pInsnParm->idxBitStart + pInsnParm->cBits < 32, VERR_INTERNAL_ERROR_2); … … 201 217 202 218 203 static int disArmV8ParseImmAdr(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)204 { 205 RT_NOREF(pDis, pInsnClass, f64Bit, pInsnParm);219 static int disArmV8ParseImmAdr(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 220 { 221 RT_NOREF(pDis, pInsnClass, pf64Bit, pInsnParm); 206 222 207 223 pParam->uValue = disArmV8ExtractBitVecFromInsn(u32Insn, 5, 19); … … 212 228 213 229 214 static int disArmV8ParseReg(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)230 static int disArmV8ParseReg(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 215 231 { 216 232 RT_NOREF(pDis, pInsnClass); 217 233 pParam->armv8.Reg.idxGenReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 218 pParam->armv8.cb = f64Bit ? sizeof(uint64_t) : sizeof(uint32_t); 219 pParam->fUse |= f64Bit ? DISUSE_REG_GEN64 : DISUSE_REG_GEN32; 220 return VINF_SUCCESS; 221 } 222 223 224 static int disArmV8ParseImmsImmrN(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit) 234 pParam->armv8.cb = *pf64Bit ? sizeof(uint64_t) : sizeof(uint32_t); 235 pParam->fUse |= (*pf64Bit || (pInsnParm->fFlags & (DIS_ARMV8_INSN_PARAM_F_ADDR_BEGIN | DIS_ARMV8_INSN_PARAM_F_ADDR_END) )) 236 ? DISUSE_REG_GEN64 237 : DISUSE_REG_GEN32; 238 return VINF_SUCCESS; 239 } 240 241 242 static int disArmV8ParseImmsImmrN(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 225 243 { 226 244 RT_NOREF(pDis); … … 230 248 /* N bit must be 0 if 32-bit variant is used. */ 231 249 if ( ( (u32ImmRaw & RT_BIT_32(12)) 232 && ! f64Bit)250 && !*pf64Bit) 233 251 || ( !(u32ImmRaw & RT_BIT_32(12)) 234 && f64Bit252 && *pf64Bit 235 253 && (pInsnClass->fClass & DISARMV8INSNCLASS_F_N_FORCED_1_ON_64BIT))) 236 254 return VERR_DIS_INVALID_OPCODE; … … 244 262 245 263 246 static int disArmV8ParseHw(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)247 { 248 RT_NOREF(pDis, u32Insn, pInsnClass, pParam, pInsnParm, f64Bit);264 static int disArmV8ParseHw(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 265 { 266 RT_NOREF(pDis, u32Insn, pInsnClass, pParam, pInsnParm, pf64Bit); 249 267 AssertFailed(); 250 268 /** @todo */ … … 253 271 254 272 255 static int disArmV8ParseCond(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)256 { 257 RT_NOREF(pDis, u32Insn, pInsnClass, pParam, pInsnParm, f64Bit);273 static int disArmV8ParseCond(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 274 { 275 RT_NOREF(pDis, u32Insn, pInsnClass, pParam, pInsnParm, pf64Bit); 258 276 //AssertFailed(); 259 277 /** @todo */ … … 262 280 263 281 264 static int disArmV8ParsePState(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)265 { 266 RT_NOREF(pDis, u32Insn, pInsnClass, pParam, pInsnParm, f64Bit);282 static int disArmV8ParsePState(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 283 { 284 RT_NOREF(pDis, u32Insn, pInsnClass, pParam, pInsnParm, pf64Bit); 267 285 //AssertFailed(); 268 286 /** @todo */ 287 return VINF_SUCCESS; 288 } 289 290 291 static int disArmV8ParseSysReg(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 292 { 293 RT_NOREF(pDis, pInsnClass, pf64Bit); 294 AssertReturn(pInsnParm->cBits == 15, VERR_INTERNAL_ERROR_2); 295 296 /* Assumes a op0:op1:CRn:CRm:op2 encoding in the instruction starting at the given bit position. */ 297 uint32_t u32ImmRaw = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 298 pParam->armv8.Reg.idSysReg = ARMV8_AARCH64_SYSREG_ID_CREATE(2 + ((u32ImmRaw >> 14) & 0x1), 299 (u32ImmRaw >> 11) & 0x7, 300 (u32ImmRaw >> 7) & 0xf, 301 (u32ImmRaw >> 3) & 0xf, 302 u32ImmRaw & 0x7); 303 pParam->armv8.cb = 0; 304 pParam->fUse |= DISUSE_REG_SYSTEM; 269 305 return VINF_SUCCESS; 270 306 } … … 305 341 pDis->aParams[2].armv8.fParam = pOp->Opc.fParam3; 306 342 pDis->aParams[3].armv8.fParam = pOp->Opc.fParam4; 343 pDis->armv8.pInsnClass = pInsnClass; 307 344 308 345 pDis->pCurInstr = &pOp->Opc; … … 317 354 318 355 int rc = VINF_SUCCESS; 319 if (pInsnClass->aParms[0].idxParse != kDisParmParseNop) 320 rc = g_apfnDisasm[pInsnClass->aParms[0].idxParse](pDis, u32Insn, pInsnClass, &pDis->aParams[0], &pInsnClass->aParms[0], f64Bit); 321 322 if ( pInsnClass->aParms[1].idxParse != kDisParmParseNop 323 && RT_SUCCESS(rc)) 324 rc = g_apfnDisasm[pInsnClass->aParms[1].idxParse](pDis, u32Insn, pInsnClass, &pDis->aParams[1], &pInsnClass->aParms[1], f64Bit); 325 326 if ( pInsnClass->aParms[2].idxParse != kDisParmParseNop 327 && RT_SUCCESS(rc)) 328 rc = g_apfnDisasm[pInsnClass->aParms[2].idxParse](pDis, u32Insn, pInsnClass, &pDis->aParams[2], &pInsnClass->aParms[2], f64Bit); 329 330 if ( pInsnClass->aParms[3].idxParse != kDisParmParseNop 331 && RT_SUCCESS(rc)) 332 rc = g_apfnDisasm[pInsnClass->aParms[3].idxParse](pDis, u32Insn, pInsnClass, &pDis->aParams[3], &pInsnClass->aParms[3], f64Bit); 356 for (uint32_t i = 0; i < RT_ELEMENTS(pInsnClass->aParms) && RT_SUCCESS(rc); i++) 357 { 358 PCDISARMV8INSNPARAM pInsnParm = &pInsnClass->aParms[i]; 359 if (pInsnParm->idxParse != kDisParmParseNop) 360 rc = g_apfnDisasm[pInsnClass->aParms[i].idxParse](pDis, u32Insn, pInsnClass, 361 pInsnParm->idxParam != DIS_ARMV8_INSN_PARAM_UNSET 362 ? &pDis->aParams[pInsnParm->idxParam] 363 : NULL, 364 pInsnParm, &f64Bit); 365 else 366 break; 367 } 333 368 334 369 /* If parameter parsing returned an invalid opcode error the encoding is invalid. */ -
trunk/src/VBox/Disassembler/DisasmFormatArmV8.cpp
r105724 r105731 32 32 #include <VBox/dis.h> 33 33 #include "DisasmInternal.h" 34 #include "DisasmInternal-armv8.h" 35 #include <iprt/armv8.h> 34 36 #include <iprt/assert.h> 35 37 #include <iprt/ctype.h> … … 51 53 { 52 54 "x0\0", "x1\0", "x2\0", "x3\0", "x4\0", "x5\0", "x6\0", "x7\0", "x8\0", "x9\0", "x10", "x11", "x12", "x13", "x14", "x15", 53 "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "x29", "x30", "zr" 55 "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "x29", "x30", "xzr" 56 }; 57 58 /** 59 * List of known system registers. 60 * 61 * The list MUST be in ascending order of the system register ID! 62 */ 63 static const struct 64 { 65 /** IPRT system register ID. */ 66 uint32_t idSysReg; 67 /** Name of the system register. */ 68 const char *pszSysReg; 69 /** Character count of the system register name. */ 70 size_t cchSysReg; 71 } g_aArmV8SysReg64[] = 72 { 73 #define DIS_ARMV8_SYSREG(a_idSysReg) { (ARMV8_AARCH64_SYSREG_ ## a_idSysReg), #a_idSysReg, sizeof(#a_idSysReg) - 1 } 74 DIS_ARMV8_SYSREG(OSDTRRX_EL1), 75 DIS_ARMV8_SYSREG(MDSCR_EL1), 76 //DIS_ARMV8_SYSREG(DBGBVRn_EL1(a_Id)), 77 //DIS_ARMV8_SYSREG(DBGBCRn_EL1(a_Id)), 78 //DIS_ARMV8_SYSREG(DBGWVRn_EL1(a_Id)), 79 //DIS_ARMV8_SYSREG(DBGWCRn_EL1(a_Id)), 80 DIS_ARMV8_SYSREG(MDCCINT_EL1), 81 DIS_ARMV8_SYSREG(OSDTRTX_EL1), 82 DIS_ARMV8_SYSREG(OSECCR_EL1), 83 DIS_ARMV8_SYSREG(MDRAR_EL1), 84 DIS_ARMV8_SYSREG(OSLAR_EL1), 85 DIS_ARMV8_SYSREG(OSLSR_EL1), 86 DIS_ARMV8_SYSREG(OSDLR_EL1), 87 DIS_ARMV8_SYSREG(MIDR_EL1), 88 DIS_ARMV8_SYSREG(MPIDR_EL1), 89 DIS_ARMV8_SYSREG(REVIDR_EL1), 90 DIS_ARMV8_SYSREG(ID_PFR0_EL1), 91 DIS_ARMV8_SYSREG(ID_PFR1_EL1), 92 DIS_ARMV8_SYSREG(ID_DFR0_EL1), 93 DIS_ARMV8_SYSREG(ID_AFR0_EL1), 94 DIS_ARMV8_SYSREG(ID_MMFR0_EL1), 95 DIS_ARMV8_SYSREG(ID_MMFR1_EL1), 96 DIS_ARMV8_SYSREG(ID_MMFR2_EL1), 97 DIS_ARMV8_SYSREG(ID_MMFR3_EL1), 98 DIS_ARMV8_SYSREG(ID_ISAR0_EL1), 99 DIS_ARMV8_SYSREG(ID_ISAR1_EL1), 100 DIS_ARMV8_SYSREG(ID_ISAR2_EL1), 101 DIS_ARMV8_SYSREG(ID_ISAR3_EL1), 102 DIS_ARMV8_SYSREG(ID_ISAR4_EL1), 103 DIS_ARMV8_SYSREG(ID_ISAR5_EL1), 104 DIS_ARMV8_SYSREG(ID_MMFR4_EL1), 105 DIS_ARMV8_SYSREG(ID_ISAR6_EL1), 106 DIS_ARMV8_SYSREG(MVFR0_EL1), 107 DIS_ARMV8_SYSREG(MVFR1_EL1), 108 DIS_ARMV8_SYSREG(MVFR2_EL1), 109 DIS_ARMV8_SYSREG(ID_PFR2_EL1), 110 DIS_ARMV8_SYSREG(ID_DFR1_EL1), 111 DIS_ARMV8_SYSREG(ID_MMFR5_EL1), 112 DIS_ARMV8_SYSREG(ID_AA64PFR0_EL1), 113 DIS_ARMV8_SYSREG(ID_AA64PFR1_EL1), 114 DIS_ARMV8_SYSREG(ID_AA64ZFR0_EL1), 115 DIS_ARMV8_SYSREG(ID_AA64SMFR0_EL1), 116 DIS_ARMV8_SYSREG(ID_AA64DFR0_EL1), 117 DIS_ARMV8_SYSREG(ID_AA64DFR1_EL1), 118 DIS_ARMV8_SYSREG(ID_AA64AFR0_EL1), 119 DIS_ARMV8_SYSREG(ID_AA64AFR1_EL1), 120 DIS_ARMV8_SYSREG(ID_AA64ISAR0_EL1), 121 DIS_ARMV8_SYSREG(ID_AA64ISAR1_EL1), 122 DIS_ARMV8_SYSREG(ID_AA64ISAR2_EL1), 123 DIS_ARMV8_SYSREG(ID_AA64MMFR0_EL1), 124 DIS_ARMV8_SYSREG(ID_AA64MMFR1_EL1), 125 DIS_ARMV8_SYSREG(ID_AA64MMFR2_EL1), 126 DIS_ARMV8_SYSREG(SCTRL_EL1), 127 DIS_ARMV8_SYSREG(ACTRL_EL1), 128 DIS_ARMV8_SYSREG(CPACR_EL1), 129 DIS_ARMV8_SYSREG(RGSR_EL1), 130 DIS_ARMV8_SYSREG(GCR_EL1), 131 DIS_ARMV8_SYSREG(ZCR_EL1), 132 DIS_ARMV8_SYSREG(TRFCR_EL1), 133 DIS_ARMV8_SYSREG(SMPRI_EL1), 134 DIS_ARMV8_SYSREG(SMCR_EL1), 135 DIS_ARMV8_SYSREG(TTBR0_EL1), 136 DIS_ARMV8_SYSREG(TTBR1_EL1), 137 DIS_ARMV8_SYSREG(TCR_EL1), 138 DIS_ARMV8_SYSREG(APIAKeyLo_EL1), 139 DIS_ARMV8_SYSREG(APIAKeyHi_EL1), 140 DIS_ARMV8_SYSREG(APIBKeyLo_EL1), 141 DIS_ARMV8_SYSREG(APIBKeyHi_EL1), 142 DIS_ARMV8_SYSREG(APDAKeyLo_EL1), 143 DIS_ARMV8_SYSREG(APDAKeyHi_EL1), 144 DIS_ARMV8_SYSREG(APDBKeyLo_EL1), 145 DIS_ARMV8_SYSREG(APDBKeyHi_EL1), 146 DIS_ARMV8_SYSREG(APGAKeyLo_EL1), 147 DIS_ARMV8_SYSREG(APGAKeyHi_EL1), 148 DIS_ARMV8_SYSREG(SPSR_EL1), 149 DIS_ARMV8_SYSREG(ELR_EL1), 150 DIS_ARMV8_SYSREG(SP_EL0), 151 DIS_ARMV8_SYSREG(SPSEL), 152 DIS_ARMV8_SYSREG(CURRENTEL), 153 DIS_ARMV8_SYSREG(PAN), 154 DIS_ARMV8_SYSREG(UAO), 155 DIS_ARMV8_SYSREG(ALLINT), 156 DIS_ARMV8_SYSREG(ICC_PMR_EL1), 157 DIS_ARMV8_SYSREG(AFSR0_EL1), 158 DIS_ARMV8_SYSREG(AFSR1_EL1), 159 DIS_ARMV8_SYSREG(ESR_EL1), 160 DIS_ARMV8_SYSREG(ERRIDR_EL1), 161 DIS_ARMV8_SYSREG(ERRSELR_EL1), 162 DIS_ARMV8_SYSREG(FAR_EL1), 163 DIS_ARMV8_SYSREG(PAR_EL1), 164 DIS_ARMV8_SYSREG(MAIR_EL1), 165 DIS_ARMV8_SYSREG(AMAIR_EL1), 166 DIS_ARMV8_SYSREG(VBAR_EL1), 167 DIS_ARMV8_SYSREG(ICC_IAR0_EL1), 168 DIS_ARMV8_SYSREG(ICC_EOIR0_EL1), 169 DIS_ARMV8_SYSREG(ICC_HPPIR0_EL1), 170 DIS_ARMV8_SYSREG(ICC_BPR0_EL1), 171 DIS_ARMV8_SYSREG(ICC_AP0R0_EL1), 172 DIS_ARMV8_SYSREG(ICC_AP0R1_EL1), 173 DIS_ARMV8_SYSREG(ICC_AP0R2_EL1), 174 DIS_ARMV8_SYSREG(ICC_AP0R3_EL1), 175 DIS_ARMV8_SYSREG(ICC_AP1R0_EL1), 176 DIS_ARMV8_SYSREG(ICC_AP1R1_EL1), 177 DIS_ARMV8_SYSREG(ICC_AP1R2_EL1), 178 DIS_ARMV8_SYSREG(ICC_AP1R3_EL1), 179 DIS_ARMV8_SYSREG(ICC_NMIAR1_EL1), 180 DIS_ARMV8_SYSREG(ICC_DIR_EL1), 181 DIS_ARMV8_SYSREG(ICC_RPR_EL1), 182 DIS_ARMV8_SYSREG(ICC_SGI1R_EL1), 183 DIS_ARMV8_SYSREG(ICC_ASGI1R_EL1), 184 DIS_ARMV8_SYSREG(ICC_SGI0R_EL1), 185 DIS_ARMV8_SYSREG(ICC_IAR1_EL1), 186 DIS_ARMV8_SYSREG(ICC_EOIR1_EL1), 187 DIS_ARMV8_SYSREG(ICC_HPPIR1_EL1), 188 DIS_ARMV8_SYSREG(ICC_BPR1_EL1), 189 DIS_ARMV8_SYSREG(ICC_CTLR_EL1), 190 DIS_ARMV8_SYSREG(ICC_SRE_EL1), 191 DIS_ARMV8_SYSREG(ICC_IGRPEN0_EL1), 192 DIS_ARMV8_SYSREG(ICC_IGRPEN1_EL1), 193 DIS_ARMV8_SYSREG(CONTEXTIDR_EL1), 194 DIS_ARMV8_SYSREG(TPIDR_EL1), 195 DIS_ARMV8_SYSREG(CNTKCTL_EL1), 196 DIS_ARMV8_SYSREG(CSSELR_EL1), 197 DIS_ARMV8_SYSREG(NZCV), 198 DIS_ARMV8_SYSREG(DAIF), 199 DIS_ARMV8_SYSREG(SVCR), 200 DIS_ARMV8_SYSREG(DIT), 201 DIS_ARMV8_SYSREG(SSBS), 202 DIS_ARMV8_SYSREG(TCO), 203 DIS_ARMV8_SYSREG(FPCR), 204 DIS_ARMV8_SYSREG(FPSR), 205 DIS_ARMV8_SYSREG(ICC_SRE_EL2), 206 DIS_ARMV8_SYSREG(TPIDR_EL0), 207 DIS_ARMV8_SYSREG(TPIDRRO_EL0), 208 DIS_ARMV8_SYSREG(CNTFRQ_EL0), 209 DIS_ARMV8_SYSREG(CNTVCT_EL0), 210 DIS_ARMV8_SYSREG(CNTP_TVAL_EL0), 211 DIS_ARMV8_SYSREG(CNTP_CTL_EL0), 212 DIS_ARMV8_SYSREG(CNTP_CVAL_EL0), 213 DIS_ARMV8_SYSREG(CNTV_CTL_EL0), 214 DIS_ARMV8_SYSREG(VPIDR_EL2), 215 DIS_ARMV8_SYSREG(VMPIDR_EL2), 216 DIS_ARMV8_SYSREG(SCTLR_EL2), 217 DIS_ARMV8_SYSREG(ACTLR_EL2), 218 DIS_ARMV8_SYSREG(HCR_EL2), 219 DIS_ARMV8_SYSREG(MDCR_EL2), 220 DIS_ARMV8_SYSREG(CPTR_EL2), 221 DIS_ARMV8_SYSREG(HSTR_EL2), 222 DIS_ARMV8_SYSREG(HFGRTR_EL2), 223 DIS_ARMV8_SYSREG(HFGWTR_EL2), 224 DIS_ARMV8_SYSREG(HFGITR_EL2), 225 DIS_ARMV8_SYSREG(HACR_EL2), 226 DIS_ARMV8_SYSREG(ZCR_EL2), 227 DIS_ARMV8_SYSREG(TRFCR_EL2), 228 DIS_ARMV8_SYSREG(HCRX_EL2), 229 DIS_ARMV8_SYSREG(SDER32_EL2), 230 DIS_ARMV8_SYSREG(TTBR0_EL2), 231 DIS_ARMV8_SYSREG(TTBR1_EL2), 232 DIS_ARMV8_SYSREG(TCR_EL2), 233 DIS_ARMV8_SYSREG(VTTBR_EL2), 234 DIS_ARMV8_SYSREG(VTCR_EL2), 235 DIS_ARMV8_SYSREG(VNCR_EL2), 236 DIS_ARMV8_SYSREG(VSTTBR_EL2), 237 DIS_ARMV8_SYSREG(VSTCR_EL2), 238 DIS_ARMV8_SYSREG(DACR32_EL2), 239 DIS_ARMV8_SYSREG(HDFGRTR_EL2), 240 DIS_ARMV8_SYSREG(HDFGWTR_EL2), 241 DIS_ARMV8_SYSREG(HAFGRTR_EL2), 242 DIS_ARMV8_SYSREG(SPSR_EL2), 243 DIS_ARMV8_SYSREG(ELR_EL2), 244 DIS_ARMV8_SYSREG(SP_EL1), 245 DIS_ARMV8_SYSREG(IFSR32_EL2), 246 DIS_ARMV8_SYSREG(AFSR0_EL2), 247 DIS_ARMV8_SYSREG(AFSR1_EL2), 248 DIS_ARMV8_SYSREG(ESR_EL2), 249 DIS_ARMV8_SYSREG(VSESR_EL2), 250 DIS_ARMV8_SYSREG(FPEXC32_EL2), 251 DIS_ARMV8_SYSREG(TFSR_EL2), 252 DIS_ARMV8_SYSREG(FAR_EL2), 253 DIS_ARMV8_SYSREG(HPFAR_EL2), 254 DIS_ARMV8_SYSREG(PMSCR_EL2), 255 DIS_ARMV8_SYSREG(MAIR_EL2), 256 DIS_ARMV8_SYSREG(AMAIR_EL2), 257 DIS_ARMV8_SYSREG(MPAMHCR_EL2), 258 DIS_ARMV8_SYSREG(MPAMVPMV_EL2), 259 DIS_ARMV8_SYSREG(MPAM2_EL2), 260 DIS_ARMV8_SYSREG(MPAMVPM0_EL2), 261 DIS_ARMV8_SYSREG(MPAMVPM1_EL2), 262 DIS_ARMV8_SYSREG(MPAMVPM2_EL2), 263 DIS_ARMV8_SYSREG(MPAMVPM3_EL2), 264 DIS_ARMV8_SYSREG(MPAMVPM4_EL2), 265 DIS_ARMV8_SYSREG(MPAMVPM5_EL2), 266 DIS_ARMV8_SYSREG(MPAMVPM6_EL2), 267 DIS_ARMV8_SYSREG(MPAMVPM7_EL2), 268 DIS_ARMV8_SYSREG(VBAR_EL2), 269 DIS_ARMV8_SYSREG(RVBAR_EL2), 270 DIS_ARMV8_SYSREG(RMR_EL2), 271 DIS_ARMV8_SYSREG(VDISR_EL2), 272 DIS_ARMV8_SYSREG(CONTEXTIDR_EL2), 273 DIS_ARMV8_SYSREG(TPIDR_EL2), 274 DIS_ARMV8_SYSREG(SCXTNUM_EL2), 275 DIS_ARMV8_SYSREG(CNTVOFF_EL2), 276 DIS_ARMV8_SYSREG(CNTPOFF_EL2), 277 DIS_ARMV8_SYSREG(CNTHCTL_EL2), 278 DIS_ARMV8_SYSREG(CNTHP_TVAL_EL2), 279 DIS_ARMV8_SYSREG(CNTHP_CTL_EL2), 280 DIS_ARMV8_SYSREG(CNTHP_CVAL_EL2), 281 DIS_ARMV8_SYSREG(CNTHV_TVAL_EL2), 282 DIS_ARMV8_SYSREG(CNTHV_CTL_EL2), 283 DIS_ARMV8_SYSREG(CNTHV_CVAL_EL2), 284 DIS_ARMV8_SYSREG(CNTHVS_TVAL_EL2), 285 DIS_ARMV8_SYSREG(CNTHVS_CTL_EL2), 286 DIS_ARMV8_SYSREG(CNTHVS_CVAL_EL2), 287 DIS_ARMV8_SYSREG(CNTHPS_TVAL_EL2), 288 DIS_ARMV8_SYSREG(CNTHPS_CTL_EL2), 289 DIS_ARMV8_SYSREG(CNTHPS_CVAL_EL2), 290 DIS_ARMV8_SYSREG(SP_EL2) 291 #undef DIS_ARMV8_SYSREG 54 292 }; 55 293 … … 93 331 return "r??"; 94 332 } 333 } 334 335 336 /** 337 * Gets the base register name for the given parameter. 338 * 339 * @returns Pointer to the register name. 340 * @param pDis The disassembler state. 341 * @param pParam The parameter. 342 * @param pachTmp Pointer to temporary string storage when building 343 * the register name. 344 * @param pcchReg Where to store the length of the name. 345 */ 346 static const char *disasmFormatArmV8SysReg(PCDISSTATE pDis, PCDISOPPARAM pParam, char *pachTmp, size_t *pcchReg) 347 { 348 RT_NOREF_PV(pDis); 349 350 /* Try to find the system register ID in the table. */ 351 /** @todo Binary search (lazy). */ 352 for (uint32_t i = 0; i < RT_ELEMENTS(g_aArmV8SysReg64); i++) 353 { 354 if (g_aArmV8SysReg64[i].idSysReg == pParam->armv8.Reg.idSysReg) 355 { 356 *pcchReg = g_aArmV8SysReg64[i].cchSysReg; 357 return g_aArmV8SysReg64[i].pszSysReg; 358 } 359 } 360 361 /* Generate S<op0>_<op1>_<Cn>_<Cm>_<op2> identifier. */ 362 uint32_t const idSysReg = pParam->armv8.Reg.idSysReg; 363 uint8_t idx = 0; 364 pachTmp[idx++] = 'S'; 365 pachTmp[idx++] = '2' + ((idSysReg >> 14) & 0x1); 366 pachTmp[idx++] = '_'; 367 pachTmp[idx++] = '0' + ((idSysReg >> 11) & 0x7); 368 pachTmp[idx++] = '_'; 369 370 uint8_t bTmp = (idSysReg >> 7) & 0xf; 371 if (bTmp >= 10) 372 { 373 pachTmp[idx++] = '1' + (bTmp - 10); 374 bTmp -= 10; 375 } 376 pachTmp[idx++] = '0' + bTmp; 377 pachTmp[idx++] = '_'; 378 379 bTmp = (idSysReg >> 3) & 0xf; 380 if (bTmp >= 10) 381 { 382 pachTmp[idx++] = '1' + (bTmp - 10); 383 bTmp -= 10; 384 } 385 pachTmp[idx++] = '0' + bTmp; 386 387 pachTmp[idx++] = '_'; 388 pachTmp[idx++] = '0' + (idSysReg & 0x7); 389 pachTmp[idx] = '\0'; 390 *pcchReg = idx; 391 return pachTmp; 95 392 } 96 393 … … 112 409 PFNDISGETSYMBOL pfnGetSymbol, void *pvUser) 113 410 { 114 /** @todo monitor and mwait aren't formatted correctly in 64-bit mode. */115 411 /* 116 412 * Input validation and massaging. … … 126 422 fFlags = (fFlags & ~DIS_FMT_FLAGS_BYTES_LEFT) | DIS_FMT_FLAGS_BYTES_RIGHT; 127 423 128 PCDISOPCODE const pOp = pDis->pCurInstr; 424 PCDISOPCODE const pOp = pDis->pCurInstr; 425 PCDISARMV8INSNCLASS const pInsnClass = pDis->armv8.pInsnClass; 129 426 130 427 /* … … 283 580 else 284 581 { 582 /* Start with the instruction. */ 583 PUT_PSZ(pOp->pszOpcode); 584 285 585 /* 286 * Formatting context and associated macros. 287 */ 288 PCDISOPPARAM pParam = &pDis->aParams[0]; 289 uint32_t iParam = 0; 290 291 const char *pszFmt = pOp->pszOpcode; 292 293 /* 294 * The formatting loop. 586 * Format the parameters. 295 587 */ 296 588 RTINTPTR off; 297 589 char szSymbol[128]; 298 char ch; 299 while ((ch = *pszFmt++) != '\0') 590 for (uint32_t i = 0; i < RT_ELEMENTS(pInsnClass->aParms); i++) 300 591 { 301 if (ch == '%') 592 PCDISARMV8INSNPARAM pInsnParam = &pInsnClass->aParms[i]; 593 594 /* First NOP parameter marks end of parameters. */ 595 if (pInsnParam->idxParse == kDisParmParseNop) 596 break; 597 598 /* Step over decoding steps which don't produce any parameters. */ 599 if (pInsnParam->idxParse == kDisParmParseIs32Bit) 600 continue; 601 602 PCDISOPPARAM pParam = pInsnParam->idxParam != DIS_ARMV8_INSN_PARAM_UNSET 603 ? &pDis->aParams[pInsnParam->idxParam] 604 : NULL; 605 if (i > 0) 606 PUT_C(','); 607 PUT_C(' '); /** @todo Make the indenting configurable. */ 608 609 if (pInsnParam->fFlags & DIS_ARMV8_INSN_PARAM_F_ADDR_BEGIN) 610 PUT_C('['); 611 612 switch (pInsnParam->idxParse) 302 613 { 303 ch = *pszFmt++; 304 switch (ch) 614 case kDisParmParseImm: 305 615 { 306 case 'I': /* Immediate data. */ 307 PUT_C('#'); 308 switch (pParam->fUse & ( DISUSE_IMMEDIATE8 | DISUSE_IMMEDIATE16 | DISUSE_IMMEDIATE32 | DISUSE_IMMEDIATE64 309 | DISUSE_IMMEDIATE16_SX8 | DISUSE_IMMEDIATE32_SX8 | DISUSE_IMMEDIATE64_SX8)) 310 { 311 case DISUSE_IMMEDIATE8: 312 PUT_NUM_8(pParam->uValue); 313 break; 314 case DISUSE_IMMEDIATE16: 315 PUT_NUM_16(pParam->uValue); 316 break; 317 case DISUSE_IMMEDIATE16_SX8: 318 PUT_NUM_16(pParam->uValue); 319 break; 320 case DISUSE_IMMEDIATE32: 321 PUT_NUM_32(pParam->uValue); 322 /** @todo Symbols */ 323 break; 324 case DISUSE_IMMEDIATE32_SX8: 325 PUT_NUM_32(pParam->uValue); 326 break; 327 case DISUSE_IMMEDIATE64_SX8: 328 PUT_NUM_64(pParam->uValue); 329 break; 330 case DISUSE_IMMEDIATE64: 331 PUT_NUM_64(pParam->uValue); 332 /** @todo Symbols */ 333 break; 334 default: 335 AssertFailed(); 336 break; 337 } 338 break; 339 340 case 'X': /* Register. */ 616 PUT_C('#'); 617 switch (pParam->fUse & ( DISUSE_IMMEDIATE8 | DISUSE_IMMEDIATE16 | DISUSE_IMMEDIATE32 | DISUSE_IMMEDIATE64 618 | DISUSE_IMMEDIATE16_SX8 | DISUSE_IMMEDIATE32_SX8 | DISUSE_IMMEDIATE64_SX8)) 341 619 { 342 pszFmt += RT_C_IS_ALPHA(pszFmt[0]) ? RT_C_IS_ALPHA(pszFmt[1]) ? 2 : 1 : 0; 343 Assert(!(pParam->fUse & (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32))); 344 345 size_t cchReg; 346 const char *pszReg = disasmFormatArmV8Reg(pDis, pParam, &cchReg); 347 PUT_STR(pszReg, cchReg); 348 break; 620 case DISUSE_IMMEDIATE8: 621 PUT_NUM_8(pParam->uValue); 622 break; 623 case DISUSE_IMMEDIATE16: 624 PUT_NUM_16(pParam->uValue); 625 break; 626 case DISUSE_IMMEDIATE16_SX8: 627 PUT_NUM_16(pParam->uValue); 628 break; 629 case DISUSE_IMMEDIATE32: 630 PUT_NUM_32(pParam->uValue); 631 /** @todo Symbols */ 632 break; 633 case DISUSE_IMMEDIATE32_SX8: 634 PUT_NUM_32(pParam->uValue); 635 break; 636 case DISUSE_IMMEDIATE64_SX8: 637 PUT_NUM_64(pParam->uValue); 638 break; 639 case DISUSE_IMMEDIATE64: 640 PUT_NUM_64(pParam->uValue); 641 /** @todo Symbols */ 642 break; 643 default: 644 AssertFailed(); 645 break; 349 646 } 350 351 case 'J': /* Relative jump offset (ParseImmBRel + ParseImmVRel). */ 647 break; 648 } 649 case kDisParmParseImmRel: 650 case kDisParmParseImmAdr: 651 { 652 int32_t offDisplacement; 653 654 PUT_C('#'); 655 if (pParam->fUse & DISUSE_IMMEDIATE8_REL) 352 656 { 353 int32_t offDisplacement; 354 355 PUT_C('#'); 356 if (pParam->fUse & DISUSE_IMMEDIATE8_REL) 357 { 358 offDisplacement = (int8_t)pParam->uValue; 359 if (fFlags & DIS_FMT_FLAGS_RELATIVE_BRANCH) 360 PUT_NUM_S8(offDisplacement); 361 } 362 else if (pParam->fUse & DISUSE_IMMEDIATE16_REL) 363 { 364 offDisplacement = (int16_t)pParam->uValue; 365 if (fFlags & DIS_FMT_FLAGS_RELATIVE_BRANCH) 366 PUT_NUM_S16(offDisplacement); 367 } 368 else 369 { 370 offDisplacement = (int32_t)pParam->uValue; 371 if (fFlags & DIS_FMT_FLAGS_RELATIVE_BRANCH) 372 PUT_NUM_S32(offDisplacement); 373 } 657 offDisplacement = (int8_t)pParam->uValue; 374 658 if (fFlags & DIS_FMT_FLAGS_RELATIVE_BRANCH) 375 PUT_SZ(" ("); 376 377 RTUINTPTR uTrgAddr = pDis->uInstrAddr + pDis->cbInstr + offDisplacement; 378 if ( pDis->uCpuMode == DISCPUMODE_ARMV8_A32 379 || pDis->uCpuMode == DISCPUMODE_ARMV8_T32) 380 PUT_NUM_32(uTrgAddr); 381 else if (pDis->uCpuMode == DISCPUMODE_ARMV8_A64) 382 PUT_NUM_64(uTrgAddr); 383 else 384 AssertReleaseFailed(); 385 659 PUT_NUM_S8(offDisplacement * sizeof(uint32_t)); 660 } 661 else if (pParam->fUse & DISUSE_IMMEDIATE16_REL) 662 { 663 offDisplacement = (int16_t)pParam->uValue; 386 664 if (fFlags & DIS_FMT_FLAGS_RELATIVE_BRANCH) 387 { 388 PUT_SYMBOL(DIS_FMT_SEL_FROM_REG(DISSELREG_CS), uTrgAddr, " = ", ' '); 389 PUT_C(')'); 390 } 391 else 392 PUT_SYMBOL(DIS_FMT_SEL_FROM_REG(DISSELREG_CS), uTrgAddr, " (", ')'); 393 break; 394 } 395 396 case 'C': /* Conditional */ 397 { 398 /** @todo */ 399 /* Skip any whitespace coming after (as this is not really part of the parameters). */ 400 while (*pszFmt == ' ') 401 pszFmt++; 402 403 iParam++; 404 if (iParam >= RT_ELEMENTS(pDis->aParams)) 405 { 406 AssertFailed(); 407 pParam = NULL; 408 } 409 else 410 pParam = &pDis->aParams[iParam]; 411 break; 412 } 413 414 default: 415 AssertMsgFailed(("%c%s!\n", ch, pszFmt)); 416 break; 417 } 418 AssertMsg(*pszFmt == ',' || *pszFmt == '\0' || *pszFmt == '%', ("%c%s\n", ch, pszFmt)); 419 } 420 else 421 { 422 PUT_C(ch); 423 if (ch == ',') 424 { 425 Assert(*pszFmt != ' '); 426 PUT_C(' '); 427 iParam++; 428 if (iParam >= RT_ELEMENTS(pDis->aParams)) 429 { 430 AssertFailed(); 431 pParam = NULL; 665 PUT_NUM_S16(offDisplacement * sizeof(uint32_t)); 432 666 } 433 667 else 434 pParam = &pDis->aParams[iParam]; 668 { 669 offDisplacement = (int32_t)pParam->uValue; 670 if (fFlags & DIS_FMT_FLAGS_RELATIVE_BRANCH) 671 PUT_NUM_S32(offDisplacement * sizeof(uint32_t)); 672 } 673 if (fFlags & DIS_FMT_FLAGS_RELATIVE_BRANCH) 674 PUT_SZ(" ("); 675 676 RTUINTPTR uTrgAddr = pDis->uInstrAddr + (offDisplacement * sizeof(uint32_t)); 677 if ( pDis->uCpuMode == DISCPUMODE_ARMV8_A32 678 || pDis->uCpuMode == DISCPUMODE_ARMV8_T32) 679 PUT_NUM_32(uTrgAddr); 680 else if (pDis->uCpuMode == DISCPUMODE_ARMV8_A64) 681 PUT_NUM_64(uTrgAddr); 682 else 683 AssertReleaseFailed(); 684 685 if (fFlags & DIS_FMT_FLAGS_RELATIVE_BRANCH) 686 { 687 PUT_SYMBOL(DIS_FMT_SEL_FROM_REG(DISSELREG_CS), uTrgAddr, " = ", ' '); 688 PUT_C(')'); 689 } 690 else 691 PUT_SYMBOL(DIS_FMT_SEL_FROM_REG(DISSELREG_CS), uTrgAddr, " (", ')'); 692 break; 435 693 } 694 case kDisParmParseReg: 695 { 696 Assert(!(pParam->fUse & (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32))); 697 698 size_t cchReg; 699 const char *pszReg = disasmFormatArmV8Reg(pDis, pParam, &cchReg); 700 PUT_STR(pszReg, cchReg); 701 break; 702 } 703 case kDisParmParseSysReg: 704 { 705 Assert(pParam->fUse == DISUSE_REG_SYSTEM); 706 707 size_t cchReg; 708 char achTmp[32]; 709 const char *pszReg = disasmFormatArmV8SysReg(pDis, pParam, &achTmp[0], &cchReg); 710 PUT_STR(pszReg, cchReg); 711 break; 712 } 713 case kDisParmParseImmsImmrN: 714 case kDisParmParseHw: 715 case kDisParmParseCond: 716 case kDisParmParsePState: 717 case kDisParmParseCRnCRm: 718 break; 719 case kDisParmParseIs32Bit: 720 case kDisParmParseNop: 721 case kDisParmParseMax: 722 default: 723 AssertFailed(); 436 724 } 437 } /* while more to format */ 725 726 if (pInsnParam->fFlags & DIS_ARMV8_INSN_PARAM_F_ADDR_END) 727 PUT_C(']'); 728 } 438 729 } 439 730 -
trunk/src/VBox/Disassembler/DisasmInternal-armv8.h
r100046 r105731 51 51 { 52 52 kDisParmParseNop = 0, 53 kDisParmParseIs32Bit, 53 54 kDisParmParseImm, 54 55 kDisParmParseImmRel, … … 86 87 /** The parser to use for the parameter. */ 87 88 DISPARMPARSEIDX idxParse; 89 /** Additional flags for the parameter. */ 90 uint32_t fFlags; 88 91 /** Bit index at which the field starts. */ 89 92 uint8_t idxBitStart; 90 93 /** Size of the bit field. */ 91 94 uint8_t cBits; 95 /** The parameter this decoder param contributes to. */ 96 uint8_t idxParam; 92 97 } DISARMV8INSNPARAM; 93 98 typedef DISARMV8INSNPARAM *PDISARMV8INSNPARAM; 94 99 typedef const DISARMV8INSNPARAM *PCDISARMV8INSNPARAM; 95 100 96 #define DIS_ARMV8_INSN_PARAM_NONE { kDisParmParseNop, 0, 0 } 97 #define DIS_ARMV8_INSN_PARAM_CREATE(a_idxParse, a_idxBitStart, a_cBits) \ 98 { a_idxParse, a_idxBitStart, a_cBits } 99 101 #define DIS_ARMV8_INSN_PARAM_NONE { kDisParmParseNop, 0, 0, 0, DIS_ARMV8_INSN_PARAM_UNSET } 102 #define DIS_ARMV8_INSN_PARAM_CREATE(a_idxParse, a_idxBitStart, a_cBits, a_idxParam) \ 103 { a_idxParse, 0, a_idxBitStart, a_cBits, a_idxParam } 104 #define DIS_ARMV8_INSN_PARAM_CREATE_EX(a_idxParse, a_idxBitStart, a_cBits, a_idxParam, a_fFlags) \ 105 { a_idxParse, a_fFlags, a_idxBitStart, a_cBits, a_idxParam } 106 107 #define DIS_ARMV8_INSN_PARAM_UNSET UINT8_MAX 108 109 #define DIS_ARMV8_INSN_PARAM_F_ADDR_BEGIN RT_BIT_32(0) 110 #define DIS_ARMV8_INSN_PARAM_F_ADDR_END RT_BIT_32(1) 100 111 101 112 /** -
trunk/src/VBox/Disassembler/DisasmTables-armv8-a64.cpp
r100046 r105731 59 59 /* UDF */ 60 60 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_aArmV8A64InsnRsvd) 61 DIS_ARMV8_OP(0xffff0000, 0x00000000, "udf %I" ,OP_ARMV8_A64_UDF, DISOPTYPE_INVALID)61 DIS_ARMV8_OP(0xffff0000, 0x00000000, "udf" , OP_ARMV8_A64_UDF, DISOPTYPE_INVALID) 62 62 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_aArmV8A64InsnRsvd, 0 /*fClass*/, 63 63 kDisArmV8OpcDecodeNop, 0xffff0000, 16) 64 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 0, 16 ),64 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 0, 16, 0 /*idxParam*/), 65 65 DIS_ARMV8_INSN_PARAM_NONE, 66 66 DIS_ARMV8_INSN_PARAM_NONE, … … 71 71 /* ADR/ADRP */ 72 72 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Adr) 73 DIS_ARMV8_OP(0x9f000000, 0x10000000, "adr %X,%I" ,OP_ARMV8_A64_ADR, DISOPTYPE_HARMLESS),74 DIS_ARMV8_OP(0x9f000000, 0x90000000, "adrp %X,%I" ,OP_ARMV8_A64_ADRP, DISOPTYPE_HARMLESS)73 DIS_ARMV8_OP(0x9f000000, 0x10000000, "adr" , OP_ARMV8_A64_ADR, DISOPTYPE_HARMLESS), 74 DIS_ARMV8_OP(0x9f000000, 0x90000000, "adrp" , OP_ARMV8_A64_ADRP, DISOPTYPE_HARMLESS) 75 75 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64Adr, DISARMV8INSNCLASS_F_FORCED_64BIT, 76 76 kDisArmV8OpcDecodeNop, RT_BIT_32(31), 31) 77 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5 ),78 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmAdr, 0, 0 ),77 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 0 /*idxParam*/), 78 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmAdr, 0, 0, 1 /*idxParam*/), 79 79 DIS_ARMV8_INSN_PARAM_NONE, 80 80 DIS_ARMV8_INSN_PARAM_NONE … … 84 84 /* ADD/ADDS/SUB/SUBS */ 85 85 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64AddSubImm) 86 DIS_ARMV8_OP(0x7f800000, 0x11000000, "add %X,%X,%I" ,OP_ARMV8_A64_ADD, DISOPTYPE_HARMLESS),87 DIS_ARMV8_OP(0x7f800000, 0x31000000, "adds %X,%X,%I" ,OP_ARMV8_A64_ADDS, DISOPTYPE_HARMLESS),88 DIS_ARMV8_OP(0x7f800000, 0x51000000, "sub %X,%X,%I" ,OP_ARMV8_A64_SUB, DISOPTYPE_HARMLESS),89 DIS_ARMV8_OP(0x7f800000, 0x71000000, "subs %X,%X,%I" ,OP_ARMV8_A64_SUBS, DISOPTYPE_HARMLESS),86 DIS_ARMV8_OP(0x7f800000, 0x11000000, "add" , OP_ARMV8_A64_ADD, DISOPTYPE_HARMLESS), 87 DIS_ARMV8_OP(0x7f800000, 0x31000000, "adds" , OP_ARMV8_A64_ADDS, DISOPTYPE_HARMLESS), 88 DIS_ARMV8_OP(0x7f800000, 0x51000000, "sub" , OP_ARMV8_A64_SUB, DISOPTYPE_HARMLESS), 89 DIS_ARMV8_OP(0x7f800000, 0x71000000, "subs" , OP_ARMV8_A64_SUBS, DISOPTYPE_HARMLESS), 90 90 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64AddSubImm, DISARMV8INSNCLASS_F_SF, 91 91 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29) 92 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5 ),93 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 5, 5 ),94 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 10, 12 ),92 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 0 /*idxParam*/), 93 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 5, 5, 1 /*idxParam*/), 94 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 10, 12, 2 /*idxParam*/), 95 95 DIS_ARMV8_INSN_PARAM_NONE 96 96 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END; … … 99 99 /* AND/ORR/EOR/ANDS */ 100 100 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64LogicalImm) 101 DIS_ARMV8_OP(0x7f800000, 0x12000000, "and %X,%X,%I" ,OP_ARMV8_A64_AND, DISOPTYPE_HARMLESS),102 DIS_ARMV8_OP(0x7f800000, 0x32000000, "orr %X,%X,%I" ,OP_ARMV8_A64_ORR, DISOPTYPE_HARMLESS),103 DIS_ARMV8_OP(0x7f800000, 0x52000000, "eor %X,%X,%I" ,OP_ARMV8_A64_EOR, DISOPTYPE_HARMLESS),104 DIS_ARMV8_OP(0x7f800000, 0x72000000, "ands %X,%X,%I" ,OP_ARMV8_A64_ANDS, DISOPTYPE_HARMLESS),101 DIS_ARMV8_OP(0x7f800000, 0x12000000, "and" , OP_ARMV8_A64_AND, DISOPTYPE_HARMLESS), 102 DIS_ARMV8_OP(0x7f800000, 0x32000000, "orr" , OP_ARMV8_A64_ORR, DISOPTYPE_HARMLESS), 103 DIS_ARMV8_OP(0x7f800000, 0x52000000, "eor" , OP_ARMV8_A64_EOR, DISOPTYPE_HARMLESS), 104 DIS_ARMV8_OP(0x7f800000, 0x72000000, "ands" , OP_ARMV8_A64_ANDS, DISOPTYPE_HARMLESS), 105 105 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64LogicalImm, DISARMV8INSNCLASS_F_SF, 106 106 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29) 107 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5 ),108 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 5, 6 ),109 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmsImmrN, 10, 13 ),107 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 0 /*idxParam*/), 108 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 5, 6, 1 /*idxParam*/), 109 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmsImmrN, 10, 13, 2 /*idxParam*/), 110 110 DIS_ARMV8_INSN_PARAM_NONE 111 111 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END; … … 114 114 /* MOVN/MOVZ/MOVK */ 115 115 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64MoveWide) 116 DIS_ARMV8_OP(0x7f800000, 0x12800000, "movn %X,%I LSL %I",OP_ARMV8_A64_MOVN, DISOPTYPE_HARMLESS),116 DIS_ARMV8_OP(0x7f800000, 0x12800000, "movn", OP_ARMV8_A64_MOVN, DISOPTYPE_HARMLESS), 117 117 INVALID_OPCODE, 118 DIS_ARMV8_OP(0x7f800000, 0x52800000, "movz %X,%I LSL %I" ,OP_ARMV8_A64_MOVZ, DISOPTYPE_HARMLESS),119 DIS_ARMV8_OP(0x7f800000, 0x72800000, "movk %X,%I LSL %I" ,OP_ARMV8_A64_MOVK, DISOPTYPE_HARMLESS),118 DIS_ARMV8_OP(0x7f800000, 0x52800000, "movz" , OP_ARMV8_A64_MOVZ, DISOPTYPE_HARMLESS), 119 DIS_ARMV8_OP(0x7f800000, 0x72800000, "movk" , OP_ARMV8_A64_MOVK, DISOPTYPE_HARMLESS), 120 120 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64MoveWide, DISARMV8INSNCLASS_F_SF, 121 121 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29) 122 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5 ),123 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 5, 16 ),124 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseHw, 21, 2 ),122 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 0 /*idxParam*/), 123 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 5, 16, 1 /*idxParam*/), 124 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseHw, 21, 2, 2 /*idxParam*/), 125 125 DIS_ARMV8_INSN_PARAM_NONE 126 126 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END; … … 129 129 /* SBFM/BFM/UBFM */ 130 130 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Bitfield) 131 DIS_ARMV8_OP(0x7f800000, 0x13000000, "sbfm %X,%X,%I",OP_ARMV8_A64_SBFM, DISOPTYPE_HARMLESS),132 DIS_ARMV8_OP(0x7f800000, 0x33000000, "bfm %X,%X,%I",OP_ARMV8_A64_BFM, DISOPTYPE_HARMLESS),133 DIS_ARMV8_OP(0x7f800000, 0x23000000, "ubfm %X,%X,%I",OP_ARMV8_A64_UBFM, DISOPTYPE_HARMLESS),131 DIS_ARMV8_OP(0x7f800000, 0x13000000, "sbfm", OP_ARMV8_A64_SBFM, DISOPTYPE_HARMLESS), 132 DIS_ARMV8_OP(0x7f800000, 0x33000000, "bfm", OP_ARMV8_A64_BFM, DISOPTYPE_HARMLESS), 133 DIS_ARMV8_OP(0x7f800000, 0x23000000, "ubfm", OP_ARMV8_A64_UBFM, DISOPTYPE_HARMLESS), 134 134 INVALID_OPCODE, 135 135 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64Bitfield, DISARMV8INSNCLASS_F_SF | DISARMV8INSNCLASS_F_N_FORCED_1_ON_64BIT, 136 136 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29) 137 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5 ),138 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 5, 5 ),139 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmsImmrN, 10, 13 ),137 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 0 /*idxParam*/), 138 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 5, 5, 1 /*idxParam*/), 139 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmsImmrN, 10, 13, 2 /*idxParam*/), 140 140 DIS_ARMV8_INSN_PARAM_NONE 141 141 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END; … … 170 170 /* B.cond/BC.cond */ 171 171 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64CondBr) 172 DIS_ARMV8_OP(0xff000010, 0x54000000, "b. %C %J",OP_ARMV8_A64_B, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW | DISOPTYPE_RELATIVE_CONTROLFLOW | DISOPTYPE_COND_CONTROLFLOW),173 DIS_ARMV8_OP(0xff000010, 0x54000010, "bc. %C %J" ,OP_ARMV8_A64_BC, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW | DISOPTYPE_RELATIVE_CONTROLFLOW | DISOPTYPE_COND_CONTROLFLOW),172 DIS_ARMV8_OP(0xff000010, 0x54000000, "b.", OP_ARMV8_A64_B, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW | DISOPTYPE_RELATIVE_CONTROLFLOW | DISOPTYPE_COND_CONTROLFLOW), 173 DIS_ARMV8_OP(0xff000010, 0x54000010, "bc." , OP_ARMV8_A64_BC, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW | DISOPTYPE_RELATIVE_CONTROLFLOW | DISOPTYPE_COND_CONTROLFLOW), 174 174 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64CondBr, 0 /*fClass*/, 175 175 kDisArmV8OpcDecodeNop, RT_BIT_32(4), 4) 176 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseCond, 0, 4 ),177 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmRel, 5, 19 ),176 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseCond, 0, 4, DIS_ARMV8_INSN_PARAM_UNSET), 177 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmRel, 5, 19, 1 /*idxParam*/), 178 178 DIS_ARMV8_INSN_PARAM_NONE, 179 179 DIS_ARMV8_INSN_PARAM_NONE … … 183 183 /* SVC/HVC/SMC/BRK/HLT/TCANCEL/DCPS1/DCPS2/DCPS3 */ 184 184 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Excp) 185 DIS_ARMV8_OP(0xffe0001f, 0xd4000001, "svc %I",OP_ARMV8_A64_SVC, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),186 DIS_ARMV8_OP(0xffe0001f, 0xd4000002, "hvc %I",OP_ARMV8_A64_HVC, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT | DISOPTYPE_PRIVILEGED),187 DIS_ARMV8_OP(0xffe0001f, 0xd4000003, "smc %I",OP_ARMV8_A64_SMC, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT | DISOPTYPE_PRIVILEGED),188 DIS_ARMV8_OP(0xffe0001f, 0xd4200000, "brk %I",OP_ARMV8_A64_BRK, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),189 DIS_ARMV8_OP(0xffe0001f, 0xd4400000, "hlt %I",OP_ARMV8_A64_HLT, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),190 DIS_ARMV8_OP(0xffe0001f, 0xd4600000, "tcancel %I",OP_ARMV8_A64_TCANCEL, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT), /* FEAT_TME */191 DIS_ARMV8_OP(0xffe0001f, 0xd4a00001, "dcps1 %I",OP_ARMV8_A64_DCPS1, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),192 DIS_ARMV8_OP(0xffe0001f, 0xd4a00002, "dcps2 %I",OP_ARMV8_A64_DCPS2, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),193 DIS_ARMV8_OP(0xffe0001f, 0xd4a00003, "dcps3 %I",OP_ARMV8_A64_DCPS3, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),185 DIS_ARMV8_OP(0xffe0001f, 0xd4000001, "svc", OP_ARMV8_A64_SVC, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT), 186 DIS_ARMV8_OP(0xffe0001f, 0xd4000002, "hvc", OP_ARMV8_A64_HVC, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT | DISOPTYPE_PRIVILEGED), 187 DIS_ARMV8_OP(0xffe0001f, 0xd4000003, "smc", OP_ARMV8_A64_SMC, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT | DISOPTYPE_PRIVILEGED), 188 DIS_ARMV8_OP(0xffe0001f, 0xd4200000, "brk", OP_ARMV8_A64_BRK, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT), 189 DIS_ARMV8_OP(0xffe0001f, 0xd4400000, "hlt", OP_ARMV8_A64_HLT, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT), 190 DIS_ARMV8_OP(0xffe0001f, 0xd4600000, "tcancel", OP_ARMV8_A64_TCANCEL, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT), /* FEAT_TME */ 191 DIS_ARMV8_OP(0xffe0001f, 0xd4a00001, "dcps1", OP_ARMV8_A64_DCPS1, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT), 192 DIS_ARMV8_OP(0xffe0001f, 0xd4a00002, "dcps2", OP_ARMV8_A64_DCPS2, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT), 193 DIS_ARMV8_OP(0xffe0001f, 0xd4a00003, "dcps3", OP_ARMV8_A64_DCPS3, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT), 194 194 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64Excp, 0 /*fClass*/, 195 195 kDisArmV8OpcDecodeLookup, 0xffe0001f, 0) 196 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 5, 16 ),196 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 5, 16, 0 /*idxParam*/), 197 197 DIS_ARMV8_INSN_PARAM_NONE, 198 198 DIS_ARMV8_INSN_PARAM_NONE, … … 203 203 /* WFET/WFIT */ 204 204 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64SysReg) 205 DIS_ARMV8_OP(0xffffffe0, 0xd5031000, "wfet %X",OP_ARMV8_A64_WFET, DISOPTYPE_HARMLESS), /* FEAT_WFxT */206 DIS_ARMV8_OP(0xffffffe0, 0x54000010, "wfit %X" ,OP_ARMV8_A64_WFIT, DISOPTYPE_HARMLESS), /* FEAT_WFxT */205 DIS_ARMV8_OP(0xffffffe0, 0xd5031000, "wfet", OP_ARMV8_A64_WFET, DISOPTYPE_HARMLESS), /* FEAT_WFxT */ 206 DIS_ARMV8_OP(0xffffffe0, 0x54000010, "wfit" , OP_ARMV8_A64_WFIT, DISOPTYPE_HARMLESS), /* FEAT_WFxT */ 207 207 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64SysReg, DISARMV8INSNCLASS_F_FORCED_64BIT, 208 208 kDisArmV8OpcDecodeNop, 0xfe0, 5) 209 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5 ),209 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 0 /*idxParam*/), 210 210 DIS_ARMV8_INSN_PARAM_NONE, 211 211 DIS_ARMV8_INSN_PARAM_NONE, … … 216 216 /* Various hint instructions */ 217 217 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Hints) 218 DIS_ARMV8_OP(0xffffffff, 0xd503201f, "nop", OP_ARMV8_A64_NOP, DISOPTYPE_HARMLESS),219 DIS_ARMV8_OP(0xffffffff, 0xd503203f, "yield", OP_ARMV8_A64_YIELD, DISOPTYPE_HARMLESS),220 DIS_ARMV8_OP(0xffffffff, 0xd503205f, "wfe", OP_ARMV8_A64_WFE, DISOPTYPE_HARMLESS),221 DIS_ARMV8_OP(0xffffffff, 0xd503207f, "wfi", OP_ARMV8_A64_WFI, DISOPTYPE_HARMLESS),222 DIS_ARMV8_OP(0xffffffff, 0xd503209f, "sev", OP_ARMV8_A64_SEV, DISOPTYPE_HARMLESS),223 DIS_ARMV8_OP(0xffffffff, 0xd50320bf, "sevl", OP_ARMV8_A64_SEVL, DISOPTYPE_HARMLESS),224 DIS_ARMV8_OP(0xffffffff, 0xd50320df, "dgh", OP_ARMV8_A64_DGH, DISOPTYPE_HARMLESS), /* FEAT_DGH */225 DIS_ARMV8_OP(0xffffffff, 0xd50320ff, "xpaclri", OP_ARMV8_A64_XPACLRI, DISOPTYPE_HARMLESS), /* FEAT_PAuth */218 DIS_ARMV8_OP(0xffffffff, 0xd503201f, "nop", OP_ARMV8_A64_NOP, DISOPTYPE_HARMLESS), 219 DIS_ARMV8_OP(0xffffffff, 0xd503203f, "yield", OP_ARMV8_A64_YIELD, DISOPTYPE_HARMLESS), 220 DIS_ARMV8_OP(0xffffffff, 0xd503205f, "wfe", OP_ARMV8_A64_WFE, DISOPTYPE_HARMLESS), 221 DIS_ARMV8_OP(0xffffffff, 0xd503207f, "wfi", OP_ARMV8_A64_WFI, DISOPTYPE_HARMLESS), 222 DIS_ARMV8_OP(0xffffffff, 0xd503209f, "sev", OP_ARMV8_A64_SEV, DISOPTYPE_HARMLESS), 223 DIS_ARMV8_OP(0xffffffff, 0xd50320bf, "sevl", OP_ARMV8_A64_SEVL, DISOPTYPE_HARMLESS), 224 DIS_ARMV8_OP(0xffffffff, 0xd50320df, "dgh", OP_ARMV8_A64_DGH, DISOPTYPE_HARMLESS), /* FEAT_DGH */ 225 DIS_ARMV8_OP(0xffffffff, 0xd50320ff, "xpaclri", OP_ARMV8_A64_XPACLRI, DISOPTYPE_HARMLESS), /* FEAT_PAuth */ 226 226 /** @todo */ 227 227 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64Hints, 0 /*fClass*/, … … 235 235 236 236 /* CLREX */ 237 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Clrex) 238 DIS_ARMV8_OP(0xfffff0ff, 0xd503305f, "clrex %I", OP_ARMV8_A64_CLREX, DISOPTYPE_HARMLESS), 239 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64Clrex, 0 /*fClass*/, 240 kDisArmV8OpcDecodeNop, 0, 0) 241 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 8, 4), 237 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64DecBarriers) 238 DIS_ARMV8_OP(0xfffff0ff, 0xd503304f, "clrex", OP_ARMV8_A64_CLREX, DISOPTYPE_HARMLESS), 239 DIS_ARMV8_OP(0xfffff0ff, 0xd50330bf, "dmb", OP_ARMV8_A64_DMB, DISOPTYPE_HARMLESS), 240 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64DecBarriers, 0 /*fClass*/, 241 kDisArmV8OpcDecodeNop, RT_BIT_32(5), 5) 242 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 8, 4, 0 /*idxParam*/), 242 243 DIS_ARMV8_INSN_PARAM_NONE, 243 244 DIS_ARMV8_INSN_PARAM_NONE, … … 249 250 DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(g_ArmV8A64DecodeBarriers) 250 251 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 251 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /** @todo DSB - Encoding */252 DIS_ARMV8_DECODE_MAP_ENTRY(g_ArmV8A64 Clrex),/* CLREX */253 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /** @todo TCOMMIT */254 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /** @todo DSB - Encoding */255 DIS_ARMV8_DECODE_MAP_ INVALID_ENTRY, /** @todoDMB */256 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /** @todo ISB */257 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY /** @todo SB */252 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /** @todo DSB - Encoding */ 253 DIS_ARMV8_DECODE_MAP_ENTRY(g_ArmV8A64DecBarriers), /* CLREX */ 254 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /** @todo TCOMMIT */ 255 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /** @todo DSB - Encoding */ 256 DIS_ARMV8_DECODE_MAP_ENTRY(g_ArmV8A64DecBarriers), /* DMB */ 257 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /** @todo ISB */ 258 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY /** @todo SB */ 258 259 DIS_ARMV8_DECODE_MAP_DEFINE_END(g_ArmV8A64DecodeBarriers, RT_BIT_32(5) | RT_BIT_32(6) | RT_BIT_32(7), 5); 259 260 … … 261 262 /* MSR (and potentially CFINV,XAFLAG,AXFLAG) */ 262 263 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64PState) 263 DIS_ARMV8_OP(0xfffff0ff, 0xd503305f, "msr %P, %I",OP_ARMV8_A64_MSR, DISOPTYPE_PRIVILEGED),264 DIS_ARMV8_OP(0xfffff0ff, 0xd503305f, "msr", OP_ARMV8_A64_MSR, DISOPTYPE_PRIVILEGED), 264 265 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64PState, 0 /*fClass*/, 265 266 kDisArmV8OpcDecodeNop, 0, 0) 266 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParsePState, 0, 0 ), /* This is special for the MSR instruction. */267 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 8, 4 ), /* CRm field encodes the immediate value */267 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParsePState, 0, 0, 0 /*idxParam*/), /* This is special for the MSR instruction. */ 268 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 8, 4, 1 /*idxParam*/), /* CRm field encodes the immediate value */ 268 269 DIS_ARMV8_INSN_PARAM_NONE, 269 270 DIS_ARMV8_INSN_PARAM_NONE … … 273 274 /* TSTART/TTEST */ 274 275 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64SysResult) 275 DIS_ARMV8_OP(0xfffffffe, 0xd5233060, "tstart %X",OP_ARMV8_A64_TSTART, DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED), /* FEAT_TME */276 DIS_ARMV8_OP(0xfffffffe, 0xd5233160, "ttest %X",OP_ARMV8_A64_TTEST, DISOPTYPE_HARMLESS), /* FEAT_TME */276 DIS_ARMV8_OP(0xfffffffe, 0xd5233060, "tstart", OP_ARMV8_A64_TSTART, DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED), /* FEAT_TME */ 277 DIS_ARMV8_OP(0xfffffffe, 0xd5233160, "ttest", OP_ARMV8_A64_TTEST, DISOPTYPE_HARMLESS), /* FEAT_TME */ 277 278 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64SysResult, DISARMV8INSNCLASS_F_FORCED_64BIT, 278 279 kDisArmV8OpcDecodeNop, RT_BIT_32(8) | RT_BIT_32(9) | RT_BIT_32(10) | RT_BIT_32(11), 8) 279 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5 ),280 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 0 /*idxParam*/), 280 281 DIS_ARMV8_INSN_PARAM_NONE, 281 282 DIS_ARMV8_INSN_PARAM_NONE, … … 286 287 /* SYS */ 287 288 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Sys) 288 DIS_ARMV8_OP(0xfff80000, 0xd5080000, "sys %I, %Cn, %Cm, %I, %X",OP_ARMV8_A64_SYS, DISOPTYPE_HARMLESS),289 DIS_ARMV8_OP(0xfff80000, 0xd5080000, "sys", OP_ARMV8_A64_SYS, DISOPTYPE_HARMLESS), 289 290 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64Sys, DISARMV8INSNCLASS_F_FORCED_64BIT, 290 291 kDisArmV8OpcDecodeNop, 0, 0) 291 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 16, 3 ),292 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseCRnCRm, 8, 8 ),293 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 5, 3 ),294 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5 )292 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 16, 3, 0 /*idxParam*/), 293 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseCRnCRm, 8, 8, 1 /*idxParam*/), 294 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 5, 3, 2 /*idxParam*/), 295 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 3 /*idxParam*/) 295 296 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END; 296 297 … … 298 299 /* SYSL */ 299 300 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64SysL) 300 DIS_ARMV8_OP(0xfff80000, 0xd5280000, "sysl %X, %I, %Cn, %Cm, %I",OP_ARMV8_A64_SYSL, DISOPTYPE_HARMLESS),301 DIS_ARMV8_OP(0xfff80000, 0xd5280000, "sysl", OP_ARMV8_A64_SYSL, DISOPTYPE_HARMLESS), 301 302 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64SysL, DISARMV8INSNCLASS_F_FORCED_64BIT, 302 303 kDisArmV8OpcDecodeNop, 0, 0) 303 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5 ),304 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 16, 3 ),305 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseCRnCRm, 8, 8 ),306 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 5, 3 )304 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 0 /*idxParam*/), 305 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 16, 3, 1 /*idxParam*/), 306 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseCRnCRm, 8, 8, 2 /*idxParam*/), 307 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 5, 3, 3 /*idxParam*/) 307 308 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END; 308 309 … … 310 311 /* MSR */ 311 312 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Msr) 312 DIS_ARMV8_OP(0xfff00000, 0xd5 080000, "msr %S, %X",OP_ARMV8_A64_MSR, DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED),313 DIS_ARMV8_OP(0xfff00000, 0xd5100000, "msr", OP_ARMV8_A64_MSR, DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED), 313 314 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64Msr, DISARMV8INSNCLASS_F_FORCED_64BIT, 314 315 kDisArmV8OpcDecodeNop, 0, 0) 315 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseSysReg, 5, 15 ),316 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5 ),316 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseSysReg, 5, 15, 0 /*idxParam*/), 317 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 1 /*idxParam*/), 317 318 DIS_ARMV8_INSN_PARAM_NONE, 318 319 DIS_ARMV8_INSN_PARAM_NONE … … 322 323 /* MRS */ 323 324 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Mrs) 324 DIS_ARMV8_OP(0xfff00000, 0xd5 280000, "mrs %X, %S",OP_ARMV8_A64_MRS, DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED),325 DIS_ARMV8_OP(0xfff00000, 0xd5300000, "mrs", OP_ARMV8_A64_MRS, DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED), 325 326 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64Mrs, DISARMV8INSNCLASS_F_FORCED_64BIT, 326 327 kDisArmV8OpcDecodeNop, 0, 0) 327 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5), 328 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseSysReg, 5, 15), 328 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 0 /*idxParam*/), 329 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseSysReg, 5, 15, 1 /*idxParam*/), 330 DIS_ARMV8_INSN_PARAM_NONE, 331 DIS_ARMV8_INSN_PARAM_NONE 332 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END; 333 334 335 /* RET/RETAA/RETAB */ 336 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Ret) 337 DIS_ARMV8_OP(0xfffffc1f, 0xd65f0000, "ret", OP_ARMV8_A64_RET, DISOPTYPE_HARMLESS), 338 DIS_ARMV8_OP(0xfffffc1f, 0xd65f0800, "retaa", OP_ARMV8_A64_RETAA, DISOPTYPE_HARMLESS), 339 DIS_ARMV8_OP(0xfffffc1f, 0xd65f0c00, "retab", OP_ARMV8_A64_RETAB, DISOPTYPE_HARMLESS), 340 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64Ret, DISARMV8INSNCLASS_F_FORCED_64BIT, 341 kDisArmV8OpcDecodeLookup, 0xfffffc1f, 0) 342 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 5, 5, 0 /*idxParam*/), 343 DIS_ARMV8_INSN_PARAM_NONE, 329 344 DIS_ARMV8_INSN_PARAM_NONE, 330 345 DIS_ARMV8_INSN_PARAM_NONE … … 336 351 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 337 352 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 338 DIS_ARMV8_DECODE_MAP_ INVALID_ENTRY,353 DIS_ARMV8_DECODE_MAP_ENTRY(g_ArmV8A64Ret), /* RET/RETAA/RETAB */ 339 354 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 340 355 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, … … 355 370 /* B/BL */ 356 371 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64UncondBrImm) 357 DIS_ARMV8_OP(0xfc000000, 0x14000000, "b %J",OP_ARMV8_A64_B, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),358 DIS_ARMV8_OP(0xfc000000, 0x94000000, "bl %J",OP_ARMV8_A64_BL, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),372 DIS_ARMV8_OP(0xfc000000, 0x14000000, "b", OP_ARMV8_A64_B, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 373 DIS_ARMV8_OP(0xfc000000, 0x94000000, "bl", OP_ARMV8_A64_BL, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 359 374 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64UncondBrImm, 0 /*fClass*/, 360 375 kDisArmV8OpcDecodeNop, RT_BIT_32(31), 31) 361 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmRel, 0, 26 ),376 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmRel, 0, 26, 0 /*idxParam*/), 362 377 DIS_ARMV8_INSN_PARAM_NONE, 363 378 DIS_ARMV8_INSN_PARAM_NONE, … … 368 383 /* CBZ/CBNZ */ 369 384 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64CmpBrImm) 370 DIS_ARMV8_OP(0x7f000000, 0x34000000, "cbz %X, %J",OP_ARMV8_A64_CBZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),371 DIS_ARMV8_OP(0x7f000000, 0x35000000, "cbnz %X, %J",OP_ARMV8_A64_CBNZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),385 DIS_ARMV8_OP(0x7f000000, 0x34000000, "cbz", OP_ARMV8_A64_CBZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 386 DIS_ARMV8_OP(0x7f000000, 0x35000000, "cbnz", OP_ARMV8_A64_CBNZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 372 387 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64CmpBrImm, DISARMV8INSNCLASS_F_SF, 373 388 kDisArmV8OpcDecodeNop, RT_BIT_32(24), 24) 374 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5 ),375 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmRel, 5, 19 ),389 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 0 /*idxParam*/), 390 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmRel, 5, 19, 1 /*idxParam*/), 376 391 DIS_ARMV8_INSN_PARAM_NONE, 377 392 DIS_ARMV8_INSN_PARAM_NONE … … 381 396 /* TBZ/TBNZ */ 382 397 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64TestBrImm) 383 DIS_ARMV8_OP(0x7f000000, 0x36000000, "tbz %X, %I, %J",OP_ARMV8_A64_TBZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),384 DIS_ARMV8_OP(0x7f000000, 0x37000000, "tbnz %X, %I, %J",OP_ARMV8_A64_TBNZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),398 DIS_ARMV8_OP(0x7f000000, 0x36000000, "tbz", OP_ARMV8_A64_TBZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 399 DIS_ARMV8_OP(0x7f000000, 0x37000000, "tbnz", OP_ARMV8_A64_TBNZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 385 400 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64TestBrImm, DISARMV8INSNCLASS_F_SF, 386 401 kDisArmV8OpcDecodeNop, RT_BIT_32(24), 24) 387 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5 ),388 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 19, 5 ),389 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmRel, 5, 14 ),402 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg, 0, 5, 0 /*idxParam*/), 403 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm, 19, 5, 1 /*idxParam*/), 404 DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImmRel, 5, 14, 2 /*idxParam*/), 390 405 DIS_ARMV8_INSN_PARAM_NONE 391 406 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END; … … 420 435 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 421 436 DIS_ARMV8_DECODE_MAP_DEFINE_END(g_ArmV8A64DataProcReg, RT_BIT_32(24), 24); 437 438 439 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64LdSt) 440 DIS_ARMV8_OP(0xbfc00000, 0xb9400000, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS), 441 DIS_ARMV8_OP(0xbfc00000, 0xb9000000, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS), 442 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS(g_ArmV8A64LdSt, 0 /*fClass*/, 443 kDisArmV8OpcDecodeLookup, 0xbfc00000, 0) 444 DIS_ARMV8_INSN_PARAM_CREATE( kDisParmParseIs32Bit, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET), 445 DIS_ARMV8_INSN_PARAM_CREATE( kDisParmParseReg, 0, 5, 0 /*idxParam*/), 446 DIS_ARMV8_INSN_PARAM_CREATE_EX(kDisParmParseReg, 5, 5, 1 /*idxParam*/, DIS_ARMV8_INSN_PARAM_F_ADDR_BEGIN), 447 DIS_ARMV8_INSN_PARAM_CREATE_EX(kDisParmParseImm, 10, 12, 2 /*idxParam*/, DIS_ARMV8_INSN_PARAM_F_ADDR_END), 448 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END; 422 449 423 450 … … 473 500 DIS_ARMV8_DECODE_MAP_ENTRY(g_ArmV8A64BrExcpSys), /* Branches / Exception generation and system instructions. */ 474 501 DIS_ARMV8_DECODE_MAP_ENTRY(g_ArmV8A64BrExcpSys), /* Branches / Exception generation and system instructions. */ 475 DIS_ARMV8_DECODE_MAP_ INVALID_ENTRY,/* Load/Stores. */502 DIS_ARMV8_DECODE_MAP_ENTRY(g_ArmV8A64LdSt), /* Load/Stores. */ 476 503 DIS_ARMV8_DECODE_MAP_ENTRY(g_ArmV8A64DataProcReg), /* Data processing (register) (see op1 in C4.1.68). */ 477 504 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /* Load/Stores. */
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