Changeset 105770 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Aug 21, 2024 2:18:53 PM (5 months ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 2 edited
- 1 copied
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/.scm-settings
r103810 r105770 42 42 /VMMAll/PGMAllShw.h: --no-fix-header-guards 43 43 /VMMAll/IEMAllInstCommonBodyMacros.h: --no-fix-header-guards 44 /VMMAll/IEMAllN8veLiveness.h: --no-fix-header-guards 44 45 /VMMAll/IEMAllN8veRecompFuncs.h: --no-fix-header-guards 45 46 /testcase/tstVMStruct.h: --no-fix-header-guards -
trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.cpp
r105768 r105770 27 27 28 28 29 /********************************************************************************************************************************* 30 * Header Files * 31 *********************************************************************************************************************************/ 32 #define LOG_GROUP LOG_GROUP_IEM 33 #define IEM_WITH_OPAQUE_DECODER_STATE 34 #include <VBox/vmm/iem.h> 35 #include "IEMInternal.h" 36 #include <VBox/vmm/vmcc.h> 37 #include <VBox/log.h> 38 39 #include "IEMN8veRecompiler.h" 40 #include "IEMThreadedFunctions.h" 41 #include "IEMNativeFunctions.h" 42 43 44 /********************************************************************************************************************************* 45 * Defined Constants And Macros * 46 *********************************************************************************************************************************/ 47 #define NOP() ((void)0) 48 49 50 /* 51 * BEGIN & END as well as internal workers. 52 */ 53 #ifndef IEMLIVENESS_EXTENDED_LAYOUT 54 # define IEM_MC_BEGIN_EX(a_fMcFlags, a_fCImplFlags, a_cArgs) \ 55 { \ 56 /* Define local variables that we use to accumulate the liveness state changes in. */ \ 57 IEMLIVENESSBIT LiveStateBit0 = { 0 }; \ 58 IEMLIVENESSBIT LiveStateBit1 = { 0 }; \ 59 IEMLIVENESSBIT LiveMask = { 0 }; \ 60 bool fDoneXpctOrCall = false 61 #else 62 # define IEM_MC_BEGIN_EX(a_fMcFlags, a_fCImplFlags, a_cArgs) \ 63 { \ 64 /* Define local variables that we use to accumulate the liveness state changes in. */ \ 65 IEMLIVENESSENTRY LiveState = { { 0, 0, 0, 0 } }; \ 66 IEMLIVENESSBIT LiveMask = { 0 }; \ 67 bool fDoneXpctOrCall = false 68 #endif 69 70 #ifndef IEMLIVENESS_EXTENDED_LAYOUT 71 AssertCompile(IEMLIVENESS_STATE_INPUT == IEMLIVENESS_STATE_MASK); 72 AssertCompile(IEMLIVENESSBIT0_XCPT_OR_CALL == 0 && IEMLIVENESSBIT1_XCPT_OR_CALL != 0); 73 # define IEM_LIVENESS_MARK_XCPT_OR_CALL() do { \ 74 if (!fDoneXpctOrCall) \ 75 { \ 76 LiveStateBit0.bm64 |= pIncoming->Bit0.bm64 & pIncoming->Bit1.bm64 & ~LiveMask.bm64; \ 77 LiveStateBit1.bm64 |= IEMLIVENESSBIT1_XCPT_OR_CALL; \ 78 \ 79 LiveMask.bm64 |= IEMLIVENESSBIT_MASK; /* could also use UINT64_MAX here, but makes little no(?) difference */ \ 80 fDoneXpctOrCall = true; /* when compiling with gcc and cl.exe on x86 - may on arm, though. */ \ 81 } \ 82 } while (0) 83 #else 84 # define IEM_LIVENESS_MARK_XCPT_OR_CALL() do { \ 85 if (!fDoneXpctOrCall) \ 86 { \ 87 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= pIncoming->aBits[IEMLIVENESS_BIT_READ].bm64 & ~LiveMask.bm64; \ 88 LiveState.aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64 |= IEMLIVENESSBIT_MASK; \ 89 LiveMask.bm64 |= IEMLIVENESSBIT_MASK; \ 90 fDoneXpctOrCall = true; \ 91 } \ 92 } while (0) 93 #endif 94 95 96 #ifndef IEMLIVENESS_EXTENDED_LAYOUT 97 AssertCompile(IEMLIVENESS_STATE_CLOBBERED == 0); 98 # define IEM_LIVENESS_ALL_EFLAGS_CLOBBER() do { \ 99 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \ 100 } while (0) 101 AssertCompile(IEMLIVENESS_STATE_INPUT == IEMLIVENESS_STATE_MASK); 102 # define IEM_LIVENESS_ALL_EFLAGS_INPUT() do { \ 103 LiveStateBit0.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \ 104 LiveStateBit1.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \ 105 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \ 106 } while (0) 107 # define IEM_LIVENESS_ALL_EFLAGS_MODIFY() IEM_LIVENESS_ALL_EFLAGS_INPUT() 108 #else 109 # define IEM_LIVENESS_ALL_EFLAGS_CLOBBER() do { \ 110 LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \ 111 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \ 112 } while (0) 113 # define IEM_LIVENESS_ALL_EFLAGS_INPUT() do { \ 114 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \ 115 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \ 116 } while (0) 117 # define IEM_LIVENESS_ALL_EFLAGS_MODIFY() do { \ 118 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \ 119 LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \ 120 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \ 121 } while (0) 122 #endif 123 124 125 #ifndef IEMLIVENESS_EXTENDED_LAYOUT 126 # define IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Name) do { \ 127 LiveMask.a_Name |= 1; \ 128 } while (0) 129 # define IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name) do { \ 130 LiveStateBit0.a_Name |= 1; \ 131 LiveStateBit1.a_Name |= 1; \ 132 LiveMask.a_Name |= 1; \ 133 } while (0) 134 # define IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Name) IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name) 135 #else 136 # define IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Name) do { \ 137 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_Name |= 1; \ 138 LiveMask.a_Name |= 1; \ 139 } while (0) 140 # define IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name) do { \ 141 LiveState.aBits[IEMLIVENESS_BIT_READ].a_Name |= 1; \ 142 LiveMask.a_Name |= 1; \ 143 } while (0) 144 # define IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Name) do { \ 145 LiveState.aBits[IEMLIVENESS_BIT_READ].a_Name |= 1; \ 146 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_Name |= 1; \ 147 LiveMask.a_Name |= 1; \ 148 } while (0) 149 #endif 150 151 152 /* Generic bitmap (bmGpr, bmSegBase, ++) setters. */ 153 #ifndef IEMLIVENESS_EXTENDED_LAYOUT 154 # define IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(a_bmMember, a_iElement) do { \ 155 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \ 156 } while (0) 157 # define IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement) do { \ 158 LiveStateBit0.a_bmMember |= RT_BIT_64(a_iElement); \ 159 LiveStateBit1.a_bmMember |= RT_BIT_64(a_iElement); \ 160 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \ 161 } while (0) 162 # define IEM_LIVENESS_BITMAP_MEMBER_MODIFY(a_bmMember, a_iElement) IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement) 163 #else 164 # define IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(a_bmMember, a_iElement) do { \ 165 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_bmMember |= RT_BIT_64(a_iElement); \ 166 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \ 167 } while (0) 168 # define IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement) do { \ 169 LiveState.aBits[IEMLIVENESS_BIT_READ].a_bmMember |= RT_BIT_64(a_iElement); \ 170 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \ 171 } while (0) 172 # define IEM_LIVENESS_BITMAP_MEMBER_MODIFY(a_bmMember, a_iElement) do { \ 173 LiveState.aBits[IEMLIVENESS_BIT_READ].a_bmMember |= RT_BIT_64(a_iElement); \ 174 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_bmMember |= RT_BIT_64(a_iElement); \ 175 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \ 176 } while (0) 177 #endif 178 179 180 #define IEM_LIVENESS_CR0_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fCr0, 0) 181 #define IEM_LIVENESS_CR4_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fCr4, 0) 182 #define IEM_LIVENESS_XCR0_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fXcr0, 0) 183 184 185 #define IEM_LIVENESS_FCW_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fFcw, 0) 186 #define IEM_LIVENESS_FCW_CLOBBER() IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fFcw, 0) 187 #define IEM_LIVENESS_FCW_MODIFY() IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fFcw, 0) 188 189 190 #define IEM_LIVENESS_FSW_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fFsw, 0) 191 #define IEM_LIVENESS_FSW_CLOBBER() IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fFsw, 0) 192 #define IEM_LIVENESS_FSW_MODIFY() IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fFsw, 0) 193 194 195 #define IEM_LIVENESS_MXCSR_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fMxCsr, 0) 196 #define IEM_LIVENESS_MXCSR_CLOBBER() IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fMxCsr, 0) 197 #define IEM_LIVENESS_MXCSR_MODIFY() IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fMxCsr, 0) 198 199 200 #define IEM_LIVENESS_GPR_CLOBBER(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmGprs, a_idxGpr) 201 #define IEM_LIVENESS_GPR_INPUT(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmGprs, a_idxGpr) 202 #define IEM_LIVENESS_GPR_MODIFY(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmGprs, a_idxGpr) 203 204 205 #define IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegBase, a_iSeg) 206 #define IEM_LIVENESS_SEG_BASE_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegBase, a_iSeg) 207 #define IEM_LIVENESS_SEG_BASE_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegBase, a_iSeg) 208 209 210 #define IEM_LIVENESS_SEG_ATTRIB_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegAttrib, a_iSeg) 211 #define IEM_LIVENESS_SEG_ATTRIB_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegAttrib, a_iSeg) 212 #define IEM_LIVENESS_SEG_ATTRIB_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODFIY( bmSegAttrib, a_iSeg) 213 214 215 #define IEM_LIVENESS_SEG_LIMIT_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegLimit, a_iSeg) 216 #define IEM_LIVENESS_SEG_LIMIT_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegLimit, a_iSeg) 217 #define IEM_LIVENESS_SEG_LIMIT_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegLimit, a_iSeg) 218 219 220 #define IEM_LIVENESS_SEG_SEL_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegSel, a_iSeg) 221 #define IEM_LIVENESS_SEG_SEL_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegSel, a_iSeg) 222 #define IEM_LIVENESS_SEG_SEL_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegSel, a_iSeg) 223 224 225 #define IEM_LIVENESS_MEM(a_iSeg) do { \ 226 IEM_LIVENESS_MARK_XCPT_OR_CALL(); \ 227 IEM_LIVENESS_SEG_ATTRIB_INPUT(a_iSeg); \ 228 IEM_LIVENESS_SEG_BASE_INPUT(a_iSeg); \ 229 IEM_LIVENESS_SEG_LIMIT_INPUT(a_iSeg); \ 230 } while (0) 231 232 #define IEM_LIVENESS_MEM_FLAT() IEM_LIVENESS_MARK_XCPT_OR_CALL() 233 234 #define IEM_LIVENESS_STACK() do { \ 235 IEM_LIVENESS_MEM(X86_SREG_SS); \ 236 IEM_LIVENESS_GPR_MODIFY(X86_GREG_xSP); \ 237 } while (0) 238 239 #define IEM_LIVENESS_STACK_FLAT() do { \ 240 IEM_LIVENESS_MEM_FLAT(); \ 241 IEM_LIVENESS_GPR_MODIFY(X86_GREG_xSP); \ 242 } while (0) 243 244 245 #define IEM_LIVENESS_PC_NO_FLAGS() NOP() 246 #define IEM_LIVENESS_PC_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther) 247 #define IEM_LIVENESS_PC16_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS) 248 #define IEM_LIVENESS_PC32_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS) 249 #define IEM_LIVENESS_PC32_FLAT_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL() 250 #define IEM_LIVENESS_PC64_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL() 251 #define IEM_LIVENESS_PC64_INTRAPG_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL() /* Typically ends TB. */ 252 #define IEM_LIVENESS_PC16_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS) 253 #define IEM_LIVENESS_PC32_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS) 254 #define IEM_LIVENESS_PC32_FLAT_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther) 255 #define IEM_LIVENESS_PC64_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther) 256 #define IEM_LIVENESS_PC64_INTRAPG_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther) 257 258 #ifndef IEMLIVENESS_EXTENDED_LAYOUT 259 # define IEM_MC_END() \ 260 /* Combine the incoming state with what we've accumulated in this block. */ \ 261 /* We can help the compiler by skipping OR'ing when having applied XPCT_OR_CALL, */ \ 262 /* since that already imports all the incoming state. Saves a lot with cl.exe. */ \ 263 if (!fDoneXpctOrCall) \ 264 { \ 265 pOutgoing->Bit0.bm64 = LiveStateBit0.bm64 | (~LiveMask.bm64 & pIncoming->Bit0.bm64); \ 266 pOutgoing->Bit1.bm64 = LiveStateBit1.bm64 | (~LiveMask.bm64 & pIncoming->Bit1.bm64); \ 267 } \ 268 else \ 269 { \ 270 pOutgoing->Bit0.bm64 = LiveStateBit0.bm64; \ 271 pOutgoing->Bit1.bm64 = LiveStateBit1.bm64; \ 272 } \ 273 } 274 #else 275 # define IEM_MC_END() \ 276 /* Combine the incoming state with what we've accumulated in this block. */ \ 277 /* We can help the compiler by skipping OR'ing when having applied XPCT_OR_CALL, */ \ 278 /* since that already imports all the incoming state. Saves a lot with cl.exe. */ \ 279 if (!fDoneXpctOrCall) \ 280 { \ 281 pOutgoing->aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64 = LiveState.aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64 \ 282 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64); \ 283 pOutgoing->aBits[IEMLIVENESS_BIT_READ].bm64 = LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 \ 284 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_READ].bm64); \ 285 pOutgoing->aBits[IEMLIVENESS_BIT_WRITE].bm64 = LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 \ 286 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_WRITE].bm64); \ 287 pOutgoing->aBits[IEMLIVENESS_BIT_OTHER].bm64 = LiveState.aBits[IEMLIVENESS_BIT_OTHER].bm64 \ 288 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_OTHER].bm64); \ 289 } \ 290 else \ 291 *pOutgoing = LiveState; \ 292 } 293 #endif 294 295 /* 296 * The native MC variants. 297 */ 298 #define IEM_MC_FREE_LOCAL(a_Name) NOP() 299 #define IEM_MC_FREE_ARG(a_Name) NOP() 300 301 302 /* 303 * The THREADED MC variants. 304 */ 305 306 /* We don't track RIP (PC) liveness. */ 307 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS() 308 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS() 309 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS() 310 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS() 311 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS() 312 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS() 313 314 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16(a_i8, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS() 315 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS() 316 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_FLAT(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_FLAT_JMP_NO_FLAGS() 317 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS() 318 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_INTRAPG(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_INTRAPG_JMP_NO_FLAGS() 319 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i8, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS() 320 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS() 321 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_FLAT_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_FLAT_JMP_WITH_FLAGS() 322 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS() 323 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_INTRAPG_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_INTRAPG_JMP_WITH_FLAGS() 324 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS() 325 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS() 326 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_FLAT(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_FLAT_JMP_NO_FLAGS() 327 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS() 328 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_INTRAPG(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_INTRAPG_JMP_NO_FLAGS() 329 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS() 330 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS() 331 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_FLAT_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_FLAT_JMP_WITH_FLAGS() 332 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS() 333 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_INTRAPG_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_INTRAPG_JMP_WITH_FLAGS() 334 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS() 335 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS() 336 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_FLAT(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_FLAT_JMP_NO_FLAGS() 337 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS() 338 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_INTRAPG(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_INTRAPG_JMP_NO_FLAGS() 339 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS() 340 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS() 341 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_FLAT_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_FLAT_JMP_WITH_FLAGS() 342 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS() 343 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_INTRAPG_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_INTRAPG_JMP_WITH_FLAGS() 344 #define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16(a_u16NewIP) IEM_LIVENESS_PC16_JMP_NO_FLAGS() 345 #define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32(a_u16NewIP) IEM_LIVENESS_PC32_JMP_NO_FLAGS() 346 #define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64(a_u16NewIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS() 347 #define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC16_JMP_WITH_FLAGS() 348 #define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC32_JMP_WITH_FLAGS() 349 #define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS() 350 #define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32(a_u32NewEIP) IEM_LIVENESS_PC32_JMP_NO_FLAGS() 351 #define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS() 352 #define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC32_JMP_WITH_FLAGS() 353 #define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS() 354 #define IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS() 355 #define IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS() 356 357 #define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 358 #define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 359 #define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 360 #define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 361 #define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 362 #define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 363 #define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 364 #define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 365 #define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 366 #define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i32, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 367 #define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i32, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 368 #define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i32, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 369 #define IEM_MC_REL_CALL_S64_AND_FINISH_THREADED_PC32(a_i64, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 370 #define IEM_MC_REL_CALL_S64_AND_FINISH_THREADED_PC64(a_i64, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 371 #define IEM_MC_REL_CALL_S64_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i64, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 372 #define IEM_MC_REL_CALL_S64_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i64, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 373 #define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC16(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 374 #define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC32(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 375 #define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC64(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 376 #define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 377 #define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 378 #define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 379 #define IEM_MC_IND_CALL_U32_AND_FINISH_THREADED_PC32(a_u32NewEIP, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 380 #define IEM_MC_IND_CALL_U32_AND_FINISH_THREADED_PC64(a_u32NewEIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 381 #define IEM_MC_IND_CALL_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u32NewEIP, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 382 #define IEM_MC_IND_CALL_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 383 #define IEM_MC_IND_CALL_U64_AND_FINISH_THREADED_PC64(a_u32NewRIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 384 #define IEM_MC_IND_CALL_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewRIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 385 386 #define IEM_MC_RETN_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 387 #define IEM_MC_RETN_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr, a_enmEffOpSize) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 388 #define IEM_MC_RETN_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr, a_enmEffOpSize) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 389 #define IEM_MC_RETN_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 390 #define IEM_MC_RETN_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr, a_enmEffOpSize) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 391 #define IEM_MC_RETN_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr, a_enmEffOpSize) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0) 392 393 /* Effective address stuff is rather complicated... */ 394 #define IEM_MC_CALC_RM_EFF_ADDR_THREADED_16(a_GCPtrEff, a_bRm, a_u16Disp) do { \ 395 if (((a_bRm) & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) != 6) \ 396 { \ 397 switch ((a_bRm) & X86_MODRM_RM_MASK) \ 398 { \ 399 case 0: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \ 400 case 1: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \ 401 case 2: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \ 402 case 3: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \ 403 case 4: IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \ 404 case 5: IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \ 405 case 6: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); break; \ 406 case 7: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); break; \ 407 } \ 408 } \ 409 } while (0) 410 411 #define IEM_MC_CALC_RM_EFF_ADDR_THREADED_32(a_GCPtrEff, a_bRm, a_uSibAndRspOffset, a_u32Disp) do { \ 412 if (((a_bRm) & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) != 5) \ 413 { \ 414 uint8_t const idxReg = (a_bRm) & X86_MODRM_RM_MASK; \ 415 if (idxReg != 4 /*SIB*/) \ 416 IEM_LIVENESS_GPR_INPUT(idxReg); \ 417 else \ 418 { \ 419 uint8_t const idxIndex = ((a_uSibAndRspOffset) >> X86_SIB_INDEX_SHIFT) & X86_SIB_INDEX_SMASK; \ 420 if (idxIndex != 4 /*no index*/) \ 421 IEM_LIVENESS_GPR_INPUT(idxIndex); \ 422 \ 423 uint8_t const idxBase = (a_uSibAndRspOffset) & X86_SIB_BASE_MASK; \ 424 if (idxBase != 5 || ((a_bRm) & X86_MODRM_MOD_MASK) != 0) \ 425 IEM_LIVENESS_GPR_INPUT(idxBase); \ 426 } \ 427 } \ 428 } while (0) 429 430 #define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) do { \ 431 if (((a_bRmEx) & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) == 5) \ 432 { /* RIP */ } \ 433 else \ 434 { \ 435 uint8_t const idxReg = (a_bRmEx) & (X86_MODRM_RM_MASK | 0x8); /* bRmEx[bit 3] = REX.B */ \ 436 if ((idxReg & X86_MODRM_RM_MASK) != 4 /* not SIB */) \ 437 IEM_LIVENESS_GPR_INPUT(idxReg); \ 438 else /* SIB: */\ 439 { \ 440 uint8_t const idxIndex = (((a_uSibAndRspOffset) >> X86_SIB_INDEX_SHIFT) & X86_SIB_INDEX_SMASK) \ 441 | (((a_bRmEx) & 0x10) >> 1); /* bRmEx[bit 4] = REX.X */ \ 442 if (idxIndex != 4 /*no index*/) \ 443 IEM_LIVENESS_GPR_INPUT(idxIndex); \ 444 \ 445 uint8_t const idxBase = ((a_uSibAndRspOffset) & X86_SIB_BASE_MASK) | ((a_bRmEx) & 0x8); /* bRmEx[bit 3] = REX.B */ \ 446 if ((idxBase & 7) != 5 /* and !13*/ || ((a_bRmEx) & X86_MODRM_MOD_MASK) != 0) \ 447 IEM_LIVENESS_GPR_INPUT(idxBase); \ 448 } \ 449 } \ 450 } while (0) 451 #define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_FSGS(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) \ 452 IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) 453 #define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_ADDR32(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) \ 454 IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) 455 456 /* At present we don't know what any CIMPL may require as input, so we do XPCT/CALL. */ 457 #define IEM_MC_CALL_CIMPL_1_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0) \ 458 IEM_LIVENESS_MARK_XCPT_OR_CALL() 459 #define IEM_MC_CALL_CIMPL_2_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1) \ 460 IEM_LIVENESS_MARK_XCPT_OR_CALL() 461 #define IEM_MC_CALL_CIMPL_3_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2) \ 462 IEM_LIVENESS_MARK_XCPT_OR_CALL() 463 #define IEM_MC_CALL_CIMPL_4_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3) \ 464 IEM_LIVENESS_MARK_XCPT_OR_CALL() 465 #define IEM_MC_CALL_CIMPL_5_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3, a4) \ 466 IEM_LIVENESS_MARK_XCPT_OR_CALL() 467 468 #define IEM_MC_DEFER_TO_CIMPL_0_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl) \ 469 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming) 470 #define IEM_MC_DEFER_TO_CIMPL_1_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0) \ 471 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming) 472 #define IEM_MC_DEFER_TO_CIMPL_2_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1) \ 473 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming) 474 #define IEM_MC_DEFER_TO_CIMPL_3_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2) \ 475 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming) 476 #define IEM_MC_DEFER_TO_CIMPL_4_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3) \ 477 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming) 478 #define IEM_MC_DEFER_TO_CIMPL_5_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3, a4) \ 479 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming) 480 481 /* Any 8-bit register fetch, store or modification only works on part of the register 482 and must therefore be considered INPUTs. */ 483 #define IEM_MC_FETCH_GREG_U8_THREADED(a_u8Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15) 484 #define IEM_MC_FETCH_GREG_U8_ZX_U16_THREADED(a_u16Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15) 485 #define IEM_MC_FETCH_GREG_U8_ZX_U32_THREADED(a_u32Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15) 486 #define IEM_MC_FETCH_GREG_U8_ZX_U64_THREADED(a_u64Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15) 487 #define IEM_MC_FETCH_GREG_U8_SX_U16_THREADED(a_u16Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15) 488 #define IEM_MC_FETCH_GREG_U8_SX_U32_THREADED(a_u32Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15) 489 #define IEM_MC_FETCH_GREG_U8_SX_U64_THREADED(a_u64Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15) 490 #define IEM_MC_STORE_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15) 491 #define IEM_MC_STORE_GREG_U8_CONST_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15) 492 #define IEM_MC_REF_GREG_U8_THREADED(a_pu8Dst, a_iGRegEx) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15) 493 #define IEM_MC_REF_GREG_U8_CONST_THREADED(a_pu8Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15) 494 #define IEM_MC_ADD_GREG_U8_TO_LOCAL_THREADED(a_u8Value, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15) 495 #define IEM_MC_AND_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15) 496 #define IEM_MC_OR_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15) 497 498 499 /* 500 * The other MCs. 501 */ 502 503 #define IEM_MC_NO_NATIVE_RECOMPILE() NOP() 504 505 #define IEM_MC_RAISE_DIVIDE_ERROR() IEM_LIVENESS_MARK_XCPT_OR_CALL() 506 #define IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT() 507 #define IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT() 508 #define IEM_MC_MAYBE_RAISE_FPU_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_FSW_INPUT() 509 #define IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT() \ 510 IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT(); IEM_LIVENESS_CR4_INPUT(); IEM_LIVENESS_XCR0_INPUT() 511 #define IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT() \ 512 IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT(); IEM_LIVENESS_CR4_INPUT() 513 #define IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT() \ 514 IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT(); IEM_LIVENESS_FSW_INPUT() 515 #define IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO() IEM_LIVENESS_MARK_XCPT_OR_CALL() 516 #define IEM_MC_RAISE_GP0_IF_EFF_ADDR_UNALIGNED(a_EffAddr, a_cbAlign) IEM_LIVENESS_MARK_XCPT_OR_CALL() 517 #define IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT() 518 #define IEM_MC_MAYBE_RAISE_NON_CANONICAL_ADDR_GP0(a_u64Addr) IEM_LIVENESS_MARK_XCPT_OR_CALL() 519 520 #define IEM_MC_LOCAL(a_Type, a_Name) NOP() 521 #define IEM_MC_LOCAL_ASSIGN(a_Type, a_Name, a_Value) NOP() 522 #define IEM_MC_LOCAL_CONST(a_Type, a_Name, a_Value) NOP() 523 #define IEM_MC_NOREF(a_Name) NOP() 524 #define IEM_MC_ARG(a_Type, a_Name, a_iArg) NOP() 525 #define IEM_MC_ARG_CONST(a_Type, a_Name, a_Value, a_iArg) NOP() 526 #define IEM_MC_ARG_LOCAL_REF(a_Type, a_Name, a_Local, a_iArg) NOP() 527 528 #undef IEM_MC_COMMIT_EFLAGS /* unused here */ 529 #define IEM_MC_COMMIT_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput) do { \ 530 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \ 531 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \ 532 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \ 533 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \ 534 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \ 535 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \ 536 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \ 537 Assert(!( ((a_fEflInput) | (a_fEflOutput)) \ 538 & ~(uint32_t)(X86_EFL_STATUS_BITS | X86_EFL_DF | X86_EFL_VM | X86_EFL_VIF | X86_EFL_IOPL))); \ 539 } while (0) 540 #undef IEM_MC_COMMIT_EFLAGS_OPT /* unused here */ 541 #define IEM_MC_COMMIT_EFLAGS_OPT_EX(a_EFlags, a_fEflInput, a_fEflOutput) \ 542 IEM_MC_COMMIT_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput) 543 544 #define IEM_MC_ASSIGN_TO_SMALLER(a_VarDst, a_VarSrcEol) NOP() 545 546 #define IEM_MC_FETCH_GREG_I16(a_i16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg) 547 #define IEM_MC_FETCH_GREG_U16(a_u16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg) 548 #define IEM_MC_FETCH_GREG_U16_ZX_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg) 549 #define IEM_MC_FETCH_GREG_U16_ZX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg) 550 #define IEM_MC_FETCH_GREG_U16_SX_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg) 551 #define IEM_MC_FETCH_GREG_U16_SX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg) 552 #define IEM_MC_FETCH_GREG_I32(a_i32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg) 553 #define IEM_MC_FETCH_GREG_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg) 554 #define IEM_MC_FETCH_GREG_U32_ZX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg) 555 #define IEM_MC_FETCH_GREG_U32_SX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg) 556 #define IEM_MC_FETCH_GREG_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg) 557 #define IEM_MC_FETCH_GREG_U64_ZX_U64 IEM_MC_FETCH_GREG_U64 558 #define IEM_MC_FETCH_GREG_PAIR_U32(a_u64Dst, a_iGRegLo, a_iGRegHi) \ 559 do { IEM_LIVENESS_GPR_INPUT(a_iGRegLo); IEM_LIVENESS_GPR_INPUT(a_iGRegHi); } while(0) 560 #define IEM_MC_FETCH_GREG_PAIR_U64(a_u128Dst, a_iGRegLo, a_iGRegHi) \ 561 do { IEM_LIVENESS_GPR_INPUT(a_iGRegLo); IEM_LIVENESS_GPR_INPUT(a_iGRegHi); } while(0) 562 #define IEM_MC_FETCH_SREG_U16(a_u16Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg) 563 #define IEM_MC_FETCH_SREG_ZX_U32(a_u32Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg) 564 #define IEM_MC_FETCH_SREG_ZX_U64(a_u64Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg) 565 #define IEM_MC_FETCH_SREG_BASE_U64(a_u64Dst, a_iSReg) IEM_LIVENESS_SEG_BASE_INPUT(a_iSReg) 566 #define IEM_MC_FETCH_SREG_BASE_U32(a_u32Dst, a_iSReg) IEM_LIVENESS_SEG_BASE_INPUT(a_iSReg) 567 #undef IEM_MC_FETCH_EFLAGS /* unused here */ 568 #define IEM_MC_FETCH_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput) do { \ 569 /* IEM_MC_COMMIT_EFLAGS_EX doesn't cover input-only situations. This OTOH, leads \ 570 to duplication in many cases, but the compiler's optimizers should help with that. */ \ 571 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \ 572 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \ 573 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \ 574 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \ 575 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \ 576 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \ 577 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \ 578 Assert(!( ((a_fEflInput) | (a_fEflOutput)) \ 579 & ~(uint32_t)(X86_EFL_STATUS_BITS | X86_EFL_DF | X86_EFL_VM | X86_EFL_VIF | X86_EFL_IOPL))); \ 580 } while (0) 581 #define IEM_MC_FETCH_EFLAGS_U8(a_EFlags) do { \ 582 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Cf); \ 583 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Pf); \ 584 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Af); \ 585 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Zf); \ 586 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Sf); \ 587 } while (0) 588 589 #define IEM_MC_FETCH_FSW(a_u16Fsw) IEM_LIVENESS_FSW_INPUT() 590 #define IEM_MC_FETCH_FCW(a_u16Fcw) IEM_LIVENESS_FCW_INPUT() 591 592 #define IEM_MC_STORE_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 593 #define IEM_MC_STORE_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg) 594 #define IEM_MC_STORE_GREG_I32(a_iGReg, a_i32Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg) 595 #define IEM_MC_STORE_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg) 596 #define IEM_MC_STORE_GREG_I64(a_iGReg, a_i64Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg) 597 #define IEM_MC_STORE_GREG_U16_CONST(a_iGReg, a_u16Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 598 #define IEM_MC_STORE_GREG_U32_CONST(a_iGReg, a_u32Const) IEM_LIVENESS_GPR_CLOBBER(a_iGReg) 599 #define IEM_MC_STORE_GREG_U64_CONST(a_iGReg, a_u32Const) IEM_LIVENESS_GPR_CLOBBER(a_iGReg) 600 #define IEM_MC_STORE_GREG_PAIR_U32(a_iGRegLo, a_iGRegHi, a_u64Value) \ 601 do { IEM_LIVENESS_GPR_CLOBBER(a_iGRegLo); IEM_LIVENESS_GPR_CLOBBER(a_iGRegHi); } while(0) 602 #define IEM_MC_STORE_GREG_PAIR_U64(a_iGRegLo, a_iGRegHi, a_u128Value) \ 603 do { IEM_LIVENESS_GPR_CLOBBER(a_iGRegLo); IEM_LIVENESS_GPR_CLOBBER(a_iGRegHi); } while(0) 604 #define IEM_MC_CLEAR_HIGH_GREG_U64(a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) /** @todo This isn't always the case... */ 605 606 #define IEM_MC_STORE_SREG_BASE_U64(a_iSReg, a_u64Value) IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSReg) 607 #define IEM_MC_STORE_SREG_BASE_U32(a_iSReg, a_u32Value) IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSReg) 608 #define IEM_MC_STORE_FPUREG_R80_SRC_REF(a_iSt, a_pr80Src) NOP() 609 610 611 #define IEM_MC_REF_GREG_U16(a_pu16Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 612 #define IEM_MC_REF_GREG_U16_CONST(a_pu16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg) 613 #define IEM_MC_REF_GREG_U32(a_pu32Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 614 #define IEM_MC_REF_GREG_U32_CONST(a_pu32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg) 615 #define IEM_MC_REF_GREG_I32(a_pi32Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 616 #define IEM_MC_REF_GREG_I32_CONST(a_pi32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg) 617 #define IEM_MC_REF_GREG_U64(a_pu64Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 618 #define IEM_MC_REF_GREG_U64_CONST(a_pu64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg) 619 #define IEM_MC_REF_GREG_I64(a_pi64Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 620 #define IEM_MC_REF_GREG_I64_CONST(a_pi64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg) 621 #define IEM_MC_REF_EFLAGS(a_pEFlags) IEM_LIVENESS_ALL_EFLAGS_MODIFY() 622 #undef IEM_MC_REF_EFLAGS /* unused */ 623 #define IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, a_fEfl, a_Member) \ 624 if ((a_fEflInput) & (a_fEfl)) { \ 625 if ((a_fEflOutput) & (a_fEfl)) IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Member); \ 626 else IEM_LIVENESS_ONE_EFLAG_INPUT(a_Member); \ 627 } else if ((a_fEflOutput) & (a_fEfl)) IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Member) 628 #define IEM_MC_REF_EFLAGS_EX(a_pEFlags, a_fEflInput, a_fEflOutput) do { \ 629 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \ 630 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \ 631 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \ 632 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \ 633 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \ 634 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \ 635 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \ 636 Assert(!( ((a_fEflInput) | (a_fEflOutput)) \ 637 & ~(uint32_t)(X86_EFL_STATUS_BITS | X86_EFL_DF | X86_EFL_VM | X86_EFL_VIF | X86_EFL_IOPL))); \ 638 } while (0) 639 #define IEM_MC_ASSERT_EFLAGS(a_fEflInput, a_fEflOutput) NOP() 640 641 642 #define IEM_MC_ADD_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 643 #define IEM_MC_ADD_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 644 #define IEM_MC_ADD_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 645 646 #define IEM_MC_SUB_GREG_U16(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 647 #define IEM_MC_SUB_GREG_U32(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 648 #define IEM_MC_SUB_GREG_U64(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 649 #define IEM_MC_SUB_LOCAL_U16(a_u16Value, a_u16Const) NOP() 650 651 #define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 652 #define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 653 #define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 654 #define IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(a_EffAddr, a_i16) NOP() 655 #define IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(a_EffAddr, a_i32) NOP() 656 #define IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(a_EffAddr, a_i64) NOP() 657 658 #define IEM_MC_AND_LOCAL_U8(a_u8Local, a_u8Mask) NOP() 659 #define IEM_MC_AND_LOCAL_U16(a_u16Local, a_u16Mask) NOP() 660 #define IEM_MC_AND_LOCAL_U32(a_u32Local, a_u32Mask) NOP() 661 #define IEM_MC_AND_LOCAL_U64(a_u64Local, a_u64Mask) NOP() 662 663 #define IEM_MC_AND_ARG_U16(a_u16Arg, a_u16Mask) NOP() 664 #define IEM_MC_AND_ARG_U32(a_u32Arg, a_u32Mask) NOP() 665 #define IEM_MC_AND_ARG_U64(a_u64Arg, a_u64Mask) NOP() 666 667 #define IEM_MC_OR_LOCAL_U8(a_u8Local, a_u8Mask) NOP() 668 #define IEM_MC_OR_LOCAL_U16(a_u16Local, a_u16Mask) NOP() 669 #define IEM_MC_OR_LOCAL_U32(a_u32Local, a_u32Mask) NOP() 670 671 #define IEM_MC_SAR_LOCAL_S16(a_i16Local, a_cShift) NOP() 672 #define IEM_MC_SAR_LOCAL_S32(a_i32Local, a_cShift) NOP() 673 #define IEM_MC_SAR_LOCAL_S64(a_i64Local, a_cShift) NOP() 674 675 #define IEM_MC_SHR_LOCAL_U8(a_u8Local, a_cShift) NOP() 676 677 #define IEM_MC_SHL_LOCAL_S16(a_i16Local, a_cShift) NOP() 678 #define IEM_MC_SHL_LOCAL_S32(a_i32Local, a_cShift) NOP() 679 #define IEM_MC_SHL_LOCAL_S64(a_i64Local, a_cShift) NOP() 680 681 #define IEM_MC_AND_2LOCS_U32(a_u32Local, a_u32Mask) NOP() 682 683 #define IEM_MC_OR_2LOCS_U32(a_u32Local, a_u32Mask) NOP() 684 685 #define IEM_MC_AND_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 686 #define IEM_MC_AND_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 687 #define IEM_MC_AND_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 688 689 #define IEM_MC_OR_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 690 #define IEM_MC_OR_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 691 #define IEM_MC_OR_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg) 692 693 #define IEM_MC_BSWAP_LOCAL_U16(a_u16Local) NOP() 694 #define IEM_MC_BSWAP_LOCAL_U32(a_u32Local) NOP() 695 #define IEM_MC_BSWAP_LOCAL_U64(a_u64Local) NOP() 696 697 #define IEM_MC_SET_EFL_BIT(a_fBit) do { \ 698 if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \ 699 else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); \ 700 else { AssertFailed(); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \ 701 } while (0) 702 #define IEM_MC_CLEAR_EFL_BIT(a_fBit) do { \ 703 if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \ 704 else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); \ 705 else { AssertFailed(); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \ 706 } while (0) 707 #define IEM_MC_FLIP_EFL_BIT(a_fBit) do { \ 708 if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_MODIFY(fEflCf); \ 709 else { AssertFailed(); IEM_LIVENESS_ALL_EFLAGS_MODIFY(); } \ 710 } while (0) 711 712 #define IEM_MC_CLEAR_FSW_EX() IEM_LIVENESS_FCW_MODIFY() 713 #define IEM_MC_FPU_TO_MMX_MODE() IEM_LIVENESS_FCW_MODIFY() 714 #define IEM_MC_FPU_FROM_MMX_MODE() IEM_LIVENESS_FCW_MODIFY() 715 716 #define IEM_MC_FETCH_MREG_U64(a_u64Value, a_iMReg) NOP() 717 #define IEM_MC_FETCH_MREG_U32(a_u32Value, a_iMReg, a_iDWord) NOP() 718 #define IEM_MC_FETCH_MREG_U16(a_u16Value, a_iMReg, a_iWord) NOP() 719 #define IEM_MC_FETCH_MREG_U8(a_u8Value, a_iMReg, a_iByte) NOP() 720 #define IEM_MC_STORE_MREG_U64(a_iMReg, a_u64Value) NOP() 721 #define IEM_MC_STORE_MREG_U32(a_iMReg, a_iDword, a_u32Value) NOP() 722 #define IEM_MC_STORE_MREG_U16(a_iMReg, a_iWord, a_u16Value) NOP() 723 #define IEM_MC_STORE_MREG_U8(a_iMReg, a_iByte, a_u8Value) NOP() 724 #define IEM_MC_STORE_MREG_U32_ZX_U64(a_iMReg, a_u32Value) NOP() 725 #define IEM_MC_REF_MREG_U64(a_pu64Dst, a_iMReg) NOP() 726 #define IEM_MC_REF_MREG_U64_CONST(a_pu64Dst, a_iMReg) NOP() 727 #define IEM_MC_REF_MREG_U32_CONST(a_pu32Dst, a_iMReg) NOP() 728 #define IEM_MC_MODIFIED_MREG(a_iMReg) NOP() 729 #define IEM_MC_MODIFIED_MREG_BY_REF(a_pu64Dst) NOP() 730 731 #define IEM_MC_CLEAR_XREG_U32_MASK(a_iXReg, a_bMask) NOP() 732 #define IEM_MC_FETCH_XREG_U128(a_u128Value, a_iXReg) NOP() 733 #define IEM_MC_FETCH_XREG_XMM(a_XmmValue, a_iXReg) NOP() 734 #define IEM_MC_FETCH_XREG_U64(a_u64Value, a_iXReg, a_iQWord) NOP() 735 #define IEM_MC_FETCH_XREG_R64(a_r64Value, a_iXReg, a_iQWord) NOP() 736 #define IEM_MC_FETCH_XREG_U32(a_u32Value, a_iXReg, a_iDWord) NOP() 737 #define IEM_MC_FETCH_XREG_R32(a_r32Value, a_iXReg, a_iDWord) NOP() 738 #define IEM_MC_FETCH_XREG_U16(a_u16Value, a_iXReg, a_iWord) NOP() 739 #define IEM_MC_FETCH_XREG_U8( a_u8Value, a_iXReg, a_iByte) NOP() 740 #define IEM_MC_FETCH_XREG_PAIR_U128(a_Dst, a_iXReg1, a_iXReg2) NOP() 741 #define IEM_MC_FETCH_XREG_PAIR_XMM(a_Dst, a_iXReg1, a_iXReg2) NOP() 742 #define IEM_MC_FETCH_XREG_PAIR_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iXReg2) \ 743 do { IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0) 744 #define IEM_MC_FETCH_XREG_PAIR_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iXReg2) \ 745 do { IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0) 746 #define IEM_MC_STORE_XREG_U128(a_iXReg, a_u128Value) NOP() 747 #define IEM_MC_STORE_XREG_XMM(a_iXReg, a_XmmValue) NOP() 748 #define IEM_MC_STORE_XREG_XMM_U32(a_iXReg, a_iDword, a_XmmValue) NOP() 749 #define IEM_MC_STORE_XREG_XMM_U64(a_iXReg, a_iQword, a_XmmValue) NOP() 750 #define IEM_MC_STORE_XREG_U64(a_iXReg, a_iQword, a_u64Value) NOP() 751 #define IEM_MC_STORE_XREG_U32(a_iXReg, a_iDword, a_u32Value) NOP() 752 #define IEM_MC_STORE_XREG_U16(a_iXReg, a_iWord, a_u16Value) NOP() 753 #define IEM_MC_STORE_XREG_U8(a_iXReg, a_iByte, a_u8Value) NOP() 754 #define IEM_MC_STORE_XREG_U64_ZX_U128(a_iXReg, a_u64Value) NOP() 755 #define IEM_MC_STORE_XREG_U32_U128(a_iXReg, a_iDwDst, a_u128Value, a_iDwSrc) NOP() 756 #define IEM_MC_STORE_XREG_R32(a_iXReg, a_r32Value) NOP() 757 #define IEM_MC_STORE_XREG_R64(a_iXReg, a_r64Value) NOP() 758 #define IEM_MC_STORE_XREG_U32_ZX_U128(a_iXReg, a_u32Value) NOP() 759 760 #define IEM_MC_BROADCAST_XREG_U8_ZX_VLMAX(a_iXRegDst, a_u8Src) NOP() 761 #define IEM_MC_BROADCAST_XREG_U16_ZX_VLMAX(a_iXRegDst, a_u16Src) NOP() 762 #define IEM_MC_BROADCAST_XREG_U32_ZX_VLMAX(a_iXRegDst, a_u32Src) NOP() 763 #define IEM_MC_BROADCAST_XREG_U64_ZX_VLMAX(a_iXRegDst, a_u64Src) NOP() 764 765 #define IEM_MC_REF_XREG_U128(a_pu128Dst, a_iXReg) NOP() 766 #define IEM_MC_REF_XREG_XMM(a_puXmmDst, a_iXReg) NOP() 767 #define IEM_MC_REF_XREG_U128_CONST(a_pu128Dst, a_iXReg) NOP() 768 #define IEM_MC_REF_XREG_XMM_CONST(a_pXmmDst, a_iXReg) NOP() 769 #define IEM_MC_REF_XREG_U32_CONST(a_pu32Dst, a_iXReg) NOP() 770 #define IEM_MC_REF_XREG_U64_CONST(a_pu64Dst, a_iXReg) NOP() 771 #define IEM_MC_REF_XREG_R32_CONST(a_pr32Dst, a_iXReg) NOP() 772 #define IEM_MC_REF_XREG_R64_CONST(a_pr64Dst, a_iXReg) NOP() 773 #define IEM_MC_COPY_XREG_U128(a_iXRegDst, a_iXRegSrc) NOP() 774 775 #define IEM_MC_FETCH_YREG_U32(a_u32Dst, a_iYRegSrc) NOP() 776 #define IEM_MC_FETCH_YREG_U64(a_u64Dst, a_iYRegSrc, a_iQWord) NOP() 777 #define IEM_MC_FETCH_YREG_U128(a_u128Dst, a_iYRegSrc, a_iDQWord) NOP() 778 #define IEM_MC_FETCH_YREG_U256(a_u256Dst, a_iYRegSrc) NOP() 779 #define IEM_MC_FETCH_YREG_YMM(a_uYmmDst, a_iYRegSrc) NOP() 780 781 #define IEM_MC_STORE_YREG_U128(a_iYRegDst, a_iDQword, a_u128Value) NOP() 782 783 #define IEM_MC_INT_CLEAR_ZMM_256_UP(a_iXRegDst) NOP() 784 #define IEM_MC_STORE_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Src) NOP() 785 #define IEM_MC_STORE_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Src) NOP() 786 #define IEM_MC_STORE_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Src) NOP() 787 #define IEM_MC_STORE_YREG_U256_ZX_VLMAX(a_iYRegDst, a_u256Src) NOP() 788 #define IEM_MC_STORE_YREG_YMM_ZX_VLMAX(a_iYRegDst, a_uYmmSrc) NOP() 789 790 #define IEM_MC_STORE_YREG_U32_U256(a_iYRegDst, a_iDwDst, a_u256Value, a_iDwSrc) NOP() 791 #define IEM_MC_STORE_YREG_U64_U256(a_iYRegDst, a_iQwDst, a_u256Value, a_iQwSrc) NOP() 792 #define IEM_MC_STORE_YREG_U64(a_iYRegDst, a_iQword, a_u64Value) NOP() 793 794 #define IEM_MC_BROADCAST_YREG_U8_ZX_VLMAX(a_iYRegDst, a_u8Src) NOP() 795 #define IEM_MC_BROADCAST_YREG_U16_ZX_VLMAX(a_iYRegDst, a_u16Src) NOP() 796 #define IEM_MC_BROADCAST_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Src) NOP() 797 #define IEM_MC_BROADCAST_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Src) NOP() 798 #define IEM_MC_BROADCAST_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Src) NOP() 799 800 #define IEM_MC_REF_YREG_U128(a_pu128Dst, a_iYReg) NOP() 801 #define IEM_MC_REF_YREG_U128_CONST(a_pu128Dst, a_iYReg) NOP() 802 #define IEM_MC_REF_YREG_U64_CONST(a_pu64Dst, a_iYReg) NOP() 803 #define IEM_MC_CLEAR_YREG_128_UP(a_iYReg) NOP() 804 805 #define IEM_MC_COPY_YREG_U256_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP() 806 #define IEM_MC_COPY_YREG_U128_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP() 807 #define IEM_MC_COPY_YREG_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP() 808 809 #define IEM_MC_MERGE_YREG_U32_U96_ZX_VLMAX(a_iYRegDst, a_iYRegSrc32, a_iYRegSrcHx) NOP() 810 #define IEM_MC_MERGE_YREG_U64_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP() 811 #define IEM_MC_MERGE_YREG_U64LO_U64LO_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP() 812 #define IEM_MC_MERGE_YREG_U64HI_U64HI_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP() 813 #define IEM_MC_MERGE_YREG_U64LO_U64LOCAL_ZX_VLMAX(a_iYRegDst, a_iYRegSrcHx, a_u64Local) NOP() 814 #define IEM_MC_MERGE_YREG_U64LOCAL_U64HI_ZX_VLMAX(a_iYRegDst, a_u64Local, a_iYRegSrcHx) NOP() 815 816 #define IEM_MC_CLEAR_ZREG_256_UP(a_iYReg) NOP() 817 818 #define IEM_MC_FETCH_MEM_U8(a_u8Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 819 #define IEM_MC_FETCH_MEM16_U8(a_u8Dst, a_iSeg, a_GCPtrMem16) IEM_LIVENESS_MEM(a_iSeg) 820 #define IEM_MC_FETCH_MEM32_U8(a_u8Dst, a_iSeg, a_GCPtrMem32) IEM_LIVENESS_MEM(a_iSeg) 821 822 #define IEM_MC_FETCH_MEM_FLAT_U8(a_u8Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 823 #define IEM_MC_FETCH_MEM16_FLAT_U8(a_u8Dst, a_GCPtrMem16) IEM_LIVENESS_MEM_FLAT() 824 #define IEM_MC_FETCH_MEM32_FLAT_U8(a_u8Dst, a_GCPtrMem32) IEM_LIVENESS_MEM_FLAT() 825 826 #define IEM_MC_FETCH_MEM_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 827 #define IEM_MC_FETCH_MEM_U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg) 828 #define IEM_MC_FETCH_MEM_I16(a_i16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 829 #define IEM_MC_FETCH_MEM_I16_DISP(a_i16Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg) 830 831 #define IEM_MC_FETCH_MEM_FLAT_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 832 #define IEM_MC_FETCH_MEM_FLAT_U16_DISP(a_u16Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT() 833 #define IEM_MC_FETCH_MEM_FLAT_I16(a_i16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 834 #define IEM_MC_FETCH_MEM_FLAT_I16_DISP(a_i16Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT() 835 836 #define IEM_MC_FETCH_MEM_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 837 #define IEM_MC_FETCH_MEM_U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg) 838 #define IEM_MC_FETCH_MEM_I32(a_i32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 839 #define IEM_MC_FETCH_MEM_I32_DISP(a_i32Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg) 840 841 #define IEM_MC_FETCH_MEM_FLAT_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 842 #define IEM_MC_FETCH_MEM_FLAT_U32_DISP(a_u32Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT() 843 #define IEM_MC_FETCH_MEM_FLAT_I32(a_i32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 844 #define IEM_MC_FETCH_MEM_FLAT_I32_DISP(a_i32Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT() 845 846 #define IEM_MC_FETCH_MEM_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 847 #define IEM_MC_FETCH_MEM_U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg) 848 #define IEM_MC_FETCH_MEM_U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 849 #define IEM_MC_FETCH_MEM_I64(a_i64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 850 851 #define IEM_MC_FETCH_MEM_FLAT_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 852 #define IEM_MC_FETCH_MEM_FLAT_U64_DISP(a_u64Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT() 853 #define IEM_MC_FETCH_MEM_FLAT_U64_ALIGN_U128(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 854 #define IEM_MC_FETCH_MEM_FLAT_I64(a_i64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 855 856 #define IEM_MC_FETCH_MEM_R32(a_r32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 857 #define IEM_MC_FETCH_MEM_R64(a_r64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 858 #define IEM_MC_FETCH_MEM_R80(a_r80Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 859 #define IEM_MC_FETCH_MEM_D80(a_d80Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 860 861 #define IEM_MC_FETCH_MEM_FLAT_R32(a_r32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 862 #define IEM_MC_FETCH_MEM_FLAT_R64(a_r64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 863 #define IEM_MC_FETCH_MEM_FLAT_R80(a_r80Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 864 #define IEM_MC_FETCH_MEM_FLAT_D80(a_d80Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 865 866 #define IEM_MC_FETCH_MEM_U128(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 867 #define IEM_MC_FETCH_MEM_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 868 #define IEM_MC_FETCH_MEM_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 869 870 #define IEM_MC_FETCH_MEM_XMM(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 871 #define IEM_MC_FETCH_MEM_XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 872 #define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 873 874 #define IEM_MC_FETCH_MEM_FLAT_U128(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 875 #define IEM_MC_FETCH_MEM_FLAT_U128_NO_AC(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 876 #define IEM_MC_FETCH_MEM_FLAT_U128_ALIGN_SSE(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 877 878 #define IEM_MC_FETCH_MEM_FLAT_XMM(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 879 #define IEM_MC_FETCH_MEM_FLAT_XMM_NO_AC(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 880 #define IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 881 882 #define IEM_MC_FETCH_MEM_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg) 883 #define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT() 884 885 #define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg) 886 #define IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT() 887 #define IEM_MC_FETCH_MEM_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg) 888 #define IEM_MC_FETCH_MEM_FLAT_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT() 889 #define IEM_MC_FETCH_MEM_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg) 890 #define IEM_MC_FETCH_MEM_FLAT_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT() 891 892 #define IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 893 do { IEM_LIVENESS_MEM(a_iSeg2); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0) 894 #define IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 895 do { IEM_LIVENESS_MEM(a_iSeg2); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0) 896 897 #define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_GCPtrMem2) \ 898 do { IEM_LIVENESS_MEM_FLAT(); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0) 899 #define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_GCPtrMem2) \ 900 do { IEM_LIVENESS_MEM_FLAT(); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0) 901 902 903 #define IEM_MC_FETCH_MEM_U256(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 904 #define IEM_MC_FETCH_MEM_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 905 #define IEM_MC_FETCH_MEM_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 906 907 #define IEM_MC_FETCH_MEM_YMM(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 908 #define IEM_MC_FETCH_MEM_YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 909 #define IEM_MC_FETCH_MEM_YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 910 911 #define IEM_MC_FETCH_MEM_FLAT_U256(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 912 #define IEM_MC_FETCH_MEM_FLAT_U256_NO_AC(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 913 #define IEM_MC_FETCH_MEM_FLAT_U256_ALIGN_AVX(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 914 915 #define IEM_MC_FETCH_MEM_FLAT_YMM(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 916 #define IEM_MC_FETCH_MEM_FLAT_YMM_NO_AC(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 917 #define IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 918 919 #define IEM_MC_FETCH_MEM_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 920 #define IEM_MC_FETCH_MEM_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 921 #define IEM_MC_FETCH_MEM_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 922 #define IEM_MC_FETCH_MEM_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 923 #define IEM_MC_FETCH_MEM_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 924 #define IEM_MC_FETCH_MEM_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 925 926 #define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 927 #define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 928 #define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 929 #define IEM_MC_FETCH_MEM_FLAT_U16_ZX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 930 #define IEM_MC_FETCH_MEM_FLAT_U16_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 931 #define IEM_MC_FETCH_MEM_FLAT_U32_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 932 933 #define IEM_MC_FETCH_MEM_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 934 #define IEM_MC_FETCH_MEM_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 935 #define IEM_MC_FETCH_MEM_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 936 #define IEM_MC_FETCH_MEM_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 937 #define IEM_MC_FETCH_MEM_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 938 #define IEM_MC_FETCH_MEM_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 939 940 #define IEM_MC_FETCH_MEM_FLAT_U8_SX_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 941 #define IEM_MC_FETCH_MEM_FLAT_U8_SX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 942 #define IEM_MC_FETCH_MEM_FLAT_U8_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 943 #define IEM_MC_FETCH_MEM_FLAT_U16_SX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 944 #define IEM_MC_FETCH_MEM_FLAT_U16_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 945 #define IEM_MC_FETCH_MEM_FLAT_U32_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 946 947 #define IEM_MC_STORE_MEM_U8(a_iSeg, a_GCPtrMem, a_u8Value) IEM_LIVENESS_MEM(a_iSeg) 948 #define IEM_MC_STORE_MEM_U16(a_iSeg, a_GCPtrMem, a_u16Value) IEM_LIVENESS_MEM(a_iSeg) 949 #define IEM_MC_STORE_MEM_U32(a_iSeg, a_GCPtrMem, a_u32Value) IEM_LIVENESS_MEM(a_iSeg) 950 #define IEM_MC_STORE_MEM_U64(a_iSeg, a_GCPtrMem, a_u64Value) IEM_LIVENESS_MEM(a_iSeg) 951 952 #define IEM_MC_STORE_MEM_FLAT_U8(a_GCPtrMem, a_u8Value) IEM_LIVENESS_MEM_FLAT() 953 #define IEM_MC_STORE_MEM_FLAT_U16(a_GCPtrMem, a_u16Value) IEM_LIVENESS_MEM_FLAT() 954 #define IEM_MC_STORE_MEM_FLAT_U32(a_GCPtrMem, a_u32Value) IEM_LIVENESS_MEM_FLAT() 955 #define IEM_MC_STORE_MEM_FLAT_U64(a_GCPtrMem, a_u64Value) IEM_LIVENESS_MEM_FLAT() 956 957 #define IEM_MC_STORE_MEM_U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) IEM_LIVENESS_MEM(a_iSeg) 958 #define IEM_MC_STORE_MEM_U16_CONST(a_iSeg, a_GCPtrMem, a_u16C) IEM_LIVENESS_MEM(a_iSeg) 959 #define IEM_MC_STORE_MEM_U32_CONST(a_iSeg, a_GCPtrMem, a_u32C) IEM_LIVENESS_MEM(a_iSeg) 960 #define IEM_MC_STORE_MEM_U64_CONST(a_iSeg, a_GCPtrMem, a_u64C) IEM_LIVENESS_MEM(a_iSeg) 961 962 #define IEM_MC_STORE_MEM_FLAT_U8_CONST(a_GCPtrMem, a_u8C) IEM_LIVENESS_MEM_FLAT() 963 #define IEM_MC_STORE_MEM_FLAT_U16_CONST(a_GCPtrMem, a_u16C) IEM_LIVENESS_MEM_FLAT() 964 #define IEM_MC_STORE_MEM_FLAT_U32_CONST(a_GCPtrMem, a_u32C) IEM_LIVENESS_MEM_FLAT() 965 #define IEM_MC_STORE_MEM_FLAT_U64_CONST(a_GCPtrMem, a_u64C) IEM_LIVENESS_MEM_FLAT() 966 967 #define IEM_MC_STORE_MEM_I8_CONST_BY_REF( a_pi8Dst, a_i8C) NOP() 968 #define IEM_MC_STORE_MEM_I16_CONST_BY_REF(a_pi16Dst, a_i16C) NOP() 969 #define IEM_MC_STORE_MEM_I32_CONST_BY_REF(a_pi32Dst, a_i32C) NOP() 970 #define IEM_MC_STORE_MEM_I64_CONST_BY_REF(a_pi64Dst, a_i64C) NOP() 971 #define IEM_MC_STORE_MEM_NEG_QNAN_R32_BY_REF(a_pr32Dst) NOP() 972 #define IEM_MC_STORE_MEM_NEG_QNAN_R64_BY_REF(a_pr64Dst) NOP() 973 #define IEM_MC_STORE_MEM_NEG_QNAN_R80_BY_REF(a_pr80Dst) NOP() 974 #define IEM_MC_STORE_MEM_INDEF_D80_BY_REF(a_pd80Dst) NOP() 975 976 #define IEM_MC_STORE_MEM_U128(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg) 977 #define IEM_MC_STORE_MEM_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg) 978 #define IEM_MC_STORE_MEM_U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg) 979 980 #define IEM_MC_STORE_MEM_FLAT_U128(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT() 981 #define IEM_MC_STORE_MEM_FLAT_U128_ALIGN_SSE(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT() 982 #define IEM_MC_STORE_MEM_FLAT_U128_NO_AC(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT() 983 984 #define IEM_MC_STORE_MEM_U256(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg) 985 #define IEM_MC_STORE_MEM_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg) 986 #define IEM_MC_STORE_MEM_U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg) 987 988 #define IEM_MC_STORE_MEM_FLAT_U256(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT() 989 #define IEM_MC_STORE_MEM_FLAT_U256_ALIGN_AVX(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT() 990 #define IEM_MC_STORE_MEM_FLAT_U256_NO_AC(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT() 991 992 #define IEM_MC_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK() 993 #define IEM_MC_PUSH_U32(a_u32Value) IEM_LIVENESS_STACK() 994 #define IEM_MC_PUSH_U32_SREG(a_uSegVal) IEM_LIVENESS_STACK() 995 #define IEM_MC_PUSH_U64(a_u64Value) IEM_LIVENESS_STACK() 996 997 #define IEM_MC_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0) 998 #define IEM_MC_POP_GREG_U32(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0) 999 #define IEM_MC_POP_GREG_U64(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0) 1000 1001 /* 32-bit flat stack push and pop: */ 1002 #define IEM_MC_FLAT32_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK_FLAT() 1003 #define IEM_MC_FLAT32_PUSH_U32(a_u32Value) IEM_LIVENESS_STACK_FLAT() 1004 #define IEM_MC_FLAT32_PUSH_U32_SREG(a_uSegVal) IEM_LIVENESS_STACK_FLAT() 1005 1006 #define IEM_MC_FLAT32_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0) 1007 #define IEM_MC_FLAT32_POP_GREG_U32(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0) 1008 1009 /* 64-bit flat stack push and pop: */ 1010 #define IEM_MC_FLAT64_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK_FLAT() 1011 #define IEM_MC_FLAT64_PUSH_U64(a_u64Value) IEM_LIVENESS_STACK_FLAT() 1012 1013 #define IEM_MC_FLAT64_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0) 1014 #define IEM_MC_FLAT64_POP_GREG_U64(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0) 1015 1016 1017 #define IEM_MC_MEM_MAP_U8_ATOMIC(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1018 #define IEM_MC_MEM_MAP_U8_RW(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1019 #define IEM_MC_MEM_MAP_U8_WO(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1020 #define IEM_MC_MEM_MAP_U8_RO(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1021 #define IEM_MC_MEM_FLAT_MAP_U8_ATOMIC(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1022 #define IEM_MC_MEM_FLAT_MAP_U8_RW(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1023 #define IEM_MC_MEM_FLAT_MAP_U8_WO(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1024 #define IEM_MC_MEM_FLAT_MAP_U8_RO(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1025 #define IEM_MC_MEM_MAP_U16_ATOMIC(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1026 #define IEM_MC_MEM_MAP_U16_RW(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1027 #define IEM_MC_MEM_MAP_U16_WO(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1028 #define IEM_MC_MEM_MAP_U16_RO(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1029 #define IEM_MC_MEM_FLAT_MAP_U16_ATOMIC(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1030 #define IEM_MC_MEM_FLAT_MAP_U16_RW(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1031 #define IEM_MC_MEM_FLAT_MAP_U16_WO(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1032 #define IEM_MC_MEM_FLAT_MAP_U16_RO(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1033 #define IEM_MC_MEM_MAP_I16_WO(a_pi16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1034 #define IEM_MC_MEM_FLAT_MAP_I16_WO(a_pi16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1035 #define IEM_MC_MEM_MAP_U32_ATOMIC(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1036 #define IEM_MC_MEM_MAP_U32_RW(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1037 #define IEM_MC_MEM_MAP_U32_WO(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1038 #define IEM_MC_MEM_MAP_U32_RO(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1039 #define IEM_MC_MEM_FLAT_MAP_U32_ATOMIC(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1040 #define IEM_MC_MEM_FLAT_MAP_U32_RW(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1041 #define IEM_MC_MEM_FLAT_MAP_U32_WO(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1042 #define IEM_MC_MEM_FLAT_MAP_U32_RO(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1043 #define IEM_MC_MEM_MAP_I32_WO(a_pi32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1044 #define IEM_MC_MEM_FLAT_MAP_I32_WO(a_pi32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1045 #define IEM_MC_MEM_MAP_R32_WO(a_pr32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1046 #define IEM_MC_MEM_FLAT_MAP_R32_WO(a_pr32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1047 #define IEM_MC_MEM_MAP_U64_ATOMIC(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1048 #define IEM_MC_MEM_MAP_U64_RW(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1049 #define IEM_MC_MEM_MAP_U64_WO(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1050 #define IEM_MC_MEM_MAP_U64_RO(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1051 #define IEM_MC_MEM_FLAT_MAP_U64_ATOMIC(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1052 #define IEM_MC_MEM_FLAT_MAP_U64_RW(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1053 #define IEM_MC_MEM_FLAT_MAP_U64_WO(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1054 #define IEM_MC_MEM_FLAT_MAP_U64_RO(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1055 #define IEM_MC_MEM_MAP_I64_WO(a_pi64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1056 #define IEM_MC_MEM_FLAT_MAP_I64_WO(a_pi64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1057 #define IEM_MC_MEM_MAP_R64_WO(a_pr64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1058 #define IEM_MC_MEM_FLAT_MAP_R64_WO(a_pr64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1059 #define IEM_MC_MEM_MAP_U128_ATOMIC(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1060 #define IEM_MC_MEM_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1061 #define IEM_MC_MEM_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1062 #define IEM_MC_MEM_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1063 #define IEM_MC_MEM_FLAT_MAP_U128_ATOMIC(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1064 #define IEM_MC_MEM_FLAT_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1065 #define IEM_MC_MEM_FLAT_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1066 #define IEM_MC_MEM_FLAT_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1067 #define IEM_MC_MEM_MAP_R80_WO(a_pr80Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1068 #define IEM_MC_MEM_FLAT_MAP_R80_WO(a_pr80Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1069 #define IEM_MC_MEM_MAP_D80_WO(a_pd80Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg) 1070 #define IEM_MC_MEM_FLAT_MAP_D80_WO(a_pd80Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 1071 1072 1073 #define IEM_MC_MEM_COMMIT_AND_UNMAP_RW(a_bMapInfo) NOP() 1074 #define IEM_MC_MEM_COMMIT_AND_UNMAP_ATOMIC(a_bMapInfo) NOP() 1075 #define IEM_MC_MEM_COMMIT_AND_UNMAP_WO(a_bMapInfo) NOP() 1076 #define IEM_MC_MEM_COMMIT_AND_UNMAP_RO(a_bMapInfo) NOP() 1077 #define IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(a_bMapInfo, a_u16FSW) NOP() 1078 #define IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(a_bMapInfo) NOP() 1079 1080 #define IEM_MC_NATIVE_IF(a_fSupportedHosts) { 1081 #define IEM_MC_NATIVE_ELSE() } { 1082 #define IEM_MC_NATIVE_ENDIF() } ((void)0) 1083 1084 #define IEM_MC_NATIVE_EMIT_0(a_fnEmitter) 1085 #define IEM_MC_NATIVE_EMIT_1(a_fnEmitter, a0) NOP() 1086 #define IEM_MC_NATIVE_EMIT_2(a_fnEmitter, a0, a1) NOP() 1087 #define IEM_MC_NATIVE_EMIT_2_EX(a_fnEmitter, a0, a1) NOP() 1088 #define IEM_MC_NATIVE_EMIT_3(a_fnEmitter, a0, a1, a2) NOP() 1089 #define IEM_MC_NATIVE_EMIT_4(a_fnEmitter, a0, a1, a2, a3) NOP() 1090 #define IEM_MC_NATIVE_EMIT_5(a_fnEmitter, a0, a1, a2, a3, a4) NOP() 1091 #define IEM_MC_NATIVE_EMIT_6(a_fnEmitter, a0, a1, a2, a3, a4, a5) NOP() 1092 #define IEM_MC_NATIVE_EMIT_7(a_fnEmitter, a0, a1, a2, a3, a4, a5, a6) NOP() 1093 #define IEM_MC_NATIVE_EMIT_8(a_fnEmitter, a0, a1, a2, a3, a4, a5, a6, a7) NOP() 1094 1095 #define IEM_MC_NATIVE_SET_AMD64_HOST_REG_FOR_LOCAL(a_VarNm, a_idxHostReg) NOP() 1096 1097 #define IEM_MC_CALL_VOID_AIMPL_0(a_pfn) NOP() 1098 #define IEM_MC_CALL_VOID_AIMPL_1(a_pfn, a0) NOP() 1099 #define IEM_MC_CALL_VOID_AIMPL_2(a_pfn, a0, a1) NOP() 1100 #define IEM_MC_CALL_VOID_AIMPL_3(a_pfn, a0, a1, a2) NOP() 1101 #define IEM_MC_CALL_VOID_AIMPL_4(a_pfn, a0, a1, a2, a3) NOP() 1102 #define IEM_MC_CALL_AIMPL_3(a_rcType, a_rc, a_pfn, a0, a1, a2) NOP() 1103 #define IEM_MC_CALL_AIMPL_4(a_rcType, a_rc, a_pfn, a0, a1, a2, a3) NOP() 1104 1105 #define IEM_MC_CALL_FPU_AIMPL_1(a_pfnAImpl, a0) NOP() 1106 #define IEM_MC_CALL_FPU_AIMPL_2(a_pfnAImpl, a0, a1) NOP() 1107 #define IEM_MC_CALL_FPU_AIMPL_3(a_pfnAImpl, a0, a1, a2) NOP() 1108 1109 #define IEM_MC_SET_FPU_RESULT(a_FpuData, a_FSW, a_pr80Value) NOP() 1110 1111 #define IEM_MC_PUSH_FPU_RESULT(a_FpuData, a_uFpuOpcode) NOP() 1112 #define IEM_MC_PUSH_FPU_RESULT_MEM_OP(a_FpuData, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP() 1113 #define IEM_MC_PUSH_FPU_RESULT_TWO(a_FpuDataTwo, a_uFpuOpcode) NOP() 1114 1115 #define IEM_MC_STORE_FPU_RESULT(a_FpuData, a_iStReg, a_uFpuOpcode) NOP() 1116 #define IEM_MC_STORE_FPU_RESULT_THEN_POP(a_FpuData, a_iStReg, a_uFpuOpcode) NOP() 1117 #define IEM_MC_STORE_FPU_RESULT_MEM_OP(a_FpuData, a_iStReg, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP() 1118 #define IEM_MC_STORE_FPU_RESULT_WITH_MEM_OP_THEN_POP(a_FpuData, a_iStReg, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP() 1119 1120 #define IEM_MC_UPDATE_FPU_OPCODE_IP(a_uFpuOpcode) NOP() 1121 #define IEM_MC_FPU_STACK_FREE(a_iStReg) NOP() 1122 #define IEM_MC_FPU_STACK_INC_TOP() NOP() 1123 #define IEM_MC_FPU_STACK_DEC_TOP() NOP() 1124 1125 #define IEM_MC_UPDATE_FSW(a_u16FSW, a_uFpuOpcode) NOP() 1126 #define IEM_MC_UPDATE_FSW_CONST(a_u16FSW, a_uFpuOpcode) NOP() 1127 #define IEM_MC_UPDATE_FSW_WITH_MEM_OP(a_u16FSW, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP() 1128 #define IEM_MC_UPDATE_FSW_THEN_POP(a_u16FSW, a_uFpuOpcode) NOP() 1129 #define IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(a_u16FSW, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP() 1130 #define IEM_MC_UPDATE_FSW_THEN_POP_POP(a_u16FSW, a_uFpuOpcode) NOP() 1131 1132 #define IEM_MC_FPU_STACK_UNDERFLOW(a_iStDst, a_uFpuOpcode) NOP() 1133 #define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP(a_iStDst, a_uFpuOpcode) NOP() 1134 #define IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(a_iStDst, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP() 1135 #define IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(a_iStDst, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP() 1136 #define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP_POP(a_uFpuOpcode) NOP() 1137 #define IEM_MC_FPU_STACK_PUSH_UNDERFLOW(a_uFpuOpcode) NOP() 1138 #define IEM_MC_FPU_STACK_PUSH_UNDERFLOW_TWO(a_uFpuOpcode) NOP() 1139 1140 #define IEM_MC_FPU_STACK_PUSH_OVERFLOW(a_uFpuOpcode) NOP() 1141 #define IEM_MC_FPU_STACK_PUSH_OVERFLOW_MEM_OP(a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP() 1142 1143 #define IEM_MC_PREPARE_FPU_USAGE() IEM_LIVENESS_MXCSR_INPUT() /* fxrstor */ 1144 #define IEM_MC_ACTUALIZE_FPU_STATE_FOR_READ() IEM_LIVENESS_MXCSR_INPUT() 1145 #define IEM_MC_ACTUALIZE_FPU_STATE_FOR_CHANGE() IEM_LIVENESS_MXCSR_INPUT() 1146 1147 #define IEM_MC_PREPARE_SSE_USAGE() IEM_LIVENESS_MXCSR_INPUT() 1148 #define IEM_MC_ACTUALIZE_SSE_STATE_FOR_READ() IEM_LIVENESS_MXCSR_INPUT() 1149 #define IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE() IEM_LIVENESS_MXCSR_INPUT() 1150 1151 #define IEM_MC_PREPARE_AVX_USAGE() IEM_LIVENESS_MXCSR_INPUT() 1152 #define IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ() IEM_LIVENESS_MXCSR_INPUT() 1153 #define IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE() IEM_LIVENESS_MXCSR_INPUT() 1154 1155 #define IEM_MC_CALL_MMX_AIMPL_2(a_pfnAImpl, a0, a1) NOP() 1156 #define IEM_MC_CALL_MMX_AIMPL_3(a_pfnAImpl, a0, a1, a2) NOP() 1157 #define IEM_MC_CALL_SSE_AIMPL_2(a_pfnAImpl, a0, a1) IEM_LIVENESS_MXCSR_MODIFY(); IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT() 1158 #define IEM_MC_CALL_SSE_AIMPL_3(a_pfnAImpl, a0, a1, a2) IEM_LIVENESS_MXCSR_MODIFY(); IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT() 1159 #define IEM_MC_CALL_AVX_AIMPL_2(a_pfnAImpl, a0, a1) IEM_LIVENESS_MXCSR_MODIFY(); IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT() 1160 #define IEM_MC_CALL_AVX_AIMPL_3(a_pfnAImpl, a0, a1, a2) IEM_LIVENESS_MXCSR_MODIFY(); IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT() 1161 1162 #define IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit) \ 1163 do { if ( (a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \ 1164 else if ((a_fBit) == X86_EFL_PF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflPf); \ 1165 else if ((a_fBit) == X86_EFL_AF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflAf); \ 1166 else if ((a_fBit) == X86_EFL_ZF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); \ 1167 else if ((a_fBit) == X86_EFL_SF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflSf); \ 1168 else if ((a_fBit) == X86_EFL_OF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOf); \ 1169 else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); /* loadsb and friends */ \ 1170 else { AssertMsgFailed(("#s (%#x)\n", #a_fBit, (a_fBit))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \ 1171 } while (0) 1172 1173 #define IEM_MC_IF_EFL_BIT_SET(a_fBit) IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); { 1174 #define IEM_MC_IF_EFL_BIT_NOT_SET(a_fBit) IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); { 1175 #define IEM_MC_IF_EFL_ANY_BITS_SET(a_fBits) \ 1176 do { if ((a_fBits) == (X86_EFL_CF | X86_EFL_ZF)) \ 1177 { IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); } \ 1178 else { AssertMsgFailed(("#s (%#x)\n", #a_fBits, (a_fBits))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \ 1179 } while (0); { 1180 #define IEM_MC_IF_EFL_NO_BITS_SET(a_fBits) \ 1181 do { if ((a_fBits) == (X86_EFL_CF | X86_EFL_ZF)) \ 1182 { IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); } \ 1183 else { AssertMsgFailed(("#s (%#x)\n", #a_fBits, (a_fBits))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \ 1184 } while (0); { 1185 #define IEM_MC_IF_EFL_BITS_NE(a_fBit1, a_fBit2) \ 1186 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \ 1187 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); { 1188 #define IEM_MC_IF_EFL_BITS_EQ(a_fBit1, a_fBit2) \ 1189 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \ 1190 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); { 1191 #define IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(a_fBit, a_fBit1, a_fBit2) \ 1192 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); \ 1193 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \ 1194 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); { 1195 #define IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ(a_fBit, a_fBit1, a_fBit2) \ 1196 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); \ 1197 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \ 1198 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); { 1199 #define IEM_MC_IF_CX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); { 1200 #define IEM_MC_IF_ECX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); { 1201 #define IEM_MC_IF_RCX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); { 1202 #define IEM_MC_IF_CX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); { 1203 #define IEM_MC_IF_ECX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); { 1204 #define IEM_MC_IF_RCX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); { 1205 #define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \ 1206 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \ 1207 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); { 1208 #define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \ 1209 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \ 1210 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); { 1211 #define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \ 1212 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \ 1213 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); { 1214 #define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \ 1215 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \ 1216 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); { 1217 #define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \ 1218 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \ 1219 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); { 1220 #define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \ 1221 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \ 1222 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); { 1223 #define IEM_MC_IF_LOCAL_IS_Z(a_Local) { 1224 #define IEM_MC_IF_GREG_BIT_SET(a_iGReg, a_iBitNo) IEM_LIVENESS_GPR_INPUT(a_iGReg); { 1225 1226 #define IEM_MC_REF_FPUREG(a_pr80Dst, a_iSt) NOP() 1227 #define IEM_MC_IF_FPUREG_IS_EMPTY(a_iSt) { 1228 #define IEM_MC_IF_FPUREG_NOT_EMPTY(a_iSt) { 1229 #define IEM_MC_IF_FPUREG_NOT_EMPTY_REF_R80(a_pr80Dst, a_iSt) { 1230 #define IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(a_pr80Dst0, a_iSt0, a_pr80Dst1, a_iSt1) { 1231 #define IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(a_pr80Dst0, a_iSt0, a_iSt1) { 1232 #define IEM_MC_IF_FCW_IM() { 1233 1234 #define IEM_MC_ELSE() } /*else*/ { 1235 #define IEM_MC_ENDIF() } do {} while (0) 1236 1237 #define IEM_MC_HINT_FLUSH_GUEST_SHADOW(g_fGstShwFlush) NOP() 1238 1239 1240 /********************************************************************************************************************************* 1241 * The threaded functions. * 1242 *********************************************************************************************************************************/ 29 #include "IEMAllN8veLiveness.h" 1243 30 #include "IEMNativeLiveness.cpp.h" 1244 31 -
trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.h
r105768 r105770 1 1 /* $Id$ */ 2 2 /** @file 3 * IEM - Native Recompiler, Liveness Analysis .3 * IEM - Native Recompiler, Liveness Analysis, Common Header. 4 4 */ 5 5 … … 1237 1237 #define IEM_MC_HINT_FLUSH_GUEST_SHADOW(g_fGstShwFlush) NOP() 1238 1238 1239 1240 /*********************************************************************************************************************************1241 * The threaded functions. *1242 *********************************************************************************************************************************/1243 #include "IEMNativeLiveness.cpp.h"1244
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