Changeset 105793 in vbox for trunk/src/VBox/Disassembler

Timestamp:

Aug 21, 2024 6:38:21 PM (8 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

164505

Message:

Disassembler/ARMv8: Updates, decode br/blr instructions, add them to the testcase, bugref:10394

Location:

trunk/src/VBox/Disassembler

Files:

• DisasmTables-armv8-a64.cpp (modified) (2 diffs)
• testcase/tstDisasmArmv8-1-asm.S (modified) (1 diff)

trunk/src/VBox/Disassembler/DisasmTables-armv8-a64.cpp

@@ -381 +381 @@
 
 
-/* RET/RETAA/RETAB */
-DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Ret)
-    DIS_ARMV8_OP(0xd65f0000, "ret",            OP_ARMV8_A64_RET,        DISOPTYPE_HARMLESS),
-    DIS_ARMV8_OP(0xd65f0800, "retaa",          OP_ARMV8_A64_RETAA,      DISOPTYPE_HARMLESS),
-    DIS_ARMV8_OP(0xd65f0c00, "retab",          OP_ARMV8_A64_RETAB,      DISOPTYPE_HARMLESS),
-DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64Ret, 0xfffffc1f /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT,
+/* BR/BRAA/BRAAZ/BRAB/BRABZ/BLR/BLRAA/BLRAAZ/BLRAB/BLRABZ/RET/RETAA/RETAB */
+DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64BrBlrRet)
+    DIS_ARMV8_OP(0xd61f0000, "br",             OP_ARMV8_A64_BR,         DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
+    DIS_ARMV8_OP(0xd63f0000, "blr",            OP_ARMV8_A64_BLR,        DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
+    /** @todo All the FEAT_PAuth related branch instructions. */
+    DIS_ARMV8_OP(0xd65f0000, "ret",            OP_ARMV8_A64_RET,        DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
+    DIS_ARMV8_OP(0xd65f0800, "retaa",          OP_ARMV8_A64_RETAA,      DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
+    DIS_ARMV8_OP(0xd65f0c00, "retab",          OP_ARMV8_A64_RETAB,      DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
+DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64BrBlrRet, 0xfffffc1f /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT,
                                             kDisArmV8OpcDecodeLookup, 0xfffffc1f, 0,
                                             kDisArmv8OpParmGpr)
@@ -399 +402 @@
 /* Unconditional branch (register) instructions, we divide these instructions further based on the opc field. */
 DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(g_ArmV8A64UncondBrReg)
-    DIS_ARMV8_DECODE_MAP_INVALID_ENTRY,
-    DIS_ARMV8_DECODE_MAP_INVALID_ENTRY,
-    DIS_ARMV8_DECODE_MAP_ENTRY(g_ArmV8A64Ret),    /* RET/RETAA/RETAB */
+    DIS_ARMV8_DECODE_MAP_ENTRY(g_ArmV8A64BrBlrRet),    /* BR/BRAA/BRAAZ/BRAB/BRABZ */
+    DIS_ARMV8_DECODE_MAP_ENTRY(g_ArmV8A64BrBlrRet),    /* BLR/BLRAA/BLRAAZ/BLRAB/BLRABZ */
+    DIS_ARMV8_DECODE_MAP_ENTRY(g_ArmV8A64BrBlrRet),    /* RET/RETAA/RETAB */
     DIS_ARMV8_DECODE_MAP_INVALID_ENTRY,
     DIS_ARMV8_DECODE_MAP_INVALID_ENTRY,

trunk/src/VBox/Disassembler/testcase/tstDisasmArmv8-1-asm.S

@@ -69 +69 @@
         ret x2
         ret x15
+        br  x15
+        blr x15
 
         ; System register access instructions