VirtualBox

Changeset 105855 in vbox


Ignore:
Timestamp:
Aug 23, 2024 11:12:23 PM (3 months ago)
Author:
vboxsync
Message:

VMM/IEM: Don't update PC during IEM_MC_REL_JMP_S[8|32]_AND_FINISH if we can avoid it. This extends the offPc to 64-bit and tries to make the stats more accurate. This is more on todo 4 in bugref:10720. bugref:10373

Location:
trunk/src/VBox/VMM
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h

    r105854 r105855  
    579579#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
    580580    pReNative->Core.offPc += cbInstr;
    581     Log4(("offPc=%x cbInstr=%#x off=%#x\n", pReNative->Core.offPc, cbInstr, off));
     581    Log4(("offPc=%#RX64 cbInstr=%#x off=%#x\n", pReNative->Core.offPc, cbInstr, off));
    582582# ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING_DEBUG
    583583    off = iemNativeEmitPcDebugAdd(pReNative, off, cbInstr, 64);
    … …  
    586586    off = iemNativePcAdjustCheck(pReNative, off);
    587587# endif
    588 # if defined(IEMNATIVE_WITH_TB_DEBUG_INFO) || defined(VBOX_WITH_STATISTICS)
    589588    STAM_COUNTER_INC(&pReNative->pVCpu->iem.s.StatNativePcUpdateTotal);
    590     pReNative->Core.cInstrPcUpdateSkipped++;
    591 # endif
    592589#endif
    593590
    … …  
    628625#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
    629626    pReNative->Core.offPc += cbInstr;
    630     Log4(("offPc=%x cbInstr=%#x off=%#x\n", pReNative->Core.offPc, cbInstr, off));
     627    Log4(("offPc=%#RX64 cbInstr=%#x off=%#x\n", pReNative->Core.offPc, cbInstr, off));
    631628# ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING_DEBUG
    632629    off = iemNativeEmitPcDebugAdd(pReNative, off, cbInstr, 32);
    … …  
    635632    off = iemNativePcAdjustCheck(pReNative, off);
    636633# endif
    637 # if defined(IEMNATIVE_WITH_TB_DEBUG_INFO) || defined(VBOX_WITH_STATISTICS)
    638634    STAM_COUNTER_INC(&pReNative->pVCpu->iem.s.StatNativePcUpdateTotal);
    639     pReNative->Core.cInstrPcUpdateSkipped++;
    640 # endif
    641635#endif
    642636
    … …  
    678672#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
    679673    pReNative->Core.offPc += cbInstr;
    680     Log4(("offPc=%x cbInstr=%#x off=%#x\n", pReNative->Core.offPc, cbInstr, off));
     674    Log4(("offPc=%#RX64 cbInstr=%#x off=%#x\n", pReNative->Core.offPc, cbInstr, off));
    681675# ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING_DEBUG
    682676    off = iemNativeEmitPcDebugAdd(pReNative, off, cbInstr, 16);
    … …  
    685679    off = iemNativePcAdjustCheck(pReNative, off);
    686680# endif
    687 # if defined(IEMNATIVE_WITH_TB_DEBUG_INFO) || defined(VBOX_WITH_STATISTICS)
    688681    STAM_COUNTER_INC(&pReNative->pVCpu->iem.s.StatNativePcUpdateTotal);
    689     pReNative->Core.cInstrPcUpdateSkipped++;
    690 # endif
    691682#endif
    692683
    … …  
    776767{
    777768    Assert(enmEffOpSize == IEMMODE_64BIT || enmEffOpSize == IEMMODE_16BIT);
    778 
    779     /* We speculatively modify PC and may raise #GP(0), so make sure the right values are in CPUMCTX. */
    780 /** @todo relax this one, we won't raise \#GP when a_fWithinPage is true. */
    781     off = iemNativeRegFlushPendingWrites(pReNative, off);
    782 
    783769#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
    784     Assert(pReNative->Core.offPc == 0);
    785770    STAM_COUNTER_INC(&pReNative->pVCpu->iem.s.StatNativePcUpdateTotal);
    786 #endif
    787 
    788     /* Allocate a temporary PC register. */
    789     uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc, kIemNativeGstRegUse_ForUpdate);
    790 
    791     /* Perform the addition. */
    792     off = iemNativeEmitAddGprImm(pReNative, off, idxPcReg, (int64_t)offDisp + cbInstr);
    793 
    794     if (RT_LIKELY(enmEffOpSize == IEMMODE_64BIT))
    795     {
    796         /* Check that the address is canonical, raising #GP(0) + exit TB if it isn't.
    797            We can skip this if the target is within the same page. */
    798         if (!a_fWithinPage)
    799             off = iemNativeEmitCheckGprCanonicalMaybeRaiseGp0(pReNative, off, idxPcReg, idxInstr);
     771    if (a_fWithinPage && enmEffOpSize == IEMMODE_64BIT)
     772    {
     773        pReNative->Core.offPc += (int64_t)offDisp + cbInstr;
     774# ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING_DEBUG
     775        off = iemNativeEmitPcDebugAdd(pReNative, off, (int64_t)offDisp + cbInstr, enmEffOpSize == IEMMODE_64BIT ? 64 : 16);
     776# endif
    800777    }
    801778    else
    802     {
    803         /* Just truncate the result to 16-bit IP. */
    804         Assert(enmEffOpSize == IEMMODE_16BIT);
    805         off = iemNativeEmitClear16UpGpr(pReNative, off, idxPcReg);
    806     }
     779#endif
     780    {
     781        /* We speculatively modify PC and may raise #GP(0), so make sure the right values are in CPUMCTX. */
     782        off = iemNativeRegFlushPendingWrites(pReNative, off);
     783#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
     784        Assert(pReNative->Core.offPc == 0);
     785#endif
     786        /* Allocate a temporary PC register. */
     787        uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc, kIemNativeGstRegUse_ForUpdate);
     788
     789        /* Perform the addition. */
     790        off = iemNativeEmitAddGprImm(pReNative, off, idxPcReg, (int64_t)offDisp + cbInstr + pReNative->Core.offPc);
     791
     792        if (RT_LIKELY(enmEffOpSize == IEMMODE_64BIT))
     793        {
     794            /* Check that the address is canonical, raising #GP(0) + exit TB if it isn't.
     795               We can skip this if the target is within the same page. */
     796            if (!a_fWithinPage)
     797                off = iemNativeEmitCheckGprCanonicalMaybeRaiseGp0(pReNative, off, idxPcReg, idxInstr);
     798        }
     799        else
     800        {
     801            /* Just truncate the result to 16-bit IP. */
     802            Assert(enmEffOpSize == IEMMODE_16BIT);
     803            off = iemNativeEmitClear16UpGpr(pReNative, off, idxPcReg);
     804        }
    807805#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING_DEBUG
    808     off = iemNativeEmitPcDebugAdd(pReNative, off, (int64_t)offDisp + cbInstr, enmEffOpSize == IEMMODE_64BIT ? 64 : 16);
    809     off = iemNativeEmitPcDebugCheckWithReg(pReNative, off, idxPcReg);
    810 #endif
    811 
    812     off = iemNativeEmitStoreGprToVCpuU64(pReNative, off, idxPcReg, RT_UOFFSETOF(VMCPU, cpum.GstCtx.rip));
    813 
    814     /* Free but don't flush the PC register. */
    815     iemNativeRegFreeTmp(pReNative, idxPcReg);
    816 
     806        off = iemNativeEmitPcDebugAdd(pReNative, off, (int64_t)offDisp + cbInstr, enmEffOpSize == IEMMODE_64BIT ? 64 : 16);
     807        off = iemNativeEmitPcDebugCheckWithReg(pReNative, off, idxPcReg);
     808#endif
     809
     810        off = iemNativeEmitStoreGprToVCpuU64(pReNative, off, idxPcReg, RT_UOFFSETOF(VMCPU, cpum.GstCtx.rip));
     811
     812        /* Free but don't flush the PC register. */
     813        iemNativeRegFreeTmp(pReNative, idxPcReg);
     814    }
    817815    return off;
    818816}
    … …  
    895893{
    896894    Assert(enmEffOpSize == IEMMODE_32BIT || enmEffOpSize == IEMMODE_16BIT);
     895#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
     896    STAM_COUNTER_INC(&pReNative->pVCpu->iem.s.StatNativePcUpdateTotal);
     897#endif
    897898
    898899    /* We speculatively modify PC and may raise #GP(0), so make sure the right values are in CPUMCTX. */
    899     off = iemNativeRegFlushPendingWrites(pReNative, off);
    900 
     900    if (!a_fFlat || enmEffOpSize == IEMMODE_16BIT)
     901    {
     902        off = iemNativeRegFlushPendingWrites(pReNative, off);
    901903#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
    902     Assert(pReNative->Core.offPc == 0);
    903     STAM_COUNTER_INC(&pReNative->pVCpu->iem.s.StatNativePcUpdateTotal);
    904 #endif
     904        Assert(pReNative->Core.offPc == 0);
     905#endif
     906    }
    905907
    906908    /* Allocate a temporary PC register. */
    … …  
    908910
    909911    /* Perform the addition. */
    910     off = iemNativeEmitAddGpr32Imm(pReNative, off, idxPcReg, offDisp + cbInstr);
     912#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
     913    off = iemNativeEmitAddGpr32Imm(pReNative, off, idxPcReg, offDisp + cbInstr + (int32_t)pReNative->Core.offPc);
     914#else
     915    off = iemNativeEmitAddGpr32Imm(pReNative, off, idxPcReg, offDisp + cbInstr + (int32_t)pReNative->Core.offPc);
     916#endif
    911917
    912918    /* Truncate the result to 16-bit IP if the operand size is 16-bit. */
    … …  
    918924        off = iemNativeEmitCheckGpr32AgainstCsSegLimitMaybeRaiseGp0(pReNative, off, idxPcReg, idxInstr);
    919925
     926    /* Commit it. */
    920927#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING_DEBUG
    921928    off = iemNativeEmitPcDebugAdd(pReNative, off, offDisp + cbInstr, enmEffOpSize == IEMMODE_32BIT ? 32 : 16);
    … …  
    924931
    925932    off = iemNativeEmitStoreGprToVCpuU64(pReNative, off, idxPcReg, RT_UOFFSETOF(VMCPU, cpum.GstCtx.rip));
     933#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
     934    pReNative->Core.offPc = 0;
     935#endif
    926936
    927937    /* Free but don't flush the PC register. */
    … …  
    27272737#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
    27282738        AssertMsgStmt(pReNative->Core.offPc == pOther->offPc,
    2729                       ("Core.offPc=%#x pOther->offPc=%#x\n", pReNative->Core.offPc, pOther->offPc),
     2739                      ("Core.offPc=%#RX64 pOther->offPc=%#RX64\n", pReNative->Core.offPc, pOther->offPc),
    27302740                      IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_COND_ENDIF_RECONCILIATION_FAILED));
    27312741#endif
    … …  
    63016311    if ((bRmEx & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) == 5)
    63026312    {
    6303 #ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
    6304         /* Need to take the current PC offset into account for the displacement, no need to flush here
    6305          * as the PC is only accessed readonly and there is no branching or calling helpers involved. */
    6306         u32Disp += pReNative->Core.offPc;
    6307 #endif
    6308 
    63096313        uint8_t const idxRegRet = iemNativeVarRegisterAcquire(pReNative, idxVarRet, &off);
    63106314        uint8_t const idxRegPc  = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc,
    63116315                                                                  kIemNativeGstRegUse_ReadOnly);
    6312 #ifdef RT_ARCH_AMD64
    63136316        if (f64Bit)
    63146317        {
     6318#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
     6319            int64_t const offFinalDisp = (int64_t)(int32_t)u32Disp + cbInstr + (int64_t)pReNative->Core.offPc;
     6320#else
    63156321            int64_t const offFinalDisp = (int64_t)(int32_t)u32Disp + cbInstr;
     6322#endif
     6323#ifdef RT_ARCH_AMD64
    63166324            if ((int32_t)offFinalDisp == offFinalDisp)
    63176325                off = iemNativeEmitLoadGprFromGprWithAddendMaybeZero(pReNative, off, idxRegRet, idxRegPc, (int32_t)offFinalDisp);
    … …  
    63216329                off = iemNativeEmitAddGprImm8(pReNative, off, idxRegRet, cbInstr);
    63226330            }
     6331#else
     6332            off = iemNativeEmitLoadGprFromGprWithAddendMaybeZero(pReNative, off, idxRegRet, idxRegPc, offFinalDisp);
     6333#endif
    63236334        }
    63246335        else
    6325             off = iemNativeEmitLoadGprFromGpr32WithAddendMaybeZero(pReNative, off, idxRegRet, idxRegPc, (int32_t)u32Disp + cbInstr);
    6326 
    6327 #elif defined(RT_ARCH_ARM64)
    6328         if (f64Bit)
    6329             off = iemNativeEmitLoadGprFromGprWithAddendMaybeZero(pReNative, off, idxRegRet, idxRegPc,
    6330                                                                  (int64_t)(int32_t)u32Disp + cbInstr);
    6331         else
    6332             off = iemNativeEmitLoadGprFromGpr32WithAddendMaybeZero(pReNative, off, idxRegRet, idxRegPc,
    6333                                                                    (int32_t)u32Disp + cbInstr);
    6334 
    6335 #else
    6336 # error "Port me!"
    6337 #endif
     6336        {
     6337# ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
     6338            int32_t const offFinalDisp = (int32_t)u32Disp + cbInstr + (int32_t)pReNative->Core.offPc;
     6339# else
     6340            int32_t const offFinalDisp = (int32_t)u32Disp + cbInstr;
     6341# endif
     6342            off = iemNativeEmitLoadGprFromGpr32WithAddendMaybeZero(pReNative, off, idxRegRet, idxRegPc, offFinalDisp);
     6343        }
    63386344        iemNativeRegFreeTmp(pReNative, idxRegPc);
    63396345        iemNativeVarRegisterRelease(pReNative, idxVarRet);

  • trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp

    r105854 r105855  
    20722072    pReNative->Core.offPc                  = 0;
    20732073# if defined(IEMNATIVE_WITH_TB_DEBUG_INFO) || defined(VBOX_WITH_STATISTICS)
    2074     pReNative->Core.cInstrPcUpdateSkipped = 0;
     2074    pReNative->Core.idxInstrPlusOneOfLastPcUpdate = 0;
    20752075# endif
    20762076# ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING_DEBUG
    … …  
    27182718 * Debug Info: Record info about delayed RIP updates.
    27192719 */
    2720 DECL_HIDDEN_THROW(void) iemNativeDbgInfoAddDelayedPcUpdate(PIEMRECOMPILERSTATE pReNative, uint32_t offPc, uint32_t cInstrSkipped)
     2720DECL_HIDDEN_THROW(void) iemNativeDbgInfoAddDelayedPcUpdate(PIEMRECOMPILERSTATE pReNative, uint64_t offPc, uint32_t cInstrSkipped)
    27212721{
    27222722    PIEMTBDBGENTRY const pEntry = iemNativeDbgInfoAddNewEntry(pReNative, pReNative->pDbgInfo);
    27232723    pEntry->DelayedPcUpdate.uType         = kIemTbDbgEntryType_DelayedPcUpdate;
    2724     pEntry->DelayedPcUpdate.offPc         = offPc;
     2724    pEntry->DelayedPcUpdate.offPc         = offPc; /** @todo support larger values */
    27252725    pEntry->DelayedPcUpdate.cInstrSkipped = cInstrSkipped;
    27262726}
    … …  
    57655765{
    57665766    Assert(pReNative->Core.offPc);
    5767     Log4(("offPc=%#x -> 0; off=%#x\n", pReNative->Core.offPc, off));
    5768 # ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
     5767# if !defined(IEMNATIVE_WITH_TB_DEBUG_INFO) && !defined(VBOX_WITH_STATISTICS)
     5768    Log4(("iemNativeEmitPcWritebackSlow: offPc=%#RX64 -> 0; off=%#x\n", pReNative->Core.offPc, off));
     5769# else
     5770    uint8_t const idxOldInstrPlusOne = pReNative->Core.idxInstrPlusOneOfLastPcUpdate;
     5771    uint8_t       idxCurCall         = pReNative->idxCurCall;
     5772    uint8_t       idxInstr           = pReNative->pTbOrg->Thrd.paCalls[idxCurCall].idxInstr; /* unreliable*/
     5773    while (idxInstr == 0 && idxInstr + 1 < idxOldInstrPlusOne && idxCurCall > 0)
     5774        idxInstr = pReNative->pTbOrg->Thrd.paCalls[--idxCurCall].idxInstr;
     5775    uint8_t const cInstrsSkipped     = idxInstr <= pReNative->Core.idxInstrPlusOneOfLastPcUpdate ? 0
     5776                                     : idxInstr - pReNative->Core.idxInstrPlusOneOfLastPcUpdate;
     5777    Log4(("iemNativeEmitPcWritebackSlow: offPc=%#RX64 -> 0; off=%#x; idxInstr=%u cInstrsSkipped=%u\n",
     5778          pReNative->Core.offPc, off, idxInstr, cInstrsSkipped));
     5779
     5780    pReNative->Core.idxInstrPlusOneOfLastPcUpdate = RT_MAX(idxInstr + 1, pReNative->Core.idxInstrPlusOneOfLastPcUpdate);
     5781    STAM_COUNTER_ADD(&pReNative->pVCpu->iem.s.StatNativePcUpdateDelayed, cInstrsSkipped);
     5782
     5783#  ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
    57695784    iemNativeDbgInfoAddNativeOffset(pReNative, off);
    5770     iemNativeDbgInfoAddDelayedPcUpdate(pReNative, pReNative->Core.offPc, pReNative->Core.cInstrPcUpdateSkipped);
     5785    iemNativeDbgInfoAddDelayedPcUpdate(pReNative, pReNative->Core.offPc, cInstrsSkipped);
     5786#  endif
    57715787# endif
    57725788
    … …  
    57905806# endif
    57915807
    5792     pReNative->Core.offPc                 = 0;
    5793 # if defined(IEMNATIVE_WITH_TB_DEBUG_INFO) || defined(VBOX_WITH_STATISTICS)
    5794     STAM_COUNTER_ADD(&pReNative->pVCpu->iem.s.StatNativePcUpdateDelayed, pReNative->Core.cInstrPcUpdateSkipped);
    5795     pReNative->Core.cInstrPcUpdateSkipped = 0;
    5796 # endif
     5808    pReNative->Core.offPc = 0;
    57975809
    57985810    return off;
    … …  
    1013610148        uint32_t             cRecompiledCalls = 0;
    1013710149#endif
    10138 #if defined(IEMNATIVE_WITH_LIVENESS_ANALYSIS) || defined(IEM_WITH_INTRA_TB_JUMPS) || defined(VBOX_STRICT) || defined(LOG_ENABLED)
     10150#if defined(IEMNATIVE_WITH_LIVENESS_ANALYSIS) || defined(IEM_WITH_INTRA_TB_JUMPS) || defined(VBOX_STRICT) || defined(LOG_ENABLED) || defined(VBOX_WITH_STATISTICS) || defined(IEMNATIVE_WITH_DELAYED_PC_UPDATING)
    1013910151        uint32_t             idxCurCall       = 0;
    1014010152#endif
    … …  
    1014410156        {
    1014510157            PFNIEMNATIVERECOMPFUNC const pfnRecom = g_apfnIemNativeRecompileFunctions[pCallEntry->enmFunction];
    10146 #ifdef IEMNATIVE_WITH_LIVENESS_ANALYSIS
     10158#if defined(IEMNATIVE_WITH_LIVENESS_ANALYSIS) || defined(VBOX_WITH_STATISTICS) || defined(IEMNATIVE_WITH_DELAYED_PC_UPDATING)
    1014710159            pReNative->idxCurCall                 = idxCurCall;
    1014810160#endif
    … …  
    1025810270             */
    1025910271            pCallEntry++;
    10260 #if defined(IEMNATIVE_WITH_LIVENESS_ANALYSIS) || defined(IEM_WITH_INTRA_TB_JUMPS) || defined(VBOX_STRICT) || defined(LOG_ENABLED)
     10272#if defined(IEMNATIVE_WITH_LIVENESS_ANALYSIS) || defined(IEM_WITH_INTRA_TB_JUMPS) || defined(VBOX_STRICT) || defined(LOG_ENABLED) || defined(VBOX_WITH_STATISTICS) || defined(IEMNATIVE_WITH_DELAYED_PC_UPDATING)
    1026110273            idxCurCall++;
    1026210274#endif

  • trunk/src/VBox/VMM/include/IEMN8veRecompiler.h

    r105854 r105855  
    12401240typedef struct IEMNATIVECORESTATE
    12411241{
    1242 #ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
    1243     /** The current instruction offset in bytes from when the guest program counter
    1244      * was updated last. Used for delaying the write to the guest context program counter
    1245      * as long as possible. */
    1246     uint32_t                    offPc;
    1247 # if defined(IEMNATIVE_WITH_TB_DEBUG_INFO) || defined(VBOX_WITH_STATISTICS)
    1248     /** Number of instructions where we could skip the updating. */
    1249     uint8_t                     cInstrPcUpdateSkipped;
    1250 # endif
    1251 # ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING_DEBUG
    1252     /** Set after we've loaded PC into uPcUpdatingDebug at the first update. */
    1253     bool                        fDebugPcInitialized;
    1254     uint8_t                     abPadding[2];
    1255 # else
    1256     uint8_t                     abPadding[3];
    1257 # endif
    1258 #endif
    12591242    /** Allocation bitmap for aHstRegs. */
    12601243    uint32_t                    bmHstRegs;
    … …  
    12681251    /** Bitmap marking the shadowed guest register as dirty and needing writeback when flushing. */
    12691252    uint64_t                    bmGstRegShadowDirty;
     1253#endif
     1254
     1255#ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING
     1256    /** The current instruction offset in bytes from when the guest program counter
     1257     * was updated last. Used for delaying the write to the guest context program counter
     1258     * as long as possible. */
     1259    int64_t                     offPc;
     1260# if defined(IEMNATIVE_WITH_TB_DEBUG_INFO) || defined(VBOX_WITH_STATISTICS)
     1261    /** Statistics: The idxInstr+1 value at the last PC update. */
     1262    uint8_t                     idxInstrPlusOneOfLastPcUpdate;
     1263# endif
     1264# ifdef IEMNATIVE_WITH_DELAYED_PC_UPDATING_DEBUG
     1265    /** Set after we've loaded PC into uPcUpdatingDebug at the first update. */
     1266    bool                        fDebugPcInitialized;
     1267# endif
    12701268#endif
    12711269
    … …  
    16691667# endif
    16701668DECL_HIDDEN_THROW(void)     iemNativeDbgInfoAddDelayedPcUpdate(PIEMRECOMPILERSTATE pReNative,
    1671                                                                uint32_t offPc, uint32_t cInstrSkipped);
     1669                                                               uint64_t offPc, uint32_t cInstrSkipped);
    16721670#endif /* IEMNATIVE_WITH_TB_DEBUG_INFO */
    16731671
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