Changeset 105926 in vbox for trunk/src/VBox/ValidationKit
- Timestamp:
- Sep 3, 2024 10:05:00 AM (3 months ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4.c32
r105925 r105926 8287 8287 /*256:out */ X86_MXCSR_XCPT_FLAGS | X86_MXCSR_RC_ZERO, 8288 8288 /*xcpt? */ false, false }, 8289 /* 8290 * Infinity. 8291 */ 8292 /* 9*/{ { /*src2 */ { FP32_INF(0), FP32_INF(0), FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1), FP32_INF(1), FP32_INF(1) } }, 8293 { /*src1 */ { FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1), FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1) } }, 8294 { /* => */ { FP32_QNAN(1), FP32_INF(0), FP32_INF(1), FP32_QNAN(1), FP32_INF(0), FP32_QNAN(1), FP32_QNAN(1), FP32_INF(1) } }, 8295 /*mxcsr:in */ X86_MXCSR_IM, 8296 /*128:out */ X86_MXCSR_IM | X86_MXCSR_IE, 8297 /*256:out */ X86_MXCSR_IM | X86_MXCSR_IE, 8298 /*xcpt? */ false, false }, 8299 { { /*src2 */ { FP32_INF(0), FP32_INF(0), FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1), FP32_INF(1), FP32_INF(1) } }, 8300 { /*src1 */ { FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1), FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1) } }, 8301 { /* => */ { FP32_QNAN(1), FP32_INF(0), FP32_INF(1), FP32_QNAN(1), FP32_INF(0), FP32_QNAN(1), FP32_QNAN(1), FP32_INF(1) } }, 8302 /*mxcsr:in */ X86_MXCSR_XCPT_MASK | X86_MXCSR_FZ | X86_MXCSR_RC_ZERO, 8303 /*128:out */ X86_MXCSR_XCPT_MASK | X86_MXCSR_FZ | X86_MXCSR_RC_ZERO | X86_MXCSR_IE, 8304 /*256:out */ X86_MXCSR_XCPT_MASK | X86_MXCSR_FZ | X86_MXCSR_RC_ZERO | X86_MXCSR_IE, 8305 /*xcpt? */ false, false }, 8306 { { /*src2 */ { FP32_INF(0), FP32_INF(0), FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1), FP32_INF(1), FP32_INF(1) } }, 8307 { /*src1 */ { FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1), FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1) } }, 8308 { /* => */ { FP32_QNAN(1), FP32_INF(0), FP32_INF(1), FP32_QNAN(1), FP32_INF(0), FP32_QNAN(1), FP32_QNAN(1), FP32_INF(1) } }, 8309 /*mxcsr:in */ X86_MXCSR_XCPT_MASK | X86_MXCSR_FZ | X86_MXCSR_RC_DOWN, 8310 /*128:out */ X86_MXCSR_XCPT_MASK | X86_MXCSR_FZ | X86_MXCSR_RC_DOWN | X86_MXCSR_IE, 8311 /*256:out */ X86_MXCSR_XCPT_MASK | X86_MXCSR_FZ | X86_MXCSR_RC_DOWN | X86_MXCSR_IE, 8312 /*xcpt? */ false, false }, 8313 { { /*src2 */ { FP32_INF(0), FP32_INF(0), FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1), FP32_INF(1), FP32_INF(1) } }, 8314 { /*src1 */ { FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1), FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1) } }, 8315 { /* => */ { FP32_QNAN(1), FP32_INF(0), FP32_INF(1), FP32_QNAN(1), FP32_INF(0), FP32_QNAN(1), FP32_QNAN(1), FP32_INF(1) } }, 8316 /*mxcsr:in */ X86_MXCSR_XCPT_MASK | X86_MXCSR_FZ | X86_MXCSR_RC_UP, 8317 /*128:out */ X86_MXCSR_XCPT_MASK | X86_MXCSR_FZ | X86_MXCSR_RC_UP | X86_MXCSR_IE, 8318 /*256:out */ X86_MXCSR_XCPT_MASK | X86_MXCSR_FZ | X86_MXCSR_RC_UP | X86_MXCSR_IE, 8319 /*xcpt? */ false, false }, 8320 { { /*src2 */ { FP32_0(0), FP32_0(0), FP32_0(0), FP32_0(0), FP32_INF(1), FP32_INF(1), FP32_INF(1), FP32_INF(1) } }, 8321 { /*src1 */ { FP32_0(0), FP32_0(0), FP32_0(0), FP32_0(0), FP32_INF(0), FP32_INF(0), FP32_INF(1), FP32_INF(1) } }, 8322 { /* => */ { FP32_0(0), FP32_0(0), FP32_0(0), FP32_0(0), FP32_INF(0), FP32_QNAN(1), FP32_QNAN(1), FP32_INF(1) } }, 8323 /*mxcsr:in */ X86_MXCSR_FZ | X86_MXCSR_RC_UP, 8324 /*128:out */ X86_MXCSR_FZ | X86_MXCSR_RC_UP, 8325 /*256:out */ X86_MXCSR_FZ | X86_MXCSR_RC_UP | X86_MXCSR_IE, 8326 /*xcpt? */ false, true }, 8327 { { /*src2 */ { FP32_INF(0), FP32_0(0), FP32_0(0), FP32_INF(0), FP32_0(1), FP32_0(1), FP32_INF(1), FP32_INF(1) } }, 8328 { /*src1 */ { FP32_0(0), FP32_INF(0), FP32_INF(1), FP32_0(1), FP32_INF(0), FP32_INF(0), FP32_0(1), FP32_0(1) } }, 8329 { /* => */ { FP32_INF(1), FP32_INF(0), FP32_INF(1), FP32_INF(0), FP32_INF(0), FP32_INF(0), FP32_INF(0), FP32_INF(1) } }, 8330 /*mxcsr:in */ X86_MXCSR_XCPT_MASK, 8331 /*128:out */ X86_MXCSR_XCPT_MASK, 8332 /*256:out */ X86_MXCSR_XCPT_MASK, 8333 /*xcpt? */ false, false }, 8334 { { /*src2 */ { FP32_INF(0), FP32_NORM_V1(0), FP32_NORM_V2(0), FP32_INF(0), FP32_NORM_V3(1), FP32_NORM_V2(1), FP32_INF(1), FP32_INF(1) } }, 8335 { /*src1 */ { FP32_NORM_V0(0), FP32_INF(0), FP32_INF(1), FP32_NORM_V3(1), FP32_INF(0), FP32_INF(0), FP32_NORM_V1(1), FP32_NORM_V0(1) } }, 8336 { /* => */ { FP32_INF(1), FP32_INF(0), FP32_INF(1), FP32_INF(0), FP32_INF(0), FP32_INF(0), FP32_INF(0), FP32_INF(1) } }, 8337 /*mxcsr:in */ X86_MXCSR_XCPT_MASK, 8338 /*128:out */ X86_MXCSR_XCPT_MASK, 8339 /*256:out */ X86_MXCSR_XCPT_MASK, 8340 /*xcpt? */ false, false }, 8341 /** @todo More infinity; Denormals; Overflow/Precision; Normals; Invalids; 8342 * Rounding; FZ etc. */ 8289 8343 }; 8290 8344
Note:
See TracChangeset
for help on using the changeset viewer.