VirtualBox

Changeset 106070 in vbox


Ignore:
Timestamp:
Sep 17, 2024 11:20:00 AM (2 months ago)
Author:
vboxsync
Message:

include/iprt/formats: Add acpi-aml.h for AML related definitions and update acpi-tables.h with more table definitions, bugref:10733

Location:
trunk/include/iprt/formats
Files:
1 added
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/iprt/formats/acpi-tables.h

    r105522 r106070  
    180180 */
    181181#ifdef RT_BIG_ENDIAN
    182 # define ACPI_SIGNATURE_MAKE_FROM_U8(b0, b1, b2, b3) RT_MAKE_U64_FROM_U8(b0, b1, b2, b3)
     182# define ACPI_SIGNATURE_MAKE_FROM_U8(b0, b1, b2, b3) RT_MAKE_U32_FROM_MSB_U8(b0, b1, b2, b3)
    183183#elif defined(RT_LITTLE_ENDIAN)
    184 # define ACPI_SIGNATURE_MAKE_FROM_U8(b0, b1, b2, b3) RT_MAKE_U64_FROM_MSB_U8(b0, b1, b2, b3)
     184# define ACPI_SIGNATURE_MAKE_FROM_U8(b0, b1, b2, b3) RT_MAKE_U32_FROM_U8(b0, b1, b2, b3)
    185185#else
    186186# error "Whut?"
    … …  
    505505 * @{ */
    506506/** Bit 0 - Indicates that the motherboard supports user-visible devices on the LPC or ISA bus if set. */
    507 #define ACPI_FADT_IAPC_BOOT_ARCH_F_LEGACY_DEVS  RT_BIT_16(0)
     507#define ACPI_FADT_IAPC_BOOT_ARCH_F_LEGACY_DEVS  RT_BIT(0)
    508508/** Bit 1 - Indicates that the motherboard contains support for a port 60 and 64 based keyboard controller. */
    509 #define ACPI_FADT_IAPC_BOOT_ARCH_F_8042         RT_BIT_16(1)
     509#define ACPI_FADT_IAPC_BOOT_ARCH_F_8042         RT_BIT(1)
    510510/** Bit 2 - Indicates that the OSPM must not blindly probe the VGA hardware. */
    511 #define ACPI_FADT_IAPC_BOOT_ARCH_F_NO_VGA       RT_BIT_16(2)
     511#define ACPI_FADT_IAPC_BOOT_ARCH_F_NO_VGA       RT_BIT(2)
    512512/** Bit 3 - Indicates that the OSPM must not enable Message Signaled Interrupts on this platform. */
    513 #define ACPI_FADT_IAPC_BOOT_ARCH_F_NO_MSI       RT_BIT_16(3)
     513#define ACPI_FADT_IAPC_BOOT_ARCH_F_NO_MSI       RT_BIT(3)
    514514/** Bit 3 - Indicates that the OSPM must not enable OSPM ASPM on this platform. */
    515 #define ACPI_FADT_IAPC_BOOT_ARCH_F_NO_PCIE_ASPM RT_BIT_16(4)
     515#define ACPI_FADT_IAPC_BOOT_ARCH_F_NO_PCIE_ASPM RT_BIT(4)
    516516/** Bit 3 - Indicates that the CMOS RTC is either not implemented, or does not exist at legacy addresses. */
    517 #define ACPI_FADT_IAPC_BOOT_ARCH_F_NO_RTC_CMOS  RT_BIT_16(5)
     517#define ACPI_FADT_IAPC_BOOT_ARCH_F_NO_RTC_CMOS  RT_BIT(5)
    518518/** @} */
    519519
    … …  
    582582 * @{ */
    583583/** Bit 0 - Indicates that PSCI is implemented if set. */
    584 #define ACPI_FADT_ARM_BOOT_ARCH_F_PSCI_COMP    RT_BIT_16(0)
     584#define ACPI_FADT_ARM_BOOT_ARCH_F_PSCI_COMP    RT_BIT(0)
    585585/** Bit 1 - Indicates that the HVC must be used as the PSCI conduit instead of SMC. */
    586 #define ACPI_FADT_ARM_BOOT_ARCH_F_PSCI_USE_HVC RT_BIT_16(1)
    587 /** @} */
    588 
     586#define ACPI_FADT_ARM_BOOT_ARCH_F_PSCI_USE_HVC RT_BIT(1)
     587/** @} */
     588
     589
     590/**
     591 * Generic Timer Description Table (ACPIGTDT)
     592 *
     593 * @see  @acpi65{05_ACPI_Software_Programming_Model,generic-timer-description-table-gtdt}
     594 */
     595#pragma pack(1)
     596typedef struct ACPIGTDT
     597{
     598    ACPITBLHDR          Hdr;                            /**< 0x000: The table header. */
     599    uint64_t            u64PhysAddrCntControlBase;      /**< 0x024: The 64-bit physical address at which the Counter Control block is located, 0xffffffffffffffff if not provied. */
     600    uint32_t            u32Rsvd;                        /**< 0x02c: Reserved. */
     601    uint32_t            u32El1SecTimerGsiv;             /**< 0x030: GSIV of the secure EL1 timer, optional. */
     602    uint32_t            fEl1SecTimer;                   /**< 0x034: Secure EL1 timer flags, optional. Combination of ACPI_GTDT_TIMER_F_XXX. */
     603    uint32_t            u32El1NonSecTimerGsiv;          /**< 0x038: GSIV of the non-secure EL1 timer, optional. */
     604    uint32_t            fEl1NonSecTimer;                /**< 0x03c: Non-Secure EL1 timer flags, optional. Combination of ACPI_GTDT_TIMER_F_XXX. */
     605    uint32_t            u32El1VirtTimerGsiv;            /**< 0x040: GSIV of the virtual EL1 timer, optional. */
     606    uint32_t            fEl1VirtTimer;                  /**< 0x044: Virtual EL1 timer flags, optional. Combination of ACPI_GTDT_TIMER_F_XXX. */
     607    uint32_t            u32El2TimerGsiv;                /**< 0x048: GSIV of the EL2 timer, optional. */
     608    uint32_t            fEl2Timer;                      /**< 0x04c: EL2 timer flags, optional. Combination of ACPI_GTDT_TIMER_F_XXX. */
     609    uint64_t            u64PhysAddrCndReadBase;         /**< 0x050: The 64-bit physical address at which the Counter Read block is located, 0xffffffffffffffff if not provied. */
     610    uint32_t            cPlatformTimers;                /**< 0x058: Number of entries in the plaform timer structure array. */
     611    uint32_t            offPlatformTimers;              /**< 0x05c: Offset to the platform timer structure array from the start of this table. */
     612    uint32_t            u32El2VirtTimerGsiv;            /**< 0x060: GSIV of the virtual EL2 timer, optional. */
     613    uint32_t            fEl2VirtTimer;                  /**< 0x064: Virtual EL2 timer flags, optional. Combination of ACPI_GTDT_TIMER_F_XXX. */
     614} ACPIGTDT;
     615#pragma pack()
     616AssertCompileSize(ACPIGTDT, 104);
     617/** Pointer to an ACPI Fixed ACPI Description Table. */
     618typedef ACPIGTDT *PACPIGTDT;
     619/** Pointer to a const ACPI Fixed ACPI Description Table. */
     620typedef const ACPIGTDT *PCACPIGTDT;
     621
     622
     623/** @name ACPI_GTDT_TIMER_F_XXX - ACPIGTDT::fEl1SecTimer, ACPIGTDT::fEl1NonSecTimer, ACPIGTDT::fEl1VirtTimer,
     624 * ACPIGTDT::fEl2Timer, ACPIGTDT::fEl2VirtTimer
     625 * @{ */
     626/** Bit 0 - Interrupt mode, level triggered. */
     627#define ACPI_GTDT_TIMER_F_INTR_MODE_LEVEL                   0
     628/** Bit 0 - Interrupt mode, edge triggered. */
     629#define ACPI_GTDT_TIMER_F_INTR_MODE_EDGE                    RT_BIT_32(0)
     630/** Bit 1 - Interrupt polarity, active high. */
     631#define ACPI_GTDT_TIMER_F_INTR_POLARITY_ACTIVE_HIGH         0
     632/** Bit 1 - Interrupt polarity, active low. */
     633#define ACPI_GTDT_TIMER_F_INTR_POLARITY_ACTIVE_LOW          RT_BIT_32(1)
     634/** Bit 2 - Timer is always active independent of the processor's power state,
     635 * if clear the timer may lose context or not assert interrupts if the processor is in a low power state. */
     636#define ACPI_GTDT_TIMER_F_ALWAYS_ON_CAP                     RT_BIT_32(0)
     637/** @} */
     638
     639/** @todo GT Block structure and Watchdog timer structure. */
     640
     641
     642/**
     643 * Multiple APIC Description Table (ACPIMADT)
     644 *
     645 * @see  @acpi65{05_ACPI_Software_Programming_Model,multiple-apic-description-table-madt}
     646 */
     647#pragma pack(1)
     648typedef struct ACPIMADT
     649{
     650    ACPITBLHDR          Hdr;                            /**< 0x000: The table header. */
     651    uint32_t            u32PhysAddrLocalIntrCtrl;       /**< 0x024: The 32-bit physical address at which each processor can access its local interrupt controller. */
     652    uint32_t            fApic;                          /**< 0x028: Multiple APIC flags. Combination of ACPI_MADT_APIC_F_XXX. */
     653    /* Variable number of interrupt controller structures follows. */
     654} ACPIMADT;
     655#pragma pack()
     656AssertCompileSize(ACPIMADT, 44);
     657/** Pointer to an ACPI Multiple APIC Description Table. */
     658typedef ACPIMADT *PACPIMADT;
     659/** Pointer to a const ACPI Multiple APIC Description Table. */
     660typedef const ACPIMADT *PCACPIMADT;
     661
     662
     663/** @name ACPI_MADT_APIC_F_XXX - ACPIMADT::fApic
     664 * @{ */
     665/** Bit 0 - Indicates that the system has a PC-AT compatible dual 8259 setup. */
     666#define ACPI_MADT_APIC_F_PCAT_COMPAT                        RT_BIT_32(0)
     667/** @} */
     668
     669
     670/** @name ACPI_MADT_INTR_CTRL_TYPE_XXX - Interrupt Controller Structure Types.
     671 * @{ */
     672/** Processor Local APIC. */
     673#define ACPI_MADT_INTR_CTRL_TYPE_PROCESSOR_LOCAL_APIC       0
     674/** I/O APIC. */
     675#define ACPI_MADT_INTR_CTRL_TYPE_IO_APIC                    1
     676/** Interrupt source override. */
     677#define ACPI_MADT_INTR_CTRL_TYPE_INTR_SRC_OVERRIDE          2
     678/** Non-maskable Interrupt (NMI) Source. */
     679#define ACPI_MADT_INTR_CTRL_TYPE_NMI                        3
     680/** Local APIC NMI. */
     681#define ACPI_MADT_INTR_CTRL_TYPE_LOCAL_APIC_NMI             4
     682/** Local APIC address override. */
     683#define ACPI_MADT_INTR_CTRL_TYPE_LOCAL_APIC_ADDR_OVERRIDE   5
     684/** I/O SAPIC. */
     685#define ACPI_MADT_INTR_CTRL_TYPE_IO_SAPIC                   6
     686/** Local SAPIC. */
     687#define ACPI_MADT_INTR_CTRL_TYPE_LOCAL_SAPIC                7
     688/** Platform interrupt sources. */
     689#define ACPI_MADT_INTR_CTRL_TYPE_PLATFORM_INTR_SRCS         8
     690/** Processor Local x2APIC. */
     691#define ACPI_MADT_INTR_CTRL_TYPE_PROCESSOR_LOCAL_X2APIC     9
     692/** Local x2APIC NMI. */
     693#define ACPI_MADT_INTR_CTRL_TYPE_LOCAL_X2APIC_NMI          10
     694/** GIC CPU Interface (GICC). */
     695#define ACPI_MADT_INTR_CTRL_TYPE_GICC                      11
     696/** GIC Distributor (GICD). */
     697#define ACPI_MADT_INTR_CTRL_TYPE_GICD                      12
     698/** GIC MSI Frame. */
     699#define ACPI_MADT_INTR_CTRL_TYPE_GIC_MSI_FRAME             13
     700/** GIC Redistributor (GICR). */
     701#define ACPI_MADT_INTR_CTRL_TYPE_GICR                      14
     702/** GIC Interrupt Translation Service (ITS). */
     703#define ACPI_MADT_INTR_CTRL_TYPE_GIC_ITS                   15
     704/** @} */
     705
     706
     707/**
     708 * GIC CPU Interface (GICC) Structure.
     709 *
     710 * @see  @acpi65{05_ACPI_Software_Programming_Model,gic-cpu-interface-gicc-structure}
     711 */
     712#pragma pack(1)
     713typedef struct ACPIMADTGICC
     714{
     715    uint8_t             bType;                          /**< 0x000: The GICC structure type, ACPI_MADT_INTR_CTRL_TYPE_GICC. */
     716    uint8_t             cbThis;                         /**< 0x001: Length of this structure, 82. */
     717    uint16_t            u16Rsvd0;                       /**< 0x002: Reserved, MBZ. */
     718    uint32_t            u32CpuId;                       /**< 0x004: GIC's CPU Interface Number. */
     719    uint32_t            u32AcpiCpuUid;                  /**< 0x008: The matching processor object's _UID return value for this structure. */
     720    uint32_t            fGicc;                          /**< 0x00c: GICC CPU interface flags, see ACPI_MADT_GICC_F_XXX. */
     721    uint32_t            u32ParkingProtocolVersion;      /**< 0x010: Version of the ARM-Processor Parking Protocol implemented. */
     722    uint32_t            u32PerformanceGsiv;             /**< 0x014: The GSIV used for performance monitoring interrupts. */
     723    uint64_t            u64PhysAddrParked;              /**< 0x018: The 64-bit physical address of the processor's parking protocol mailbox. */
     724    uint64_t            u64PhysAddrBase;                /**< 0x020: Physical address at which the CPU can access the GIC CPU interface. */
     725    uint64_t            u64PhysAddrGicv;                /**< 0x028: Address of the GIC virtual CPU interface registers. 0 if not present. */
     726    uint64_t            u64PhysAddrGich;                /**< 0x030: Address of the GIC virtual interface control block registers. 0 if not present. */
     727    uint32_t            u32VGicMaintenanceGsiv;         /**< 0x038: GSIV for the Virtual GIC maintenance interrupt. */
     728    uint64_t            u64PhysAddrGicrBase;            /**< 0x03c: On GICv3+ holds the 64-bit physical address of the associated redistributor. */
     729    uint64_t            u64Mpidr;                       /**< 0x044: Matches the MPIDR register of the CPU associated with this structure. */
     730    uint8_t             bCpuEfficiencyClass;            /**< 0x04c: Describes the relative power efficiency of the associated processor. */
     731    uint8_t             bRsvd1;                         /**< 0x04d: Reserved, MBZ. */
     732    uint16_t            u16SpeOverflowGsiv;             /**< 0x04e: Statistical Profiling Extension buffer overflow GSIV, level triggered PPI. */
     733    uint16_t            u16TrbeGsiv;                    /**< 0x050: Trace Buffer Extension interrupt GSIV, level triggered PPI. */
     734} ACPIMADTGICC;
     735#pragma pack()
     736AssertCompileSize(ACPIMADTGICC, 82);
     737/** Pointer to an GIC CPU Interface (GICC) Structure. */
     738typedef ACPIMADTGICC *PACPIMADTGICC;
     739/** Pointer to a const GIC CPU Interface (GICC) Structure. */
     740typedef const ACPIMADTGICC *PCACPIMADTGICC;
     741
     742
     743/** @name ACPI_MADT_GICC_F_XXX - ACPIMADTGICC::fGicc
     744 * @{ */
     745/** Bit 0 - If set the processor is ready for use. */
     746#define ACPI_MADT_GICC_F_ENABLED                            RT_BIT_32(0)
     747/** Bit 1 - The performance interrupt is edge triggered, if 0 level triggered. */
     748#define ACPI_MADT_GICC_F_PERF_INTR_MODE_EDGE                RT_BIT_32(1)
     749/** Bit 2 - The VGIC maintenance interrupt is edge triggered, if 0 level triggered. */
     750#define ACPI_MADT_GICC_F_VGIC_MAINTENANCE_INTR_MODE_EDGE    RT_BIT_32(2)
     751/** Bit 3 - System supports enabling this processor later during OS runtime. */
     752#define ACPI_MADT_GICC_F_ONLINE_CAPABLE                     RT_BIT_32(3)
     753/** @} */
     754
     755
     756/**
     757 * GIC Distributor Interface (GICD) Structure.
     758 *
     759 * @see  @acpi65{05_ACPI_Software_Programming_Model,gic-distributor-gicd-structure}
     760 */
     761#pragma pack(1)
     762typedef struct ACPIMADTGICD
     763{
     764    uint8_t             bType;                          /**< 0x000: The GICD structure type, ACPI_MADT_INTR_CTRL_TYPE_GICD. */
     765    uint8_t             cbThis;                         /**< 0x001: Length of this structure, 24. */
     766    uint16_t            u16Rsvd0;                       /**< 0x002: Reserved, MBZ. */
     767    uint32_t            u32GicdId;                      /**< 0x004: This GIC distributor's hardware ID. */
     768    uint64_t            u64PhysAddrBase;                /**< 0x008: The 64-bit physical address for this distributor. */
     769    uint32_t            u32SystemVectorBase;            /**< 0x010: Reserved, MBZ. */
     770    uint8_t             bGicVersion;                    /**< 0x014: GIC version, ACPI_MADT_GICD_VERSION_XXX. */
     771    uint8_t             abRsvd0[3];                     /**< 0x015: Reserved, MBZ. */
     772} ACPIMADTGICD;
     773#pragma pack()
     774AssertCompileSize(ACPIMADTGICD, 24);
     775/** Pointer to an GIC Distributor Interface (GICD) Structure. */
     776typedef ACPIMADTGICD *PACPIMADTGICD;
     777/** Pointer to a const GIC Distributor Interface (GICD) Structure. */
     778typedef const ACPIMADTGICD *PCACPIMADTGICD;
     779
     780
     781/** @name ACPI_MADT_GICD_VERSION_XXX - ACPIMADTGICD::bGicVersion
     782 * @{ */
     783/** No GIC version is specified, fall back to hardware discovery for GIC version. */
     784#define ACPI_MADT_GICD_VERSION_UNSPECIFIED                  0
     785/** GICv1. */
     786#define ACPI_MADT_GICD_VERSION_GICv1                        1
     787/** GICv2. */
     788#define ACPI_MADT_GICD_VERSION_GICv2                        2
     789/** GICv3. */
     790#define ACPI_MADT_GICD_VERSION_GICv3                        3
     791/** GICv4. */
     792#define ACPI_MADT_GICD_VERSION_GICv4                        4
     793/** @} */
     794
     795
     796/** @todo GIC MSI Frame Structure. */
     797
     798
     799/**
     800 * GIC Redistributor (GICR) Structure.
     801 *
     802 * @see  @acpi65{05_ACPI_Software_Programming_Model,gic-redistributor-gicr-structure}
     803 */
     804#pragma pack(1)
     805typedef struct ACPIMADTGICR
     806{
     807    uint8_t             bType;                          /**< 0x000: The GICR structure type, ACPI_MADT_INTR_CTRL_TYPE_GICR. */
     808    uint8_t             cbThis;                         /**< 0x001: Length of this structure, 16. */
     809    uint16_t            u16Rsvd0;                       /**< 0x002: Reserved, MBZ. */
     810    uint64_t            u64PhysAddrGicrRangeBase;       /**< 0x004: The 64-bit physical address of a page range containing all GIC Redistributors. */
     811    uint32_t            cbGicrRange;                    /**< 0x00c: The length of the GIC Redistributor discovery page range. */
     812} ACPIMADTGICR;
     813#pragma pack()
     814AssertCompileSize(ACPIMADTGICR, 16);
     815/** Pointer to an GIC Redistributor (GICR) Structure. */
     816typedef ACPIMADTGICR *PACPIMADTGICR;
     817/** Pointer to a const GIC Redistributor (GICR) Structure. */
     818typedef const ACPIMADTGICR *PCACPIMADTGICR;
     819
     820
     821/**
     822 * GIC Interrupt Translation Service (ITS) Structure.
     823 *
     824 * @see  @acpi65{05_ACPI_Software_Programming_Model,gic-interrupt-translation-service-its-structure}
     825 */
     826#pragma pack(1)
     827typedef struct ACPIMADTGICITS
     828{
     829    uint8_t             bType;                          /**< 0x000: The GICR structure type, ACPI_MADT_INTR_CTRL_TYPE_GICR. */
     830    uint8_t             cbThis;                         /**< 0x001: Length of this structure, 16. */
     831    uint16_t            u16Rsvd0;                       /**< 0x002: Reserved, MBZ. */
     832    uint32_t            u32GicItsId;                    /**< 0x004: This GIC ITS ID. */
     833    uint64_t            u64PhysAddrBase;                /**< 0x008: The 64-bit physical address for the Interrupt Translation Service. */
     834    uint32_t            u32Rsvd1;                       /**< 0x010: Rserved, MBZ. */
     835} ACPIMADTGICITS;
     836#pragma pack()
     837AssertCompileSize(ACPIMADTGICITS, 20);
     838/** Pointer to an GIC Interrupt Translation Service (ITS) Structure. */
     839typedef ACPIMADTGICITS *PACPIMADTGICITS;
     840/** Pointer to a const GIC Interrupt Translation Service (ITS) Structure. */
     841typedef const ACPIMADTGICITS *PCACPIMADTGICITS;
     842
     843
     844/**
     845 * Memory Mapped Configuration Space base address description table (MCFG). (part of the PCI Express spec).
     846 */
     847#pragma pack(1)
     848typedef struct ACPIMCFG
     849{
     850    ACPITBLHDR          Hdr;                            /**< 0x000: The table header. */
     851    uint64_t            u64Rsvd0;                       /**< 0x024: Reserved, MBZ. */
     852    /* Variable number of base address allocation structures follows. */
     853} ACPIMCFG;
     854#pragma pack()
     855AssertCompileSize(ACPIMCFG, 44);
     856/** Pointer to an ACPI MCFG Table. */
     857typedef ACPIMCFG *PACPIMCFG;
     858/** Pointer to a const ACPI MCFG Table. */
     859typedef const ACPIMCFG *PCACPIMCFG;
     860
     861
     862/**
     863 * MCFG allocation structure.
     864 */
     865#pragma pack(1)
     866typedef struct ACPIMCFGALLOC
     867{
     868    uint64_t            u64PhysAddrBase;                /**< 0x000: Base address of the enhanced configuration mechanism. */
     869    uint16_t            u16PciSegGrpNr;                 /**< 0x008: PCI segment group number. */
     870    uint8_t             bPciBusFirst;                   /**< 0x00a: First PCI bus number decoded by this PCI host bridge. */
     871    uint8_t             bPciBusLast;                    /**< 0x00b: Last PCI bus number decoded by this PCI host bridge. */
     872    uint32_t            u32Rsvd0;                       /**< 0x00c: Reserved, MBZ. */
     873} ACPIMCFGALLOC;
     874#pragma pack()
     875AssertCompileSize(ACPIMCFGALLOC, 16);
     876/** Pointer to an ACPI MCFG Table. */
     877typedef ACPIMCFGALLOC *PACPIMCFGALLOC;
     878/** Pointer to a const ACPI MCFG Table. */
     879typedef const ACPIMCFGALLOC *PCACPIMCFGALLOC;
    589880
    590881/** @} */
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