VirtualBox

Ignore:
Timestamp:
Oct 10, 2024 3:42:50 AM (7 weeks ago)
Author:
vboxsync
Message:

ValidationKit/bootsectors: clean up mask twiddling scheme; bugref:10658

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4.c32

    r106254 r106268  
    25662566    uint32_t uSpecifiedMask, uExpectedMask, uImpliedMask, uCombinedMask, uMaskedMask, uUnmaskedMask, uThisMask;
    25672567    uint32_t uExpectedMxCsr_orig, uExpectedExceptions, uExpectedUnmaskedExceptions, uInitialExceptions, uRandTmp;
     2568    uint64_t uSeenMasks = 0;
    25682569    bool fFuzzyPE;
    25692570    uint32_t uForceOnMask, uForceOffMask;
    2570     const char *pszMaskType;
     2571    static const char * const s_apszMaskType[] = { "Specified", "Expected", "Implied", "Combined", "Masked", "Unmasked", "Random" };
    25712572    unsigned iMaskType;
    25722573    static bool      sfMismatchShown     = false;
     
    26462647    uImpliedMask = (uExpectedMxCsr_orig & X86_MXCSR_XCPT_FLAGS) << X86_MXCSR_XCPT_MASK_SHIFT;
    26472648    uCombinedMask = uSpecifiedMask | uImpliedMask;
    2648     uMaskedMask = X86_MXCSR_XCPT_MASK & ~uForceOffMask;
    2649     uUnmaskedMask = 0 | uForceOnMask;
     2649    uMaskedMask = X86_MXCSR_XCPT_MASK;
     2650    uUnmaskedMask = 0;
    26502651
    26512652   for (iMaskType = 0; iMaskType <= 6; iMaskType++)
     
    26582659        case 0:
    26592660            uThisMask = uSpecifiedMask;
    2660             pszMaskType = "Specified";
    26612661            break;
    26622662        case 1:
    2663             if (uExpectedMask == uSpecifiedMask) continue;
    26642663            uThisMask = uExpectedMask;
    2665             pszMaskType = "Expected";
    26662664            break;
    26672665        case 2:
    2668             if (uImpliedMask == uSpecifiedMask || uImpliedMask == uExpectedMask) continue;
    26692666            uThisMask = uImpliedMask;
    2670             pszMaskType = "Implied";
    26712667            break;
    26722668        case 3:
    2673             if (uCombinedMask == uSpecifiedMask || uCombinedMask == uExpectedMask || uCombinedMask == uImpliedMask) continue;
    26742669            uThisMask = uCombinedMask;
    2675             pszMaskType = "Combined";
    26762670            break;
    26772671        case 4:
    2678             if (uMaskedMask == uSpecifiedMask || uMaskedMask == uExpectedMask || uMaskedMask == uImpliedMask || uMaskedMask == uCombinedMask) continue;
    26792672            uThisMask = uMaskedMask;
    2680             pszMaskType = "Masked";
    26812673            break;
    26822674        case 5:
    2683             if (uUnmaskedMask == uSpecifiedMask || uUnmaskedMask == uExpectedMask || uUnmaskedMask == uImpliedMask || uUnmaskedMask == uCombinedMask) continue;
    26842675            uThisMask = uUnmaskedMask;
    2685             pszMaskType = "Unmasked";
    26862676            break;
    26872677        case 6:
     2678            /* This case must be last, as it trashes uSeenMasks & uInitialExceptions */
    26882679            uRandTmp = bs3CpuInstrX_SimpleRand();
    26892680            switch (uRandTmp & X86_MXCSR_RC_MASK)
     
    26962687                    uThisMask = uSpecifiedMask;
    26972688                    uInitialExceptions = uRandTmp & X86_MXCSR_XCPT_FLAGS;
     2689                    uSeenMasks = 0;         /* Don't skip for same-mask */
    26982690                    break;
    26992691                case X86_MXCSR_RC_DOWN:     /* Random mask & initial exceptions */
    27002692                    uThisMask = uRandTmp & X86_MXCSR_XCPT_MASK;
    27012693                    uInitialExceptions = uRandTmp & X86_MXCSR_XCPT_FLAGS;
     2694                    uSeenMasks = 0;         /* Don't skip for same-mask */
    27022695                    break;
    27032696                default:
    27042697                    BS3_ASSERT(0);
    27052698            }
    2706             pszMaskType = "Random";
    27072699            break;
    27082700        default:
     
    27112703    /* No matter what was chosen, honor FIXED mask bits */
    27122704    uThisMask = (uThisMask | uForceOnMask) & ~uForceOffMask;
     2705
     2706    /* Skip millions of redundant tests imposed by the mask twiddling scheme */
     2707    if (uSeenMasks & (RT_BIT_64(uThisMask >> X86_MXCSR_XCPT_MASK_SHIFT))) continue;
     2708    uSeenMasks |= RT_BIT_64(uThisMask >> X86_MXCSR_XCPT_MASK_SHIFT);
    27132709
    27142710    /* This is the input MXCSR value we'll be sending */
     
    28952891
    28962892    if (cErrors != Bs3TestSubErrorCount())
    2897         Bs3TestFailedF("Mask mode %s, mask=%#RX32, in-exceptions=%#RX32, in-MxCsr=%#RX32, expect-MxCsr=%#RX32", pszMaskType, uThisMask, uInitialExceptions, uMxCsr, uExpectedMxCsr);
     2893        Bs3TestFailedF("Mask mode %s, mask=%#RX32, in-exceptions=%#RX32, in-MxCsr=%#RX32, expect-MxCsr=%#RX32", s_apszMaskType[iMaskType], uThisMask, uInitialExceptions, uMxCsr, uExpectedMxCsr);
    28982894   }
    28992895
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