Changeset 106268 in vbox for trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4.c32
- Timestamp:
- Oct 10, 2024 3:42:50 AM (7 weeks ago)
- File:
-
- 1 edited
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trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4.c32
r106254 r106268 2566 2566 uint32_t uSpecifiedMask, uExpectedMask, uImpliedMask, uCombinedMask, uMaskedMask, uUnmaskedMask, uThisMask; 2567 2567 uint32_t uExpectedMxCsr_orig, uExpectedExceptions, uExpectedUnmaskedExceptions, uInitialExceptions, uRandTmp; 2568 uint64_t uSeenMasks = 0; 2568 2569 bool fFuzzyPE; 2569 2570 uint32_t uForceOnMask, uForceOffMask; 2570 const char *pszMaskType;2571 static const char * const s_apszMaskType[] = { "Specified", "Expected", "Implied", "Combined", "Masked", "Unmasked", "Random" }; 2571 2572 unsigned iMaskType; 2572 2573 static bool sfMismatchShown = false; … … 2646 2647 uImpliedMask = (uExpectedMxCsr_orig & X86_MXCSR_XCPT_FLAGS) << X86_MXCSR_XCPT_MASK_SHIFT; 2647 2648 uCombinedMask = uSpecifiedMask | uImpliedMask; 2648 uMaskedMask = X86_MXCSR_XCPT_MASK & ~uForceOffMask;2649 uUnmaskedMask = 0 | uForceOnMask;2649 uMaskedMask = X86_MXCSR_XCPT_MASK; 2650 uUnmaskedMask = 0; 2650 2651 2651 2652 for (iMaskType = 0; iMaskType <= 6; iMaskType++) … … 2658 2659 case 0: 2659 2660 uThisMask = uSpecifiedMask; 2660 pszMaskType = "Specified";2661 2661 break; 2662 2662 case 1: 2663 if (uExpectedMask == uSpecifiedMask) continue;2664 2663 uThisMask = uExpectedMask; 2665 pszMaskType = "Expected";2666 2664 break; 2667 2665 case 2: 2668 if (uImpliedMask == uSpecifiedMask || uImpliedMask == uExpectedMask) continue;2669 2666 uThisMask = uImpliedMask; 2670 pszMaskType = "Implied";2671 2667 break; 2672 2668 case 3: 2673 if (uCombinedMask == uSpecifiedMask || uCombinedMask == uExpectedMask || uCombinedMask == uImpliedMask) continue;2674 2669 uThisMask = uCombinedMask; 2675 pszMaskType = "Combined";2676 2670 break; 2677 2671 case 4: 2678 if (uMaskedMask == uSpecifiedMask || uMaskedMask == uExpectedMask || uMaskedMask == uImpliedMask || uMaskedMask == uCombinedMask) continue;2679 2672 uThisMask = uMaskedMask; 2680 pszMaskType = "Masked";2681 2673 break; 2682 2674 case 5: 2683 if (uUnmaskedMask == uSpecifiedMask || uUnmaskedMask == uExpectedMask || uUnmaskedMask == uImpliedMask || uUnmaskedMask == uCombinedMask) continue;2684 2675 uThisMask = uUnmaskedMask; 2685 pszMaskType = "Unmasked";2686 2676 break; 2687 2677 case 6: 2678 /* This case must be last, as it trashes uSeenMasks & uInitialExceptions */ 2688 2679 uRandTmp = bs3CpuInstrX_SimpleRand(); 2689 2680 switch (uRandTmp & X86_MXCSR_RC_MASK) … … 2696 2687 uThisMask = uSpecifiedMask; 2697 2688 uInitialExceptions = uRandTmp & X86_MXCSR_XCPT_FLAGS; 2689 uSeenMasks = 0; /* Don't skip for same-mask */ 2698 2690 break; 2699 2691 case X86_MXCSR_RC_DOWN: /* Random mask & initial exceptions */ 2700 2692 uThisMask = uRandTmp & X86_MXCSR_XCPT_MASK; 2701 2693 uInitialExceptions = uRandTmp & X86_MXCSR_XCPT_FLAGS; 2694 uSeenMasks = 0; /* Don't skip for same-mask */ 2702 2695 break; 2703 2696 default: 2704 2697 BS3_ASSERT(0); 2705 2698 } 2706 pszMaskType = "Random";2707 2699 break; 2708 2700 default: … … 2711 2703 /* No matter what was chosen, honor FIXED mask bits */ 2712 2704 uThisMask = (uThisMask | uForceOnMask) & ~uForceOffMask; 2705 2706 /* Skip millions of redundant tests imposed by the mask twiddling scheme */ 2707 if (uSeenMasks & (RT_BIT_64(uThisMask >> X86_MXCSR_XCPT_MASK_SHIFT))) continue; 2708 uSeenMasks |= RT_BIT_64(uThisMask >> X86_MXCSR_XCPT_MASK_SHIFT); 2713 2709 2714 2710 /* This is the input MXCSR value we'll be sending */ … … 2895 2891 2896 2892 if (cErrors != Bs3TestSubErrorCount()) 2897 Bs3TestFailedF("Mask mode %s, mask=%#RX32, in-exceptions=%#RX32, in-MxCsr=%#RX32, expect-MxCsr=%#RX32", pszMaskType, uThisMask, uInitialExceptions, uMxCsr, uExpectedMxCsr);2893 Bs3TestFailedF("Mask mode %s, mask=%#RX32, in-exceptions=%#RX32, in-MxCsr=%#RX32, expect-MxCsr=%#RX32", s_apszMaskType[iMaskType], uThisMask, uInitialExceptions, uMxCsr, uExpectedMxCsr); 2898 2894 } 2899 2895
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