Changeset 106365 in vbox

Timestamp:

Oct 16, 2024 1:11:39 PM (7 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

165178

Message:

VMM/DBGFReg/CMM/CPUM: Correct CPU state register sorting and make the register querying methos using DBGFREG_XXX as an input work on ARMv8, bugref:10393

Location:

trunk/src/VBox/VMM/VMMR3

Files:

• CPUMDbg-armv8.cpp (modified) (2 diffs)
• DBGFReg.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/VMMR3/CPUMDbg-armv8.cpp

@@ -264 +264 @@
     CPU_GREG_REG(29),
     CPU_GREG_REG(30),
-    CPU_REG_RW_AS("pstate",         PSTATE,         U64, fPState,         cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       g_aCpumRegFields_pstate ),
+
     CPU_REG_RW_AS("pc",             PC,             U64, Pc,              cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
-    CPU_REG_RW_AS("sp_el0",         SP_EL0,         U64, aSpReg[0],       cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
-    CPU_REG_RW_AS("sp_el1",         SP_EL1,         U64, aSpReg[1],       cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
-    CPU_REG_RW_AS("spsr_el1",       SPSR_EL1,       U64, Spsr,            cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
-    CPU_REG_RW_AS("sctlr_el1",      SCTLR_EL1,      U64, Sctlr,           cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
-    CPU_REG_RW_AS("tcr_el1",        TCR_EL1,        U64, Tcr,             cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
-    CPU_REG_RW_AS("ttbr0_el1",      TTBR0_EL1,      U64, Ttbr0,           cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
-    CPU_REG_RW_AS("ttbr1_el1",      TTBR1_EL1,      U64, Ttbr1,           cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
-    CPU_REG_RW_AS("elr_el1",        ELR_EL1,        U64, Elr,             cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
-    CPU_REG_RW_AS("vbar_el1",       VBAR_EL1,       U64, VBar,            cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
-    CPU_REG_RW_AS("fpcr",           FPCR,           U64, fpcr,            cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
-    CPU_REG_RW_AS("fpsr",           FPSR,           U64, fpsr,            cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
+
     CPU_VREG_REG(0),
     CPU_VREG_REG(1),
@@ -309 +299 @@
     CPU_VREG_REG(30),
     CPU_VREG_REG(31),
+
+    CPU_REG_RW_AS("fpcr",           FPCR,           U64, fpcr,            cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
+    CPU_REG_RW_AS("fpsr",           FPSR,           U64, fpsr,            cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
+
+    CPU_REG_RW_AS("sp_el0",         SP_EL0,         U64, aSpReg[0],       cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
+    CPU_REG_RW_AS("sp_el1",         SP_EL1,         U64, aSpReg[1],       cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
+    CPU_REG_RW_AS("spsr_el1",       SPSR_EL1,       U64, Spsr,            cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
+    CPU_REG_RW_AS("pstate",         PSTATE,         U64, fPState,         cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       g_aCpumRegFields_pstate ),
+    CPU_REG_RW_AS("sctlr_el1",      SCTLR_EL1,      U64, Sctlr,           cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
+    CPU_REG_RW_AS("tcr_el1",        TCR_EL1,        U64, Tcr,             cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
+    CPU_REG_RW_AS("ttbr0_el1",      TTBR0_EL1,      U64, Ttbr0,           cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
+    CPU_REG_RW_AS("ttbr1_el1",      TTBR1_EL1,      U64, Ttbr1,           cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
+    CPU_REG_RW_AS("elr_el1",        ELR_EL1,        U64, Elr,             cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
+    CPU_REG_RW_AS("vbar_el1",       VBAR_EL1,       U64, VBar,            cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
+
     CPU_REG_RW_AS("cnthctl_el2",    CNTHCTL_EL2,    U64, CntHCtlEl2,      cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),
     CPU_REG_RW_AS("cnthp_ctl_el2",  CNTHP_CTL_EL2,  U64, CntHpCtlEl2,     cpumR3RegGet_Generic,         cpumR3RegSet_Generic,         NULL,                       NULL                    ),

trunk/src/VBox/VMM/VMMR3/DBGFReg.cpp

@@ -442 +442 @@
 
             /* Advance to the next alias. */
-            pCurAlias = pNextAlias++;
+            if (pNextAlias)
+                pCurAlias = pNextAlias++;
             if (!pCurAlias)
                 break;
@@ -905 +906 @@
          * Look up the register and get the register value.
          */
+#ifndef VBOX_VMM_TARGET_ARMV8
         if (RT_LIKELY(pSet->cDescs > (size_t)enmReg))
         {
             PCDBGFREGDESC pDesc = &pSet->paDescs[enmReg];
+#else
+        if (RT_LIKELY(pSet->cDescs > (size_t)(enmReg - DBGFREG_ARMV8_FIRST)))
+        {
+            PCDBGFREGDESC pDesc = &pSet->paDescs[enmReg - DBGFREG_ARMV8_FIRST];
+#endif
 
             pValue->au64[0] = pValue->au64[1] = 0;