Changeset 106390 in vbox for trunk/src/VBox
- Timestamp:
- Oct 16, 2024 2:25:51 PM (5 months ago)
- svn:sync-xref-src-repo-rev:
- 165204
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4.c32
r106335 r106390 3693 3693 { bs3CpuInstr4_vaddpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 3694 3694 3695 { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },3696 { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },3697 3698 { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c16, 255, RM_REG, T_SSE, 1, 1, 1, PASS_s_aValuesSR },3695 { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 3696 { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 3697 3698 { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c16, 255, RM_REG, T_SSE, 1, 1, 1, PASS_s_aValuesSR }, 3699 3699 { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM1_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 1, 1, PASS_s_aValuesSR }, 3700 3700 { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM2_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 1, 2, PASS_s_aValuesSR }, … … 3709 3709 { bs3CpuInstr4_vaddpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 3710 3710 3711 { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },3712 { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },3713 3714 { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c32, 255, RM_REG, T_SSE, 1, 1, 1, PASS_s_aValuesSR },3711 { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 3712 { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 3713 3714 { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c32, 255, RM_REG, T_SSE, 1, 1, 1, PASS_s_aValuesSR }, 3715 3715 { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM1_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 1, 1, PASS_s_aValuesSR }, 3716 3716 { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM2_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 1, 2, PASS_s_aValuesSR }, … … 3725 3725 { bs3CpuInstr4_vaddpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 3726 3726 3727 { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },3728 { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },3727 { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 3728 { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 3729 3729 3730 3730 { bs3CpuInstr4_addpd_XMM8_XMM9_icebp_c64, 255, RM_REG, T_SSE2, 8, 8, 9, PASS_s_aValues }, … … 5690 5690 { bs3CpuInstr4_vsubpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 5691 5691 5692 { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },5693 { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },5692 { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 5693 { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 5694 5694 }; 5695 5695 static BS3CPUINSTR4_TEST1_T const s_aTests32[] = … … 5701 5701 { bs3CpuInstr4_vsubpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 5702 5702 5703 { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },5704 { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },5703 { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 5704 { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 5705 5705 }; 5706 5706 static BS3CPUINSTR4_TEST1_T const s_aTests64[] = … … 5712 5712 { bs3CpuInstr4_vsubpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 5713 5713 5714 { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },5715 { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },5714 { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 5715 { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 5716 5716 5717 5717 { bs3CpuInstr4_subpd_XMM8_XMM9_icebp_c64, 255, RM_REG, T_SSE2, 8, 8, 9, PASS_s_aValues }, … … 7597 7597 { bs3CpuInstr4_vmulpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 7598 7598 7599 { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },7600 { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },7599 { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 7600 { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 7601 7601 }; 7602 7602 static BS3CPUINSTR4_TEST1_T const s_aTests32[] = … … 7608 7608 { bs3CpuInstr4_vmulpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 7609 7609 7610 { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },7611 { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },7610 { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 7611 { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 7612 7612 }; 7613 7613 static BS3CPUINSTR4_TEST1_T const s_aTests64[] = … … 7619 7619 { bs3CpuInstr4_vmulpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 7620 7620 7621 { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },7622 { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },7621 { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 7622 { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 7623 7623 7624 7624 { bs3CpuInstr4_mulpd_XMM8_XMM9_icebp_c64, 255, RM_REG, T_SSE2, 8, 8, 9, PASS_s_aValues }, … … 8810 8810 { bs3CpuInstr4_vdivpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 8811 8811 8812 { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },8813 { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },8812 { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 8813 { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 8814 8814 }; 8815 8815 static BS3CPUINSTR4_TEST1_T const s_aTests32[] = … … 8821 8821 { bs3CpuInstr4_vdivpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 8822 8822 8823 { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },8824 { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },8823 { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 8824 { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 8825 8825 }; 8826 8826 static BS3CPUINSTR4_TEST1_T const s_aTests64[] = … … 8832 8832 { bs3CpuInstr4_vdivpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 8833 8833 8834 { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },8835 { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },8834 { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 8835 { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 8836 8836 8837 8837 { bs3CpuInstr4_divpd_XMM8_XMM9_icebp_c64, 255, RM_REG, T_SSE2, 8, 8, 9, PASS_s_aValues }, … … 10796 10796 { bs3CpuInstr4_vmaxpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 10797 10797 10798 { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },10799 { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },10798 { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 10799 { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 10800 10800 }; 10801 10801 static BS3CPUINSTR4_TEST1_T const s_aTests32[] = … … 10807 10807 { bs3CpuInstr4_vmaxpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 10808 10808 10809 { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },10810 { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },10809 { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 10810 { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 10811 10811 }; 10812 10812 static BS3CPUINSTR4_TEST1_T const s_aTests64[] = … … 10818 10818 { bs3CpuInstr4_vmaxpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 10819 10819 10820 { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },10821 { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },10820 { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 10821 { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 10822 10822 10823 10823 { bs3CpuInstr4_maxpd_XMM8_XMM9_icebp_c64, 255, RM_REG, T_SSE2, 8, 8, 9, PASS_s_aValues }, … … 12164 12164 { bs3CpuInstr4_vminpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 12165 12165 12166 { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },12167 { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },12166 { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c16, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 12167 { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 12168 12168 }; 12169 12169 static BS3CPUINSTR4_TEST1_T const s_aTests32[] = … … 12175 12175 { bs3CpuInstr4_vminpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 12176 12176 12177 { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },12178 { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },12177 { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c32, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 12178 { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 12179 12179 }; 12180 12180 static BS3CPUINSTR4_TEST1_T const s_aTests64[] = … … 12186 12186 { bs3CpuInstr4_vminpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues }, 12187 12187 12188 { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX 2_256, 1, 2, 3, PASS_s_aValues },12189 { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX 2_256, 1, 2, 255, PASS_s_aValues },12188 { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3, PASS_s_aValues }, 12189 { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues }, 12190 12190 12191 12191 { bs3CpuInstr4_minpd_XMM8_XMM9_icebp_c64, 255, RM_REG, T_SSE2, 8, 8, 9, PASS_s_aValues },
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