- Timestamp:
- Oct 16, 2024 10:30:34 PM (6 weeks ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h
r106319 r106407 4901 4901 uint8_t const idxGstTmpReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, IEMNATIVEGSTREG_GPR(iGRegEx & 15), 4902 4902 kIemNativeGstRegUse_ForUpdate); 4903 uint8_t const idxVarReg = iemNativeVarRegisterAcquire (pReNative, idxValueVar, &off, true /*fInitialized*/);4903 uint8_t const idxVarReg = iemNativeVarRegisterAcquireInited(pReNative, idxValueVar, &off); 4904 4904 4905 4905 #ifdef RT_ARCH_AMD64 … … 5063 5063 #elif defined(RT_ARCH_ARM64) 5064 5064 /* bfi w1, w2, 0, 16 - moves bits 15:0 from idxVarReg to idxGstTmpReg bits 15:0. */ 5065 uint8_t const idxVarReg = iemNativeVarRegisterAcquire (pReNative, idxValueVar, &off, true /*fInitialized*/);5065 uint8_t const idxVarReg = iemNativeVarRegisterAcquireInited(pReNative, idxValueVar, &off); 5066 5066 uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1); 5067 5067 pu32CodeBuf[off++] = Armv8A64MkInstrBfi(idxGstTmpReg, idxVarReg, 0, 16); … … 5634 5634 #endif 5635 5635 5636 uint8_t const idxVarReg = iemNativeVarRegisterAcquire (pReNative, idxVar, &off, true /*fInitialized*/);5636 uint8_t const idxVarReg = iemNativeVarRegisterAcquireInited(pReNative, idxVar, &off); 5637 5637 IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxVar, cbMask); 5638 5638 … … 5674 5674 #endif 5675 5675 5676 uint8_t const idxVarReg = iemNativeVarRegisterAcquire (pReNative, idxVar, &off, true /*fInitialized*/);5676 uint8_t const idxVarReg = iemNativeVarRegisterAcquireInited(pReNative, idxVar, &off); 5677 5677 IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxVar, cbMask); 5678 5678 … … 5700 5700 iemNativeEmitBswapLocal(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVar, uint8_t cbLocal) 5701 5701 { 5702 uint8_t const idxVarReg = iemNativeVarRegisterAcquire (pReNative, idxVar, &off, true /*fInitialized*/);5702 uint8_t const idxVarReg = iemNativeVarRegisterAcquireInited(pReNative, idxVar, &off); 5703 5703 IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxVar, cbLocal); 5704 5704 … … 5740 5740 #endif 5741 5741 5742 uint8_t const idxVarReg = iemNativeVarRegisterAcquire (pReNative, idxVar, &off, true /*fInitialized*/);5742 uint8_t const idxVarReg = iemNativeVarRegisterAcquireInited(pReNative, idxVar, &off); 5743 5743 IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxVar, cbLocal); 5744 5744 … … 5784 5784 #endif 5785 5785 5786 uint8_t const idxVarReg = iemNativeVarRegisterAcquire (pReNative, idxVar, &off, true /*fInitialized*/);5786 uint8_t const idxVarReg = iemNativeVarRegisterAcquireInited(pReNative, idxVar, &off); 5787 5787 IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxVar, cbLocal); 5788 5788 … … 5821 5821 IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxVar, cbLocal); 5822 5822 5823 uint8_t const idxVarReg = iemNativeVarRegisterAcquire (pReNative, idxVar, &off, true /*fInitialized*/);5824 uint8_t const idxVarRegEffAddr = iemNativeVarRegisterAcquire (pReNative, idxVarEffAddr, &off, true /*fInitialized*/);5823 uint8_t const idxVarReg = iemNativeVarRegisterAcquireInited(pReNative, idxVar, &off); 5824 uint8_t const idxVarRegEffAddr = iemNativeVarRegisterAcquireInited(pReNative, idxVarEffAddr, &off); 5825 5825 5826 5826 /* Need to sign extend the value. */ … … 5969 5969 { 5970 5970 /* Register argument variable: Avoid assertions in generic call code and load it the traditional way. */ 5971 uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxVarEFlags, &off , false /*fInitialized*/);5971 uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxVarEFlags, &off); 5972 5972 uint8_t const idxGstReg = iemNativeRegAllocTmpForGuestEFlagsIfAlreadyPresent(pReNative, &off, 5973 5973 a_fLivenessEflInput, a_fLivenessEflOutput); … … 6009 6009 iemNativeEmitCommitEFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarEFlags, uint32_t fElfInput) 6010 6010 { 6011 uint8_t const idxReg = iemNativeVarRegisterAcquire (pReNative, idxVarEFlags, &off, true /*fInitialized*/);6011 uint8_t const idxReg = iemNativeVarRegisterAcquireInited(pReNative, idxVarEFlags, &off); 6012 6012 IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxVarEFlags, sizeof(uint32_t)); 6013 6013 … … 7437 7437 && enmOp == kIemNativeEmitMemOp_Store 7438 7438 && pVarValue->enmKind != kIemNativeVarKind_Immediate 7439 ? iemNativeVarRegisterAcquire (pReNative, idxVarValue, &off, true /*fInitialized*/)7439 ? iemNativeVarRegisterAcquireInited(pReNative, idxVarValue, &off) 7440 7440 : UINT8_MAX; 7441 7441 … … 7444 7444 && enmOp == kIemNativeEmitMemOp_Store 7445 7445 && pVarValue->enmKind != kIemNativeVarKind_Immediate 7446 ? iemNativeVarRegisterAcquire (pReNative, idxVarValue, &off, true /*fInitialized*/)7446 ? iemNativeVarRegisterAcquireInited(pReNative, idxVarValue, &off) 7447 7447 : UINT8_MAX; 7448 7448 #endif … … 8481 8481 uint8_t const idxRegValue = !TlbState.fSkip 8482 8482 && pVarValue->enmKind != kIemNativeVarKind_Immediate 8483 ? iemNativeVarRegisterAcquire (pReNative, idxVarValue, &off, true /*fInitialized*/,8484 IEMNATIVE_CALL_ARG2_GREG /*idxRegPref*/)8483 ? iemNativeVarRegisterAcquireInitedWithPref(pReNative, idxVarValue, &off, 8484 IEMNATIVE_CALL_ARG2_GREG) 8485 8485 : UINT8_MAX; 8486 8486 uint8_t const idxRegMemResult = !TlbState.fSkip ? iemNativeRegAllocTmp(pReNative, &off) : UINT8_MAX; … … 9709 9709 #endif 9710 9710 { 9711 uint8_t const idxVarReg = iemNativeVarRegisterAcquire (pReNative, idxVarUnmapInfo, &off,9712 true /*fInitialized*/, IEMNATIVE_CALL_ARG1_GREG /*idxRegPref*/);9711 uint8_t const idxVarReg = iemNativeVarRegisterAcquireInitedWithPref(pReNative, idxVarUnmapInfo, &off, 9712 IEMNATIVE_CALL_ARG1_GREG); 9713 9713 off = iemNativeEmitTestAnyBitsInGpr8(pReNative, off, idxVarReg, 0xff); 9714 9714 iemNativeVarRegisterRelease(pReNative, idxVarUnmapInfo); … … 9939 9939 IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxDstVar, sizeof(uint16_t)); 9940 9940 9941 uint8_t const idxReg = iemNativeVarRegisterAcquire(pReNative, idxDstVar, &off , false /*fInitialized*/);9941 uint8_t const idxReg = iemNativeVarRegisterAcquire(pReNative, idxDstVar, &off); 9942 9942 /* Allocate a temporary FSW register. */ 9943 9943 /** @todo eliminate extra register */ … … 10201 10201 kIemNativeGstSimdRegLdStSz_Low128, 10202 10202 kIemNativeGstRegUse_ForUpdate); 10203 uint8_t const idxVarReg = iemNativeVarRegisterAcquire (pReNative, idxDstVar, &off, true /*fInitialized*/);10203 uint8_t const idxVarReg = iemNativeVarRegisterAcquireInited(pReNative, idxDstVar, &off); 10204 10204 10205 10205 switch (cbLocal) … … 10233 10233 kIemNativeGstSimdRegLdStSz_Low128, 10234 10234 kIemNativeGstRegUse_ForUpdate); 10235 uint8_t const idxVarReg = iemNativeVarRegisterAcquire (pReNative, idxDstVar, &off, true /*fInitialized*/);10235 uint8_t const idxVarReg = iemNativeVarRegisterAcquireInited(pReNative, idxDstVar, &off); 10236 10236 10237 10237 /* Zero the vector register first, then store the 64-bit value to the lower 64-bit. */ … … 10260 10260 kIemNativeGstSimdRegLdStSz_Low128, 10261 10261 kIemNativeGstRegUse_ForUpdate); 10262 uint8_t const idxVarReg = iemNativeVarRegisterAcquire (pReNative, idxDstVar, &off, true /*fInitialized*/);10262 uint8_t const idxVarReg = iemNativeVarRegisterAcquireInited(pReNative, idxDstVar, &off); 10263 10263 10264 10264 /* Zero the vector register first, then store the 32-bit value to the lowest 32-bit element. */ -
trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp
r106401 r106407 7453 7453 iemNativeVarSetKindToStack(pReNative, IEMNATIVE_VAR_IDX_PACK(idxVar)); 7454 7454 7455 uint8_t const idxVarOtherReg = iemNativeVarRegisterAcquire (pReNative, idxVarOther, poff, true /*fInitialized*/);7456 uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxVar, poff);7455 uint8_t const idxVarOtherReg = iemNativeVarRegisterAcquireInited(pReNative, idxVarOther, poff); 7456 uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxVar, poff); 7457 7457 7458 7458 /** @todo combine MOV and AND using MOVZX/similar. */ … … 7483 7483 * In case a register needs to be freed up or the value 7484 7484 * loaded off the stack. 7485 * @param fInitialized Set if the variable must already have been 7485 * @param idxRegPref Preferred register number or UINT8_MAX. 7486 * 7487 * @tparam a_fInitialized Set if the variable must already have been 7486 7488 * initialized. Will throw VERR_IEM_VAR_NOT_INITIALIZED 7487 7489 * if this is not the case. 7488 * @ param idxRegPref Preferred register number or UINT8_MAX.7490 * @tparam a_fWithRegPref If idxRegPref is valid. 7489 7491 * 7490 7492 * @note Must not modify the host status flags! 7491 7493 */ 7492 DECL_HIDDEN_THROW(uint8_t) iemNativeVarRegisterAcquire(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar, uint32_t *poff, 7493 bool fInitialized /*= false*/, uint8_t idxRegPref /*= UINT8_MAX*/) 7494 template<bool const a_fInitialized, bool const a_fWithRegPref> 7495 DECL_FORCE_INLINE_THROW(uint8_t) 7496 iemNativeVarRegisterAcquireInt(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar, uint32_t *poff, uint8_t idxRegPref) 7494 7497 { 7495 7498 IEMNATIVE_ASSERT_VAR_IDX(pReNative, idxVar); … … 7497 7500 Assert(pVar->cbVar <= 8); 7498 7501 Assert(!pVar->fRegAcquired); 7499 7502 Assert(!a_fWithRegPref || idxRegPref < RT_ELEMENTS(pReNative->Core.aHstRegs)); 7503 7504 /** @todo inline this bit? */ 7500 7505 uint8_t idxReg = pVar->idxReg; 7501 7506 if (idxReg < RT_ELEMENTS(pReNative->Core.aHstRegs)) … … 7547 7552 Log11(("iemNativeVarRegisterAcquire: idxVar=%#x idxReg=%u (matching arg %u)\n", idxVar, idxReg, uArgNo)); 7548 7553 } 7549 else if ( idxRegPref >= RT_ELEMENTS(pReNative->Core.aHstRegs)7554 else if ( !a_fWithRegPref 7550 7555 || (pReNative->Core.bmHstRegs & RT_BIT_32(idxRegPref))) 7551 7556 { … … 7592 7597 if (idxStackSlot < IEMNATIVE_FRAME_VAR_SLOTS) 7593 7598 { 7594 Assert( fInitialized);7599 Assert(a_fInitialized); 7595 7600 int32_t const offDispBp = iemNativeStackCalcBpDisp(idxStackSlot); 7596 7601 switch (pVar->cbVar) … … 7608 7613 Assert(idxStackSlot == UINT8_MAX); 7609 7614 if (pVar->enmKind != kIemNativeVarKind_Immediate) 7610 AssertStmt(! fInitialized, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_VAR_NOT_INITIALIZED));7615 AssertStmt(!a_fInitialized, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_VAR_NOT_INITIALIZED)); 7611 7616 else 7612 7617 { … … 7616 7621 * and IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR in connection with BT, BTS, BTR, and BTC. 7617 7622 */ 7618 AssertStmt( fInitialized, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_VAR_NOT_INITIALIZED));7623 AssertStmt(a_fInitialized, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_VAR_NOT_INITIALIZED)); 7619 7624 Log11(("iemNativeVarRegisterAcquire: idxVar=%#x idxReg=%u uValue=%RX64 converting from immediate to stack\n", 7620 7625 idxVar, idxReg, pVar->u.uValue)); … … 7626 7631 pVar->fRegAcquired = true; 7627 7632 return idxReg; 7633 } 7634 7635 7636 /** See iemNativeVarRegisterAcquireInt for details. */ 7637 DECL_HIDDEN_THROW(uint8_t) iemNativeVarRegisterAcquire(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar, uint32_t *poff) 7638 { 7639 /* very likely */ 7640 //STAM_REL_COUNTER_INC(&pReNative->pVCpu->iem.s.aStatAdHoc[(pReNative->Core.aVars[IEMNATIVE_VAR_IDX_UNPACK(idxVar)].idxReg < RT_ELEMENTS(pReNative->Core.aHstRegs)) + 0]); 7641 return iemNativeVarRegisterAcquireInt<false, false>(pReNative, idxVar, poff, UINT8_MAX); 7642 } 7643 7644 7645 /** See iemNativeVarRegisterAcquireInt for details. */ 7646 DECL_HIDDEN_THROW(uint8_t) iemNativeVarRegisterAcquireInited(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar, uint32_t *poff) 7647 { 7648 /* even more likely */ 7649 //STAM_REL_COUNTER_INC(&pReNative->pVCpu->iem.s.aStatAdHoc[(pReNative->Core.aVars[IEMNATIVE_VAR_IDX_UNPACK(idxVar)].idxReg < RT_ELEMENTS(pReNative->Core.aHstRegs)) + 2]); 7650 return iemNativeVarRegisterAcquireInt<true, false>(pReNative, idxVar, poff, UINT8_MAX); 7651 } 7652 7653 7654 /** See iemNativeVarRegisterAcquireInt for details. */ 7655 DECL_HIDDEN_THROW(uint8_t) 7656 iemNativeVarRegisterAcquireWithPref(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar, uint32_t *poff, uint8_t idxRegPref) 7657 { 7658 /* unused */ 7659 //STAM_REL_COUNTER_INC(&pReNative->pVCpu->iem.s.aStatAdHoc[(pReNative->Core.aVars[IEMNATIVE_VAR_IDX_UNPACK(idxVar)].idxReg < RT_ELEMENTS(pReNative->Core.aHstRegs)) + 4]); 7660 return iemNativeVarRegisterAcquireInt<false, true>(pReNative, idxVar, poff, idxRegPref); 7661 } 7662 7663 7664 /** See iemNativeVarRegisterAcquireInt for details. */ 7665 DECL_HIDDEN_THROW(uint8_t) 7666 iemNativeVarRegisterAcquireInitedWithPref(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar, uint32_t *poff, uint8_t idxRegPref) 7667 { 7668 /* very very likely */ 7669 //STAM_REL_COUNTER_INC(&pReNative->pVCpu->iem.s.aStatAdHoc[(pReNative->Core.aVars[IEMNATIVE_VAR_IDX_UNPACK(idxVar)].idxReg < RT_ELEMENTS(pReNative->Core.aHstRegs)) + 6]); 7670 return iemNativeVarRegisterAcquireInt<true, true>(pReNative, idxVar, poff, idxRegPref); 7628 7671 } 7629 7672 -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllN8veEmit-x86.h
r106319 r106407 611 611 #endif 612 612 { 613 uint8_t const idxRegEfl = iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);613 uint8_t const idxRegEfl = iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 614 614 uint8_t const idxRegTmp = iemNativeRegAllocTmp(pReNative, &off); 615 615 #ifdef RT_ARCH_AMD64 … … 683 683 684 684 uint8_t const idxRegEfl = idxRegEflIn != UINT8_MAX ? idxRegEflIn 685 : iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);685 : iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 686 686 uint8_t const idxTmpReg = iemNativeRegAllocTmp(pReNative, &off); 687 687 pCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 2 + 7 + 7 + 3); … … 705 705 */ 706 706 uint8_t const idxRegEfl = idxRegEflIn != UINT8_MAX ? idxRegEflIn 707 : iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);707 : iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 708 708 uint8_t const idxTmpReg = iemNativeRegAllocTmp(pReNative, &off); 709 709 uint8_t const idxTmpReg2 = cOpBits >= 32 ? UINT8_MAX : iemNativeRegAllocTmp(pReNative, &off); … … 855 855 iemNativeEmit_and_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 856 856 { 857 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);858 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);857 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 858 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 859 859 #ifdef RT_ARCH_AMD64 860 860 /* On AMD64 we just use the correctly sized AND instruction harvest the EFLAGS. */ … … 889 889 iemNativeEmit_and_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 890 890 { 891 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);891 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 892 892 #ifdef RT_ARCH_AMD64 893 893 /* On AMD64 we just use the correctly sized AND instruction harvest the EFLAGS. */ … … 942 942 iemNativeEmit_test_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 943 943 { 944 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);944 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 945 945 uint8_t const idxRegSrc = idxVarSrc == idxVarDst ? idxRegDst /* special case of 'test samereg,samereg' */ 946 : iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);946 : iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 947 947 #ifdef RT_ARCH_AMD64 948 948 /* On AMD64 we just use the correctly sized TEST instruction harvest the EFLAGS. */ … … 989 989 iemNativeEmit_test_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 990 990 { 991 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);991 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 992 992 #ifdef RT_ARCH_AMD64 993 993 /* On AMD64 we just use the correctly sized AND instruction harvest the EFLAGS. */ … … 1047 1047 iemNativeEmit_or_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1048 1048 { 1049 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1050 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1049 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1050 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1051 1051 #ifdef RT_ARCH_AMD64 1052 1052 /* On AMD64 we just use the correctly sized OR instruction harvest the EFLAGS. */ … … 1082 1082 iemNativeEmit_or_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1083 1083 { 1084 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1084 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1085 1085 #ifdef RT_ARCH_AMD64 1086 1086 /* On AMD64 we just use the correctly sized OR instruction harvest the EFLAGS. */ … … 1129 1129 iemNativeEmit_xor_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1130 1130 { 1131 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1132 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1131 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1132 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1133 1133 #ifdef RT_ARCH_AMD64 1134 1134 /* On AMD64 we just use the correctly sized OR instruction harvest the EFLAGS. */ … … 1164 1164 iemNativeEmit_xor_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1165 1165 { 1166 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1166 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1167 1167 #ifdef RT_ARCH_AMD64 1168 1168 /* On AMD64 we just use the correctly sized XOR instruction harvest the EFLAGS. */ … … 1215 1215 iemNativeEmit_add_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1216 1216 { 1217 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1218 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1217 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1218 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1219 1219 1220 1220 #ifdef RT_ARCH_AMD64 … … 1273 1273 iemNativeEmit_add_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1274 1274 { 1275 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1275 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1276 1276 1277 1277 #ifdef RT_ARCH_AMD64 … … 1341 1341 iemNativeEmit_adc_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1342 1342 { 1343 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1344 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1345 uint8_t const idxRegEfl = iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);1343 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1344 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1345 uint8_t const idxRegEfl = iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 1346 1346 1347 1347 #ifdef RT_ARCH_AMD64 … … 1406 1406 iemNativeEmit_adc_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1407 1407 { 1408 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1409 uint8_t const idxRegEfl = iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);1408 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1409 uint8_t const idxRegEfl = iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 1410 1410 1411 1411 #ifdef RT_ARCH_AMD64 … … 1470 1470 iemNativeEmit_sub_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1471 1471 { 1472 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1473 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1472 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1473 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1474 1474 1475 1475 #ifdef RT_ARCH_AMD64 … … 1528 1528 iemNativeEmit_sub_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1529 1529 { 1530 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1530 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1531 1531 1532 1532 #ifdef RT_ARCH_AMD64 … … 1598 1598 iemNativeEmit_cmp_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1599 1599 { 1600 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1601 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1600 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1601 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1602 1602 1603 1603 #ifdef RT_ARCH_AMD64 … … 1652 1652 iemNativeEmit_cmp_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1653 1653 { 1654 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1654 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1655 1655 1656 1656 #ifdef RT_ARCH_AMD64 … … 1720 1720 iemNativeEmit_sbb_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1721 1721 { 1722 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1723 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1724 uint8_t const idxRegEfl = iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);1722 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1723 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1724 uint8_t const idxRegEfl = iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 1725 1725 1726 1726 #ifdef RT_ARCH_AMD64 … … 1786 1786 iemNativeEmit_sbb_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1787 1787 { 1788 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1789 uint8_t const idxRegEfl = iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);1788 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1789 uint8_t const idxRegEfl = iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 1790 1790 1791 1791 #ifdef RT_ARCH_AMD64 … … 2106 2106 register state if the branch is taken. */ 2107 2107 uint8_t const idxRegTmp = iemNativeRegAllocTmp(pReNative, &off); /* Do this first in hope we'll get EAX. */ 2108 uint8_t const idxRegCount = iemNativeVarRegisterAcquire (pReNative, idxVarCount, &off, true /*fInitialized*/); /* modified on arm64 */2109 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);2110 uint8_t const idxRegEfl = iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);2108 uint8_t const idxRegCount = iemNativeVarRegisterAcquireInited(pReNative, idxVarCount, &off); /* modified on arm64 */ 2109 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 2110 uint8_t const idxRegEfl = iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 2111 2111 2112 2112 #ifdef RT_ARCH_AMD64 … … 2861 2861 uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(idxSimdGstRegDst), \ 2862 2862 kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForFullWrite); \ 2863 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/); \2863 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); \ 2864 2864 PIEMNATIVEINSTR const pCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7 + 6); \ 2865 2865 pCodeBuf[off++] = X86_OP_PRF_SIZE_OP; /* Transfer value from GPR to temporary vector register using pinsrq. */ \ … … 2920 2920 uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(idxSimdGstRegDst), \ 2921 2921 kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForFullWrite); \ 2922 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/); \2922 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); \ 2923 2923 PIEMNATIVEINSTR const pCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 2); \ 2924 2924 pCodeBuf[off++] = Armv8A64MkVecInstrIns(IEMNATIVE_SIMD_REG_FIXED_TMP0, idxRegSrc, 0 /*idxElem*/); /* Transfer value from GPR to temporary vector register. */ \ -
trunk/src/VBox/VMM/VMMR3/IEMR3.cpp
r106297 r106407 1062 1062 STAMUNIT_COUNT, NULL, "/IEM/CPU%u/ThrdFuncs/%s", idCpu, g_apszIemThreadedFunctionStats[i]); 1063 1063 # endif 1064 1065 1066 for (unsigned i = 1; i < RT_ELEMENTS(pVCpu->iem.s.aStatAdHoc); i++) 1067 STAMR3RegisterF(pVM, &pVCpu->iem.s.aStatAdHoc[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, 1068 STAMUNIT_COUNT, NULL, "/IEM/CPU%u/AdHoc/%02u", idCpu, i); 1064 1069 1065 1070 #endif /* !defined(VBOX_VMM_TARGET_ARMV8) && defined(VBOX_WITH_NESTED_HWVIRT_VMX) - quick fix for stupid structure duplication non-sense */ -
trunk/src/VBox/VMM/include/IEMN8veRecompiler.h
r106401 r106407 2343 2343 IEMNATIVEGSTREGREF enmRegClass, uint8_t idxReg); 2344 2344 DECL_HIDDEN_THROW(uint8_t) iemNativeVarGetStackSlot(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar); 2345 DECL_HIDDEN_THROW(uint8_t) iemNativeVarRegisterAcquire(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar, uint32_t *poff, 2346 bool fInitialized = false, uint8_t idxRegPref = UINT8_MAX); 2345 DECL_HIDDEN_THROW(uint8_t) iemNativeVarRegisterAcquire(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar, uint32_t *poff); 2346 DECL_HIDDEN_THROW(uint8_t) iemNativeVarRegisterAcquireWithPref(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar, uint32_t *poff, uint8_t idxRegPref); 2347 DECL_HIDDEN_THROW(uint8_t) iemNativeVarRegisterAcquireInited(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar, uint32_t *poff); 2348 DECL_HIDDEN_THROW(uint8_t) iemNativeVarRegisterAcquireInitedWithPref(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar, uint32_t *poff, uint8_t idxRegPref); 2347 2349 #ifdef IEMNATIVE_WITH_SIMD_REG_ALLOCATOR 2348 2350 DECL_HIDDEN_THROW(uint8_t) iemNativeVarSimdRegisterAcquire(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar, uint32_t *poff, -
trunk/src/VBox/VMM/include/IEMN8veRecompilerTlbLookup.h
r106286 r106407 120 120 != kIemNativeVarKind_Immediate 121 121 && !fSkip 122 ? iemNativeVarRegisterAcquire (a_pReNative, a_idxVarGCPtrMem, a_poff,123 true /*fInitialized*/,IEMNATIVE_CALL_ARG2_GREG)122 ? iemNativeVarRegisterAcquireInitedWithPref(a_pReNative, a_idxVarGCPtrMem, a_poff, 123 IEMNATIVE_CALL_ARG2_GREG) 124 124 : idxRegPtrHlp) 125 125 , idxRegSegBase(a_iSegReg == UINT8_MAX || fSkip
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