Changeset 106407 in vbox for trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllN8veEmit-x86.h
- Timestamp:
- Oct 16, 2024 10:30:34 PM (4 months ago)
- svn:sync-xref-src-repo-rev:
- 165226
- File:
-
- 1 edited
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- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllN8veEmit-x86.h
r106319 r106407 611 611 #endif 612 612 { 613 uint8_t const idxRegEfl = iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);613 uint8_t const idxRegEfl = iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 614 614 uint8_t const idxRegTmp = iemNativeRegAllocTmp(pReNative, &off); 615 615 #ifdef RT_ARCH_AMD64 … … 683 683 684 684 uint8_t const idxRegEfl = idxRegEflIn != UINT8_MAX ? idxRegEflIn 685 : iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);685 : iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 686 686 uint8_t const idxTmpReg = iemNativeRegAllocTmp(pReNative, &off); 687 687 pCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 2 + 7 + 7 + 3); … … 705 705 */ 706 706 uint8_t const idxRegEfl = idxRegEflIn != UINT8_MAX ? idxRegEflIn 707 : iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);707 : iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 708 708 uint8_t const idxTmpReg = iemNativeRegAllocTmp(pReNative, &off); 709 709 uint8_t const idxTmpReg2 = cOpBits >= 32 ? UINT8_MAX : iemNativeRegAllocTmp(pReNative, &off); … … 855 855 iemNativeEmit_and_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 856 856 { 857 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);858 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);857 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 858 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 859 859 #ifdef RT_ARCH_AMD64 860 860 /* On AMD64 we just use the correctly sized AND instruction harvest the EFLAGS. */ … … 889 889 iemNativeEmit_and_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 890 890 { 891 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);891 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 892 892 #ifdef RT_ARCH_AMD64 893 893 /* On AMD64 we just use the correctly sized AND instruction harvest the EFLAGS. */ … … 942 942 iemNativeEmit_test_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 943 943 { 944 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);944 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 945 945 uint8_t const idxRegSrc = idxVarSrc == idxVarDst ? idxRegDst /* special case of 'test samereg,samereg' */ 946 : iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);946 : iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 947 947 #ifdef RT_ARCH_AMD64 948 948 /* On AMD64 we just use the correctly sized TEST instruction harvest the EFLAGS. */ … … 989 989 iemNativeEmit_test_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 990 990 { 991 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);991 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 992 992 #ifdef RT_ARCH_AMD64 993 993 /* On AMD64 we just use the correctly sized AND instruction harvest the EFLAGS. */ … … 1047 1047 iemNativeEmit_or_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1048 1048 { 1049 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1050 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1049 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1050 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1051 1051 #ifdef RT_ARCH_AMD64 1052 1052 /* On AMD64 we just use the correctly sized OR instruction harvest the EFLAGS. */ … … 1082 1082 iemNativeEmit_or_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1083 1083 { 1084 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1084 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1085 1085 #ifdef RT_ARCH_AMD64 1086 1086 /* On AMD64 we just use the correctly sized OR instruction harvest the EFLAGS. */ … … 1129 1129 iemNativeEmit_xor_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1130 1130 { 1131 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1132 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1131 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1132 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1133 1133 #ifdef RT_ARCH_AMD64 1134 1134 /* On AMD64 we just use the correctly sized OR instruction harvest the EFLAGS. */ … … 1164 1164 iemNativeEmit_xor_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1165 1165 { 1166 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1166 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1167 1167 #ifdef RT_ARCH_AMD64 1168 1168 /* On AMD64 we just use the correctly sized XOR instruction harvest the EFLAGS. */ … … 1215 1215 iemNativeEmit_add_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1216 1216 { 1217 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1218 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1217 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1218 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1219 1219 1220 1220 #ifdef RT_ARCH_AMD64 … … 1273 1273 iemNativeEmit_add_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1274 1274 { 1275 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1275 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1276 1276 1277 1277 #ifdef RT_ARCH_AMD64 … … 1341 1341 iemNativeEmit_adc_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1342 1342 { 1343 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1344 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1345 uint8_t const idxRegEfl = iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);1343 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1344 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1345 uint8_t const idxRegEfl = iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 1346 1346 1347 1347 #ifdef RT_ARCH_AMD64 … … 1406 1406 iemNativeEmit_adc_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1407 1407 { 1408 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1409 uint8_t const idxRegEfl = iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);1408 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1409 uint8_t const idxRegEfl = iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 1410 1410 1411 1411 #ifdef RT_ARCH_AMD64 … … 1470 1470 iemNativeEmit_sub_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1471 1471 { 1472 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1473 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1472 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1473 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1474 1474 1475 1475 #ifdef RT_ARCH_AMD64 … … 1528 1528 iemNativeEmit_sub_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1529 1529 { 1530 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1530 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1531 1531 1532 1532 #ifdef RT_ARCH_AMD64 … … 1598 1598 iemNativeEmit_cmp_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1599 1599 { 1600 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1601 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1600 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1601 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1602 1602 1603 1603 #ifdef RT_ARCH_AMD64 … … 1652 1652 iemNativeEmit_cmp_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1653 1653 { 1654 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1654 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1655 1655 1656 1656 #ifdef RT_ARCH_AMD64 … … 1720 1720 iemNativeEmit_sbb_r_r_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint8_t idxVarSrc, uint8_t idxVarEfl) 1721 1721 { 1722 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1723 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/);1724 uint8_t const idxRegEfl = iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);1722 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1723 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); 1724 uint8_t const idxRegEfl = iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 1725 1725 1726 1726 #ifdef RT_ARCH_AMD64 … … 1786 1786 iemNativeEmit_sbb_r_i_efl(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarDst, uint64_t uImmOp, uint8_t idxVarEfl) 1787 1787 { 1788 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);1789 uint8_t const idxRegEfl = iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);1788 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 1789 uint8_t const idxRegEfl = iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 1790 1790 1791 1791 #ifdef RT_ARCH_AMD64 … … 2106 2106 register state if the branch is taken. */ 2107 2107 uint8_t const idxRegTmp = iemNativeRegAllocTmp(pReNative, &off); /* Do this first in hope we'll get EAX. */ 2108 uint8_t const idxRegCount = iemNativeVarRegisterAcquire (pReNative, idxVarCount, &off, true /*fInitialized*/); /* modified on arm64 */2109 uint8_t const idxRegDst = iemNativeVarRegisterAcquire (pReNative, idxVarDst, &off, true /*fInitialized*/);2110 uint8_t const idxRegEfl = iemNativeVarRegisterAcquire (pReNative, idxVarEfl, &off, true /*fInitialized*/);2108 uint8_t const idxRegCount = iemNativeVarRegisterAcquireInited(pReNative, idxVarCount, &off); /* modified on arm64 */ 2109 uint8_t const idxRegDst = iemNativeVarRegisterAcquireInited(pReNative, idxVarDst, &off); 2110 uint8_t const idxRegEfl = iemNativeVarRegisterAcquireInited(pReNative, idxVarEfl, &off); 2111 2111 2112 2112 #ifdef RT_ARCH_AMD64 … … 2861 2861 uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(idxSimdGstRegDst), \ 2862 2862 kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForFullWrite); \ 2863 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/); \2863 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); \ 2864 2864 PIEMNATIVEINSTR const pCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7 + 6); \ 2865 2865 pCodeBuf[off++] = X86_OP_PRF_SIZE_OP; /* Transfer value from GPR to temporary vector register using pinsrq. */ \ … … 2920 2920 uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(idxSimdGstRegDst), \ 2921 2921 kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForFullWrite); \ 2922 uint8_t const idxRegSrc = iemNativeVarRegisterAcquire (pReNative, idxVarSrc, &off, true /*fInitialized*/); \2922 uint8_t const idxRegSrc = iemNativeVarRegisterAcquireInited(pReNative, idxVarSrc, &off); \ 2923 2923 PIEMNATIVEINSTR const pCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 2); \ 2924 2924 pCodeBuf[off++] = Armv8A64MkVecInstrIns(IEMNATIVE_SIMD_REG_FIXED_TMP0, idxRegSrc, 0 /*idxElem*/); /* Transfer value from GPR to temporary vector register. */ \
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