Changeset 106567 in vbox for trunk/include

Timestamp:

Oct 21, 2024 3:06:23 PM (7 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

165402

Message:

VMM/cpum: Alignment fixes for CPUMFEATURES and CPUMCTX. jiraref:VBP-1171

Location:

trunk/include/VBox/vmm

Files:

• cpum-armv8.h (modified) (2 diffs)
• cpumctx-armv8.h (modified) (3 diffs)

trunk/include/VBox/vmm/cpum-armv8.h

@@ -186 +186 @@
     /** The maximum linear address width of the CPU. */
     uint8_t         cMaxLinearAddrWidth;
+    uint16_t        uPadding;
 
     /** @name Granule sizes supported.
@@ -700 +701 @@
 
     /** Padding to the required size to match CPUMFEATURES for x86/amd64. */
-    uint8_t         abPadding[6];
+    uint8_t         abPadding[4];
 } CPUMFEATURES;
 #ifndef VBOX_FOR_DTRACE_LIB

trunk/include/VBox/vmm/cpumctx-armv8.h

@@ -169 +169 @@
 typedef struct CPUMCTX
 {
+    uint64_t            uPadding0;
     /** The general purpose register array view. */
     CPUMCTXGREG         aGRegs[31];
@@ -191 +192 @@
     /** The VBAR_EL1 register. */
     CPUMCTXSYSREG       VBar;
+    /** The MDSCR_EL1 register. */
+    CPUMCTXSYSREG       Mdscr;
+    uint64_t            uPadding1;
     /** Breakpoint registers, DBGB{C,V}n_EL1. */
     CPUMCTXSYSREGDBG    aBp[16];
     /** Watchpoint registers, DBGW{C,V}n_EL1. */
     CPUMCTXSYSREGDBG    aWp[16];
-    /** The MDSCR_EL1 register. */
-    CPUMCTXSYSREG       Mdscr;
     /** APDA key register state. */
     CPUMCTXSYSREGPAKEY  Apda;
@@ -294 +296 @@
     /** Floating point status register. */
     uint64_t            fpsr;
+    /* --  64 byte alignment boundrary -- */
     /** The internal PSTATE state (as given from SPSR_EL2). */
     uint64_t            fPState;
 
-    uint32_t            fPadding0;
-
     /** OS lock status accessed through OSLAR_EL1 and OSLSR_EL1. */
     bool                fOsLck;
-
     uint8_t             afPadding1[7];