Changeset 106616 in vbox
- Timestamp:
- Oct 23, 2024 10:41:19 AM (5 weeks ago)
- Location:
- trunk
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/dis-armv8.h
r106004 r106616 59 59 kDisOpParamArmV8RegType_Simd_Scalar_64Bit, 60 60 kDisOpParamArmV8RegType_Simd_Scalar_128Bit, 61 kDisOpParamArmV8RegType_Simd_Vector 61 kDisOpParamArmV8RegType_Simd_Vector, 62 kDisOpParamArmV8RegType_Sp 62 63 } DISOPPARAMARMV8REGTYPE; 63 64 … … 69 70 /** The register type (DISOPPARAMARMV8REGTYPE). */ 70 71 uint8_t enmRegType; 71 /** The register ID . */72 /** The register ID (not applicable for kDisOpParamArmV8RegType_Sp). */ 72 73 uint8_t idReg; 73 74 } DISOPPARAMARMV8REG; -
trunk/src/VBox/Disassembler/DisasmCore-armv8.cpp
r106005 r106616 79 79 static FNDISPARSEARMV8 disArmV8ParseImmAdr; 80 80 static FNDISPARSEARMV8 disArmV8ParseImmZero; 81 static FNDISPARSEARMV8 disArmV8ParseReg; 82 static FNDISPARSEARMV8 disArmV8ParseRegOff; 81 static FNDISPARSEARMV8 disArmV8ParseGprZr; 82 static FNDISPARSEARMV8 disArmV8ParseGprSp; 83 static FNDISPARSEARMV8 disArmV8ParseGprOff; 83 84 static FNDISPARSEARMV8 disArmV8ParseImmsImmrN; 84 85 static FNDISPARSEARMV8 disArmV8ParseHw; … … 126 127 disArmV8ParseImmAdr, 127 128 disArmV8ParseImmZero, 128 disArmV8ParseReg, 129 disArmV8ParseRegOff, 129 disArmV8ParseGprZr, 130 disArmV8ParseGprSp, 131 disArmV8ParseGprOff, 130 132 disArmV8ParseImmsImmrN, 131 133 disArmV8ParseHw, … … 290 292 291 293 292 static int disArmV8Parse Reg(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8OPCODE pOp, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit)294 static int disArmV8ParseGprZr(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8OPCODE pOp, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 293 295 { 294 296 RT_NOREF(pDis, pOp, pInsnClass); … … 302 304 303 305 304 static int disArmV8ParseRegOff(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8OPCODE pOp, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 306 static int disArmV8ParseGprSp(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8OPCODE pOp, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 307 { 308 RT_NOREF(pDis, pOp, pInsnClass); 309 pParam->armv8.Op.Reg.idReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 310 if (pParam->armv8.Op.Reg.idReg == 31) 311 pParam->armv8.Op.Reg.enmRegType = kDisOpParamArmV8RegType_Sp; 312 else if (*pf64Bit || (pParam->armv8.enmType == kDisArmv8OpParmAddrInGpr)) 313 pParam->armv8.Op.Reg.enmRegType = kDisOpParamArmV8RegType_Gpr_64Bit; 314 else 315 pParam->armv8.Op.Reg.enmRegType = kDisOpParamArmV8RegType_Gpr_32Bit; 316 return VINF_SUCCESS; 317 } 318 319 320 static int disArmV8ParseGprOff(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8OPCODE pOp, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 305 321 { 306 322 RT_NOREF(pDis, pOp, pInsnClass, pf64Bit); 307 pParam->armv8.GprIndex.idReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits);308 pParam->armv8. Op.Reg.enmRegType = kDisOpParamArmV8RegType_Gpr_64Bit; /* Might get overwritten later on. */309 pParam->fUse |= DISUSE_INDEX;323 pParam->armv8.GprIndex.idReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 324 pParam->armv8.GprIndex.enmRegType = kDisOpParamArmV8RegType_Gpr_64Bit; /* Might get overwritten later on. */ 325 pParam->fUse |= DISUSE_INDEX; 310 326 return VINF_SUCCESS; 311 327 } -
trunk/src/VBox/Disassembler/DisasmFormatArmV8.cpp
r106004 r106616 401 401 return psz; 402 402 } 403 case kDisOpParamArmV8RegType_Sp: 404 { 405 *pcchReg = 2; 406 return "sp"; 407 } 403 408 default: 404 409 AssertFailed(); -
trunk/src/VBox/Disassembler/DisasmInternal-armv8.h
r106004 r106616 56 56 kDisParmParseImmAdr, 57 57 kDisParmParseImmZero, 58 kDisParmParseReg, 59 kDisParmParseRegOff, 58 kDisParmParseGprZr, 59 kDisParmParseGprSp, 60 kDisParmParseGprOff, 60 61 kDisParmParseImmsImmrN, 61 62 kDisParmParseHw, -
trunk/src/VBox/Disassembler/DisasmTables-armv8-a64-simd-fp.cpp.h
r106004 r106616 87 87 DIS_ARMV8_INSN_DECODE(kDisParmParseFpType, 22, 2, DIS_ARMV8_INSN_PARAM_UNSET), 88 88 DIS_ARMV8_INSN_DECODE(kDisParmParseFpReg, 0, 5, 0 /*idxParam*/), 89 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 1 /*idxParam*/),89 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 1 /*idxParam*/), 90 90 DIS_ARMV8_INSN_DECODE(kDisParmParseFpScale, 10, 6, 2 /*idxParam*/), 91 91 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(DataProcFpFixedPConvGpr2FpReg, 0x7f3f0000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_SF /*fClass*/, … … 111 111 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(DataProcFpFixedPConvFpReg2Gpr) 112 112 DIS_ARMV8_INSN_DECODE(kDisParmParseFpType, 22, 2, DIS_ARMV8_INSN_PARAM_UNSET), 113 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),113 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 114 114 DIS_ARMV8_INSN_DECODE(kDisParmParseFpReg, 5, 5, 1 /*idxParam*/), 115 115 DIS_ARMV8_INSN_DECODE(kDisParmParseFpScale, 10, 6, 2 /*idxParam*/), -
trunk/src/VBox/Disassembler/DisasmTables-armv8-a64.cpp
r106387 r106616 76 76 DIS_ARMV8_OP(0x90000000, "adrp" , OP_ARMV8_A64_ADRP, DISOPTYPE_HARMLESS) 77 77 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(Adr) 78 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),78 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 79 79 DIS_ARMV8_INSN_DECODE(kDisParmParseImmAdr, 0, 0, 1 /*idxParam*/), 80 80 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(Adr, 0x9f000000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT, … … 90 90 DIS_ARMV8_OP(0x71000000, "subs" , OP_ARMV8_A64_SUBS, DISOPTYPE_HARMLESS), 91 91 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(AddSubImm) 92 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg, 0,5, 0 /*idxParam*/),93 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg, 5,5, 1 /*idxParam*/),94 DIS_ARMV8_INSN_DECODE(kDisParmParseImm, 10, 12, 2 /*idxParam*/),95 DIS_ARMV8_INSN_DECODE(kDisParmParseSh12, 22, 1, 2 /*idxParam*/),92 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 93 DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 5, 5, 1 /*idxParam*/), 94 DIS_ARMV8_INSN_DECODE(kDisParmParseImm, 10, 12, 2 /*idxParam*/), 95 DIS_ARMV8_INSN_DECODE(kDisParmParseSh12, 22, 1, 2 /*idxParam*/), 96 96 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(AddSubImm, 0x7f800000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_SF, 97 97 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29, … … 106 106 DIS_ARMV8_OP(0x6b000000, "subs" , OP_ARMV8_A64_SUBS, DISOPTYPE_HARMLESS), 107 107 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(AddSubShiftReg) 108 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),109 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 1 /*idxParam*/),110 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,16, 5, 2 /*idxParam*/),108 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 109 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 1 /*idxParam*/), 110 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 16, 5, 2 /*idxParam*/), 111 111 DIS_ARMV8_INSN_DECODE(kDisParmParseShift, 22, 2, 2 /*idxParam*/), 112 112 DIS_ARMV8_INSN_DECODE(kDisParmParseShiftAmount, 10, 6, 2 /*idxParam*/), … … 123 123 DIS_ARMV8_OP(0x72000000, "ands" , OP_ARMV8_A64_ANDS, DISOPTYPE_HARMLESS), 124 124 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LogicalImm) 125 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),126 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 1 /*idxParam*/),125 DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 0, 5, 0 /*idxParam*/), 126 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 1 /*idxParam*/), 127 127 DIS_ARMV8_INSN_DECODE(kDisParmParseImmsImmrN, 10, 13, 2 /*idxParam*/), 128 128 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(LogicalImm, 0x7f800000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_SF, … … 138 138 DIS_ARMV8_OP(0x72800000, "movk" , OP_ARMV8_A64_MOVK, DISOPTYPE_HARMLESS), 139 139 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(MoveWide) 140 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),140 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 141 141 DIS_ARMV8_INSN_DECODE(kDisParmParseImm, 5, 16, 1 /*idxParam*/), 142 142 DIS_ARMV8_INSN_DECODE(kDisParmParseHw, 21, 2, 1 /*idxParam*/), … … 153 153 INVALID_OPCODE, 154 154 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(Bitfield) 155 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),156 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 1 /*idxParam*/),155 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 156 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 1 /*idxParam*/), 157 157 DIS_ARMV8_INSN_DECODE(kDisParmParseImm, 16, 6, 2 /*idxParam*/), 158 158 DIS_ARMV8_INSN_DECODE(kDisParmParseImm, 10, 6, 3 /*idxParam*/), … … 223 223 DIS_ARMV8_OP(0x54000010, "wfit" , OP_ARMV8_A64_WFIT, DISOPTYPE_HARMLESS), /* FEAT_WFxT */ 224 224 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(SysReg) 225 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),225 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 226 226 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(SysReg, 0xffffffe0 /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT, 227 227 kDisArmV8OpcDecodeNop, 0xfe0, 5, … … 289 289 DIS_ARMV8_OP(0xd5233160, "ttest", OP_ARMV8_A64_TTEST, DISOPTYPE_HARMLESS), /* FEAT_TME */ 290 290 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(SysResult) 291 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),291 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 292 292 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(SysResult, 0xfffffffe /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT, 293 293 kDisArmV8OpcDecodeNop, RT_BIT_32(8) | RT_BIT_32(9) | RT_BIT_32(10) | RT_BIT_32(11), 8, … … 302 302 DIS_ARMV8_INSN_DECODE(kDisParmParseCRnCRm, 8, 8, 1 /*idxParam*/), 303 303 DIS_ARMV8_INSN_DECODE(kDisParmParseImm, 5, 3, 2 /*idxParam*/), 304 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 3 /*idxParam*/),304 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 3 /*idxParam*/), 305 305 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_0(Sys, 0xfff80000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT, 306 306 kDisArmV8OpcDecodeNop, 0, 0); /** @todo */ … … 311 311 DIS_ARMV8_OP(0xd5280000, "sysl", OP_ARMV8_A64_SYSL, DISOPTYPE_HARMLESS), 312 312 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(SysL) 313 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),313 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 314 314 DIS_ARMV8_INSN_DECODE(kDisParmParseImm, 16, 3, 1 /*idxParam*/), 315 315 DIS_ARMV8_INSN_DECODE(kDisParmParseCRnCRm, 8, 8, 2 /*idxParam*/), … … 324 324 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(Msr) 325 325 DIS_ARMV8_INSN_DECODE(kDisParmParseSysReg, 5, 15, 0 /*idxParam*/), 326 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 1 /*idxParam*/),326 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 1 /*idxParam*/), 327 327 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(Msr, 0xfff00000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT, 328 328 kDisArmV8OpcDecodeNop, 0, 0, … … 334 334 DIS_ARMV8_OP(0xd5300000, "mrs", OP_ARMV8_A64_MRS, DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED), 335 335 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(Mrs) 336 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),336 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 337 337 DIS_ARMV8_INSN_DECODE(kDisParmParseSysReg, 5, 15, 1 /*idxParam*/), 338 338 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(Mrs, 0xfff00000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT, … … 350 350 DIS_ARMV8_OP(0xd65f0c00, "retab", OP_ARMV8_A64_RETAB, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 351 351 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(BrBlrRet) 352 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 0 /*idxParam*/),352 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 0 /*idxParam*/), 353 353 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(BrBlrRet, 0xfffffc1f /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT, 354 354 kDisArmV8OpcDecodeLookup, 0xfffffc1f, 0, … … 393 393 DIS_ARMV8_OP(0x35000000, "cbnz", OP_ARMV8_A64_CBNZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 394 394 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(CmpBrImm) 395 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),395 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 396 396 DIS_ARMV8_INSN_DECODE(kDisParmParseImmRel, 5, 19, 1 /*idxParam*/), 397 397 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(CmpBrImm, 0x7f000000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_SF, … … 405 405 DIS_ARMV8_OP(0x37000000, "tbnz", OP_ARMV8_A64_TBNZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 406 406 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(TestBrImm) 407 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),407 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 408 408 DIS_ARMV8_INSN_DECODE(kDisParmParseImmTbz, 0, 0, 1 /*idxParam*/), /* Hardcoded bit offsets in parser. */ 409 409 DIS_ARMV8_INSN_DECODE(kDisParmParseImmRel, 5, 14, 2 /*idxParam*/), … … 439 439 DIS_ARMV8_OP(0x6a000000, "ands", OP_ARMV8_A64_ANDS, DISOPTYPE_HARMLESS) 440 440 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LogShiftRegN0) 441 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),442 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 1 /*idxParam*/),443 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,16, 5, 2 /*idxParam*/),441 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 442 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 1 /*idxParam*/), 443 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 16, 5, 2 /*idxParam*/), 444 444 DIS_ARMV8_INSN_DECODE(kDisParmParseShift, 22, 2, 2 /*idxParam*/), 445 445 DIS_ARMV8_INSN_DECODE(kDisParmParseShiftAmount, 10, 6, 2 /*idxParam*/), … … 456 456 DIS_ARMV8_OP(0x6a200000, "bics", OP_ARMV8_A64_BICS, DISOPTYPE_HARMLESS) 457 457 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LogShiftRegN1) 458 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),459 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 1 /*idxParam*/),460 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,16, 5, 2 /*idxParam*/),458 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 459 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 1 /*idxParam*/), 460 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 16, 5, 2 /*idxParam*/), 461 461 DIS_ARMV8_INSN_DECODE(kDisParmParseShift, 22, 2, 2 /*idxParam*/), 462 462 DIS_ARMV8_INSN_DECODE(kDisParmParseShiftAmount, 10, 6, 2 /*idxParam*/), … … 494 494 DIS_ARMV8_OP(0x7a400000, "ccmp", OP_ARMV8_A64_CCMP, DISOPTYPE_HARMLESS) 495 495 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(CondCmpReg) 496 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 0 /*idxParam*/),497 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,16, 5, 1 /*idxParam*/),496 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 0 /*idxParam*/), 497 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 16, 5, 1 /*idxParam*/), 498 498 DIS_ARMV8_INSN_DECODE(kDisParmParseImm, 0, 4, 2 /*idxParam*/), 499 499 DIS_ARMV8_INSN_DECODE(kDisParmParseCond, 12, 4, 3 /*idxParam*/), … … 576 576 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegUImmGpr) 577 577 DIS_ARMV8_INSN_DECODE(kDisParmParseSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET), 578 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),579 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 1 /*idxParam*/),578 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 579 DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 5, 5, 1 /*idxParam*/), 580 580 DIS_ARMV8_INSN_DECODE(kDisParmParseImmMemOff, 10, 12, 1 /*idxParam*/), 581 581 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(LdStRegUImmGpr, 0xffc00000 /*fFixedInsn*/, 0 /*fClass*/, … … 625 625 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegOffGpr) 626 626 DIS_ARMV8_INSN_DECODE(kDisParmParseSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET), 627 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),628 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 1 /*idxParam*/),629 DIS_ARMV8_INSN_DECODE(kDisParmParse RegOff, 16, 5, 1 /*idxParam*/),627 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 628 DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 5, 5, 1 /*idxParam*/), 629 DIS_ARMV8_INSN_DECODE(kDisParmParseGprOff, 16, 5, 1 /*idxParam*/), 630 630 DIS_ARMV8_INSN_DECODE(kDisParmParseOption, 13, 3, 1 /*idxParam*/), 631 631 DIS_ARMV8_INSN_DECODE(kDisParmParseS, 12, 1, 1 /*idxParam*/), … … 696 696 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegUnscaledImmGpr) 697 697 DIS_ARMV8_INSN_DECODE(kDisParmParseSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET), 698 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),699 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 1 /*idxParam*/),698 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 699 DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 5, 5, 1 /*idxParam*/), 700 700 DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOffUnscaled, 12, 9, 1 /*idxParam*/), 701 701 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(LdStRegUnscaledImmGpr, 0xffe00c00 /*fFixedInsn*/, 0 /*fClass*/, … … 788 788 INVALID_OPCODE, 789 789 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegPairOff) 790 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),791 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,10, 5, 1 /*idxParam*/),792 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 2 /*idxParam*/),790 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 791 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 10, 5, 1 /*idxParam*/), 792 DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 5, 5, 2 /*idxParam*/), 793 793 DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /*idxParam*/), 794 794 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(LdStRegPairOff, 0xffc00000 /*fFixedInsn*/, 0 /*fClass*/, … … 813 813 INVALID_OPCODE, 814 814 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegPairPreIndex) 815 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),816 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,10, 5, 1 /*idxParam*/),817 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 2 /*idxParam*/),815 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 816 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 10, 5, 1 /*idxParam*/), 817 DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 5, 5, 2 /*idxParam*/), 818 818 DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /*idxParam*/), 819 819 DIS_ARMV8_INSN_DECODE(kDisParmParseSetPreIndexed, 0, 0, 2 /*idxParam*/), … … 839 839 INVALID_OPCODE, 840 840 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegPairPostIndex) 841 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,0, 5, 0 /*idxParam*/),842 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,10, 5, 1 /*idxParam*/),843 DIS_ARMV8_INSN_DECODE(kDisParmParse Reg,5, 5, 2 /*idxParam*/),841 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 842 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 10, 5, 1 /*idxParam*/), 843 DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 5, 5, 2 /*idxParam*/), 844 844 DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /*idxParam*/), 845 845 DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 2 /*idxParam*/), -
trunk/src/VBox/Disassembler/testcase/tstDisasmArmv8-1-asm.S
r106018 r106616 303 303 bic w0, w1, w28, ROR #31 304 304 305 bic wzr, wzr, wzr 306 bic wzr, wzr, wzr, LSL #1 307 bic wzr, wzr, wzr, LSL #31 308 bic wzr, wzr, wzr, LSR #1 309 bic wzr, wzr, wzr, LSR #31 310 bic wzr, wzr, wzr, ASR #1 311 bic wzr, wzr, wzr, ASR #31 312 bic wzr, wzr, wzr, ROR #1 313 bic wzr, wzr, wzr, ROR #31 314 305 315 bic x0, x0, x27 306 316 bic x0, x1, x28, LSL #1 … … 313 323 bic x0, x1, x28, ROR #63 314 324 325 bic xzr, xzr, xzr 326 bic xzr, xzr, xzr, LSL #1 327 bic xzr, xzr, xzr, LSL #63 328 bic xzr, xzr, xzr, LSR #1 329 bic xzr, xzr, xzr, LSR #63 330 bic xzr, xzr, xzr, ASR #1 331 bic xzr, xzr, xzr, ASR #63 332 bic xzr, xzr, xzr, ROR #1 333 bic xzr, xzr, xzr, ROR #63 334 315 335 orn w0, w0, w27 316 336 orn w0, w1, w28, LSL #1 … … 323 343 orn w0, w1, w28, ROR #31 324 344 345 orn wzr, wzr, wzr 346 orn wzr, wzr, wzr, LSL #1 347 orn wzr, wzr, wzr, LSL #31 348 orn wzr, wzr, wzr, LSR #1 349 orn wzr, wzr, wzr, LSR #31 350 orn wzr, wzr, wzr, ASR #1 351 orn wzr, wzr, wzr, ASR #31 352 orn wzr, wzr, wzr, ROR #1 353 orn wzr, wzr, wzr, ROR #31 354 325 355 orn x0, x0, x27 326 356 orn x0, x1, x28, LSL #1 … … 333 363 orn x0, x1, x28, ROR #63 334 364 365 orn xzr, xzr, xzr 366 orn xzr, xzr, xzr, LSL #1 367 orn xzr, xzr, xzr, LSL #63 368 orn xzr, xzr, xzr, LSR #1 369 orn xzr, xzr, xzr, LSR #63 370 orn xzr, xzr, xzr, ASR #1 371 orn xzr, xzr, xzr, ASR #63 372 orn xzr, xzr, xzr, ROR #1 373 orn xzr, xzr, xzr, ROR #63 374 335 375 eon w0, w0, w27 336 376 eon w0, w1, w28, LSL #1 … … 343 383 eon w0, w1, w28, ROR #31 344 384 385 eon wzr, wzr, wzr 386 eon wzr, wzr, wzr, LSL #1 387 eon wzr, wzr, wzr, LSL #31 388 eon wzr, wzr, wzr, LSR #1 389 eon wzr, wzr, wzr, LSR #31 390 eon wzr, wzr, wzr, ASR #1 391 eon wzr, wzr, wzr, ASR #31 392 eon wzr, wzr, wzr, ROR #1 393 eon wzr, wzr, wzr, ROR #31 394 345 395 eon x0, x0, x27 346 396 eon x0, x1, x28, LSL #1 … … 353 403 eon x0, x1, x28, ROR #63 354 404 405 eon xzr, xzr, xzr 406 eon xzr, xzr, xzr, LSL #1 407 eon xzr, xzr, xzr, LSL #63 408 eon xzr, xzr, xzr, LSR #1 409 eon xzr, xzr, xzr, LSR #63 410 eon xzr, xzr, xzr, ASR #1 411 eon xzr, xzr, xzr, ASR #63 412 eon xzr, xzr, xzr, ROR #1 413 eon xzr, xzr, xzr, ROR #63 414 355 415 bics w0, w0, w27 356 416 bics w0, w1, w28, LSL #1 … … 363 423 bics w0, w1, w28, ROR #31 364 424 425 bics wzr, wzr, wzr 426 bics wzr, wzr, wzr, LSL #1 427 bics wzr, wzr, wzr, LSL #31 428 bics wzr, wzr, wzr, LSR #1 429 bics wzr, wzr, wzr, LSR #31 430 bics wzr, wzr, wzr, ASR #1 431 bics wzr, wzr, wzr, ASR #31 432 bics wzr, wzr, wzr, ROR #1 433 bics wzr, wzr, wzr, ROR #31 434 365 435 bics x0, x0, x27 366 436 bics x0, x1, x28, LSL #1 … … 373 443 bics x0, x1, x28, ROR #63 374 444 445 bics xzr, xzr, xzr 446 bics xzr, xzr, xzr, LSL #1 447 bics xzr, xzr, xzr, LSL #63 448 bics xzr, xzr, xzr, LSR #1 449 bics xzr, xzr, xzr, LSR #63 450 bics xzr, xzr, xzr, ASR #1 451 bics xzr, xzr, xzr, ASR #63 452 bics xzr, xzr, xzr, ROR #1 453 bics xzr, xzr, xzr, ROR #63 454 375 455 ; Memory loads 376 456 ldrb w0, [x28] … … 378 458 ldrb w0, [x28, #4095] 379 459 460 ldrb w0, [sp] 461 ldrb w0, [sp, #1] 462 ldrb w0, [sp, #4095] 463 380 464 ldrsb w0, [x28] 381 465 ldrsb w0, [x28, #1] 382 466 ldrsb w0, [x28, #4095] 383 467 468 ldrsb w0, [sp] 469 ldrsb w0, [sp, #1] 470 ldrsb w0, [sp, #4095] 471 384 472 ldrsb x0, [x28] 385 473 ldrsb x0, [x28, #1] 386 474 ldrsb x0, [x28, #4095] 387 475 476 ldrsb x0, [sp] 477 ldrsb x0, [sp, #1] 478 ldrsb x0, [sp, #4095] 479 388 480 ldrh w0, [x28] 389 481 ldrh w0, [x28, #2] 390 482 ldrh w0, [x28, #1024] 391 483 484 ldrh w0, [sp] 485 ldrh w0, [sp, #2] 486 ldrh w0, [sp, #1024] 487 392 488 ldrsh w0, [x28] 393 489 ldrsh w0, [x28, #2] 394 490 ldrsh w0, [x28, #1024] 395 491 492 ldrsh w0, [sp] 493 ldrsh w0, [sp, #2] 494 ldrsh w0, [sp, #1024] 495 396 496 ldrsh x0, [x28] 397 497 ldrsh x0, [x28, #2] 398 498 ldrsh x0, [x28, #1024] 399 499 500 ldrsh x0, [sp] 501 ldrsh x0, [sp, #2] 502 ldrsh x0, [sp, #1024] 503 400 504 ldr x0, [x28] 401 505 ldr x0, [x28, #8] 402 506 ldr x0, [x28, #32760] 403 507 508 ldr x0, [sp] 509 ldr x0, [sp, #8] 510 ldr x0, [sp, #32760] 511 404 512 ldr w0, [x28] 405 513 ldr w0, [x28, #4] 406 514 ldr w0, [x28, #16380] 407 515 516 ldr w0, [sp] 517 ldr w0, [sp, #4] 518 ldr w0, [sp, #16380] 519 408 520 ldrsw x0, [x28] 409 521 ldrsw x0, [x28, #4] 410 522 ldrsw x0, [x28, #16380] 411 523 524 ldrsw x0, [sp] 525 ldrsw x0, [sp, #4] 526 ldrsw x0, [sp, #16380] 527 412 528 ldurb w0, [x28] 413 529 ldurb w0, [x28, #-256] 414 530 ldurb w0, [x28, #255] 415 531 532 ldurb w0, [sp] 533 ldurb w0, [sp, #-256] 534 ldurb w0, [sp, #255] 535 416 536 ldursb w0, [x28] 417 537 ldursb w0, [x28, #-256] 418 538 ldursb w0, [x28, #255] 419 539 540 ldursb w0, [sp] 541 ldursb w0, [sp, #-256] 542 ldursb w0, [sp, #255] 543 420 544 ldursb x0, [x28] 421 545 ldursb x0, [x28, #-256] 422 546 ldursb x0, [x28, #255] 423 547 548 ldursb x0, [sp] 549 ldursb x0, [sp, #-256] 550 ldursb x0, [sp, #255] 551 424 552 ldurh w0, [x28] 425 553 ldurh w0, [x28, #-256] 426 554 ldurh w0, [x28, #255] 427 555 556 ldurh w0, [sp] 557 ldurh w0, [sp, #-256] 558 ldurh w0, [sp, #255] 559 428 560 ldursh w0, [x28] 429 561 ldursh w0, [x28, #-256] 430 562 ldursh w0, [x28, #255] 431 563 564 ldursh w0, [sp] 565 ldursh w0, [sp, #-256] 566 ldursh w0, [sp, #255] 567 432 568 ldursh x0, [x28] 433 569 ldursh x0, [x28, #-256] 434 570 ldursh x0, [x28, #255] 435 571 572 ldursh x0, [sp] 573 ldursh x0, [sp, #-256] 574 ldursh x0, [sp, #255] 575 436 576 ldur x0, [x28] 437 577 ldur x0, [x28, #-256] 438 578 ldur x0, [x28, #255] 439 579 580 ldur x0, [sp] 581 ldur x0, [sp, #-256] 582 ldur x0, [sp, #255] 583 440 584 ldur w0, [x28] 441 585 ldur w0, [x28, #-256] 442 586 ldur w0, [x28, #255] 443 587 588 ldur w0, [sp] 589 ldur w0, [sp, #-256] 590 ldur w0, [sp, #255] 591 444 592 ldursw x0, [x28] 445 593 ldursw x0, [x28, #-256] 446 594 ldursw x0, [x28, #255] 595 596 ldursw x0, [sp] 597 ldursw x0, [sp, #-256] 598 ldursw x0, [sp, #255] 447 599 448 600 ldp w0, w1, [x28] … … 451 603 ldp w0, w1, [x28, #252] 452 604 605 ldp w0, w1, [sp] 606 ldp w0, w1, [sp, #4] 607 ldp w0, w1, [sp, #-256] 608 ldp w0, w1, [sp, #252] 609 453 610 ldp x0, x1, [x28] 454 611 ldp x0, x1, [x28, #8] … … 456 613 ldp x0, x1, [x28, #504] 457 614 615 ldp x0, x1, [sp] 616 ldp x0, x1, [sp, #8] 617 ldp x0, x1, [sp, #-512] 618 ldp x0, x1, [sp, #504] 619 458 620 ldp w0, w1, [x28, #4]! 459 621 ldp w0, w1, [x28, #-256]! 460 622 ldp w0, w1, [x28, #252]! 461 623 624 ldp w0, w1, [sp, #4]! 625 ldp w0, w1, [sp, #-256]! 626 ldp w0, w1, [sp, #252]! 627 462 628 ldp x0, x1, [x28, #8]! 463 629 ldp x0, x1, [x28, #-512]! 464 630 ldp x0, x1, [x28, #504]! 465 631 632 ldp x0, x1, [sp, #8]! 633 ldp x0, x1, [sp, #-512]! 634 ldp x0, x1, [sp, #504]! 635 466 636 ldp w0, w1, [x28], #4 467 637 ldp w0, w1, [x28], #-256 468 638 ldp w0, w1, [x28], #252 469 639 640 ldp w0, w1, [sp], #4 641 ldp w0, w1, [sp], #-256 642 ldp w0, w1, [sp], #252 643 470 644 ldp x0, x1, [x28], #8 471 645 ldp x0, x1, [x28], #-512 472 646 ldp x0, x1, [x28], #504 647 648 ldp x0, x1, [sp], #8 649 ldp x0, x1, [sp], #-512 650 ldp x0, x1, [sp], #504 473 651 474 652 ldr x0, [x1, x2] … … 482 660 ldr w0, [x1, w2, SXTW #2] 483 661 662 ldr x0, [sp, x2] 663 ldr w0, [sp, x2] 664 ldr x0, [sp, x2, SXTX #0] 665 ldr x0, [sp, x2, LSL #3] ; UXTX 666 ldr x0, [sp, x2, SXTX #3] 667 ldr w0, [sp, w2, UXTW #0] 668 ldr w0, [sp, w2, SXTW #0] 669 ldr w0, [sp, w2, UXTW #2] 670 ldr w0, [sp, w2, SXTW #2] 671 484 672 ldrb w0, [x1, x2] 485 673 ldrb w0, [x1, x2, LSL #0] ; UXTX … … 488 676 ldrb w0, [x1, w2, SXTW #0] 489 677 678 ldrb w0, [sp, x2] 679 ldrb w0, [sp, x2, LSL #0] ; UXTX 680 ldrb w0, [sp, x2, SXTX #0] 681 ldrb w0, [sp, w2, UXTW #0] 682 ldrb w0, [sp, w2, SXTW #0] 683 490 684 ldrsb w0, [x1, x2] 491 685 ldrsb w0, [x1, x2, LSL #0] ; UXTX … … 493 687 ldrsb w0, [x1, w2, UXTW #0] 494 688 ldrsb w0, [x1, w2, SXTW #0] 689 690 ldrsb w0, [sp, x2] 691 ldrsb w0, [sp, x2, LSL #0] ; UXTX 692 ldrsb w0, [sp, x2, SXTX #0] 693 ldrsb w0, [sp, w2, UXTW #0] 694 ldrsb w0, [sp, w2, SXTW #0] 495 695 496 696 ldrh w0, [x1, x2] … … 504 704 ldrh w0, [x1, w2, SXTW #1] 505 705 706 ldrh w0, [sp, x2] 707 ;ldrh w0, [sp, x2, LSL #0] ; UXTX 708 ldrh w0, [sp, x2, SXTX #0] 709 ldrh w0, [sp, x2, LSL #1] ; UXTX 710 ldrh w0, [sp, x2, SXTX #1] 711 ldrh w0, [sp, w2, UXTW #0] 712 ldrh w0, [sp, w2, SXTW #0] 713 ldrh w0, [sp, w2, UXTW #1] 714 ldrh w0, [sp, w2, SXTW #1] 715 506 716 ldrsh w0, [x1, x2] 507 717 ;ldrsh w0, [x1, x2, LSL #0] ; UXTX … … 514 724 ldrsh w0, [x1, w2, SXTW #1] 515 725 726 ldrsh w0, [sp, x2] 727 ;ldrsh w0, [sp, x2, LSL #0] ; UXTX 728 ldrsh w0, [sp, x2, SXTX #0] 729 ldrsh w0, [sp, x2, LSL #1] ; UXTX 730 ldrsh w0, [sp, x2, SXTX #1] 731 ldrsh w0, [sp, w2, UXTW #0] 732 ldrsh w0, [sp, w2, SXTW #0] 733 ldrsh w0, [sp, w2, UXTW #1] 734 ldrsh w0, [sp, w2, SXTW #1] 735 516 736 ldrsw x0, [x1, x2] 517 737 ;ldrsw x0, [x1, x2, LSL #0] ; UXTX … … 524 744 ldrsw x0, [x1, w2, SXTW #2] 525 745 746 ldrsw x0, [sp, x2] 747 ;ldrsw x0, [sp, x2, LSL #0] ; UXTX 748 ldrsw x0, [sp, x2, SXTX #0] 749 ldrsw x0, [sp, x2, LSL #2] ; UXTX 750 ldrsw x0, [sp, x2, SXTX #2] 751 ldrsw x0, [sp, w2, UXTW #0] 752 ldrsw x0, [sp, w2, SXTW #0] 753 ldrsw x0, [sp, w2, UXTW #2] 754 ldrsw x0, [sp, w2, SXTW #2] 755 526 756 ; Memory stores 527 757 strb w0, [x28] … … 529 759 strb w0, [x28, #4095] 530 760 761 strb w0, [sp] 762 strb w0, [sp, #1] 763 strb w0, [sp, #4095] 764 531 765 strh w0, [x28] 532 766 strh w0, [x28, #2] 533 767 strh w0, [x28, #1024] 534 768 769 strh w0, [sp] 770 strh w0, [sp, #2] 771 strh w0, [sp, #1024] 772 535 773 str x0, [x28] 536 774 str x0, [x28, #8] 537 775 str x0, [x28, #32760] 538 776 777 str x0, [sp] 778 str x0, [sp, #8] 779 str x0, [sp, #32760] 780 539 781 str w0, [x28] 540 782 str w0, [x28, #4] 541 783 str w0, [x28, #16380] 542 784 785 str w0, [sp] 786 str w0, [sp, #4] 787 str w0, [sp, #16380] 543 788 544 789 sturb w0, [x28] … … 546 791 sturb w0, [x28, #255] 547 792 793 sturb w0, [sp] 794 sturb w0, [sp, #-256] 795 sturb w0, [sp, #255] 796 548 797 sturh w0, [x28] 549 798 sturh w0, [x28, #-256] 550 799 sturh w0, [x28, #255] 551 800 801 sturh w0, [sp] 802 sturh w0, [sp, #-256] 803 sturh w0, [sp, #255] 804 552 805 stur x0, [x28] 553 806 stur x0, [x28, #-256] 554 807 stur x0, [x28, #255] 555 808 809 stur x0, [sp] 810 stur x0, [sp, #-256] 811 stur x0, [sp, #255] 812 556 813 stur w0, [x28] 557 814 stur w0, [x28, #-256] 558 815 stur w0, [x28, #255] 816 817 stur w0, [sp] 818 stur w0, [sp, #-256] 819 stur w0, [sp, #255] 559 820 560 821 stp w0, w1, [x28] … … 563 824 stp w0, w1, [x28, #252] 564 825 826 stp w0, w1, [sp] 827 stp w0, w1, [sp, #4] 828 stp w0, w1, [sp, #-256] 829 stp w0, w1, [sp, #252] 830 565 831 stp x0, x1, [x28] 566 832 stp x0, x1, [x28, #8] … … 568 834 stp x0, x1, [x28, #504] 569 835 836 stp x0, x1, [sp] 837 stp x0, x1, [sp, #8] 838 stp x0, x1, [sp, #-512] 839 stp x0, x1, [sp, #504] 840 570 841 stp w0, w1, [x28, #4]! 571 842 stp w0, w1, [x28, #-256]! 572 843 stp w0, w1, [x28, #252]! 573 844 845 stp w0, w1, [sp, #4]! 846 stp w0, w1, [sp, #-256]! 847 stp w0, w1, [sp, #252]! 848 574 849 stp x0, x1, [x28, #8]! 575 850 stp x0, x1, [x28, #-512]! 576 851 stp x0, x1, [x28, #504]! 577 852 853 stp x0, x1, [sp, #8]! 854 stp x0, x1, [sp, #-512]! 855 stp x0, x1, [sp, #504]! 856 578 857 stp w0, w1, [x28], #4 579 858 stp w0, w1, [x28], #-256 580 859 stp w0, w1, [x28], #252 581 860 861 stp w0, w1, [sp], #4 862 stp w0, w1, [sp], #-256 863 stp w0, w1, [sp], #252 864 582 865 stp x0, x1, [x28], #8 583 866 stp x0, x1, [x28], #-512 584 867 stp x0, x1, [x28], #504 868 869 stp x0, x1, [sp], #8 870 stp x0, x1, [sp], #-512 871 stp x0, x1, [sp], #504 585 872 586 873 str x0, [x1, x2] … … 594 881 str w0, [x1, w2, SXTW #2] 595 882 883 str x0, [sp, x2] 884 str w0, [sp, x2] 885 str x0, [sp, x2, SXTX #0] 886 str x0, [sp, x2, LSL #3] ; UXTX 887 str x0, [sp, x2, SXTX #3] 888 str w0, [sp, w2, UXTW #0] 889 str w0, [sp, w2, SXTW #0] 890 str w0, [sp, w2, UXTW #2] 891 str w0, [sp, w2, SXTW #2] 892 596 893 strb w0, [x1, x2] 597 894 strb w0, [x1, x2, LSL #0x0] … … 599 896 strb w0, [x1, w2, UXTW #0x0] 600 897 strb w0, [x1, w2, SXTW #0x0] 898 899 strb w0, [sp, x2] 900 strb w0, [sp, x2, LSL #0x0] 901 strb w0, [sp, x2, SXTX #0x0] 902 strb w0, [sp, w2, UXTW #0x0] 903 strb w0, [sp, w2, SXTW #0x0] 601 904 602 905 strh w0, [x1, x2] … … 609 912 strh w0, [x1, w2, UXTW #1] 610 913 strh w0, [x1, w2, SXTW #1] 914 915 strh w0, [sp, x2] 916 ;strh w0, [sp, x2, LSL #0x0] ; UXTX 917 strh w0, [sp, x2, SXTX #0x0] 918 strh w0, [sp, x2, LSL #1] ; UXTX 919 strh w0, [sp, x2, SXTX #1] 920 strh w0, [sp, w2, UXTW #0x0] 921 strh w0, [sp, w2, SXTW #0x0] 922 strh w0, [sp, w2, UXTW #1] 923 strh w0, [sp, w2, SXTW #1] 611 924 612 925 ; Conditional compare … … 939 1252 ;sqrshrn q0, q1, #64 940 1253 1254 dsb #0 1255 dsb #1 1256 dsb #2 1257 dsb #3 1258 dsb #4 1259 dsb #5 1260 dsb #6 1261 dsb #7 1262 dsb #8 1263 dsb #9 1264 dsb #0xa 1265 dsb #0xb 1266 dsb #0xc 1267 dsb #0xd 1268 dsb #0xe 1269 dsb #0xf 1270 941 1271 ; 942 1272 ; Keep last so the testcase can catch errors in
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