VirtualBox

Changeset 106620 in vbox for trunk/src/VBox/ValidationKit


Ignore:
Timestamp:
Oct 23, 2024 12:10:42 PM (3 months ago)
Author:
vboxsync
Message:

ValidationKit/bootsectors: preparing SIMD FP testcases for cvt family instructions: generalize the test register setup; bugref:10658; bugref:9898

  • define tokens for each computational register an instruction test might use
  • support MMX registers MM[0-7]
  • support FSxDI, needed by some instructions in bs3-cpu-instr-3
  • support arbitrary FSxREG, needed by some instructions in bs3-cpu-instr-3
  • support x86 general purpose registers (incomplete, not yet tested)
  • support placeholders for AVX-512 registers (ZMM, [XY]MM16..31, k0..7)
  • support placeholders for APX general purpose registers (R16..31)
  • provide token-to-name-string function bs3CpuInstrXGetRegisterName()
  • provide set-this-register-in-test-context function Bs3ExtCtxSetReg()
  • call these functions from SIMD FP test worker to set up a test's context
  • change all instruction test data in bs3-cpu-instr-4 to the new format
  • update bs3-cpu-instr-3 worker #7 to use new scheme (proof of concept)
  • fix register naming in vpextrb, vgather[dq]p[sd], vpgather[dq][dq]
  • fix unused register numbers in [v]pmovmskb #UD tests
  • todo: finish in bs3-cpu-instr-3 (will need implementation improvements)
Location:
trunk/src/VBox/ValidationKit/bootsectors
Files:
1 added
3 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac

    r106061 r106620  
    22832283EMIT_INSTR_PLUS_ICEBP_C64  vpextrb, FSxBX, XMM8, 000h
    22842284
    2285 %ifnmacro vpextrb_w1b_edx_xmm1 1
     2285%ifnmacro vpextrb_w1b_EDX_XMM1 1
    22862286 ; special encoding to prove that VEX.W is effectively ignored everywhere and that VEX.B only matter in 64-bit code.
    2287  %macro vpextrb_w1b_edx_xmm1 1
     2287 %macro vpextrb_w1b_EDX_XMM1 1
    22882288        db      X86_OP_VEX3, 3 | X86_OP_VEX3_BYTE1_X | X86_OP_VEX3_BYTE1_R
    22892289        db      X86_OP_VEX3_BYTE2_P_066H | (X86_OP_VEX3_BYTE2_VVVV_NONE << X86_OP_VEX3_BYTE2_VVVV_SHIFT) | X86_OP_VEX3_BYTE2_W
    … …  
    22922292
    22932293 ; invalid coding where VEX.L=1.
    2294  %macro vpextrb_l1_edx_xmm1 1
     2294 %macro vpextrb_l1_EDX_XMM1 1
    22952295        db      X86_OP_VEX3, 3 | X86_OP_VEX3_BYTE1_X | X86_OP_VEX3_BYTE1_R | X86_OP_VEX3_BYTE1_B
    22962296        db      X86_OP_VEX3_BYTE2_P_066H | (X86_OP_VEX3_BYTE2_VVVV_NONE << X86_OP_VEX3_BYTE2_VVVV_SHIFT) | X86_OP_VEX3_BYTE2_L
    … …  
    22982298 %endmacro
    22992299%endif
    2300 EMIT_INSTR_PLUS_ICEBP      vpextrb_w1b_edx_xmm1, 0FFh
    2301 EMIT_INSTR_PLUS_ICEBP      vpextrb_l1_edx_xmm1, 0FFh
     2300EMIT_INSTR_PLUS_ICEBP      vpextrb_w1b_EDX_XMM1, 0FFh
     2301EMIT_INSTR_PLUS_ICEBP      vpextrb_l1_EDX_XMM1, 0FFh
    23022302
    23032303;
    … …  
    24602460
    24612461 ;; @param 1    instruction name
    2462  ;; @param 2    'xmm' or 'ymm': type of destination register
    2463  ;; @param 3    'xmm' or 'ymm': type of vector register
    2464  ;; @param 4    'xmm' or 'ymm': type of mask register
     2462 ;; @param 2    'XMM' or 'YMM': type of destination register
     2463 ;; @param 3    'XMM' or 'YMM': type of vector register
     2464 ;; @param 4    'XMM' or 'YMM': type of mask register
    24652465 %macro EMIT_VGATHER_INSTR_BLOCK 4
    2466    EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, ebx,   0, %3 %+ 0, 1, %4 %+ 2   ;; UD: dest == index: v?gather?? ?mm0, [ebx+0+1*?mm0],   ?mm2
    2467    EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, ebx,   0, %3 %+ 1, 1, %4 %+ 0   ;; UD: dest  == mask: v?gather?? ?mm0, [ebx+0+1*?mm1],   ?mm0
    2468    EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, ebx,   0, %3 %+ 1, 1, %4 %+ 1   ;; UD: index == mask: v?gather?? ?mm0, [ebx+0+1*?mm1],   ?mm1
    2469    EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, ebx,   0, %3 %+ 1, 1, %4 %+ 2   ;;          baseline: v?gather?? ?mm0, [ebx+0+1*?mm1],   ?mm2
    2470    EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, ebx,   2, %3 %+ 1, 1, %4 %+ 2   ;;           offset8: v?gather?? ?mm0, [ebx+2+1*?mm1],   ?mm2
    2471    EMIT_NEG_VGATHER_INSTR %1, %2 %+ 0, ebx,   2, %3 %+ 1, 1, %4 %+ 2   ;;          -offset8: v?gather?? ?mm0, [ebx-2+1*?mm1],   ?mm2
    2472    EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, ebx, 153, %3 %+ 1, 1, %4 %+ 2   ;;          offset32: v?gather?? ?mm0, [ebx+153+1*?mm1], ?mm2
    2473    EMIT_NEG_VGATHER_INSTR %1, %2 %+ 0, ebx, 153, %3 %+ 1, 1, %4 %+ 2   ;;         -offset32: v?gather?? ?mm0, [ebx-153+1*?mm1], ?mm2
    2474    EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, ebx,   0, %3 %+ 1, 2, %4 %+ 2   ;;             scale: v?gather?? ?mm0, [ebx+0+2*?mm1],   ?mm2
     2466   EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, EBX,   0, %3 %+ 0, 1, %4 %+ 2   ;; UD: dest == index: v?gather?? ?mm0, [ebx+0+1*?mm0],   ?mm2
     2467   EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, EBX,   0, %3 %+ 1, 1, %4 %+ 0   ;; UD: dest  == mask: v?gather?? ?mm0, [ebx+0+1*?mm1],   ?mm0
     2468   EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, EBX,   0, %3 %+ 1, 1, %4 %+ 1   ;; UD: index == mask: v?gather?? ?mm0, [ebx+0+1*?mm1],   ?mm1
     2469   EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, EBX,   0, %3 %+ 1, 1, %4 %+ 2   ;;          baseline: v?gather?? ?mm0, [ebx+0+1*?mm1],   ?mm2
     2470   EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, EBX,   2, %3 %+ 1, 1, %4 %+ 2   ;;           offset8: v?gather?? ?mm0, [ebx+2+1*?mm1],   ?mm2
     2471   EMIT_NEG_VGATHER_INSTR %1, %2 %+ 0, EBX,   2, %3 %+ 1, 1, %4 %+ 2   ;;          -offset8: v?gather?? ?mm0, [ebx-2+1*?mm1],   ?mm2
     2472   EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, EBX, 153, %3 %+ 1, 1, %4 %+ 2   ;;          offset32: v?gather?? ?mm0, [ebx+153+1*?mm1], ?mm2
     2473   EMIT_NEG_VGATHER_INSTR %1, %2 %+ 0, EBX, 153, %3 %+ 1, 1, %4 %+ 2   ;;         -offset32: v?gather?? ?mm0, [ebx-153+1*?mm1], ?mm2
     2474   EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, EBX,   0, %3 %+ 1, 2, %4 %+ 2   ;;             scale: v?gather?? ?mm0, [ebx+0+2*?mm1],   ?mm2
    24752475  %if TMPL_BITS == 64
    2476    EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, rbx,   0, %3 %+ 1, 1, %4 %+ 2   ;;   64-bit base reg: v?gather?? ?mm0, [rbx+0+1*?mm1],   ?mm2
    2477    EMIT_ONE_VGATHER_INSTR %1, %2 %+ 8, r8d,   0, %3 %+ 9, 1, %4 %+ 10  ;;  64-bit-only regs: v?gather?? ?mm8, [r8d+0+1*?mm9],   ?mm10
     2476   EMIT_ONE_VGATHER_INSTR %1, %2 %+ 0, RBX,   0, %3 %+ 1, 1, %4 %+ 2   ;;   64-bit base reg: v?gather?? ?mm0, [rbx+0+1*?mm1],   ?mm2
     2477   EMIT_ONE_VGATHER_INSTR %1, %2 %+ 8, R8D,   0, %3 %+ 9, 1, %4 %+ 10  ;;  64-bit-only regs: v?gather?? ?mm8, [r8d+0+1*?mm9],   ?mm10
    24782478  %endif
    24792479 %endmacro ; EMIT_VGATHER_INSTR_BLOCK
    24802480
    24812481 ;; @param 1    instruction name
    2482  ;; @param 2    'xmm' or 'ymm': type of destination register for 256-bit variants
    2483  ;; @param 3    'xmm' or 'ymm': type of vector register for 256-bit variants
    2484  ;; @param 4    'xmm' or 'ymm': type of mask register for 256-bit variants
     2482 ;; @param 2    'XMM' or 'YMM': type of destination register for 256-bit variants
     2483 ;; @param 3    'XMM' or 'YMM': type of vector register for 256-bit variants
     2484 ;; @param 4    'XMM' or 'YMM': type of mask register for 256-bit variants
    24852485 %macro EMIT_VGATHER_INSTR_BLOCKS 4
    2486   EMIT_VGATHER_INSTR_BLOCK %1, xmm, xmm, xmm
     2486  EMIT_VGATHER_INSTR_BLOCK %1, XMM, XMM, XMM
    24872487  EMIT_VGATHER_INSTR_BLOCK %1,  %2,  %3,  %4
    24882488 %endmacro ; EMIT_VGATHER_INSTR_BLOCKS
    … …  
    24902490%endif ; !EMIT_VGATHER_INSTR_DEFINED
    24912491
    2492 EMIT_VGATHER_INSTR_BLOCKS vgatherdps, ymm, ymm, ymm
    2493 EMIT_VGATHER_INSTR_BLOCKS vgatherqps, xmm, ymm, xmm
    2494 EMIT_VGATHER_INSTR_BLOCKS vgatherdpd, ymm, xmm, ymm
    2495 EMIT_VGATHER_INSTR_BLOCKS vgatherqpd, ymm, ymm, ymm
    2496 
    2497 EMIT_VGATHER_INSTR_BLOCKS vpgatherdd, ymm, ymm, ymm
    2498 EMIT_VGATHER_INSTR_BLOCKS vpgatherqd, xmm, ymm, xmm
    2499 EMIT_VGATHER_INSTR_BLOCKS vpgatherdq, ymm, xmm, ymm
    2500 EMIT_VGATHER_INSTR_BLOCKS vpgatherqq, ymm, ymm, ymm
     2492EMIT_VGATHER_INSTR_BLOCKS vgatherdps, YMM, YMM, YMM
     2493EMIT_VGATHER_INSTR_BLOCKS vgatherqps, XMM, YMM, XMM
     2494EMIT_VGATHER_INSTR_BLOCKS vgatherdpd, YMM, XMM, YMM
     2495EMIT_VGATHER_INSTR_BLOCKS vgatherqpd, YMM, YMM, YMM
     2496
     2497EMIT_VGATHER_INSTR_BLOCKS vpgatherdd, YMM, YMM, YMM
     2498EMIT_VGATHER_INSTR_BLOCKS vpgatherqd, XMM, YMM, XMM
     2499EMIT_VGATHER_INSTR_BLOCKS vpgatherdq, YMM, XMM, YMM
     2500EMIT_VGATHER_INSTR_BLOCKS vpgatherqq, YMM, YMM, YMM
    25012501
    25022502;

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32

    r106473 r106620  
    4141#include <bs3kit.h>
    4242#include "bs3-cpu-instr-3-asm-auto.h"
     43#include "bs3-cpu-instr-x-regs.c32"
    4344
    4445#include <iprt/asm.h>
    … …  
    98689869    {
    98699870        {  bs3CpuInstr3_pmovmskb_EAX_MM2_icebp_c16,           255, RM_REG, T_AXMMX_OR_SSE, 4,  8, false, true, 0,   2, RT_ELEMENTS(s_aValues), s_aValues },
    9870         {  bs3CpuInstr3_pmovmskb_EAX_qword_FSxBX_icebp_c16,   255, RM_MEM, T_AXMMX_OR_SSE, 4,  8, true,  true, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     9871        {  bs3CpuInstr3_pmovmskb_EAX_qword_FSxBX_icebp_c16,   255, RM_MEM, T_AXMMX_OR_SSE, 4,  8, true,  true, 0, 255, RT_ELEMENTS(s_aValues), s_aValues },
    98719872        {  bs3CpuInstr3_pmovmskb_EAX_XMM2_icebp_c16,          255, RM_REG, T_SSE2,         4, 16, false, true, 0,   2, RT_ELEMENTS(s_aValues), s_aValues },
    9872         {  bs3CpuInstr3_pmovmskb_EAX_dqword_FSxBX_icebp_c16,  255, RM_MEM, T_SSE2,         4, 16, true,  true, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     9873        {  bs3CpuInstr3_pmovmskb_EAX_dqword_FSxBX_icebp_c16,  255, RM_MEM, T_SSE2,         4, 16, true,  true, 0, 255, RT_ELEMENTS(s_aValues), s_aValues },
    98739874        {  bs3CpuInstr3_vpmovmskb_EAX_XMM2_icebp_c16,         255, RM_REG, T_AVX_128,      4, 16, false, true, 0,   2, RT_ELEMENTS(s_aValues), s_aValues },
    9874         {  bs3CpuInstr3_vpmovmskb_EAX_dqword_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128,      4, 16, true,  true, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     9875        {  bs3CpuInstr3_vpmovmskb_EAX_dqword_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128,      4, 16, true,  true, 0, 255, RT_ELEMENTS(s_aValues), s_aValues },
    98759876        {  bs3CpuInstr3_vpmovmskb_EAX_YMM2_icebp_c16,         255, RM_REG, T_AVX2_256,     4, 32, false, true, 0,   2, RT_ELEMENTS(s_aValues), s_aValues },
    9876         {  bs3CpuInstr3_vpmovmskb_EAX_qqword_FSxBX_icebp_c16, 255, RM_MEM, T_AVX2_256,     4, 32, true,  true, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     9877        {  bs3CpuInstr3_vpmovmskb_EAX_qqword_FSxBX_icebp_c16, 255, RM_MEM, T_AVX2_256,     4, 32, true,  true, 0, 255, RT_ELEMENTS(s_aValues), s_aValues },
    98779878    };
    98789879    static BS3CPUINSTR3_TEST2_T const s_aTests32[] =
    98799880    {
    98809881        {  bs3CpuInstr3_pmovmskb_EAX_MM2_icebp_c32,           255, RM_REG, T_AXMMX_OR_SSE, 4,  8, false, true, 0,   2, RT_ELEMENTS(s_aValues), s_aValues },
    9881         {  bs3CpuInstr3_pmovmskb_EAX_qword_FSxBX_icebp_c32,   255, RM_MEM, T_AXMMX_OR_SSE, 4,  8, true,  true, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     9882        {  bs3CpuInstr3_pmovmskb_EAX_qword_FSxBX_icebp_c32,   255, RM_MEM, T_AXMMX_OR_SSE, 4,  8, true,  true, 0, 255, RT_ELEMENTS(s_aValues), s_aValues },
    98829883        {  bs3CpuInstr3_pmovmskb_EAX_XMM2_icebp_c32,          255, RM_REG, T_SSE2,         4, 16, false, true, 0,   2, RT_ELEMENTS(s_aValues), s_aValues },
    9883         {  bs3CpuInstr3_pmovmskb_EAX_dqword_FSxBX_icebp_c32,  255, RM_MEM, T_SSE2,         4, 16, true,  true, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     9884        {  bs3CpuInstr3_pmovmskb_EAX_dqword_FSxBX_icebp_c32,  255, RM_MEM, T_SSE2,         4, 16, true,  true, 0, 255, RT_ELEMENTS(s_aValues), s_aValues },
    98849885        {  bs3CpuInstr3_vpmovmskb_EAX_XMM2_icebp_c32,         255, RM_REG, T_AVX_128,      4, 16, false, true, 0,   2, RT_ELEMENTS(s_aValues), s_aValues },
    9885         {  bs3CpuInstr3_vpmovmskb_EAX_dqword_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128,      4, 16, true,  true, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     9886        {  bs3CpuInstr3_vpmovmskb_EAX_dqword_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128,      4, 16, true,  true, 0, 255, RT_ELEMENTS(s_aValues), s_aValues },
    98869887        {  bs3CpuInstr3_vpmovmskb_EAX_YMM2_icebp_c32,         255, RM_REG, T_AVX2_256,     4, 32, false, true, 0,   2, RT_ELEMENTS(s_aValues), s_aValues },
    9887         {  bs3CpuInstr3_vpmovmskb_EAX_qqword_FSxBX_icebp_c32, 255, RM_MEM, T_AVX2_256,     4, 32, true,  true, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     9888        {  bs3CpuInstr3_vpmovmskb_EAX_qqword_FSxBX_icebp_c32, 255, RM_MEM, T_AVX2_256,     4, 32, true,  true, 0, 255, RT_ELEMENTS(s_aValues), s_aValues },
    98889889    };
    98899890    static BS3CPUINSTR3_TEST2_T const s_aTests64[] =
    98909891    {
    98919892        {  bs3CpuInstr3_pmovmskb_EAX_MM2_icebp_c64,           255, RM_REG, T_AXMMX_OR_SSE, 8,  8, false, true, 0,   2, RT_ELEMENTS(s_aValues), s_aValues },
    9892         {  bs3CpuInstr3_pmovmskb_EAX_qword_FSxBX_icebp_c64,   255, RM_MEM, T_AXMMX_OR_SSE, 8,  8, true,  true, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     9893        {  bs3CpuInstr3_pmovmskb_EAX_qword_FSxBX_icebp_c64,   255, RM_MEM, T_AXMMX_OR_SSE, 8,  8, true,  true, 0, 255, RT_ELEMENTS(s_aValues), s_aValues },
    98939894        {  bs3CpuInstr3_pmovmskb_EAX_XMM2_icebp_c64,          255, RM_REG, T_SSE2,         8, 16, false, true, 0,   2, RT_ELEMENTS(s_aValues), s_aValues },
    9894         {  bs3CpuInstr3_pmovmskb_EAX_dqword_FSxBX_icebp_c64,  255, RM_MEM, T_SSE2,         8, 16, true,  true, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     9895        {  bs3CpuInstr3_pmovmskb_EAX_dqword_FSxBX_icebp_c64,  255, RM_MEM, T_SSE2,         8, 16, true,  true, 0, 255, RT_ELEMENTS(s_aValues), s_aValues },
    98959896        {  bs3CpuInstr3_vpmovmskb_EAX_XMM2_icebp_c64,         255, RM_REG, T_AVX_128,      8, 16, false, true, 0,   2, RT_ELEMENTS(s_aValues), s_aValues },
    9896         {  bs3CpuInstr3_vpmovmskb_EAX_dqword_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128,      8, 16, true,  true, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     9897        {  bs3CpuInstr3_vpmovmskb_EAX_dqword_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128,      8, 16, true,  true, 0, 255, RT_ELEMENTS(s_aValues), s_aValues },
    98979898        {  bs3CpuInstr3_vpmovmskb_EAX_YMM2_icebp_c64,         255, RM_REG, T_AVX2_256,     8, 32, false, true, 0,   2, RT_ELEMENTS(s_aValues), s_aValues },
    9898         {  bs3CpuInstr3_vpmovmskb_EAX_qqword_FSxBX_icebp_c64, 255, RM_MEM, T_AVX2_256,     8, 32, true,  true, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     9899        {  bs3CpuInstr3_vpmovmskb_EAX_qqword_FSxBX_icebp_c64, 255, RM_MEM, T_AVX2_256,     8, 32, true,  true, 0, 255, RT_ELEMENTS(s_aValues), s_aValues },
    98999900        {  bs3CpuInstr3_vpmovmskb_RAX_YMM9_icebp_c64,         255, RM_REG, T_AVX2_256,     8, 32, false, true, 0,   9, RT_ELEMENTS(s_aValues), s_aValues },
    99009901    };
    … …  
    1016610167        {  bs3CpuInstr3_vpextrb_FSxBX_XMM1_0FFh_icebp_c16,   X86_XCPT_DB, RM_MEM8,  T_AVX_128, 1,  8, false, true, 255, 1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
    1016710168        {  bs3CpuInstr3_vpextrb_FSxBX_XMM1_000h_icebp_c16,   X86_XCPT_DB, RM_MEM8,  T_AVX_128, 1,  8, false, true, 255, 1, RT_ELEMENTS(s_aValues00_b),    s_aValues00_b },
    10168         {  bs3CpuInstr3_vpextrb_w1b_edx_xmm1_0FFh_icebp_c16, 255,         RM_REG,   T_AVX_128, 4, 32, false, true, 2,   1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
    10169         {  bs3CpuInstr3_vpextrb_l1_edx_xmm1_0FFh_icebp_c16,  255,         RM_REG,   T_AVX_128, 4, 32, true,  true, 2,   1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
     10169        {  bs3CpuInstr3_vpextrb_w1b_EDX_XMM1_0FFh_icebp_c16, 255,         RM_REG,   T_AVX_128, 4, 32, false, true, 2,   1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
     10170        {  bs3CpuInstr3_vpextrb_l1_EDX_XMM1_0FFh_icebp_c16,  255,         RM_REG,   T_AVX_128, 4, 32, true,  true, 2,   1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
    1017010171
    1017110172        {  bs3CpuInstr3_pextrw_EDX_MM1_000h_icebp_c16,       255,         RM_REG,   T_MMX_SSE, 4, 32, false, true, 2,   1, RT_ELEMENTS(s_aValues00_w),    s_aValues00_w },
    … …  
    1020410205        {  bs3CpuInstr3_vpextrb_FSxBX_XMM1_0FFh_icebp_c32,   X86_XCPT_DB, RM_MEM8,  T_AVX_128, 1,  8, false, true, 255, 1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
    1020510206        {  bs3CpuInstr3_vpextrb_FSxBX_XMM1_000h_icebp_c32,   X86_XCPT_DB, RM_MEM8,  T_AVX_128, 1,  8, false, true, 255, 1, RT_ELEMENTS(s_aValues00_b),    s_aValues00_b },
    10206         {  bs3CpuInstr3_vpextrb_w1b_edx_xmm1_0FFh_icebp_c32, 255,         RM_REG,   T_AVX_128, 4, 32, false, true, 2,   1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
    10207         {  bs3CpuInstr3_vpextrb_l1_edx_xmm1_0FFh_icebp_c32,  255,         RM_REG,   T_AVX_128, 4, 32, true,  true, 2,   1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
     10207        {  bs3CpuInstr3_vpextrb_w1b_EDX_XMM1_0FFh_icebp_c32, 255,         RM_REG,   T_AVX_128, 4, 32, false, true, 2,   1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
     10208        {  bs3CpuInstr3_vpextrb_l1_EDX_XMM1_0FFh_icebp_c32,  255,         RM_REG,   T_AVX_128, 4, 32, true,  true, 2,   1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
    1020810209
    1020910210        {  bs3CpuInstr3_pextrw_EDX_MM1_000h_icebp_c32,       255,         RM_REG,   T_MMX_SSE, 4, 32, false, true, 2,   1, RT_ELEMENTS(s_aValues00_w),    s_aValues00_w },
    … …  
    1025010251        {  bs3CpuInstr3_vpextrb_FSxBX_XMM8_0FFh_icebp_c64,   X86_XCPT_DB, RM_MEM8,  T_AVX_128, 1,  8, false, true, 255, 8, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
    1025110252        {  bs3CpuInstr3_vpextrb_FSxBX_XMM8_000h_icebp_c64,   X86_XCPT_DB, RM_MEM8,  T_AVX_128, 1,  8, false, true, 255, 8, RT_ELEMENTS(s_aValues00_b),    s_aValues00_b },
    10252         {  bs3CpuInstr3_vpextrb_w1b_edx_xmm1_0FFh_icebp_c64, 255,         RM_REG,   T_AVX_128, 4, 32, false, true, 10,  1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b }, /* manually setting VEX.B=1 */
    10253         {  bs3CpuInstr3_vpextrb_l1_edx_xmm1_0FFh_icebp_c64,  255,         RM_REG,   T_AVX_128, 4, 32, true,  true, 2,   1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
     10253        {  bs3CpuInstr3_vpextrb_w1b_EDX_XMM1_0FFh_icebp_c64, 255,         RM_REG,   T_AVX_128, 4, 32, false, true, 10,  1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b }, /* manually setting VEX.B=1 */
     10254        {  bs3CpuInstr3_vpextrb_l1_EDX_XMM1_0FFh_icebp_c64,  255,         RM_REG,   T_AVX_128, 4, 32, true,  true, 2,   1, RT_ELEMENTS(s_aValuesFF_b),    s_aValuesFF_b },
    1025410255
    1025510256        {  bs3CpuInstr3_pextrw_EDX_MM1_000h_icebp_c64,       255,         RM_REG,   T_MMX_SSE, 4, 32, false, true, 2,   1, RT_ELEMENTS(s_aValues00_w),    s_aValues00_w },
    … …  
    1493414935                    uint8_t const   cbInstr     = ((uint8_t const BS3_FAR *)(uintptr_t)paTests[iTest].pfnWorker)[-1];
    1493514936                    unsigned const  cValues     = paTests[iTest].cValues;
    14936                     uint8_t const   cbOperand   = paTests[iTest].enmType < T_256BITS ? 128/8 : 256/8;
    1493714937                    PRTUINT256U     puMemOp     = fPf ? (PRTUINT256U)&pbBuf[X86_PAGE_SIZE * 2 + 256] : (PRTUINT256U)&pbBuf[X86_PAGE_SIZE];
    1493814938                    uint16_t        idTestStep  = bRing * 10000 + iCfg * 100 + iTest * 10;
    … …  
    1497014970                             */
    1497114971                            /* initial value of destination register */
    14972                             Bs3ExtCtxSetYmm(pExtCtx, paTests[iTest].iMmDst, &paValues[iVal].uDstInit, 32);
     14972                            Bs3ExtCtxSetReg(pExtCtx, paTests[iTest].iMmDst, (void *)&paValues[iVal].uDstInit, SET_YmmHi);
    1497314973
    1497414974                            /* offsets register */
    14975                             Bs3ExtCtxSetYmm(pExtCtx, paTests[iTest].iMmOff, &paValues[iVal].uOffsets, 32);
     14975                            Bs3ExtCtxSetReg(pExtCtx, paTests[iTest].iMmOff, (void *)&paValues[iVal].uOffsets, SET_YmmHi);
    1497614976
    1497714977                            /* initial value of mask register */
    14978                             Bs3ExtCtxSetYmm(pExtCtx, paTests[iTest].iMmMsk, &paValues[iVal].uMask, 32);
     14978                            Bs3ExtCtxSetReg(pExtCtx, paTests[iTest].iMmMsk, (void *)&paValues[iVal].uMask, SET_YmmHi);
    1497914979
    1498014980                            /* Memory pointer. */
    1498114981                            puMemOp = fPf ? (PRTUINT256U)&pbBuf[X86_PAGE_SIZE * 2 + 256] : (PRTUINT256U)&pbBuf[X86_PAGE_SIZE];
    1498214982                            puMemOp = (PRTUINT256U)(((uint8_t BS3_FAR *)puMemOp) - paTests[iTest].cMemOpOffset);
    14983                             BS3_ASSERT(paTests[iTest].iGpMem == X86_GREG_xBX || paTests[iTest].iGpMem == X86_GREG_x8);
    14984                             if (paTests[iTest].iGpMem == X86_GREG_xBX)
    14985                                 Bs3RegCtxSetGrpSegFromCurPtr(&Ctx, &Ctx.rbx, &Ctx.fs, puMemOp);
    14986                             else if (paTests[iTest].iGpMem == X86_GREG_x8)
    14987                                 Bs3RegCtxSetGrpSegFromCurPtr(&Ctx, &Ctx.r8,  &Ctx.fs, puMemOp);
     14983                            Bs3ExtCtxSetReg(pExtCtx, BS3_FSxREG(paTests[iTest].iGpMem), (void *)puMemOp, (void *)&Ctx);
    1498814984
    1498914985                            /*
    … …  
    1500515001                            {
    1500615002                                RTUINT256U zip = RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000);
    15007                                 Bs3ExtCtxSetYmm(pExtCtx, paTests[iTest].iMmDst, &paValues[iVal].uDstOut, cbOperand);
    15008                                 Bs3ExtCtxSetYmm(pExtCtx, paTests[iTest].iMmMsk, &zip, cbOperand);
     15003                                Bs3ExtCtxSetReg(pExtCtx, paTests[iTest].iMmDst, (void *)&paValues[iVal].uDstOut, SET_YmmHi);
     15004                                Bs3ExtCtxSetReg(pExtCtx, paTests[iTest].iMmMsk, (void *)&zip, SET_YmmHi);
    1500915005                            }
    1501015006
    1501115007                            if (bXcptExpect == X86_XCPT_PF)
    15012                                 Bs3ExtCtxSetYmm(pExtCtx, paTests[iTest].iMmMsk, &paValues[iVal].uMaskPf, cbOperand);
     15008                                Bs3ExtCtxSetReg(pExtCtx, paTests[iTest].iMmMsk, (void *)&paValues[iVal].uMaskPf, SET_YmmHi);
    1501315009
    1501415010#if defined(DEBUG_aeichner) /** @todo Necessary kludge on a i7-1068NG7. */
    … …  
    1515115147    static BS3CPUINSTR3_TEST7_T const s_aTests16[] =
    1515215148    {
    15153         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15154         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15155         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15156         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15157         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
    15158         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15159         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15160         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15161         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15162         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm0_x_1_ymm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15163         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15164         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15165         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15166         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm1_x_2_ymm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
    15167         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_2_plus_ymm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15168         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_less_2_plus_ymm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15169         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_153_plus_ymm1_x_1_ymm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15170         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_less_153_plus_ymm1_x_1_ymm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15171 
    15172         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15173         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15174         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15175         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15176         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
    15177         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15178         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15179         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15180         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15181         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm0_x_1_ymm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15182         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15183         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15184         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15185         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm1_x_2_ymm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
    15186         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_2_plus_ymm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15187         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_less_2_plus_ymm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15188         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_153_plus_ymm1_x_1_ymm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15189         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_less_153_plus_ymm1_x_1_ymm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15149        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15150        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15151        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15152        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15153        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
     15154        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15155        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15156        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15157        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15158        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM0_x_1_YMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15159        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15160        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15161        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15162        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM1_x_2_YMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
     15163        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_2_plus_YMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15164        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_less_2_plus_YMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15165        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_153_plus_YMM1_x_1_YMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15166        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_less_153_plus_YMM1_x_1_YMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15167
     15168        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15169        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15170        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15171        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15172        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
     15173        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15174        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15175        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15176        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15177        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM0_x_1_YMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15178        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15179        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15180        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15181        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM1_x_2_YMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
     15182        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_2_plus_YMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15183        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_less_2_plus_YMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15184        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_153_plus_YMM1_x_1_YMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15185        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_less_153_plus_YMM1_x_1_YMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    1519015186    };
    1519115187    static BS3CPUINSTR3_TEST7_T const s_aTests32[] =
    1519215188    {
    15193         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15194         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15195         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15196         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15197         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
    15198         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15199         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15200         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15201         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15202         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm0_x_1_ymm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15203         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15204         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15205         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15206         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm1_x_2_ymm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
    15207         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_2_plus_ymm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15208         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_less_2_plus_ymm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15209         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_153_plus_ymm1_x_1_ymm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15210         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_less_153_plus_ymm1_x_1_ymm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15211 
    15212         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15213         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15214         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15215         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15216         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
    15217         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15218         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15219         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15220         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15221         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm0_x_1_ymm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15222         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15223         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15224         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15225         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm1_x_2_ymm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
    15226         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_2_plus_ymm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15227         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_less_2_plus_ymm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15228         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_153_plus_ymm1_x_1_ymm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15229         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_less_153_plus_ymm1_x_1_ymm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15189        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15190        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15191        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15192        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15193        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
     15194        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15195        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15196        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15197        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15198        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM0_x_1_YMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15199        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15200        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15201        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15202        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM1_x_2_YMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
     15203        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_2_plus_YMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15204        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_less_2_plus_YMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15205        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_153_plus_YMM1_x_1_YMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15206        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_less_153_plus_YMM1_x_1_YMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15207
     15208        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15209        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15210        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15211        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15212        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
     15213        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15214        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15215        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15216        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15217        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM0_x_1_YMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15218        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15219        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15220        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15221        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM1_x_2_YMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
     15222        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_2_plus_YMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15223        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_less_2_plus_YMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15224        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_153_plus_YMM1_x_1_YMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15225        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_less_153_plus_YMM1_x_1_YMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    1523015226    };
    1523115227    static BS3CPUINSTR3_TEST7_T const s_aTests64[] =
    1523215228    {
    15233         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15234         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15235         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15236         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15237         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
    15238         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15239         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15240         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15241         {  bs3CpuInstr3_vgatherdps_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15242         {  bs3CpuInstr3_vgatherdps_xmm0_rbx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15243         {  bs3CpuInstr3_vgatherdps_xmm8_r8d_plus_0_plus_xmm9_x_1_xmm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, 8, 8, 9, 10, RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15244         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm0_x_1_ymm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15245         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15246         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15247         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15248         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_0_plus_ymm1_x_2_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
    15249         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_2_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15250         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_less_2_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15251         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_plus_153_plus_ymm1_x_1_ymm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15252         {  bs3CpuInstr3_vgatherdps_ymm0_ebx_less_153_plus_ymm1_x_1_ymm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15253         {  bs3CpuInstr3_vgatherdps_ymm0_rbx_plus_0_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15254         {  bs3CpuInstr3_vgatherdps_ymm8_r8d_plus_0_plus_ymm9_x_1_ymm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, 8, 8, 9, 10, RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15255 
    15256         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15257         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15258         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15259         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15260         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
    15261         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15262         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15263         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15264         {  bs3CpuInstr3_vpgatherdd_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15265         {  bs3CpuInstr3_vpgatherdd_xmm0_rbx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15266         {  bs3CpuInstr3_vpgatherdd_xmm8_r8d_plus_0_plus_xmm9_x_1_xmm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, 8, 8, 9, 10, RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15267         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm0_x_1_ymm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15268         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15269         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15270         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15271         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_0_plus_ymm1_x_2_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
    15272         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_2_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15273         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_less_2_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15274         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_plus_153_plus_ymm1_x_1_ymm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15275         {  bs3CpuInstr3_vpgatherdd_ymm0_ebx_less_153_plus_ymm1_x_1_ymm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15276         {  bs3CpuInstr3_vpgatherdd_ymm0_rbx_plus_0_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    15277         {  bs3CpuInstr3_vpgatherdd_ymm8_r8d_plus_0_plus_ymm9_x_1_ymm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, 8, 8, 9, 10, RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15229        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15230        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15231        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15232        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15233        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
     15234        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15235        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15236        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15237        {  bs3CpuInstr3_vgatherdps_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15238        {  bs3CpuInstr3_vgatherdps_XMM0_RBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, RBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15239        {  bs3CpuInstr3_vgatherdps_XMM8_R8D_plus_0_plus_XMM9_x_1_XMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, XMM8, R8D, XMM9, XMM10, RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15240        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM0_x_1_YMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15241        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15242        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15243        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15244        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_0_plus_YMM1_x_2_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
     15245        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_2_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15246        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_less_2_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15247        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_plus_153_plus_YMM1_x_1_YMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15248        {  bs3CpuInstr3_vgatherdps_YMM0_EBX_less_153_plus_YMM1_x_1_YMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15249        {  bs3CpuInstr3_vgatherdps_YMM0_RBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, RBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15250        {  bs3CpuInstr3_vgatherdps_YMM8_R8D_plus_0_plus_YMM9_x_1_YMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, YMM8, R8D, YMM9, YMM10, RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15251
     15252        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15253        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15254        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15255        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15256        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
     15257        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15258        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15259        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15260        {  bs3CpuInstr3_vpgatherdd_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15261        {  bs3CpuInstr3_vpgatherdd_XMM0_RBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, RBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15262        {  bs3CpuInstr3_vpgatherdd_XMM8_R8D_plus_0_plus_XMM9_x_1_XMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, XMM8, R8D, XMM9, XMM10, RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15263        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM0_x_1_YMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15264        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15265        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15266        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15267        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_0_plus_YMM1_x_2_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x2), s_aValues32_32x2 },
     15268        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_2_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15269        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_less_2_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15270        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_plus_153_plus_YMM1_x_1_YMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15271        {  bs3CpuInstr3_vpgatherdd_YMM0_EBX_less_153_plus_YMM1_x_1_YMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15272        {  bs3CpuInstr3_vpgatherdd_YMM0_RBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, RBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
     15273        {  bs3CpuInstr3_vpgatherdd_YMM8_R8D_plus_0_plus_YMM9_x_1_YMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, YMM8, R8D, YMM9, YMM10, RT_ELEMENTS(s_aValues32_32x1), s_aValues32_32x1 },
    1527815274    };
    1527915275    static BS3CPUINSTR3_TEST7_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST7_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    … …  
    1539915395    static BS3CPUINSTR3_TEST7_T const s_aTests16[] =
    1540015396    {
    15401         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15402         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15403         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15404         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15405         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x2X), s_aValues32_64x2X },
    15406         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15407         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15408         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15409         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15410         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm0_x_1_xmm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15411         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15412         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15413         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15414         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm1_x_2_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x2Y), s_aValues32_64x2Y },
    15415         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_2_plus_ymm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15416         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_less_2_plus_ymm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15417         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_153_plus_ymm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15418         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_less_153_plus_ymm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15419 
    15420         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15421         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15422         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15423         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15424         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x2X), s_aValues32_64x2X },
    15425         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15426         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15427         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15428         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15429         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm0_x_1_xmm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15430         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15431         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15432         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15433         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm1_x_2_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x2Y), s_aValues32_64x2Y },
    15434         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_2_plus_ymm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15435         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_less_2_plus_ymm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15436         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_153_plus_ymm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15437         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_less_153_plus_ymm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15397        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15398        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15399        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15400        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15401        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x2X), s_aValues32_64x2X },
     15402        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15403        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15404        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15405        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15406        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM0_x_1_XMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15407        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15408        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15409        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15410        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM1_x_2_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x2Y), s_aValues32_64x2Y },
     15411        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_2_plus_YMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15412        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_less_2_plus_YMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15413        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_153_plus_YMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15414        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_less_153_plus_YMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15415
     15416        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15417        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15418        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15419        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15420        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x2X), s_aValues32_64x2X },
     15421        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15422        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15423        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15424        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15425        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM0_x_1_XMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15426        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15427        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15428        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15429        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM1_x_2_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x2Y), s_aValues32_64x2Y },
     15430        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_2_plus_YMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15431        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_less_2_plus_YMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15432        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_153_plus_YMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15433        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_less_153_plus_YMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    1543815434    };
    1543915435    static BS3CPUINSTR3_TEST7_T const s_aTests32[] =
    1544015436    {
    15441         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15442         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15443         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15444         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15445         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x2X), s_aValues32_64x2X },
    15446         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15447         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15448         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15449         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15450         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm0_x_1_xmm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15451         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15452         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15453         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15454         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm1_x_2_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x2Y), s_aValues32_64x2Y },
    15455         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_2_plus_ymm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15456         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_less_2_plus_ymm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15457         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_153_plus_ymm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15458         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_less_153_plus_ymm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15459 
    15460         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15461         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15462         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15463         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15464         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x2X), s_aValues32_64x2X },
    15465         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15466         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15467         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15468         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15469         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm0_x_1_xmm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15470         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15471         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15472         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15473         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm1_x_2_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x2Y), s_aValues32_64x2Y },
    15474         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_2_plus_ymm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15475         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_less_2_plus_ymm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15476         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_153_plus_ymm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15477         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_less_153_plus_ymm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15437        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15438        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15439        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15440        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15441        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x2X), s_aValues32_64x2X },
     15442        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15443        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15444        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15445        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15446        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM0_x_1_XMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15447        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15448        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15449        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15450        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM1_x_2_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x2Y), s_aValues32_64x2Y },
     15451        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_2_plus_YMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15452        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_less_2_plus_YMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15453        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_153_plus_YMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15454        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_less_153_plus_YMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15455
     15456        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15457        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15458        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15459        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15460        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x2X), s_aValues32_64x2X },
     15461        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15462        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15463        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15464        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15465        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM0_x_1_XMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15466        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15467        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15468        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15469        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM1_x_2_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x2Y), s_aValues32_64x2Y },
     15470        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_2_plus_YMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15471        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_less_2_plus_YMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15472        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_153_plus_YMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15473        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_less_153_plus_YMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    1547815474    };
    1547915475    static BS3CPUINSTR3_TEST7_T const s_aTests64[] =
    1548015476    {
    15481         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15482         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15483         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15484         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15485         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x2X), s_aValues32_64x2X },
    15486         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15487         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15488         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15489         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15490         {  bs3CpuInstr3_vgatherqps_xmm0_rbx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15491         {  bs3CpuInstr3_vgatherqps_xmm8_r8d_plus_0_plus_xmm9_x_1_xmm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, 8, 8, 9, 10, RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15492         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm0_x_1_xmm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15493         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15494         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15495         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15496         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_0_plus_ymm1_x_2_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x2Y), s_aValues32_64x2Y },
    15497         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_2_plus_ymm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15498         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_less_2_plus_ymm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15499         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_plus_153_plus_ymm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15500         {  bs3CpuInstr3_vgatherqps_xmm0_ebx_less_153_plus_ymm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15501         {  bs3CpuInstr3_vgatherqps_xmm0_rbx_plus_0_plus_ymm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15502         {  bs3CpuInstr3_vgatherqps_xmm8_r8d_plus_0_plus_ymm9_x_1_xmm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, 8, 8, 9, 10, RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15503 
    15504         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15505         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15506         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15507         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15508         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x2X), s_aValues32_64x2X },
    15509         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15510         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15511         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15512         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15513         {  bs3CpuInstr3_vpgatherqd_xmm0_rbx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15514         {  bs3CpuInstr3_vpgatherqd_xmm8_r8d_plus_0_plus_xmm9_x_1_xmm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, 8, 8, 9, 10, RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
    15515         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm0_x_1_xmm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15516         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15517         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15518         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15519         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_0_plus_ymm1_x_2_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x2Y), s_aValues32_64x2Y },
    15520         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_2_plus_ymm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15521         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_less_2_plus_ymm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15522         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_plus_153_plus_ymm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15523         {  bs3CpuInstr3_vpgatherqd_xmm0_ebx_less_153_plus_ymm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15524         {  bs3CpuInstr3_vpgatherqd_xmm0_rbx_plus_0_plus_ymm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    15525         {  bs3CpuInstr3_vpgatherqd_xmm8_r8d_plus_0_plus_ymm9_x_1_xmm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, 8, 8, 9, 10, RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15477        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15478        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15479        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15480        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15481        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x2X), s_aValues32_64x2X },
     15482        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15483        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15484        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15485        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15486        {  bs3CpuInstr3_vgatherqps_XMM0_RBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, RBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15487        {  bs3CpuInstr3_vgatherqps_XMM8_R8D_plus_0_plus_XMM9_x_1_XMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, XMM8, R8D, XMM9, XMM10, RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15488        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM0_x_1_XMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15489        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15490        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15491        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15492        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_0_plus_YMM1_x_2_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x2Y), s_aValues32_64x2Y },
     15493        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_2_plus_YMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15494        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_less_2_plus_YMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15495        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_plus_153_plus_YMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15496        {  bs3CpuInstr3_vgatherqps_XMM0_EBX_less_153_plus_YMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15497        {  bs3CpuInstr3_vgatherqps_XMM0_RBX_plus_0_plus_YMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, RBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15498        {  bs3CpuInstr3_vgatherqps_XMM8_R8D_plus_0_plus_YMM9_x_1_XMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, XMM8, R8D, YMM9, XMM10, RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15499
     15500        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15501        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15502        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15503        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15504        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x2X), s_aValues32_64x2X },
     15505        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15506        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15507        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15508        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15509        {  bs3CpuInstr3_vpgatherqd_XMM0_RBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, RBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15510        {  bs3CpuInstr3_vpgatherqd_XMM8_R8D_plus_0_plus_XMM9_x_1_XMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, XMM8, R8D, XMM9, XMM10, RT_ELEMENTS(s_aValues32_64x1X), s_aValues32_64x1X },
     15511        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM0_x_1_XMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15512        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15513        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15514        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15515        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_0_plus_YMM1_x_2_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x2Y), s_aValues32_64x2Y },
     15516        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_2_plus_YMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15517        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_less_2_plus_YMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15518        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_plus_153_plus_YMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15519        {  bs3CpuInstr3_vpgatherqd_XMM0_EBX_less_153_plus_YMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, XMM0, EBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15520        {  bs3CpuInstr3_vpgatherqd_XMM0_RBX_plus_0_plus_YMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, XMM0, RBX, YMM1, XMM2,  RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
     15521        {  bs3CpuInstr3_vpgatherqd_XMM8_R8D_plus_0_plus_YMM9_x_1_XMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, XMM8, R8D, YMM9, XMM10, RT_ELEMENTS(s_aValues32_64x1Y), s_aValues32_64x1Y },
    1552615522    };
    1552715523    static BS3CPUINSTR3_TEST7_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST7_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    … …  
    1560015596    static BS3CPUINSTR3_TEST7_T const s_aTests16[] =
    1560115597    {
    15602         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15603         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15604         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15605         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15606         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
    15607         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15608         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15609         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15610         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15611         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm0_x_1_ymm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15612         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15613         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15614         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15615         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm1_x_2_ymm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
    15616         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_2_plus_xmm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15617         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_less_2_plus_xmm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15618         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_153_plus_xmm1_x_1_ymm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15619         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_less_153_plus_xmm1_x_1_ymm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15620 
    15621         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15622         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15623         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15624         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15625         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
    15626         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15627         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15628         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15629         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15630         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm0_x_1_ymm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15631         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15632         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15633         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15634         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm1_x_2_ymm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
    15635         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_2_plus_xmm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15636         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_less_2_plus_xmm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15637         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_153_plus_xmm1_x_1_ymm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15638         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_less_153_plus_xmm1_x_1_ymm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15598        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15599        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15600        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15601        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15602        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
     15603        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15604        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15605        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15606        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15607        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM0_x_1_YMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15608        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15609        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15610        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15611        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM1_x_2_YMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
     15612        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_2_plus_XMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15613        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_less_2_plus_XMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15614        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_153_plus_XMM1_x_1_YMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15615        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_less_153_plus_XMM1_x_1_YMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15616
     15617        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15618        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15619        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15620        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15621        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
     15622        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15623        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15624        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15625        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15626        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM0_x_1_YMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15627        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15628        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15629        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15630        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM1_x_2_YMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
     15631        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_2_plus_XMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15632        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_less_2_plus_XMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15633        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_153_plus_XMM1_x_1_YMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15634        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_less_153_plus_XMM1_x_1_YMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    1563915635    };
    1564015636    static BS3CPUINSTR3_TEST7_T const s_aTests32[] =
    1564115637    {
    15642         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15643         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15644         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15645         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15646         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
    15647         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15648         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15649         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15650         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15651         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm0_x_1_ymm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15652         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15653         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15654         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15655         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm1_x_2_ymm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
    15656         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_2_plus_xmm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15657         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_less_2_plus_xmm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15658         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_153_plus_xmm1_x_1_ymm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15659         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_less_153_plus_xmm1_x_1_ymm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15660 
    15661         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15662         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15663         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15664         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15665         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
    15666         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15667         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15668         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15669         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15670         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm0_x_1_ymm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15671         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15672         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15673         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15674         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm1_x_2_ymm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
    15675         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_2_plus_xmm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15676         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_less_2_plus_xmm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15677         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_153_plus_xmm1_x_1_ymm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15678         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_less_153_plus_xmm1_x_1_ymm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15638        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15639        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15640        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15641        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15642        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
     15643        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15644        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15645        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15646        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15647        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM0_x_1_YMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15648        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15649        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15650        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15651        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM1_x_2_YMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
     15652        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_2_plus_XMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15653        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_less_2_plus_XMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15654        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_153_plus_XMM1_x_1_YMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15655        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_less_153_plus_XMM1_x_1_YMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15656
     15657        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15658        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15659        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15660        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15661        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
     15662        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15663        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15664        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15665        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15666        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM0_x_1_YMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15667        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15668        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15669        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15670        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM1_x_2_YMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
     15671        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_2_plus_XMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15672        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_less_2_plus_XMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15673        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_153_plus_XMM1_x_1_YMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15674        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_less_153_plus_XMM1_x_1_YMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    1567915675    };
    1568015676    static BS3CPUINSTR3_TEST7_T const s_aTests64[] =
    1568115677    {
    15682         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15683         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15684         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15685         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15686         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
    15687         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15688         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15689         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15690         {  bs3CpuInstr3_vgatherdpd_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15691         {  bs3CpuInstr3_vgatherdpd_xmm0_rbx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15692         {  bs3CpuInstr3_vgatherdpd_xmm8_r8d_plus_0_plus_xmm9_x_1_xmm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, 8, 8, 9, 10, RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15693         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm0_x_1_ymm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15694         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15695         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15696         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15697         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_0_plus_xmm1_x_2_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
    15698         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_2_plus_xmm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15699         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_less_2_plus_xmm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15700         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_plus_153_plus_xmm1_x_1_ymm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15701         {  bs3CpuInstr3_vgatherdpd_ymm0_ebx_less_153_plus_xmm1_x_1_ymm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15702         {  bs3CpuInstr3_vgatherdpd_ymm0_rbx_plus_0_plus_xmm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15703         {  bs3CpuInstr3_vgatherdpd_ymm8_r8d_plus_0_plus_xmm9_x_1_ymm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, 8, 8, 9, 10, RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15704 
    15705         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15706         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15707         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15708         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15709         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
    15710         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15711         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15712         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15713         {  bs3CpuInstr3_vpgatherdq_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15714         {  bs3CpuInstr3_vpgatherdq_xmm0_rbx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15715         {  bs3CpuInstr3_vpgatherdq_xmm8_r8d_plus_0_plus_xmm9_x_1_xmm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, 8, 8, 9, 10, RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15716         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm0_x_1_ymm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15717         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15718         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD },
    15719         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15720         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_0_plus_xmm1_x_2_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
    15721         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_2_plus_xmm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15722         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_less_2_plus_xmm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15723         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_plus_153_plus_xmm1_x_1_ymm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15724         {  bs3CpuInstr3_vpgatherdq_ymm0_ebx_less_153_plus_xmm1_x_1_ymm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15725         {  bs3CpuInstr3_vpgatherdq_ymm0_rbx_plus_0_plus_xmm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    15726         {  bs3CpuInstr3_vpgatherdq_ymm8_r8d_plus_0_plus_xmm9_x_1_ymm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, 8, 8, 9, 10, RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15678        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15679        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15680        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15681        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15682        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
     15683        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15684        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15685        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15686        {  bs3CpuInstr3_vgatherdpd_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15687        {  bs3CpuInstr3_vgatherdpd_XMM0_RBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, RBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15688        {  bs3CpuInstr3_vgatherdpd_XMM8_R8D_plus_0_plus_XMM9_x_1_XMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, XMM8, R8D, XMM9, XMM10, RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15689        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM0_x_1_YMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15690        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15691        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15692        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15693        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_0_plus_XMM1_x_2_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
     15694        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_2_plus_XMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15695        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_less_2_plus_XMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15696        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_plus_153_plus_XMM1_x_1_YMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15697        {  bs3CpuInstr3_vgatherdpd_YMM0_EBX_less_153_plus_XMM1_x_1_YMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15698        {  bs3CpuInstr3_vgatherdpd_YMM0_RBX_plus_0_plus_XMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, RBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15699        {  bs3CpuInstr3_vgatherdpd_YMM8_R8D_plus_0_plus_XMM9_x_1_YMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, YMM8, R8D, XMM9, YMM10, RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15700
     15701        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15702        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15703        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15704        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15705        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
     15706        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15707        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15708        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15709        {  bs3CpuInstr3_vpgatherdq_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15710        {  bs3CpuInstr3_vpgatherdq_XMM0_RBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, RBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15711        {  bs3CpuInstr3_vpgatherdq_XMM8_R8D_plus_0_plus_XMM9_x_1_XMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, XMM8, R8D, XMM9, XMM10, RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15712        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM0_x_1_YMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15713        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15714        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),      s_aValuesUD      },
     15715        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15716        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_0_plus_XMM1_x_2_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x2), s_aValues64_32x2 },
     15717        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_2_plus_XMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15718        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_less_2_plus_XMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15719        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_plus_153_plus_XMM1_x_1_YMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15720        {  bs3CpuInstr3_vpgatherdq_YMM0_EBX_less_153_plus_XMM1_x_1_YMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15721        {  bs3CpuInstr3_vpgatherdq_YMM0_RBX_plus_0_plus_XMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, RBX, XMM1, YMM2,  RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
     15722        {  bs3CpuInstr3_vpgatherdq_YMM8_R8D_plus_0_plus_XMM9_x_1_YMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, YMM8, R8D, XMM9, YMM10, RT_ELEMENTS(s_aValues64_32x1), s_aValues64_32x1 },
    1572715723    };
    1572815724    static BS3CPUINSTR3_TEST7_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST7_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    … …  
    1584815844    static BS3CPUINSTR3_TEST7_T const s_aTests16[] =
    1584915845    {
    15850         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15851         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15852         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15853         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15854         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x2X), s_aValues64_64x2X },
    15855         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15856         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15857         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15858         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15859         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm0_x_1_ymm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15860         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15861         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15862         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15863         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm1_x_2_ymm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x2Y), s_aValues64_64x2Y },
    15864         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_2_plus_ymm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15865         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_less_2_plus_ymm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15866         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_153_plus_ymm1_x_1_ymm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15867         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_less_153_plus_ymm1_x_1_ymm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15868 
    15869         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15870         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15871         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15872         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15873         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x2X), s_aValues64_64x2X },
    15874         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15875         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15876         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15877         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15878         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm0_x_1_ymm2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15879         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15880         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15881         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15882         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm1_x_2_ymm2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x2Y), s_aValues64_64x2Y },
    15883         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_2_plus_ymm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15884         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_less_2_plus_ymm1_x_1_ymm2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15885         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_153_plus_ymm1_x_1_ymm2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15886         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_less_153_plus_ymm1_x_1_ymm2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15846        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15847        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15848        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15849        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15850        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x2X), s_aValues64_64x2X },
     15851        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15852        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15853        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15854        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15855        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM0_x_1_YMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15856        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15857        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15858        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15859        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM1_x_2_YMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x2Y), s_aValues64_64x2Y },
     15860        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_2_plus_YMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15861        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_less_2_plus_YMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15862        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_153_plus_YMM1_x_1_YMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15863        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_less_153_plus_YMM1_x_1_YMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15864
     15865        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15866        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15867        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15868        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15869        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x2X), s_aValues64_64x2X },
     15870        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15871        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15872        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15873        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15874        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM0_x_1_YMM2_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15875        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM0_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15876        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM1_icebp_c16,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15877        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15878        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM1_x_2_YMM2_icebp_c16,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x2Y), s_aValues64_64x2Y },
     15879        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_2_plus_YMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15880        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_less_2_plus_YMM1_x_1_YMM2_icebp_c16,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15881        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_153_plus_YMM1_x_1_YMM2_icebp_c16, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15882        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_less_153_plus_YMM1_x_1_YMM2_icebp_c16, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    1588715883    };
    1588815884    static BS3CPUINSTR3_TEST7_T const s_aTests32[] =
    1588915885    {
    15890         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15891         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15892         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15893         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15894         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x2X), s_aValues64_64x2X },
    15895         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15896         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15897         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15898         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15899         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm0_x_1_ymm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15900         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15901         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15902         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15903         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm1_x_2_ymm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x2Y), s_aValues64_64x2Y },
    15904         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_2_plus_ymm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15905         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_less_2_plus_ymm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15906         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_153_plus_ymm1_x_1_ymm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15907         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_less_153_plus_ymm1_x_1_ymm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15908 
    15909         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15910         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15911         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15912         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15913         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x2X), s_aValues64_64x2X },
    15914         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15915         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15916         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15917         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15918         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm0_x_1_ymm2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15919         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15920         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15921         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15922         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm1_x_2_ymm2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x2Y), s_aValues64_64x2Y },
    15923         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_2_plus_ymm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15924         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_less_2_plus_ymm1_x_1_ymm2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15925         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_153_plus_ymm1_x_1_ymm2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15926         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_less_153_plus_ymm1_x_1_ymm2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15886        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15887        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15888        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15889        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15890        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x2X), s_aValues64_64x2X },
     15891        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15892        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15893        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15894        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15895        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM0_x_1_YMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15896        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15897        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15898        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15899        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM1_x_2_YMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x2Y), s_aValues64_64x2Y },
     15900        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_2_plus_YMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15901        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_less_2_plus_YMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15902        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_153_plus_YMM1_x_1_YMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15903        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_less_153_plus_YMM1_x_1_YMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15904
     15905        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15906        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15907        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15908        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15909        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x2X), s_aValues64_64x2X },
     15910        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15911        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15912        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15913        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15914        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM0_x_1_YMM2_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15915        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM0_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15916        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM1_icebp_c32,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15917        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15918        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM1_x_2_YMM2_icebp_c32,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x2Y), s_aValues64_64x2Y },
     15919        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_2_plus_YMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15920        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_less_2_plus_YMM1_x_1_YMM2_icebp_c32,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15921        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_153_plus_YMM1_x_1_YMM2_icebp_c32, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15922        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_less_153_plus_YMM1_x_1_YMM2_icebp_c32, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    1592715923    };
    1592815924    static BS3CPUINSTR3_TEST7_T const s_aTests64[] =
    1592915925    {
    15930         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15931         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15932         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15933         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15934         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x2X), s_aValues64_64x2X },
    15935         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15936         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15937         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15938         {  bs3CpuInstr3_vgatherqpd_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15939         {  bs3CpuInstr3_vgatherqpd_xmm0_rbx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15940         {  bs3CpuInstr3_vgatherqpd_xmm8_r8d_plus_0_plus_xmm9_x_1_xmm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, 8, 8, 9, 10, RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15941         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm0_x_1_ymm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15942         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15943         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15944         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15945         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_0_plus_ymm1_x_2_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x2Y), s_aValues64_64x2Y },
    15946         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_2_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15947         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_less_2_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15948         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_plus_153_plus_ymm1_x_1_ymm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15949         {  bs3CpuInstr3_vgatherqpd_ymm0_ebx_less_153_plus_ymm1_x_1_ymm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15950         {  bs3CpuInstr3_vgatherqpd_ymm0_rbx_plus_0_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15951         {  bs3CpuInstr3_vgatherqpd_ymm8_r8d_plus_0_plus_ymm9_x_1_ymm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, 8, 8, 9, 10, RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15952 
    15953         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm0_x_1_xmm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15954         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15955         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15956         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15957         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_0_plus_xmm1_x_2_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x2X), s_aValues64_64x2X },
    15958         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15959         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_less_2_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15960         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_plus_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15961         {  bs3CpuInstr3_vpgatherqq_xmm0_ebx_less_153_plus_xmm1_x_1_xmm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15962         {  bs3CpuInstr3_vpgatherqq_xmm0_rbx_plus_0_plus_xmm1_x_1_xmm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15963         {  bs3CpuInstr3_vpgatherqq_xmm8_r8d_plus_0_plus_xmm9_x_1_xmm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, 8, 8, 9, 10, RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
    15964         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm0_x_1_ymm2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 0, 2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15965         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15966         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, 0, 3, 1, 1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD },
    15967         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15968         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_0_plus_ymm1_x_2_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x2Y), s_aValues64_64x2Y },
    15969         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_2_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15970         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_less_2_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15971         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_plus_153_plus_ymm1_x_1_ymm2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15972         {  bs3CpuInstr3_vpgatherqq_ymm0_ebx_less_153_plus_ymm1_x_1_ymm2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15973         {  bs3CpuInstr3_vpgatherqq_ymm0_rbx_plus_0_plus_ymm1_x_1_ymm2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, 0, 3, 1, 2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    15974         {  bs3CpuInstr3_vpgatherqq_ymm8_r8d_plus_0_plus_ymm9_x_1_ymm10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, 8, 8, 9, 10, RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15926        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15927        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15928        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15929        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15930        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x2X), s_aValues64_64x2X },
     15931        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15932        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15933        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15934        {  bs3CpuInstr3_vgatherqpd_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15935        {  bs3CpuInstr3_vgatherqpd_XMM0_RBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, RBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15936        {  bs3CpuInstr3_vgatherqpd_XMM8_R8D_plus_0_plus_XMM9_x_1_XMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, XMM8, R8D, XMM9, XMM10, RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15937        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM0_x_1_YMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15938        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15939        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15940        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15941        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_0_plus_YMM1_x_2_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x2Y), s_aValues64_64x2Y },
     15942        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_2_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15943        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_less_2_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15944        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_plus_153_plus_YMM1_x_1_YMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15945        {  bs3CpuInstr3_vgatherqpd_YMM0_EBX_less_153_plus_YMM1_x_1_YMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15946        {  bs3CpuInstr3_vgatherqpd_YMM0_RBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, RBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15947        {  bs3CpuInstr3_vgatherqpd_YMM8_R8D_plus_0_plus_YMM9_x_1_YMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, YMM8, R8D, YMM9, YMM10, RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15948
     15949        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM0_x_1_XMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM0, XMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15950        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15951        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15952        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15953        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_0_plus_XMM1_x_2_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x2X), s_aValues64_64x2X },
     15954        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15955        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_less_2_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15956        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_plus_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15957        {  bs3CpuInstr3_vpgatherqq_XMM0_EBX_less_153_plus_XMM1_x_1_XMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_128, XMM0, EBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15958        {  bs3CpuInstr3_vpgatherqq_XMM0_RBX_plus_0_plus_XMM1_x_1_XMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_128, XMM0, RBX, XMM1, XMM2,  RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15959        {  bs3CpuInstr3_vpgatherqq_XMM8_R8D_plus_0_plus_XMM9_x_1_XMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_128, XMM8, R8D, XMM9, XMM10, RT_ELEMENTS(s_aValues64_64x1X), s_aValues64_64x1X },
     15960        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM0_x_1_YMM2_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM0, YMM2,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15961        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM0_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM0,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15962        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM1_icebp_c64,   X86_XCPT_UD, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM1,  RT_ELEMENTS(s_aValuesUD),       s_aValuesUD      },
     15963        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15964        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_0_plus_YMM1_x_2_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x2Y), s_aValues64_64x2Y },
     15965        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_2_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 2,    T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15966        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_less_2_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, -2,   T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15967        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_plus_153_plus_YMM1_x_1_YMM2_icebp_c64, X86_XCPT_DB, 153,  T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15968        {  bs3CpuInstr3_vpgatherqq_YMM0_EBX_less_153_plus_YMM1_x_1_YMM2_icebp_c64, X86_XCPT_DB, -153, T_AVX2_256, YMM0, EBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15969        {  bs3CpuInstr3_vpgatherqq_YMM0_RBX_plus_0_plus_YMM1_x_1_YMM2_icebp_c64,   X86_XCPT_DB, 0,    T_AVX2_256, YMM0, RBX, YMM1, YMM2,  RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
     15970        {  bs3CpuInstr3_vpgatherqq_YMM8_R8D_plus_0_plus_YMM9_x_1_YMM10_icebp_c64,  X86_XCPT_DB, 0,    T_AVX2_256, YMM8, R8D, YMM9, YMM10, RT_ELEMENTS(s_aValues64_64x1Y), s_aValues64_64x1Y },
    1597515971    };
    1597615972    static BS3CPUINSTR3_TEST7_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST7_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4.c32

    r106471 r106620  
    4141#include <bs3kit.h>
    4242#include "bs3-cpu-instr-4-asm-auto.h"
     43#include "bs3-cpu-instr-x-regs.c32"
    4344
    4445#include <iprt/asm.h>
    … …  
    25532554    uint8_t             enmRm;               /**< R/M type. */
    25542555    uint8_t             enmType;             /**< CPU instruction type (see T_XXX). */
    2555     uint8_t             iRegDst;             /**< Index of destination register, UINT8_MAX if N/A. */
    2556     uint8_t             iRegSrc1;            /**< Index of first source register, UINT8_MAX if N/A. */
    2557     uint8_t             iRegSrc2;            /**< Index of second source register, UINT8_MAX if N/A. */
     2556    uint8_t             iRegDst;             /**< Identity of destination register. */
     2557    uint8_t             iRegSrc1;            /**< Identity of first source register. */
     2558    uint8_t             iRegSrc2;            /**< Identity of second source register. */
    25582559    uint8_t             cValues;             /**< Number of test values in @c paValues. */
    25592560    BS3CPUINSTR4_TEST1_VALUES_T const BS3_FAR *paValues; /**< Test values. */
    … …  
    26452646    uint8_t BS3_FAR *puMemOpAlias        = pTestCtx->puMemOpAlias;
    26462647    uint8_t          cbMemOp             = pTestCtx->cbMemOp;
    2647     uint8_t const    cbOperand           = pTestCtx->cbOperand;
    26482648    uint8_t const    cbInstr             = ((uint8_t const BS3_FAR *)(uintptr_t)pTestCtx->pTest->pfnWorker)[-1];
    26492649    uint8_t          bXcptExpect         = pTestCtx->bXcptExpect;
     2650    bool const       fNonFpOK            = bXcptExpect == X86_XCPT_DB;
    26502651    uint8_t const    bFpXcpt             = pTestCtx->pConfig->fCr4OsXmmExcpt ? X86_XCPT_XF : X86_XCPT_UD;
    26512652    bool const       fSseInstr           = bs3CpuInstr4IsSse(pTest->enmType);
     2653    bool const       fMemOp              = pTest->enmRm >= RM_MEM;
     2654    bool const       fMemOpDI            = pTest->iRegDst == FSxDI || pTest->iRegSrc1 == FSxDI || pTest->iRegSrc2 == FSxDI;
    26522655    uint32_t         uMxCsr;
    26532656    X86YMMREG        MemOpExpect;
    … …  
    26642667    static const char * const s_apszMaskType[] = { "Specified", "Expected", "Implied", "Combined", "Masked", "Unmasked", "Random" };
    26652668    unsigned iMaskType;
     2669
     2670    if (fMemOp)
     2671        BS3_ASSERT(pTest->iRegDst >= FSxDI || pTest->iRegSrc1 >= FSxDI || pTest->iRegSrc2 >= FSxDI);
     2672    else
     2673        BS3_ASSERT(pTest->iRegDst  < FSxDI && pTest->iRegSrc1  < FSxDI && pTest->iRegSrc2  < FSxDI);
     2674    if (fMemOpDI)
     2675        BS3_ASSERT(pTest->iRegDst != FSxBX && pTest->iRegSrc1 != FSxBX && pTest->iRegSrc2 != FSxBX);
    26662676
    26672677    /*
    … …  
    28142824        /* Destination. */
    28152825        Bs3MemZero(&MemOpExpect, sizeof(MemOpExpect));
    2816         if (pTest->iRegDst == UINT8_MAX)
     2826        if (pTest->iRegDst >= FSxDI)
    28172827        {
    2818             BS3_ASSERT(pTest->enmRm >= RM_MEM);
    28192828            Bs3MemSet(puMemOpAlias, 0xcc, cbMemOp);
    2820             if (bXcptExpect == X86_XCPT_DB)
     2829            if (fNonFpOK)
    28212830                MemOpExpect.ymm = pValues->uDstOut.ymm;
    28222831            else
    … …  
    28252834
    28262835        /* Source #1 (/ destination for SSE). */
    2827         if (pTest->iRegSrc1 == UINT8_MAX)
     2836        if (pTest->iRegSrc1 >= FSxDI)
    28282837        {
    2829             BS3_ASSERT(pTest->enmRm >= RM_MEM);
    28302838            Bs3MemCpy(puMemOpAlias, &pValues->uSrc1, cbMemOp);
    2831             if (pTest->iRegDst == UINT8_MAX)
     2839            if (pTest->iRegDst >= FSxDI)
    28322840                BS3_ASSERT(fSseInstr);
    28332841            else
    28342842                MemOpExpect.ymm = pValues->uSrc1.ymm;
    28352843        }
    2836         else if (fSseInstr)
    2837             Bs3ExtCtxSetXmm(pExtCtx, pTest->iRegSrc1, &pValues->uSrc1.ymm.DQWords.dqw0);
    2838         else
    2839             Bs3ExtCtxSetYmm(pExtCtx, pTest->iRegSrc1, &pValues->uSrc1.ymm, 32);
     2844        else Bs3ExtCtxSetReg(pExtCtx, pTest->iRegSrc1, (void*)&pValues->uSrc1, (void *)fSseInstr);
    28402845
    28412846        /* Source #2. */
    2842         if (pTest->iRegSrc2 == UINT8_MAX)
     2847        if (pTest->iRegSrc2 >= FSxDI)
    28432848        {
    2844             BS3_ASSERT(pTest->enmRm >= RM_MEM);
    2845             BS3_ASSERT(pTest->iRegDst != UINT8_MAX && pTest->iRegSrc1 != UINT8_MAX);
     2849            BS3_ASSERT(pTest->iRegDst < FSxDI && pTest->iRegSrc1 < FSxDI);
    28462850            Bs3MemCpy(puMemOpAlias, &pValues->uSrc2, cbMemOp);
    28472851            MemOpExpect.ymm = pValues->uSrc2.ymm;
    28482852        }
    2849         else if (fSseInstr)
    2850             Bs3ExtCtxSetXmm(pExtCtx, pTest->iRegSrc2, &pValues->uSrc2.ymm.DQWords.dqw0);
    2851         else
    2852             Bs3ExtCtxSetYmm(pExtCtx, pTest->iRegSrc2, &pValues->uSrc2.ymm, 32);
     2853        else Bs3ExtCtxSetReg(pExtCtx, pTest->iRegSrc2, (void*)&pValues->uSrc2, (void *)fSseInstr);
    28532854
    28542855        /* Memory pointer. */
    2855         if (pTest->enmRm >= RM_MEM)
     2856        if (fMemOp)
    28562857        {
    2857             BS3_ASSERT(   pTest->iRegDst  == UINT8_MAX
    2858                        || pTest->iRegSrc1 == UINT8_MAX
    2859                        || pTest->iRegSrc2 == UINT8_MAX);
    2860             Bs3RegCtxSetGrpSegFromCurPtr(pCtx, &pCtx->rbx, &pCtx->fs, puMemOp);
     2858            Bs3RegCtxSetGrpSegFromCurPtr(pCtx, fMemOpDI ? &pCtx->rdi : &pCtx->rbx, &pCtx->fs, puMemOp);
    28612859        }
    28622860
    … …  
    28712869         */
    28722870        g_uBs3TrapEipHint = pCtx->rip.u32;
    2873         if (    bXcptExpect == X86_XCPT_DB
    2874             && !fFpXcptExpected)
     2871        if (fNonFpOK && !fFpXcptExpected)
    28752872            g_uBs3TrapEipHint += cbInstr + 1;
    28762873        Bs3TrapSetJmpAndRestoreWithExtCtxAndRm(pCtx, pExtCtx, pTrapFrame, pExtCtxOut);
    … …  
    28842881         */
    28852882        cErrors = Bs3TestSubErrorCount();
    2886         if (   bXcptExpect == X86_XCPT_DB
    2887             && !fFpXcptExpected
    2888             && pTest->iRegDst != UINT8_MAX)
    2889         {
    2890             if (fSseInstr)
    2891                 Bs3ExtCtxSetXmm(pExtCtx, pTest->iRegDst, &pValues->uDstOut.ymm.DQWords.dqw0);
    2892             else
    2893                 Bs3ExtCtxSetYmm(pExtCtx, pTest->iRegDst, &pValues->uDstOut.ymm, cbOperand);
    2894         }
     2883        if (fNonFpOK && !fFpXcptExpected && pTest->iRegDst < FSxDI)
     2884            Bs3ExtCtxSetReg(pExtCtx, pTest->iRegDst, (void*)&pValues->uDstOut, (void *)fSseInstr);
    28952885#if     defined(DEBUG_aeichner) /** @todo Necessary kludge on a i7-1068NG7. */
    28962886        if (   pExtCtx->enmMethod == BS3EXTCTXMETHOD_XSAVE
    … …  
    29002890#endif
    29012891
    2902         if (bXcptExpect == X86_XCPT_DB)
     2892        if (fNonFpOK)
    29032893        {
    29042894            if (fFuzzyPE)
    … …  
    29122902        Bs3TestCheckExtCtx(pExtCtxOut, pExtCtx, 0 /*fFlags*/, pTestCtx->pszMode, pTestCtx->idTestStep);
    29132903
    2914         if (bXcptExpect == X86_XCPT_DB)
     2904        if (fNonFpOK)
    29152905        {
    29162906            uint32_t const uGotMxCsr = Bs3ExtCtxGetMxCsr(pExtCtxOut) & ~X86_MXCSR_MM;
    … …  
    29622952        if (bXcptExpect == X86_XCPT_PF)
    29632953            pCtx->cr2.u = (uintptr_t)puMemOp;
    2964         Bs3TestCheckRegCtxEx(&pTrapFrame->Ctx, pCtx, bXcptExpect == X86_XCPT_DB && !fFpXcptExpected ? cbInstr + 1 : 0, 0 /*cbSpAdjust*/,
    2965                              (bXcptExpect == X86_XCPT_DB && !fFpXcptExpected) || BS3_MODE_IS_16BIT_SYS(bMode) ? 0 : X86_EFL_RF,
     2954        Bs3TestCheckRegCtxEx(&pTrapFrame->Ctx, pCtx, fNonFpOK && !fFpXcptExpected ? cbInstr + 1 : 0, 0 /*cbSpAdjust*/,
     2955                             (fNonFpOK && !fFpXcptExpected) || BS3_MODE_IS_16BIT_SYS(bMode) ? 0 : X86_EFL_RF,
    29662956                             pTestCtx->pszMode, pTestCtx->idTestStep);
    29672957        pCtx->cr2.u = 0;
    29682958
    2969         if (   pTest->enmRm >= RM_MEM
    2970             && Bs3MemCmp(puMemOpAlias, &MemOpExpect, cbMemOp) != 0)
     2959        if (fMemOp && Bs3MemCmp(puMemOpAlias, &MemOpExpect, cbMemOp) != 0)
    29712960            Bs3TestFailedF("Expected uMemOp %.*Rhxs, got %.*Rhxs", cbMemOp, &MemOpExpect, cbMemOp, puMemOpAlias);
    29722961
    … …  
    34733462    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    34743463    {
    3475         { bs3CpuInstr4_addps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    3476         { bs3CpuInstr4_addps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    3477 
    3478         { bs3CpuInstr4_vaddps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    3479         { bs3CpuInstr4_vaddps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    3480 
    3481         { bs3CpuInstr4_vaddps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    3482         { bs3CpuInstr4_vaddps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    3483 
    3484         { bs3CpuInstr4_addps_XMM1_XMM1_icebp_c16,        255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    3485         { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValuesSR },
    3486         { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValuesSR },
    3487         { bs3CpuInstr4_vaddps_YMM1_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValuesSR },
     3464        { bs3CpuInstr4_addps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues  },
     3465        { bs3CpuInstr4_addps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues  },
     3466
     3467        { bs3CpuInstr4_vaddps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     3468        { bs3CpuInstr4_vaddps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     3469
     3470        { bs3CpuInstr4_vaddps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues  },
     3471        { bs3CpuInstr4_vaddps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues  },
     3472
     3473        { bs3CpuInstr4_addps_XMM1_XMM1_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     3474        { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     3475        { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     3476        { bs3CpuInstr4_vaddps_YMM1_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
    34883477    };
    34893478    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    34903479    {
    3491         { bs3CpuInstr4_addps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    3492         { bs3CpuInstr4_addps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    3493 
    3494         { bs3CpuInstr4_vaddps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    3495         { bs3CpuInstr4_vaddps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    3496 
    3497         { bs3CpuInstr4_vaddps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    3498         { bs3CpuInstr4_vaddps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    3499 
    3500         { bs3CpuInstr4_addps_XMM1_XMM1_icebp_c32,        255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    3501         { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValuesSR },
    3502         { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValuesSR },
    3503         { bs3CpuInstr4_vaddps_YMM1_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValuesSR },
     3480        { bs3CpuInstr4_addps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues  },
     3481        { bs3CpuInstr4_addps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues  },
     3482
     3483        { bs3CpuInstr4_vaddps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     3484        { bs3CpuInstr4_vaddps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     3485
     3486        { bs3CpuInstr4_vaddps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues  },
     3487        { bs3CpuInstr4_vaddps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues  },
     3488
     3489        { bs3CpuInstr4_addps_XMM1_XMM1_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     3490        { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     3491        { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     3492        { bs3CpuInstr4_vaddps_YMM1_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
    35043493    };
    35053494    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    35063495    {
    3507         { bs3CpuInstr4_addps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    3508         { bs3CpuInstr4_addps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    3509 
    3510         { bs3CpuInstr4_vaddps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    3511         { bs3CpuInstr4_vaddps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    3512 
    3513         { bs3CpuInstr4_vaddps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    3514         { bs3CpuInstr4_vaddps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    3515 
    3516         { bs3CpuInstr4_addps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    3517         { bs3CpuInstr4_addps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    3518 
    3519         { bs3CpuInstr4_vaddps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10,  PASS_s_aValues },
    3520         { bs3CpuInstr4_vaddps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    3521         { bs3CpuInstr4_vaddps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 10,  PASS_s_aValues },
    3522         { bs3CpuInstr4_vaddps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
    3523 
    3524         { bs3CpuInstr4_addps_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    3525         { bs3CpuInstr4_addps_XMM8_XMM8_icebp_c64,        255, RM_REG, T_SSE,     8, 8, 8,   PASS_s_aValuesSR },
    3526         { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValuesSR },
    3527         { bs3CpuInstr4_vaddps_YMM8_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, 8, 8, 8,   PASS_s_aValuesSR },
    3528         { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValuesSR },
    3529         { bs3CpuInstr4_vaddps_YMM1_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValuesSR },
     3496        { bs3CpuInstr4_addps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues   },
     3497        { bs3CpuInstr4_addps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues   },
     3498
     3499        { bs3CpuInstr4_vaddps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues   },
     3500        { bs3CpuInstr4_vaddps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues   },
     3501
     3502        { bs3CpuInstr4_vaddps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues   },
     3503        { bs3CpuInstr4_vaddps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues   },
     3504
     3505        { bs3CpuInstr4_addps_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     3506        { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     3507        { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     3508        { bs3CpuInstr4_vaddps_YMM1_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
     3509
     3510        { bs3CpuInstr4_addps_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     3511        { bs3CpuInstr4_addps_XMM8_XMM8_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
     3512        { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     3513        { bs3CpuInstr4_vaddps_YMM8_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_s_aValuesSR },
     3514        { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     3515        { bs3CpuInstr4_vaddps_YMM1_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
    35303516    };
    35313517
    … …  
    37763762    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    37773763    {
    3778         { bs3CpuInstr4_addpd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    3779         { bs3CpuInstr4_addpd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    3780 
    3781         { bs3CpuInstr4_vaddpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    3782         { bs3CpuInstr4_vaddpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    3783 
    3784         { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    3785         { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    3786 
    3787         { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    3788         { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM1_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValuesSR },
    3789         { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM2_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValuesSR },
    3790         { bs3CpuInstr4_vaddpd_YMM1_YMM1_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValuesSR },
     3764        { bs3CpuInstr4_addpd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues  },
     3765        { bs3CpuInstr4_addpd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues  },
     3766
     3767        { bs3CpuInstr4_vaddpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     3768        { bs3CpuInstr4_vaddpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     3769
     3770        { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues  },
     3771        { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues  },
     3772
     3773        { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     3774        { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM1_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     3775        { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM2_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     3776        { bs3CpuInstr4_vaddpd_YMM1_YMM1_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
    37913777    };
    37923778    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    37933779    {
    3794         { bs3CpuInstr4_addpd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    3795         { bs3CpuInstr4_addpd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    3796 
    3797         { bs3CpuInstr4_vaddpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    3798         { bs3CpuInstr4_vaddpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    3799 
    3800         { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    3801         { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    3802 
    3803         { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    3804         { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM1_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValuesSR },
    3805         { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM2_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValuesSR },
    3806         { bs3CpuInstr4_vaddpd_YMM1_YMM1_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValuesSR },
     3780        { bs3CpuInstr4_addpd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues  },
     3781        { bs3CpuInstr4_addpd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues  },
     3782
     3783        { bs3CpuInstr4_vaddpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     3784        { bs3CpuInstr4_vaddpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     3785
     3786        { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues  },
     3787        { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues  },
     3788
     3789        { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     3790        { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM1_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     3791        { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM2_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     3792        { bs3CpuInstr4_vaddpd_YMM1_YMM1_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
    38073793    };
    38083794    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    38093795    {
    3810         { bs3CpuInstr4_addpd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    3811         { bs3CpuInstr4_addpd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    3812 
    3813         { bs3CpuInstr4_vaddpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    3814         { bs3CpuInstr4_vaddpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    3815 
    3816         { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    3817         { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    3818 
    3819         { bs3CpuInstr4_addpd_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE2, 8, 8, 9,   PASS_s_aValues },
    3820         { bs3CpuInstr4_addpd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 8, 8, 255, PASS_s_aValues },
    3821 
    3822         { bs3CpuInstr4_vaddpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, 8, 9, 10,  PASS_s_aValues },
    3823         { bs3CpuInstr4_vaddpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    3824         { bs3CpuInstr4_vaddpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, 8, 9, 10,  PASS_s_aValues },
    3825         { bs3CpuInstr4_vaddpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
    3826 
    3827         { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    3828         { bs3CpuInstr4_addpd_XMM8_XMM8_icebp_c64,        255, RM_REG, T_SSE,     8, 8, 8,   PASS_s_aValuesSR },
    3829         { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM1_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValuesSR },
    3830         { bs3CpuInstr4_vaddpd_YMM8_YMM8_YMM8_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, 8, 8, 8,   PASS_s_aValuesSR },
    3831         { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM2_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValuesSR },
    3832         { bs3CpuInstr4_vaddpd_YMM1_YMM1_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValuesSR },
     3796        { bs3CpuInstr4_addpd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues  },
     3797        { bs3CpuInstr4_addpd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues  },
     3798
     3799        { bs3CpuInstr4_vaddpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     3800        { bs3CpuInstr4_vaddpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     3801
     3802        { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues  },
     3803        { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues  },
     3804
     3805        { bs3CpuInstr4_addpd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_s_aValues  },
     3806        { bs3CpuInstr4_addpd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_s_aValues  },
     3807
     3808        { bs3CpuInstr4_vaddpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues  },
     3809        { bs3CpuInstr4_vaddpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues  },
     3810        { bs3CpuInstr4_vaddpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues  },
     3811        { bs3CpuInstr4_vaddpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues  },
     3812
     3813        { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     3814        { bs3CpuInstr4_addpd_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
     3815        { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM1_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     3816        { bs3CpuInstr4_vaddpd_YMM8_YMM8_YMM8_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_s_aValuesSR },
     3817        { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM2_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     3818        { bs3CpuInstr4_vaddpd_YMM1_YMM1_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
    38333819    };
    38343820
    … …  
    41264112    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    41274113    {
    4128         { bs3CpuInstr4_addss_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    4129         { bs3CpuInstr4_addss_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    4130 
    4131         { bs3CpuInstr4_vaddss_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    4132         { bs3CpuInstr4_vaddss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    4133 
    4134         { bs3CpuInstr4_addss_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    4135         { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    4136         { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM2_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValuesSR },
    4137         { bs3CpuInstr4_vaddss_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValuesSR },
     4114        { bs3CpuInstr4_addss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues  },
     4115        { bs3CpuInstr4_addss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues  },
     4116
     4117        { bs3CpuInstr4_vaddss_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     4118        { bs3CpuInstr4_vaddss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     4119
     4120        { bs3CpuInstr4_addss_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4121        { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4122        { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM2_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValuesSR },
     4123        { bs3CpuInstr4_vaddss_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValuesSR },
    41384124    };
    41394125    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    41404126    {
    4141         { bs3CpuInstr4_addss_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    4142         { bs3CpuInstr4_addss_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    4143 
    4144         { bs3CpuInstr4_vaddss_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    4145         { bs3CpuInstr4_vaddss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    4146 
    4147         { bs3CpuInstr4_addss_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    4148         { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    4149         { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM2_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValuesSR },
    4150         { bs3CpuInstr4_vaddss_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValuesSR },
     4127        { bs3CpuInstr4_addss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues  },
     4128        { bs3CpuInstr4_addss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues  },
     4129
     4130        { bs3CpuInstr4_vaddss_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     4131        { bs3CpuInstr4_vaddss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     4132
     4133        { bs3CpuInstr4_addss_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4134        { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4135        { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM2_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValuesSR },
     4136        { bs3CpuInstr4_vaddss_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValuesSR },
    41514137    };
    41524138    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    41534139    {
    4154         { bs3CpuInstr4_addss_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    4155         { bs3CpuInstr4_addss_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    4156 
    4157         { bs3CpuInstr4_vaddss_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    4158         { bs3CpuInstr4_vaddss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    4159 
    4160         { bs3CpuInstr4_addss_XMM8_XMM9_icebp_c64,  255,         RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    4161         { bs3CpuInstr4_addss_XMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    4162 
    4163         { bs3CpuInstr4_vaddss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, 8, 9, 10,  PASS_s_aValues },
    4164         { bs3CpuInstr4_vaddss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    4165 
    4166         { bs3CpuInstr4_addss_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    4167         { bs3CpuInstr4_addss_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     8, 8, 8,   PASS_s_aValuesSR },
    4168         { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    4169         { bs3CpuInstr4_vaddss_XMM8_XMM8_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, 8, 8, 8,   PASS_s_aValuesSR },
    4170         { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM2_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValuesSR },
    4171         { bs3CpuInstr4_vaddss_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValuesSR },
     4140        { bs3CpuInstr4_addss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues  },
     4141        { bs3CpuInstr4_addss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues  },
     4142
     4143        { bs3CpuInstr4_vaddss_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     4144        { bs3CpuInstr4_vaddss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     4145
     4146        { bs3CpuInstr4_addss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues  },
     4147        { bs3CpuInstr4_addss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues  },
     4148
     4149        { bs3CpuInstr4_vaddss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues  },
     4150        { bs3CpuInstr4_vaddss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues  },
     4151
     4152        { bs3CpuInstr4_addss_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4153        { bs3CpuInstr4_addss_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
     4154        { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4155        { bs3CpuInstr4_vaddss_XMM8_XMM8_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
     4156        { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM2_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValuesSR },
     4157        { bs3CpuInstr4_vaddss_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValuesSR },
    41724158    };
    41734159
    … …  
    44794465    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    44804466    {
    4481         { bs3CpuInstr4_addsd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    4482         { bs3CpuInstr4_addsd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    4483 
    4484         { bs3CpuInstr4_vaddsd_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    4485         { bs3CpuInstr4_vaddsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    4486 
    4487         { bs3CpuInstr4_addsd_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    4488         { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    4489         { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM2_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValuesSR },
    4490         { bs3CpuInstr4_vaddsd_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValuesSR },
     4467        { bs3CpuInstr4_addsd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues  },
     4468        { bs3CpuInstr4_addsd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues  },
     4469
     4470        { bs3CpuInstr4_vaddsd_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     4471        { bs3CpuInstr4_vaddsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     4472
     4473        { bs3CpuInstr4_addsd_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4474        { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4475        { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM2_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValuesSR },
     4476        { bs3CpuInstr4_vaddsd_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValuesSR },
    44914477    };
    44924478    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    44934479    {
    4494         { bs3CpuInstr4_addsd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    4495         { bs3CpuInstr4_addsd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    4496 
    4497         { bs3CpuInstr4_vaddsd_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    4498         { bs3CpuInstr4_vaddsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    4499 
    4500         { bs3CpuInstr4_addsd_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    4501         { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    4502         { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM2_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValuesSR },
    4503         { bs3CpuInstr4_vaddsd_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValuesSR },
     4480        { bs3CpuInstr4_addsd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues  },
     4481        { bs3CpuInstr4_addsd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues  },
     4482
     4483        { bs3CpuInstr4_vaddsd_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     4484        { bs3CpuInstr4_vaddsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     4485
     4486        { bs3CpuInstr4_addsd_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4487        { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4488        { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM2_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValuesSR },
     4489        { bs3CpuInstr4_vaddsd_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValuesSR },
    45044490    };
    45054491    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    45064492    {
    4507         { bs3CpuInstr4_addsd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    4508         { bs3CpuInstr4_addsd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    4509 
    4510         { bs3CpuInstr4_vaddsd_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    4511         { bs3CpuInstr4_vaddsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    4512 
    4513         { bs3CpuInstr4_addsd_XMM8_XMM9_icebp_c64,  255,         RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    4514         { bs3CpuInstr4_addsd_XMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    4515 
    4516         { bs3CpuInstr4_vaddsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, 8, 9, 10,  PASS_s_aValues },
    4517         { bs3CpuInstr4_vaddsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    4518 
    4519         { bs3CpuInstr4_addsd_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    4520         { bs3CpuInstr4_addsd_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     8, 8, 8,   PASS_s_aValuesSR },
    4521         { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    4522         { bs3CpuInstr4_vaddsd_XMM8_XMM8_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, 8, 8, 8,   PASS_s_aValuesSR },
    4523         { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM2_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValuesSR },
    4524         { bs3CpuInstr4_vaddsd_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValuesSR },
     4493        { bs3CpuInstr4_addsd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues  },
     4494        { bs3CpuInstr4_addsd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues  },
     4495
     4496        { bs3CpuInstr4_vaddsd_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     4497        { bs3CpuInstr4_vaddsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     4498
     4499        { bs3CpuInstr4_addsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues  },
     4500        { bs3CpuInstr4_addsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues  },
     4501
     4502        { bs3CpuInstr4_vaddsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10,  PASS_s_aValues  },
     4503        { bs3CpuInstr4_vaddsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues  },
     4504
     4505        { bs3CpuInstr4_addsd_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4506        { bs3CpuInstr4_addsd_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
     4507        { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4508        { bs3CpuInstr4_vaddsd_XMM8_XMM8_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
     4509        { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM2_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValuesSR },
     4510        { bs3CpuInstr4_vaddsd_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValuesSR },
    45254511    };
    45264512
    … …  
    48334819    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    48344820    {
    4835         { bs3CpuInstr4_haddps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    4836         { bs3CpuInstr4_haddps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    4837 
    4838         { bs3CpuInstr4_vhaddps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    4839         { bs3CpuInstr4_vhaddps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    4840 
    4841         { bs3CpuInstr4_vhaddps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    4842         { bs3CpuInstr4_vhaddps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    4843 
    4844         { bs3CpuInstr4_haddps_XMM1_XMM1_icebp_c16,        255, RM_REG, T_SSE3,    1, 1, 1,   PASS_s_aValuesSR },
    4845         { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValuesSR },
    4846         { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValuesSR },
    4847         { bs3CpuInstr4_vhaddps_YMM1_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValuesSR },
     4821        { bs3CpuInstr4_haddps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_s_aValues  },
     4822        { bs3CpuInstr4_haddps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_s_aValues  },
     4823
     4824        { bs3CpuInstr4_vhaddps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     4825        { bs3CpuInstr4_vhaddps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     4826
     4827        { bs3CpuInstr4_vhaddps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues  },
     4828        { bs3CpuInstr4_vhaddps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues  },
     4829
     4830        { bs3CpuInstr4_haddps_XMM1_XMM1_icebp_c16,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4831        { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     4832        { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     4833        { bs3CpuInstr4_vhaddps_YMM1_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
    48484834    };
    48494835    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    48504836    {
    4851         { bs3CpuInstr4_haddps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    4852         { bs3CpuInstr4_haddps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    4853 
    4854         { bs3CpuInstr4_vhaddps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    4855         { bs3CpuInstr4_vhaddps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    4856 
    4857         { bs3CpuInstr4_vhaddps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    4858         { bs3CpuInstr4_vhaddps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    4859 
    4860         { bs3CpuInstr4_haddps_XMM1_XMM1_icebp_c32,        255, RM_REG, T_SSE3,    1, 1, 1,   PASS_s_aValuesSR },
    4861         { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValuesSR },
    4862         { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValuesSR },
    4863         { bs3CpuInstr4_vhaddps_YMM1_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValuesSR },
     4837        { bs3CpuInstr4_haddps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_s_aValues  },
     4838        { bs3CpuInstr4_haddps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_s_aValues  },
     4839
     4840        { bs3CpuInstr4_vhaddps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     4841        { bs3CpuInstr4_vhaddps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     4842
     4843        { bs3CpuInstr4_vhaddps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues  },
     4844        { bs3CpuInstr4_vhaddps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues  },
     4845
     4846        { bs3CpuInstr4_haddps_XMM1_XMM1_icebp_c32,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4847        { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     4848        { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     4849        { bs3CpuInstr4_vhaddps_YMM1_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
    48644850    };
    48654851    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    48664852    {
    4867         { bs3CpuInstr4_haddps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    4868         { bs3CpuInstr4_haddps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    4869 
    4870         { bs3CpuInstr4_vhaddps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    4871         { bs3CpuInstr4_vhaddps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    4872 
    4873         { bs3CpuInstr4_vhaddps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    4874         { bs3CpuInstr4_vhaddps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    4875 
    4876         { bs3CpuInstr4_haddps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE3, 8, 8, 9,   PASS_s_aValues },
    4877         { bs3CpuInstr4_haddps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE3, 8, 8, 255, PASS_s_aValues },
    4878 
    4879         { bs3CpuInstr4_vhaddps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10,  PASS_s_aValues },
    4880         { bs3CpuInstr4_vhaddps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    4881         { bs3CpuInstr4_vhaddps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 10,  PASS_s_aValues },
    4882         { bs3CpuInstr4_vhaddps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
    4883 
    4884         { bs3CpuInstr4_haddps_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE3,    1, 1, 1,   PASS_s_aValuesSR },
    4885         { bs3CpuInstr4_haddps_XMM8_XMM8_icebp_c64,        255, RM_REG, T_SSE3,    8, 8, 8,   PASS_s_aValuesSR },
    4886         { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValuesSR },
    4887         { bs3CpuInstr4_vhaddps_YMM8_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, 8, 8, 8,   PASS_s_aValuesSR },
    4888         { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValuesSR },
    4889         { bs3CpuInstr4_vhaddps_YMM1_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValuesSR },
     4853        { bs3CpuInstr4_haddps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_s_aValues  },
     4854        { bs3CpuInstr4_haddps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_s_aValues  },
     4855
     4856        { bs3CpuInstr4_vhaddps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     4857        { bs3CpuInstr4_vhaddps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     4858
     4859        { bs3CpuInstr4_vhaddps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues  },
     4860        { bs3CpuInstr4_vhaddps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues  },
     4861
     4862        { bs3CpuInstr4_haddps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM9,  PASS_s_aValues  },
     4863        { bs3CpuInstr4_haddps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM8, XMM8, FSxBX, PASS_s_aValues  },
     4864
     4865        { bs3CpuInstr4_vhaddps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues  },
     4866        { bs3CpuInstr4_vhaddps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues  },
     4867        { bs3CpuInstr4_vhaddps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues  },
     4868        { bs3CpuInstr4_vhaddps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues  },
     4869
     4870        { bs3CpuInstr4_haddps_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     4871        { bs3CpuInstr4_haddps_XMM8_XMM8_icebp_c64,        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
     4872        { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     4873        { bs3CpuInstr4_vhaddps_YMM8_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_s_aValuesSR },
     4874        { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     4875        { bs3CpuInstr4_vhaddps_YMM1_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
    48904876    };
    48914877
    … …  
    51685154    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    51695155    {
    5170         { bs3CpuInstr4_haddpd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    5171         { bs3CpuInstr4_haddpd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    5172 
    5173         { bs3CpuInstr4_vhaddpd_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    5174         { bs3CpuInstr4_vhaddpd_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    5175 
    5176         { bs3CpuInstr4_vhaddpd_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    5177         { bs3CpuInstr4_vhaddpd_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    5178 
    5179         { bs3CpuInstr4_haddpd_XMM1_XMM1_icebp_c16,        255, RM_REG, T_SSE3,    1, 1, 1,   PASS_s_aValuesSR },
    5180         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValuesSR },
    5181         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValuesSR },
    5182         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValuesSR },
     5156        { bs3CpuInstr4_haddpd_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_s_aValues  },
     5157        { bs3CpuInstr4_haddpd_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_s_aValues  },
     5158
     5159        { bs3CpuInstr4_vhaddpd_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     5160        { bs3CpuInstr4_vhaddpd_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     5161
     5162        { bs3CpuInstr4_vhaddpd_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues  },
     5163        { bs3CpuInstr4_vhaddpd_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues  },
     5164
     5165        { bs3CpuInstr4_haddpd_XMM1_XMM1_icebp_c16,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     5166        { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     5167        { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     5168        { bs3CpuInstr4_vhaddpd_YMM1_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
    51835169    };
    51845170    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    51855171    {
    5186         { bs3CpuInstr4_haddpd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    5187         { bs3CpuInstr4_haddpd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    5188 
    5189         { bs3CpuInstr4_vhaddpd_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    5190         { bs3CpuInstr4_vhaddpd_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    5191 
    5192         { bs3CpuInstr4_vhaddpd_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    5193         { bs3CpuInstr4_vhaddpd_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    5194 
    5195         { bs3CpuInstr4_haddpd_XMM1_XMM1_icebp_c32,        255, RM_REG, T_SSE3,    1, 1, 1,   PASS_s_aValuesSR },
    5196         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValuesSR },
    5197         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValuesSR },
    5198         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValuesSR },
     5172        { bs3CpuInstr4_haddpd_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_s_aValues  },
     5173        { bs3CpuInstr4_haddpd_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_s_aValues  },
     5174
     5175        { bs3CpuInstr4_vhaddpd_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     5176        { bs3CpuInstr4_vhaddpd_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     5177
     5178        { bs3CpuInstr4_vhaddpd_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues  },
     5179        { bs3CpuInstr4_vhaddpd_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues  },
     5180
     5181        { bs3CpuInstr4_haddpd_XMM1_XMM1_icebp_c32,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     5182        { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     5183        { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     5184        { bs3CpuInstr4_vhaddpd_YMM1_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
    51995185    };
    52005186    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    52015187    {
    5202         { bs3CpuInstr4_haddpd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    5203         { bs3CpuInstr4_haddpd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    5204 
    5205         { bs3CpuInstr4_vhaddpd_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    5206         { bs3CpuInstr4_vhaddpd_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    5207 
    5208         { bs3CpuInstr4_vhaddpd_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    5209         { bs3CpuInstr4_vhaddpd_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    5210 
    5211         { bs3CpuInstr4_haddpd_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE3, 8, 8, 9,   PASS_s_aValues },
    5212         { bs3CpuInstr4_haddpd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE3, 8, 8, 255, PASS_s_aValues },
    5213 
    5214         { bs3CpuInstr4_vhaddpd_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10,  PASS_s_aValues },
    5215         { bs3CpuInstr4_vhaddpd_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    5216         { bs3CpuInstr4_vhaddpd_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 10,  PASS_s_aValues },
    5217         { bs3CpuInstr4_vhaddpd_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
    5218 
    5219         { bs3CpuInstr4_haddpd_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE3,    1, 1, 1,   PASS_s_aValuesSR },
    5220         { bs3CpuInstr4_haddpd_XMM8_XMM8_icebp_c64,        255, RM_REG, T_SSE3,    8, 8, 8,   PASS_s_aValuesSR },
    5221         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValuesSR },
    5222         { bs3CpuInstr4_vhaddpd_YMM8_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, 8, 8, 8,   PASS_s_aValuesSR },
    5223         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValuesSR },
    5224         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValuesSR },
     5188        { bs3CpuInstr4_haddpd_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_s_aValues  },
     5189        { bs3CpuInstr4_haddpd_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_s_aValues  },
     5190
     5191        { bs3CpuInstr4_vhaddpd_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues  },
     5192        { bs3CpuInstr4_vhaddpd_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues  },
     5193
     5194        { bs3CpuInstr4_vhaddpd_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues  },
     5195        { bs3CpuInstr4_vhaddpd_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues  },
     5196
     5197        { bs3CpuInstr4_haddpd_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM9,  PASS_s_aValues  },
     5198        { bs3CpuInstr4_haddpd_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM8, XMM8, FSxBX, PASS_s_aValues  },
     5199
     5200        { bs3CpuInstr4_vhaddpd_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues  },
     5201        { bs3CpuInstr4_vhaddpd_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues  },
     5202        { bs3CpuInstr4_vhaddpd_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues  },
     5203        { bs3CpuInstr4_vhaddpd_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues  },
     5204
     5205        { bs3CpuInstr4_haddpd_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     5206        { bs3CpuInstr4_haddpd_XMM8_XMM8_icebp_c64,        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
     5207        { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValuesSR },
     5208        { bs3CpuInstr4_vhaddpd_YMM8_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_s_aValuesSR },
     5209        { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValuesSR },
     5210        { bs3CpuInstr4_vhaddpd_YMM1_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValuesSR },
    52255211    };
    52265212
    … …  
    55605546    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    55615547    {
    5562         { bs3CpuInstr4_subps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    5563         { bs3CpuInstr4_subps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    5564 
    5565         { bs3CpuInstr4_vsubps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    5566         { bs3CpuInstr4_vsubps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    5567 
    5568         { bs3CpuInstr4_vsubps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    5569         { bs3CpuInstr4_vsubps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     5548        { bs3CpuInstr4_subps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     5549        { bs3CpuInstr4_subps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     5550
     5551        { bs3CpuInstr4_vsubps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     5552        { bs3CpuInstr4_vsubps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     5553
     5554        { bs3CpuInstr4_vsubps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     5555        { bs3CpuInstr4_vsubps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    55705556    };
    55715557    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    55725558    {
    5573         { bs3CpuInstr4_subps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    5574         { bs3CpuInstr4_subps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    5575 
    5576         { bs3CpuInstr4_vsubps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    5577         { bs3CpuInstr4_vsubps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    5578 
    5579         { bs3CpuInstr4_vsubps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    5580         { bs3CpuInstr4_vsubps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     5559        { bs3CpuInstr4_subps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     5560        { bs3CpuInstr4_subps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     5561
     5562        { bs3CpuInstr4_vsubps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     5563        { bs3CpuInstr4_vsubps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     5564
     5565        { bs3CpuInstr4_vsubps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     5566        { bs3CpuInstr4_vsubps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    55815567    };
    55825568    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    55835569    {
    5584         { bs3CpuInstr4_subps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    5585         { bs3CpuInstr4_subps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    5586 
    5587         { bs3CpuInstr4_vsubps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    5588         { bs3CpuInstr4_vsubps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    5589 
    5590         { bs3CpuInstr4_vsubps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    5591         { bs3CpuInstr4_vsubps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    5592 
    5593         { bs3CpuInstr4_subps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    5594         { bs3CpuInstr4_subps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    5595 
    5596         { bs3CpuInstr4_vsubps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    5597         { bs3CpuInstr4_vsubps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    5598         { bs3CpuInstr4_vsubps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 10, PASS_s_aValues },
    5599         { bs3CpuInstr4_vsubps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
     5570        { bs3CpuInstr4_subps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     5571        { bs3CpuInstr4_subps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     5572
     5573        { bs3CpuInstr4_vsubps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     5574        { bs3CpuInstr4_vsubps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     5575
     5576        { bs3CpuInstr4_vsubps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     5577        { bs3CpuInstr4_vsubps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
     5578
     5579        { bs3CpuInstr4_subps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     5580        { bs3CpuInstr4_subps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     5581
     5582        { bs3CpuInstr4_vsubps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     5583        { bs3CpuInstr4_vsubps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
     5584        { bs3CpuInstr4_vsubps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues },
     5585        { bs3CpuInstr4_vsubps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues },
    56005586    };
    56015587
    … …  
    58455831    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    58465832    {
    5847         { bs3CpuInstr4_subpd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    5848         { bs3CpuInstr4_subpd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    5849 
    5850         { bs3CpuInstr4_vsubpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    5851         { bs3CpuInstr4_vsubpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    5852 
    5853         { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    5854         { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     5833        { bs3CpuInstr4_subpd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     5834        { bs3CpuInstr4_subpd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     5835
     5836        { bs3CpuInstr4_vsubpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     5837        { bs3CpuInstr4_vsubpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     5838
     5839        { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     5840        { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    58555841    };
    58565842    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    58575843    {
    5858         { bs3CpuInstr4_subpd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    5859         { bs3CpuInstr4_subpd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    5860 
    5861         { bs3CpuInstr4_vsubpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    5862         { bs3CpuInstr4_vsubpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    5863 
    5864         { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    5865         { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     5844        { bs3CpuInstr4_subpd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     5845        { bs3CpuInstr4_subpd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     5846
     5847        { bs3CpuInstr4_vsubpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     5848        { bs3CpuInstr4_vsubpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     5849
     5850        { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     5851        { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    58665852    };
    58675853    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    58685854    {
    5869         { bs3CpuInstr4_subpd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    5870         { bs3CpuInstr4_subpd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    5871 
    5872         { bs3CpuInstr4_vsubpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    5873         { bs3CpuInstr4_vsubpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    5874 
    5875         { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    5876         { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    5877 
    5878         { bs3CpuInstr4_subpd_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE2, 8, 8, 9,   PASS_s_aValues },
    5879         { bs3CpuInstr4_subpd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 8, 8, 255, PASS_s_aValues },
    5880 
    5881         { bs3CpuInstr4_vsubpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    5882         { bs3CpuInstr4_vsubpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    5883         { bs3CpuInstr4_vsubpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, 8, 9, 10, PASS_s_aValues },
    5884         { bs3CpuInstr4_vsubpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
     5855        { bs3CpuInstr4_subpd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     5856        { bs3CpuInstr4_subpd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     5857
     5858        { bs3CpuInstr4_vsubpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     5859        { bs3CpuInstr4_vsubpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     5860
     5861        { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     5862        { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
     5863
     5864        { bs3CpuInstr4_subpd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_s_aValues },
     5865        { bs3CpuInstr4_subpd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_s_aValues },
     5866
     5867        { bs3CpuInstr4_vsubpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     5868        { bs3CpuInstr4_vsubpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
     5869        { bs3CpuInstr4_vsubpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues },
     5870        { bs3CpuInstr4_vsubpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues },
    58855871    };
    58865872
    … …  
    61556141    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    61566142    {
    6157         { bs3CpuInstr4_subss_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    6158         { bs3CpuInstr4_subss_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    6159 
    6160         { bs3CpuInstr4_vsubss_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    6161         { bs3CpuInstr4_vsubss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
     6143        { bs3CpuInstr4_subss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     6144        { bs3CpuInstr4_subss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     6145
     6146        { bs3CpuInstr4_vsubss_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     6147        { bs3CpuInstr4_vsubss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
    61626148    };
    61636149    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    61646150    {
    6165         { bs3CpuInstr4_subss_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    6166         { bs3CpuInstr4_subss_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    6167 
    6168         { bs3CpuInstr4_vsubss_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    6169         { bs3CpuInstr4_vsubss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
     6151        { bs3CpuInstr4_subss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     6152        { bs3CpuInstr4_subss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     6153
     6154        { bs3CpuInstr4_vsubss_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     6155        { bs3CpuInstr4_vsubss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
    61706156    };
    61716157    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    61726158    {
    6173         { bs3CpuInstr4_subss_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    6174         { bs3CpuInstr4_subss_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    6175 
    6176         { bs3CpuInstr4_vsubss_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    6177         { bs3CpuInstr4_vsubss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    6178 
    6179         { bs3CpuInstr4_subss_XMM8_XMM9_icebp_c64,  255,         RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    6180         { bs3CpuInstr4_subss_XMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    6181 
    6182         { bs3CpuInstr4_vsubss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    6183         { bs3CpuInstr4_vsubss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
     6159        { bs3CpuInstr4_subss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     6160        { bs3CpuInstr4_subss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     6161
     6162        { bs3CpuInstr4_vsubss_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     6163        { bs3CpuInstr4_vsubss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     6164
     6165        { bs3CpuInstr4_subss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     6166        { bs3CpuInstr4_subss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     6167
     6168        { bs3CpuInstr4_vsubss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     6169        { bs3CpuInstr4_vsubss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
    61846170    };
    61856171
    … …  
    64836469    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    64846470    {
    6485         { bs3CpuInstr4_subsd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    6486         { bs3CpuInstr4_subsd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    6487 
    6488         { bs3CpuInstr4_vsubsd_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    6489         { bs3CpuInstr4_vsubsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
     6471        { bs3CpuInstr4_subsd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     6472        { bs3CpuInstr4_subsd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     6473
     6474        { bs3CpuInstr4_vsubsd_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     6475        { bs3CpuInstr4_vsubsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
    64906476    };
    64916477    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    64926478    {
    6493         { bs3CpuInstr4_subsd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    6494         { bs3CpuInstr4_subsd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    6495 
    6496         { bs3CpuInstr4_vsubsd_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    6497         { bs3CpuInstr4_vsubsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
     6479        { bs3CpuInstr4_subsd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     6480        { bs3CpuInstr4_subsd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     6481
     6482        { bs3CpuInstr4_vsubsd_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     6483        { bs3CpuInstr4_vsubsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
    64986484    };
    64996485    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    65006486    {
    6501         { bs3CpuInstr4_subsd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    6502         { bs3CpuInstr4_subsd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    6503 
    6504         { bs3CpuInstr4_vsubsd_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    6505         { bs3CpuInstr4_vsubsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    6506 
    6507         { bs3CpuInstr4_subsd_XMM8_XMM9_icebp_c64,  255,         RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    6508         { bs3CpuInstr4_subsd_XMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    6509 
    6510         { bs3CpuInstr4_vsubsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    6511         { bs3CpuInstr4_vsubsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
     6487        { bs3CpuInstr4_subsd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     6488        { bs3CpuInstr4_subsd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     6489
     6490        { bs3CpuInstr4_vsubsd_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     6491        { bs3CpuInstr4_vsubsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     6492
     6493        { bs3CpuInstr4_subsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     6494        { bs3CpuInstr4_subsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     6495
     6496        { bs3CpuInstr4_vsubsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     6497        { bs3CpuInstr4_vsubsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
    65126498    };
    65136499
    … …  
    68036789    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    68046790    {
    6805         { bs3CpuInstr4_hsubps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    6806         { bs3CpuInstr4_hsubps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    6807 
    6808         { bs3CpuInstr4_vhsubps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    6809         { bs3CpuInstr4_vhsubps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    6810 
    6811         { bs3CpuInstr4_vhsubps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    6812         { bs3CpuInstr4_vhsubps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     6791        { bs3CpuInstr4_hsubps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     6792        { bs3CpuInstr4_hsubps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     6793
     6794        { bs3CpuInstr4_vhsubps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     6795        { bs3CpuInstr4_vhsubps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     6796
     6797        { bs3CpuInstr4_vhsubps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     6798        { bs3CpuInstr4_vhsubps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    68136799    };
    68146800    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    68156801    {
    6816         { bs3CpuInstr4_hsubps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    6817         { bs3CpuInstr4_hsubps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    6818 
    6819         { bs3CpuInstr4_vhsubps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    6820         { bs3CpuInstr4_vhsubps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    6821 
    6822         { bs3CpuInstr4_vhsubps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    6823         { bs3CpuInstr4_vhsubps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     6802        { bs3CpuInstr4_hsubps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     6803        { bs3CpuInstr4_hsubps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     6804
     6805        { bs3CpuInstr4_vhsubps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     6806        { bs3CpuInstr4_vhsubps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     6807
     6808        { bs3CpuInstr4_vhsubps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     6809        { bs3CpuInstr4_vhsubps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    68246810    };
    68256811    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    68266812    {
    6827         { bs3CpuInstr4_hsubps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    6828         { bs3CpuInstr4_hsubps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    6829 
    6830         { bs3CpuInstr4_vhsubps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    6831         { bs3CpuInstr4_vhsubps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    6832 
    6833         { bs3CpuInstr4_vhsubps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    6834         { bs3CpuInstr4_vhsubps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    6835 
    6836         { bs3CpuInstr4_hsubps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE3, 8, 8, 9,   PASS_s_aValues },
    6837         { bs3CpuInstr4_hsubps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE3, 8, 8, 255, PASS_s_aValues },
    6838 
    6839         { bs3CpuInstr4_vhsubps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    6840         { bs3CpuInstr4_vhsubps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    6841         { bs3CpuInstr4_vhsubps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 10, PASS_s_aValues },
    6842         { bs3CpuInstr4_vhsubps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
     6813        { bs3CpuInstr4_hsubps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     6814        { bs3CpuInstr4_hsubps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     6815
     6816        { bs3CpuInstr4_vhsubps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     6817        { bs3CpuInstr4_vhsubps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     6818
     6819        { bs3CpuInstr4_vhsubps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     6820        { bs3CpuInstr4_vhsubps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
     6821
     6822        { bs3CpuInstr4_hsubps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM9,  PASS_s_aValues },
     6823        { bs3CpuInstr4_hsubps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM8, XMM8, FSxBX, PASS_s_aValues },
     6824
     6825        { bs3CpuInstr4_vhsubps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     6826        { bs3CpuInstr4_vhsubps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
     6827        { bs3CpuInstr4_vhsubps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues },
     6828        { bs3CpuInstr4_vhsubps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues },
    68436829    };
    68446830
    … …  
    70767062    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    70777063    {
    7078         { bs3CpuInstr4_hsubpd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    7079         { bs3CpuInstr4_hsubpd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    7080 
    7081         { bs3CpuInstr4_vhsubpd_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    7082         { bs3CpuInstr4_vhsubpd_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    7083 
    7084         { bs3CpuInstr4_vhsubpd_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    7085         { bs3CpuInstr4_vhsubpd_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     7064        { bs3CpuInstr4_hsubpd_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     7065        { bs3CpuInstr4_hsubpd_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     7066
     7067        { bs3CpuInstr4_vhsubpd_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     7068        { bs3CpuInstr4_vhsubpd_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     7069
     7070        { bs3CpuInstr4_vhsubpd_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     7071        { bs3CpuInstr4_vhsubpd_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    70867072    };
    70877073    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    70887074    {
    7089         { bs3CpuInstr4_hsubpd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    7090         { bs3CpuInstr4_hsubpd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    7091 
    7092         { bs3CpuInstr4_vhsubpd_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    7093         { bs3CpuInstr4_vhsubpd_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    7094 
    7095         { bs3CpuInstr4_vhsubpd_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    7096         { bs3CpuInstr4_vhsubpd_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     7075        { bs3CpuInstr4_hsubpd_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     7076        { bs3CpuInstr4_hsubpd_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     7077
     7078        { bs3CpuInstr4_vhsubpd_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     7079        { bs3CpuInstr4_vhsubpd_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     7080
     7081        { bs3CpuInstr4_vhsubpd_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     7082        { bs3CpuInstr4_vhsubpd_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    70977083    };
    70987084    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    70997085    {
    7100         { bs3CpuInstr4_hsubpd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    7101         { bs3CpuInstr4_hsubpd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    7102 
    7103         { bs3CpuInstr4_vhsubpd_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    7104         { bs3CpuInstr4_vhsubpd_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    7105 
    7106         { bs3CpuInstr4_vhsubpd_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    7107         { bs3CpuInstr4_vhsubpd_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    7108 
    7109         { bs3CpuInstr4_hsubpd_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE3, 8, 8, 9,   PASS_s_aValues },
    7110         { bs3CpuInstr4_hsubpd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE3, 8, 8, 255, PASS_s_aValues },
    7111 
    7112         { bs3CpuInstr4_vhsubpd_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    7113         { bs3CpuInstr4_vhsubpd_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    7114         { bs3CpuInstr4_vhsubpd_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 10, PASS_s_aValues },
    7115         { bs3CpuInstr4_vhsubpd_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
     7086        { bs3CpuInstr4_hsubpd_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     7087        { bs3CpuInstr4_hsubpd_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     7088
     7089        { bs3CpuInstr4_vhsubpd_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     7090        { bs3CpuInstr4_vhsubpd_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     7091
     7092        { bs3CpuInstr4_vhsubpd_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     7093        { bs3CpuInstr4_vhsubpd_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
     7094
     7095        { bs3CpuInstr4_hsubpd_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM9,  PASS_s_aValues },
     7096        { bs3CpuInstr4_hsubpd_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM8, XMM8, FSxBX, PASS_s_aValues },
     7097
     7098        { bs3CpuInstr4_vhsubpd_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     7099        { bs3CpuInstr4_vhsubpd_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
     7100        { bs3CpuInstr4_vhsubpd_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues },
     7101        { bs3CpuInstr4_vhsubpd_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues },
    71167102    };
    71177103
    … …  
    74757461    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    74767462    {
    7477         { bs3CpuInstr4_mulps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    7478         { bs3CpuInstr4_mulps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    7479 
    7480         { bs3CpuInstr4_vmulps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    7481         { bs3CpuInstr4_vmulps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    7482 
    7483         { bs3CpuInstr4_vmulps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    7484         { bs3CpuInstr4_vmulps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     7463        { bs3CpuInstr4_mulps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     7464        { bs3CpuInstr4_mulps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     7465
     7466        { bs3CpuInstr4_vmulps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     7467        { bs3CpuInstr4_vmulps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     7468
     7469        { bs3CpuInstr4_vmulps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     7470        { bs3CpuInstr4_vmulps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    74857471    };
    74867472    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    74877473    {
    7488         { bs3CpuInstr4_mulps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    7489         { bs3CpuInstr4_mulps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    7490 
    7491         { bs3CpuInstr4_vmulps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    7492         { bs3CpuInstr4_vmulps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    7493 
    7494         { bs3CpuInstr4_vmulps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    7495         { bs3CpuInstr4_vmulps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     7474        { bs3CpuInstr4_mulps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     7475        { bs3CpuInstr4_mulps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     7476
     7477        { bs3CpuInstr4_vmulps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     7478        { bs3CpuInstr4_vmulps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     7479
     7480        { bs3CpuInstr4_vmulps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     7481        { bs3CpuInstr4_vmulps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    74967482    };
    74977483    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    74987484    {
    7499         { bs3CpuInstr4_mulps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    7500         { bs3CpuInstr4_mulps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    7501 
    7502         { bs3CpuInstr4_vmulps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    7503         { bs3CpuInstr4_vmulps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    7504 
    7505         { bs3CpuInstr4_vmulps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    7506         { bs3CpuInstr4_vmulps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    7507 
    7508         { bs3CpuInstr4_mulps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    7509         { bs3CpuInstr4_mulps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    7510 
    7511         { bs3CpuInstr4_vmulps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    7512         { bs3CpuInstr4_vmulps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    7513         { bs3CpuInstr4_vmulps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 10, PASS_s_aValues },
    7514         { bs3CpuInstr4_vmulps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
     7485        { bs3CpuInstr4_mulps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     7486        { bs3CpuInstr4_mulps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     7487
     7488        { bs3CpuInstr4_vmulps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     7489        { bs3CpuInstr4_vmulps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     7490
     7491        { bs3CpuInstr4_vmulps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     7492        { bs3CpuInstr4_vmulps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
     7493
     7494        { bs3CpuInstr4_mulps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     7495        { bs3CpuInstr4_mulps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     7496
     7497        { bs3CpuInstr4_vmulps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     7498        { bs3CpuInstr4_vmulps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
     7499        { bs3CpuInstr4_vmulps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues },
     7500        { bs3CpuInstr4_vmulps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues },
    75157501    };
    75167502
    … …  
    77527738    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    77537739    {
    7754         { bs3CpuInstr4_mulpd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    7755         { bs3CpuInstr4_mulpd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    7756 
    7757         { bs3CpuInstr4_vmulpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    7758         { bs3CpuInstr4_vmulpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    7759 
    7760         { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    7761         { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     7740        { bs3CpuInstr4_mulpd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     7741        { bs3CpuInstr4_mulpd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     7742
     7743        { bs3CpuInstr4_vmulpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     7744        { bs3CpuInstr4_vmulpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     7745
     7746        { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     7747        { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    77627748    };
    77637749    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    77647750    {
    7765         { bs3CpuInstr4_mulpd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    7766         { bs3CpuInstr4_mulpd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    7767 
    7768         { bs3CpuInstr4_vmulpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    7769         { bs3CpuInstr4_vmulpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    7770 
    7771         { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    7772         { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     7751        { bs3CpuInstr4_mulpd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     7752        { bs3CpuInstr4_mulpd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     7753
     7754        { bs3CpuInstr4_vmulpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     7755        { bs3CpuInstr4_vmulpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     7756
     7757        { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     7758        { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    77737759    };
    77747760    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    77757761    {
    7776         { bs3CpuInstr4_mulpd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    7777         { bs3CpuInstr4_mulpd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    7778 
    7779         { bs3CpuInstr4_vmulpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    7780         { bs3CpuInstr4_vmulpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    7781 
    7782         { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    7783         { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    7784 
    7785         { bs3CpuInstr4_mulpd_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE2, 8, 8, 9,   PASS_s_aValues },
    7786         { bs3CpuInstr4_mulpd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 8, 8, 255, PASS_s_aValues },
    7787 
    7788         { bs3CpuInstr4_vmulpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    7789         { bs3CpuInstr4_vmulpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    7790         { bs3CpuInstr4_vmulpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, 8, 9, 10, PASS_s_aValues },
    7791         { bs3CpuInstr4_vmulpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
     7762        { bs3CpuInstr4_mulpd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     7763        { bs3CpuInstr4_mulpd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     7764
     7765        { bs3CpuInstr4_vmulpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     7766        { bs3CpuInstr4_vmulpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     7767
     7768        { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     7769        { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
     7770
     7771        { bs3CpuInstr4_mulpd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_s_aValues },
     7772        { bs3CpuInstr4_mulpd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_s_aValues },
     7773
     7774        { bs3CpuInstr4_vmulpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     7775        { bs3CpuInstr4_vmulpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
     7776        { bs3CpuInstr4_vmulpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues },
     7777        { bs3CpuInstr4_vmulpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues },
    77927778    };
    77937779
    … …  
    79917977    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    79927978    {
    7993         { bs3CpuInstr4_mulss_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    7994         { bs3CpuInstr4_mulss_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    7995 
    7996         { bs3CpuInstr4_vmulss_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    7997         { bs3CpuInstr4_vmulss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
     7979        { bs3CpuInstr4_mulss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     7980        { bs3CpuInstr4_mulss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     7981
     7982        { bs3CpuInstr4_vmulss_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     7983        { bs3CpuInstr4_vmulss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
    79987984    };
    79997985    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    80007986    {
    8001         { bs3CpuInstr4_mulss_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    8002         { bs3CpuInstr4_mulss_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    8003 
    8004         { bs3CpuInstr4_vmulss_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    8005         { bs3CpuInstr4_vmulss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
     7987        { bs3CpuInstr4_mulss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     7988        { bs3CpuInstr4_mulss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     7989
     7990        { bs3CpuInstr4_vmulss_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     7991        { bs3CpuInstr4_vmulss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
    80067992    };
    80077993    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    80087994    {
    8009         { bs3CpuInstr4_mulss_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    8010         { bs3CpuInstr4_mulss_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    8011 
    8012         { bs3CpuInstr4_vmulss_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    8013         { bs3CpuInstr4_vmulss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    8014 
    8015         { bs3CpuInstr4_mulss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    8016         { bs3CpuInstr4_mulss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    8017 
    8018         { bs3CpuInstr4_vmulss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    8019         { bs3CpuInstr4_vmulss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
     7995        { bs3CpuInstr4_mulss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     7996        { bs3CpuInstr4_mulss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     7997
     7998        { bs3CpuInstr4_vmulss_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     7999        { bs3CpuInstr4_vmulss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     8000
     8001        { bs3CpuInstr4_mulss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     8002        { bs3CpuInstr4_mulss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     8003
     8004        { bs3CpuInstr4_vmulss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     8005        { bs3CpuInstr4_vmulss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
    80208006    };
    80218007
    … …  
    82858271    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    82868272    {
    8287         { bs3CpuInstr4_mulsd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    8288         { bs3CpuInstr4_mulsd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    8289 
    8290         { bs3CpuInstr4_vmulsd_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    8291         { bs3CpuInstr4_vmulsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
     8273        { bs3CpuInstr4_mulsd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     8274        { bs3CpuInstr4_mulsd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     8275
     8276        { bs3CpuInstr4_vmulsd_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     8277        { bs3CpuInstr4_vmulsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
    82928278    };
    82938279    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    82948280    {
    8295         { bs3CpuInstr4_mulsd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    8296         { bs3CpuInstr4_mulsd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    8297 
    8298         { bs3CpuInstr4_vmulsd_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    8299         { bs3CpuInstr4_vmulsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
     8281        { bs3CpuInstr4_mulsd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     8282        { bs3CpuInstr4_mulsd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     8283
     8284        { bs3CpuInstr4_vmulsd_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     8285        { bs3CpuInstr4_vmulsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
    83008286    };
    83018287    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    83028288    {
    8303         { bs3CpuInstr4_mulsd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    8304         { bs3CpuInstr4_mulsd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    8305 
    8306         { bs3CpuInstr4_vmulsd_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    8307         { bs3CpuInstr4_vmulsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    8308 
    8309         { bs3CpuInstr4_mulsd_XMM8_XMM9_icebp_c64,  255,         RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    8310         { bs3CpuInstr4_mulsd_XMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    8311 
    8312         { bs3CpuInstr4_vmulsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    8313         { bs3CpuInstr4_vmulsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
     8289        { bs3CpuInstr4_mulsd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     8290        { bs3CpuInstr4_mulsd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     8291
     8292        { bs3CpuInstr4_vmulsd_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     8293        { bs3CpuInstr4_vmulsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     8294
     8295        { bs3CpuInstr4_mulsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     8296        { bs3CpuInstr4_mulsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     8297
     8298        { bs3CpuInstr4_vmulsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     8299        { bs3CpuInstr4_vmulsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
    83148300    };
    83158301
    … …  
    86308616    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    86318617    {
    8632         { bs3CpuInstr4_divps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    8633         { bs3CpuInstr4_divps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    8634 
    8635         { bs3CpuInstr4_vdivps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    8636         { bs3CpuInstr4_vdivps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    8637 
    8638         { bs3CpuInstr4_vdivps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    8639         { bs3CpuInstr4_vdivps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     8618        { bs3CpuInstr4_divps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     8619        { bs3CpuInstr4_divps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     8620
     8621        { bs3CpuInstr4_vdivps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     8622        { bs3CpuInstr4_vdivps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     8623
     8624        { bs3CpuInstr4_vdivps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     8625        { bs3CpuInstr4_vdivps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    86408626    };
    86418627    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    86428628    {
    8643         { bs3CpuInstr4_divps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    8644         { bs3CpuInstr4_divps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    8645 
    8646         { bs3CpuInstr4_vdivps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    8647         { bs3CpuInstr4_vdivps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    8648 
    8649         { bs3CpuInstr4_vdivps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    8650         { bs3CpuInstr4_vdivps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     8629        { bs3CpuInstr4_divps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     8630        { bs3CpuInstr4_divps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     8631
     8632        { bs3CpuInstr4_vdivps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     8633        { bs3CpuInstr4_vdivps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     8634
     8635        { bs3CpuInstr4_vdivps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     8636        { bs3CpuInstr4_vdivps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    86518637    };
    86528638    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    86538639    {
    8654         { bs3CpuInstr4_divps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    8655         { bs3CpuInstr4_divps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    8656 
    8657         { bs3CpuInstr4_vdivps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    8658         { bs3CpuInstr4_vdivps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    8659 
    8660         { bs3CpuInstr4_vdivps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    8661         { bs3CpuInstr4_vdivps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    8662 
    8663         { bs3CpuInstr4_divps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    8664         { bs3CpuInstr4_divps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    8665 
    8666         { bs3CpuInstr4_vdivps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    8667         { bs3CpuInstr4_vdivps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    8668         { bs3CpuInstr4_vdivps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 10, PASS_s_aValues },
    8669         { bs3CpuInstr4_vdivps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
     8640        { bs3CpuInstr4_divps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     8641        { bs3CpuInstr4_divps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     8642
     8643        { bs3CpuInstr4_vdivps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     8644        { bs3CpuInstr4_vdivps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     8645
     8646        { bs3CpuInstr4_vdivps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     8647        { bs3CpuInstr4_vdivps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
     8648
     8649        { bs3CpuInstr4_divps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     8650        { bs3CpuInstr4_divps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     8651
     8652        { bs3CpuInstr4_vdivps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     8653        { bs3CpuInstr4_vdivps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
     8654        { bs3CpuInstr4_vdivps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues },
     8655        { bs3CpuInstr4_vdivps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues },
    86708656    };
    86718657
    … …  
    89658951    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    89668952    {
    8967         { bs3CpuInstr4_divpd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    8968         { bs3CpuInstr4_divpd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    8969 
    8970         { bs3CpuInstr4_vdivpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    8971         { bs3CpuInstr4_vdivpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    8972 
    8973         { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    8974         { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     8953        { bs3CpuInstr4_divpd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     8954        { bs3CpuInstr4_divpd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     8955
     8956        { bs3CpuInstr4_vdivpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     8957        { bs3CpuInstr4_vdivpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     8958
     8959        { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     8960        { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    89758961    };
    89768962    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    89778963    {
    8978         { bs3CpuInstr4_divpd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    8979         { bs3CpuInstr4_divpd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    8980 
    8981         { bs3CpuInstr4_vdivpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    8982         { bs3CpuInstr4_vdivpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    8983 
    8984         { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    8985         { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     8964        { bs3CpuInstr4_divpd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     8965        { bs3CpuInstr4_divpd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     8966
     8967        { bs3CpuInstr4_vdivpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     8968        { bs3CpuInstr4_vdivpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     8969
     8970        { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     8971        { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    89868972    };
    89878973    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    89888974    {
    8989         { bs3CpuInstr4_divpd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    8990         { bs3CpuInstr4_divpd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    8991 
    8992         { bs3CpuInstr4_vdivpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    8993         { bs3CpuInstr4_vdivpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    8994 
    8995         { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    8996         { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    8997 
    8998         { bs3CpuInstr4_divpd_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE2, 8, 8, 9,   PASS_s_aValues },
    8999         { bs3CpuInstr4_divpd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 8, 8, 255, PASS_s_aValues },
    9000 
    9001         { bs3CpuInstr4_vdivpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    9002         { bs3CpuInstr4_vdivpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    9003         { bs3CpuInstr4_vdivpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, 8, 9, 10, PASS_s_aValues },
    9004         { bs3CpuInstr4_vdivpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
     8975        { bs3CpuInstr4_divpd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     8976        { bs3CpuInstr4_divpd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     8977
     8978        { bs3CpuInstr4_vdivpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     8979        { bs3CpuInstr4_vdivpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     8980
     8981        { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     8982        { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
     8983
     8984        { bs3CpuInstr4_divpd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_s_aValues },
     8985        { bs3CpuInstr4_divpd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_s_aValues },
     8986
     8987        { bs3CpuInstr4_vdivpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     8988        { bs3CpuInstr4_vdivpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
     8989        { bs3CpuInstr4_vdivpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues },
     8990        { bs3CpuInstr4_vdivpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues },
    90058991    };
    90068992
    … …  
    92029188    };
    92039189
    9204 /** @todo Make cdefs.h 'RT_ELEMENTS(arr), arr' macro?  But extra cast, here. */
    9205 /** @todo Do this to existing instr-4 tests?  instr-3?  Beyond? */
    92069190    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    92079191    {
    9208         { bs3CpuInstr4_divss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    9209         { bs3CpuInstr4_divss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    9210 
    9211         { bs3CpuInstr4_vdivss_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    9212         { bs3CpuInstr4_vdivss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
     9192        { bs3CpuInstr4_divss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     9193        { bs3CpuInstr4_divss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     9194
     9195        { bs3CpuInstr4_vdivss_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     9196        { bs3CpuInstr4_vdivss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
    92139197    };
    92149198    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    92159199    {
    9216         { bs3CpuInstr4_divss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    9217         { bs3CpuInstr4_divss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    9218 
    9219         { bs3CpuInstr4_vdivss_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    9220         { bs3CpuInstr4_vdivss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
     9200        { bs3CpuInstr4_divss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     9201        { bs3CpuInstr4_divss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     9202
     9203        { bs3CpuInstr4_vdivss_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     9204        { bs3CpuInstr4_vdivss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
    92219205    };
    92229206    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    92239207    {
    9224         { bs3CpuInstr4_divss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    9225         { bs3CpuInstr4_divss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    9226 
    9227         { bs3CpuInstr4_vdivss_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    9228         { bs3CpuInstr4_vdivss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    9229 
    9230         { bs3CpuInstr4_divss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     8, 8, 9,   PASS_s_aValues },
    9231         { bs3CpuInstr4_divss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     8, 8, 255, PASS_s_aValues },
    9232 
    9233         { bs3CpuInstr4_vdivss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    9234         { bs3CpuInstr4_vdivss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
     9208        { bs3CpuInstr4_divss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     9209        { bs3CpuInstr4_divss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     9210
     9211        { bs3CpuInstr4_vdivss_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     9212        { bs3CpuInstr4_vdivss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     9213
     9214        { bs3CpuInstr4_divss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     9215        { bs3CpuInstr4_divss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     9216
     9217        { bs3CpuInstr4_vdivss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     9218        { bs3CpuInstr4_vdivss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
    92359219    };
    92369220
    … …  
    95809564    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    95819565    {
    9582         { bs3CpuInstr4_divsd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    9583         { bs3CpuInstr4_divsd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    9584 
    9585         { bs3CpuInstr4_vdivsd_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    9586         { bs3CpuInstr4_vdivsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
     9566        { bs3CpuInstr4_divsd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     9567        { bs3CpuInstr4_divsd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     9568
     9569        { bs3CpuInstr4_vdivsd_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     9570        { bs3CpuInstr4_vdivsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
    95879571    };
    95889572    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    95899573    {
    9590         { bs3CpuInstr4_divsd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    9591         { bs3CpuInstr4_divsd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    9592 
    9593         { bs3CpuInstr4_vdivsd_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    9594         { bs3CpuInstr4_vdivsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
     9574        { bs3CpuInstr4_divsd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     9575        { bs3CpuInstr4_divsd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     9576
     9577        { bs3CpuInstr4_vdivsd_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     9578        { bs3CpuInstr4_vdivsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
    95959579    };
    95969580    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    95979581    {
    9598         { bs3CpuInstr4_divsd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    9599         { bs3CpuInstr4_divsd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    9600 
    9601         { bs3CpuInstr4_vdivsd_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    9602         { bs3CpuInstr4_vdivsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    9603 
    9604         { bs3CpuInstr4_divsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     8, 8, 9,   PASS_s_aValues },
    9605         { bs3CpuInstr4_divsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     8, 8, 255, PASS_s_aValues },
    9606 
    9607         { bs3CpuInstr4_vdivsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    9608         { bs3CpuInstr4_vdivsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
     9582        { bs3CpuInstr4_divsd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     9583        { bs3CpuInstr4_divsd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     9584
     9585        { bs3CpuInstr4_vdivsd_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     9586        { bs3CpuInstr4_vdivsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     9587
     9588        { bs3CpuInstr4_divsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     9589        { bs3CpuInstr4_divsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     9590
     9591        { bs3CpuInstr4_vdivsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     9592        { bs3CpuInstr4_vdivsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
    96099593    };
    96109594
    … …  
    99359919    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    99369920    {
    9937         { bs3CpuInstr4_addsubps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    9938         { bs3CpuInstr4_addsubps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    9939 
    9940         { bs3CpuInstr4_vaddsubps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    9941         { bs3CpuInstr4_vaddsubps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    9942 
    9943         { bs3CpuInstr4_vaddsubps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    9944         { bs3CpuInstr4_vaddsubps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     9921        { bs3CpuInstr4_addsubps_XMM1_XMM2_icebp_c16,          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_s_aValues },
     9922        { bs3CpuInstr4_addsubps_XMM1_FSxBX_icebp_c16,         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_s_aValues },
     9923
     9924        { bs3CpuInstr4_vaddsubps_XMM1_XMM2_XMM3_icebp_c16,    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_s_aValues },
     9925        { bs3CpuInstr4_vaddsubps_XMM1_XMM2_FSxBX_icebp_c16,   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_s_aValues },
     9926
     9927        { bs3CpuInstr4_vaddsubps_YMM1_YMM2_YMM3_icebp_c16,    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_s_aValues },
     9928        { bs3CpuInstr4_vaddsubps_YMM1_YMM2_FSxBX_icebp_c16,   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_s_aValues },
    99459929    };
    99469930    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    99479931    {
    9948         { bs3CpuInstr4_addsubps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    9949         { bs3CpuInstr4_addsubps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    9950 
    9951         { bs3CpuInstr4_vaddsubps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    9952         { bs3CpuInstr4_vaddsubps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    9953 
    9954         { bs3CpuInstr4_vaddsubps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    9955         { bs3CpuInstr4_vaddsubps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     9932        { bs3CpuInstr4_addsubps_XMM1_XMM2_icebp_c32,          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_s_aValues },
     9933        { bs3CpuInstr4_addsubps_XMM1_FSxBX_icebp_c32,         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_s_aValues },
     9934
     9935        { bs3CpuInstr4_vaddsubps_XMM1_XMM2_XMM3_icebp_c32,    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_s_aValues },
     9936        { bs3CpuInstr4_vaddsubps_XMM1_XMM2_FSxBX_icebp_c32,   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_s_aValues },
     9937
     9938        { bs3CpuInstr4_vaddsubps_YMM1_YMM2_YMM3_icebp_c32,    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_s_aValues },
     9939        { bs3CpuInstr4_vaddsubps_YMM1_YMM2_FSxBX_icebp_c32,   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_s_aValues },
    99569940    };
    99579941    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    99589942    {
    9959         { bs3CpuInstr4_addsubps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    9960         { bs3CpuInstr4_addsubps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    9961 
    9962         { bs3CpuInstr4_vaddsubps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    9963         { bs3CpuInstr4_vaddsubps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    9964 
    9965         { bs3CpuInstr4_vaddsubps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    9966         { bs3CpuInstr4_vaddsubps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    9967 
    9968         { bs3CpuInstr4_addsubps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE3, 8, 8, 9,   PASS_s_aValues },
    9969         { bs3CpuInstr4_addsubps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE3, 8, 8, 255, PASS_s_aValues },
    9970 
    9971         { bs3CpuInstr4_vaddsubps_XMM8_XMM9_XMM10_icebp_c64,   255, RM_REG, T_AVX_128, 8,  9,  10, PASS_s_aValues },
    9972         { bs3CpuInstr4_vaddsubps_XMM8_XMM9_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_128, 8,  9,  255, PASS_s_aValues },
    9973         { bs3CpuInstr4_vaddsubps_YMM13_YMM14_YMM15_icebp_c64, 255, RM_REG, T_AVX_256, 13, 14, 15, PASS_s_aValues },
    9974         { bs3CpuInstr4_vaddsubps_YMM13_YMM14_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 13, 14, 255, PASS_s_aValues },
     9943        { bs3CpuInstr4_addsubps_XMM1_XMM2_icebp_c64,          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_s_aValues },
     9944        { bs3CpuInstr4_addsubps_XMM1_FSxBX_icebp_c64,         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_s_aValues },
     9945
     9946        { bs3CpuInstr4_vaddsubps_XMM1_XMM2_XMM3_icebp_c64,    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_s_aValues },
     9947        { bs3CpuInstr4_vaddsubps_XMM1_XMM2_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_s_aValues },
     9948
     9949        { bs3CpuInstr4_vaddsubps_YMM1_YMM2_YMM3_icebp_c64,    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_s_aValues },
     9950        { bs3CpuInstr4_vaddsubps_YMM1_YMM2_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_s_aValues },
     9951
     9952        { bs3CpuInstr4_addsubps_XMM8_XMM9_icebp_c64,          255, RM_REG, T_SSE3,    XMM8,  XMM8,  XMM9,  PASS_s_aValues },
     9953        { bs3CpuInstr4_addsubps_XMM8_FSxBX_icebp_c64,         255, RM_MEM, T_SSE3,    XMM8,  XMM8,  FSxBX, PASS_s_aValues },
     9954
     9955        { bs3CpuInstr4_vaddsubps_XMM8_XMM9_XMM10_icebp_c64,   255, RM_REG, T_AVX_128, XMM8,  XMM9,  XMM10, PASS_s_aValues },
     9956        { bs3CpuInstr4_vaddsubps_XMM8_XMM9_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_128, XMM8,  XMM9,  FSxBX, PASS_s_aValues },
     9957        { bs3CpuInstr4_vaddsubps_YMM13_YMM14_YMM15_icebp_c64, 255, RM_REG, T_AVX_256, YMM13, YMM14, YMM15, PASS_s_aValues },
     9958        { bs3CpuInstr4_vaddsubps_YMM13_YMM14_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM13, YMM14, FSxBX, PASS_s_aValues },
    99759959    };
    99769960
    … …  
    1038310367    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1038410368    {
    10385         { bs3CpuInstr4_addsubpd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    10386         { bs3CpuInstr4_addsubpd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    10387 
    10388         { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    10389         { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    10390 
    10391         { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    10392         { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     10369        { bs3CpuInstr4_addsubpd_XMM1_XMM2_icebp_c16,          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_s_aValues },
     10370        { bs3CpuInstr4_addsubpd_XMM1_FSxBX_icebp_c16,         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_s_aValues },
     10371
     10372        { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_XMM3_icebp_c16,    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_s_aValues },
     10373        { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_FSxBX_icebp_c16,   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_s_aValues },
     10374
     10375        { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_YMM3_icebp_c16,    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_s_aValues },
     10376        { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_FSxBX_icebp_c16,   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_s_aValues },
    1039310377    };
    1039410378    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1039510379    {
    10396         { bs3CpuInstr4_addsubpd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    10397         { bs3CpuInstr4_addsubpd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    10398 
    10399         { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    10400         { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    10401 
    10402         { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    10403         { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     10380        { bs3CpuInstr4_addsubpd_XMM1_XMM2_icebp_c32,          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_s_aValues },
     10381        { bs3CpuInstr4_addsubpd_XMM1_FSxBX_icebp_c32,         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_s_aValues },
     10382
     10383        { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_XMM3_icebp_c32,    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_s_aValues },
     10384        { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_FSxBX_icebp_c32,   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_s_aValues },
     10385
     10386        { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_YMM3_icebp_c32,    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_s_aValues },
     10387        { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_FSxBX_icebp_c32,   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_s_aValues },
    1040410388    };
    1040510389    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1040610390    {
    10407         { bs3CpuInstr4_addsubpd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE3, 1, 1, 2,   PASS_s_aValues },
    10408         { bs3CpuInstr4_addsubpd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE3, 1, 1, 255, PASS_s_aValues },
    10409 
    10410         { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    10411         { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    10412 
    10413         { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    10414         { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    10415 
    10416         { bs3CpuInstr4_addsubpd_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE3, 8, 8, 9,   PASS_s_aValues },
    10417         { bs3CpuInstr4_addsubpd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE3, 8, 8, 255, PASS_s_aValues },
    10418 
    10419         { bs3CpuInstr4_vaddsubpd_XMM8_XMM9_XMM10_icebp_c64,   255, RM_REG, T_AVX_128, 8,  9,  10, PASS_s_aValues },
    10420         { bs3CpuInstr4_vaddsubpd_XMM8_XMM9_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_128, 8,  9,  255, PASS_s_aValues },
    10421         { bs3CpuInstr4_vaddsubpd_YMM13_YMM14_YMM15_icebp_c64, 255, RM_REG, T_AVX_256, 13, 14, 15, PASS_s_aValues },
    10422         { bs3CpuInstr4_vaddsubpd_YMM13_YMM14_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 13, 14, 255, PASS_s_aValues },
     10391        { bs3CpuInstr4_addsubpd_XMM1_XMM2_icebp_c64,          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_s_aValues },
     10392        { bs3CpuInstr4_addsubpd_XMM1_FSxBX_icebp_c64,         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_s_aValues },
     10393
     10394        { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_XMM3_icebp_c64,    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_s_aValues },
     10395        { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_s_aValues },
     10396
     10397        { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_YMM3_icebp_c64,    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_s_aValues },
     10398        { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_s_aValues },
     10399
     10400        { bs3CpuInstr4_addsubpd_XMM8_XMM9_icebp_c64,          255, RM_REG, T_SSE3,    XMM8,  XMM8,  XMM9,  PASS_s_aValues },
     10401        { bs3CpuInstr4_addsubpd_XMM8_FSxBX_icebp_c64,         255, RM_MEM, T_SSE3,    XMM8,  XMM8,  FSxBX, PASS_s_aValues },
     10402
     10403        { bs3CpuInstr4_vaddsubpd_XMM8_XMM9_XMM10_icebp_c64,   255, RM_REG, T_AVX_128, XMM8,  XMM9,  XMM10, PASS_s_aValues },
     10404        { bs3CpuInstr4_vaddsubpd_XMM8_XMM9_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_128, XMM8,  XMM9,  FSxBX, PASS_s_aValues },
     10405        { bs3CpuInstr4_vaddsubpd_YMM13_YMM14_YMM15_icebp_c64, 255, RM_REG, T_AVX_256, YMM13, YMM14, YMM15, PASS_s_aValues },
     10406        { bs3CpuInstr4_vaddsubpd_YMM13_YMM14_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM13, YMM14, FSxBX, PASS_s_aValues },
    1042310407    };
    1042410408
    … …  
    1066610650    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1066710651    {
    10668         { bs3CpuInstr4_maxps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    10669         { bs3CpuInstr4_maxps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    10670 
    10671         { bs3CpuInstr4_vmaxps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    10672         { bs3CpuInstr4_vmaxps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    10673 
    10674         { bs3CpuInstr4_vmaxps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    10675         { bs3CpuInstr4_vmaxps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     10652        { bs3CpuInstr4_maxps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     10653        { bs3CpuInstr4_maxps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     10654
     10655        { bs3CpuInstr4_vmaxps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     10656        { bs3CpuInstr4_vmaxps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     10657
     10658        { bs3CpuInstr4_vmaxps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     10659        { bs3CpuInstr4_vmaxps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    1067610660    };
    1067710661    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1067810662    {
    10679         { bs3CpuInstr4_maxps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    10680         { bs3CpuInstr4_maxps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    10681 
    10682         { bs3CpuInstr4_vmaxps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    10683         { bs3CpuInstr4_vmaxps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    10684 
    10685         { bs3CpuInstr4_vmaxps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    10686         { bs3CpuInstr4_vmaxps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     10663        { bs3CpuInstr4_maxps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     10664        { bs3CpuInstr4_maxps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     10665
     10666        { bs3CpuInstr4_vmaxps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     10667        { bs3CpuInstr4_vmaxps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     10668
     10669        { bs3CpuInstr4_vmaxps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     10670        { bs3CpuInstr4_vmaxps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    1068710671    };
    1068810672    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1068910673    {
    10690         { bs3CpuInstr4_maxps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    10691         { bs3CpuInstr4_maxps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    10692 
    10693         { bs3CpuInstr4_vmaxps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    10694         { bs3CpuInstr4_vmaxps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    10695 
    10696         { bs3CpuInstr4_vmaxps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    10697         { bs3CpuInstr4_vmaxps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    10698 
    10699         { bs3CpuInstr4_maxps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    10700         { bs3CpuInstr4_maxps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    10701 
    10702         { bs3CpuInstr4_vmaxps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    10703         { bs3CpuInstr4_vmaxps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    10704         { bs3CpuInstr4_vmaxps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 10, PASS_s_aValues },
    10705         { bs3CpuInstr4_vmaxps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
     10674        { bs3CpuInstr4_maxps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     10675        { bs3CpuInstr4_maxps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     10676
     10677        { bs3CpuInstr4_vmaxps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     10678        { bs3CpuInstr4_vmaxps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     10679
     10680        { bs3CpuInstr4_vmaxps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     10681        { bs3CpuInstr4_vmaxps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
     10682
     10683        { bs3CpuInstr4_maxps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     10684        { bs3CpuInstr4_maxps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     10685
     10686        { bs3CpuInstr4_vmaxps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     10687        { bs3CpuInstr4_vmaxps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
     10688        { bs3CpuInstr4_vmaxps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues },
     10689        { bs3CpuInstr4_vmaxps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues },
    1070610690    };
    1070710691
    … …  
    1095110935    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1095210936    {
    10953         { bs3CpuInstr4_maxpd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    10954         { bs3CpuInstr4_maxpd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    10955 
    10956         { bs3CpuInstr4_vmaxpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    10957         { bs3CpuInstr4_vmaxpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    10958 
    10959         { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    10960         { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     10937        { bs3CpuInstr4_maxpd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     10938        { bs3CpuInstr4_maxpd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     10939
     10940        { bs3CpuInstr4_vmaxpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     10941        { bs3CpuInstr4_vmaxpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     10942
     10943        { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     10944        { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    1096110945    };
    1096210946    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1096310947    {
    10964         { bs3CpuInstr4_maxpd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    10965         { bs3CpuInstr4_maxpd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    10966 
    10967         { bs3CpuInstr4_vmaxpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    10968         { bs3CpuInstr4_vmaxpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    10969 
    10970         { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    10971         { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     10948        { bs3CpuInstr4_maxpd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     10949        { bs3CpuInstr4_maxpd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     10950
     10951        { bs3CpuInstr4_vmaxpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     10952        { bs3CpuInstr4_vmaxpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     10953
     10954        { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     10955        { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    1097210956    };
    1097310957    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1097410958    {
    10975         { bs3CpuInstr4_maxpd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    10976         { bs3CpuInstr4_maxpd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    10977 
    10978         { bs3CpuInstr4_vmaxpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    10979         { bs3CpuInstr4_vmaxpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    10980 
    10981         { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    10982         { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    10983 
    10984         { bs3CpuInstr4_maxpd_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE2, 8, 8, 9,   PASS_s_aValues },
    10985         { bs3CpuInstr4_maxpd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 8, 8, 255, PASS_s_aValues },
    10986 
    10987         { bs3CpuInstr4_vmaxpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    10988         { bs3CpuInstr4_vmaxpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    10989         { bs3CpuInstr4_vmaxpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, 8, 9, 10, PASS_s_aValues },
    10990         { bs3CpuInstr4_vmaxpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
     10959        { bs3CpuInstr4_maxpd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     10960        { bs3CpuInstr4_maxpd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     10961
     10962        { bs3CpuInstr4_vmaxpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     10963        { bs3CpuInstr4_vmaxpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     10964
     10965        { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     10966        { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
     10967
     10968        { bs3CpuInstr4_maxpd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_s_aValues },
     10969        { bs3CpuInstr4_maxpd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_s_aValues },
     10970
     10971        { bs3CpuInstr4_vmaxpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     10972        { bs3CpuInstr4_vmaxpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
     10973        { bs3CpuInstr4_vmaxpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues },
     10974        { bs3CpuInstr4_vmaxpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues },
    1099110975    };
    1099210976
    … …  
    1136111345    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1136211346    {
    11363         { bs3CpuInstr4_maxss_XMM3_XMM4_icebp_c16,  255, RM_REG, T_SSE, 3, 3, 4,   PASS_s_aValues },
    11364         { bs3CpuInstr4_maxss_XMM3_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 3, 3, 255, PASS_s_aValues },
    11365 
    11366         { bs3CpuInstr4_vmaxss_XMM1_XMM6_XMM7_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 6, 7,   PASS_s_aValues },
    11367         { bs3CpuInstr4_vmaxss_XMM1_XMM6_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 6, 255, PASS_s_aValues },
     11347        { bs3CpuInstr4_maxss_XMM3_XMM4_icebp_c16,        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_s_aValues },
     11348        { bs3CpuInstr4_maxss_XMM3_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_s_aValues },
     11349
     11350        { bs3CpuInstr4_vmaxss_XMM1_XMM6_XMM7_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_s_aValues },
     11351        { bs3CpuInstr4_vmaxss_XMM1_XMM6_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_s_aValues },
    1136811352    };
    1136911353    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1137011354    {
    11371         { bs3CpuInstr4_maxss_XMM3_XMM4_icebp_c32,  255, RM_REG, T_SSE, 3, 3, 4,   PASS_s_aValues },
    11372         { bs3CpuInstr4_maxss_XMM3_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 3, 3, 255, PASS_s_aValues },
    11373 
    11374         { bs3CpuInstr4_vmaxss_XMM1_XMM6_XMM7_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 6, 7,   PASS_s_aValues },
    11375         { bs3CpuInstr4_vmaxss_XMM1_XMM6_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 6, 255, PASS_s_aValues },
     11355        { bs3CpuInstr4_maxss_XMM3_XMM4_icebp_c32,        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_s_aValues },
     11356        { bs3CpuInstr4_maxss_XMM3_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_s_aValues },
     11357
     11358        { bs3CpuInstr4_vmaxss_XMM1_XMM6_XMM7_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_s_aValues },
     11359        { bs3CpuInstr4_vmaxss_XMM1_XMM6_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_s_aValues },
    1137611360    };
    1137711361    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1137811362    {
    11379         { bs3CpuInstr4_maxss_XMM3_XMM4_icebp_c64,  255, RM_REG, T_SSE, 3, 3, 4,   PASS_s_aValues },
    11380         { bs3CpuInstr4_maxss_XMM3_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 3, 3, 255, PASS_s_aValues },
    11381 
    11382         { bs3CpuInstr4_vmaxss_XMM1_XMM6_XMM7_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 6, 7,   PASS_s_aValues },
    11383         { bs3CpuInstr4_vmaxss_XMM1_XMM6_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 6, 255, PASS_s_aValues },
    11384 
    11385         { bs3CpuInstr4_maxss_XMM8_XMM9_icebp_c64,  255,         RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    11386         { bs3CpuInstr4_maxss_XMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    11387 
    11388         { bs3CpuInstr4_vmaxss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    11389         { bs3CpuInstr4_vmaxss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
     11363        { bs3CpuInstr4_maxss_XMM3_XMM4_icebp_c64,        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_s_aValues },
     11364        { bs3CpuInstr4_maxss_XMM3_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_s_aValues },
     11365
     11366        { bs3CpuInstr4_vmaxss_XMM1_XMM6_XMM7_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_s_aValues },
     11367        { bs3CpuInstr4_vmaxss_XMM1_XMM6_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_s_aValues },
     11368
     11369        { bs3CpuInstr4_maxss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     11370        { bs3CpuInstr4_maxss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     11371
     11372        { bs3CpuInstr4_vmaxss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     11373        { bs3CpuInstr4_vmaxss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
    1139011374    };
    1139111375
    … …  
    1176211746    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1176311747    {
    11764         { bs3CpuInstr4_maxsd_XMM3_XMM4_icebp_c16,  255, RM_REG, T_SSE2, 3, 3, 4,   PASS_s_aValues },
    11765         { bs3CpuInstr4_maxsd_XMM3_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 3, 3, 255, PASS_s_aValues },
    11766 
    11767         { bs3CpuInstr4_vmaxsd_XMM1_XMM6_XMM7_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 6, 7,   PASS_s_aValues },
    11768         { bs3CpuInstr4_vmaxsd_XMM1_XMM6_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 6, 255, PASS_s_aValues },
     11748        { bs3CpuInstr4_maxsd_XMM3_XMM4_icebp_c16,        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_s_aValues },
     11749        { bs3CpuInstr4_maxsd_XMM3_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_s_aValues },
     11750
     11751        { bs3CpuInstr4_vmaxsd_XMM1_XMM6_XMM7_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_s_aValues },
     11752        { bs3CpuInstr4_vmaxsd_XMM1_XMM6_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_s_aValues },
    1176911753    };
    1177011754    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1177111755    {
    11772         { bs3CpuInstr4_maxsd_XMM3_XMM4_icebp_c32,  255, RM_REG, T_SSE2, 3, 3, 4,   PASS_s_aValues },
    11773         { bs3CpuInstr4_maxsd_XMM3_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 3, 3, 255, PASS_s_aValues },
    11774 
    11775         { bs3CpuInstr4_vmaxsd_XMM1_XMM6_XMM7_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 6, 7,   PASS_s_aValues },
    11776         { bs3CpuInstr4_vmaxsd_XMM1_XMM6_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 6, 255, PASS_s_aValues },
     11756        { bs3CpuInstr4_maxsd_XMM3_XMM4_icebp_c32,        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_s_aValues },
     11757        { bs3CpuInstr4_maxsd_XMM3_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_s_aValues },
     11758
     11759        { bs3CpuInstr4_vmaxsd_XMM1_XMM6_XMM7_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_s_aValues },
     11760        { bs3CpuInstr4_vmaxsd_XMM1_XMM6_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_s_aValues },
    1177711761    };
    1177811762    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1177911763    {
    11780         { bs3CpuInstr4_maxsd_XMM3_XMM4_icebp_c64,  255, RM_REG, T_SSE2, 3, 3, 4,   PASS_s_aValues },
    11781         { bs3CpuInstr4_maxsd_XMM3_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 3, 3, 255, PASS_s_aValues },
    11782 
    11783         { bs3CpuInstr4_vmaxsd_XMM1_XMM6_XMM7_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 6, 7,   PASS_s_aValues },
    11784         { bs3CpuInstr4_vmaxsd_XMM1_XMM6_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 6, 255, PASS_s_aValues },
    11785 
    11786         { bs3CpuInstr4_maxsd_XMM8_XMM9_icebp_c64,  255,         RM_REG, T_SSE2, 8, 8, 9,   PASS_s_aValues },
    11787         { bs3CpuInstr4_maxsd_XMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_SSE2, 8, 8, 255, PASS_s_aValues },
    11788 
    11789         { bs3CpuInstr4_vmaxsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    11790         { bs3CpuInstr4_vmaxsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
     11764        { bs3CpuInstr4_maxsd_XMM3_XMM4_icebp_c64,        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_s_aValues },
     11765        { bs3CpuInstr4_maxsd_XMM3_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_s_aValues },
     11766
     11767        { bs3CpuInstr4_vmaxsd_XMM1_XMM6_XMM7_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_s_aValues },
     11768        { bs3CpuInstr4_vmaxsd_XMM1_XMM6_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_s_aValues },
     11769
     11770        { bs3CpuInstr4_maxsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_s_aValues },
     11771        { bs3CpuInstr4_maxsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_s_aValues },
     11772
     11773        { bs3CpuInstr4_vmaxsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     11774        { bs3CpuInstr4_vmaxsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
    1179111775    };
    1179211776
    … …  
    1203412018    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1203512019    {
    12036         { bs3CpuInstr4_minps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    12037         { bs3CpuInstr4_minps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    12038 
    12039         { bs3CpuInstr4_vminps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    12040         { bs3CpuInstr4_vminps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    12041 
    12042         { bs3CpuInstr4_vminps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    12043         { bs3CpuInstr4_vminps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     12020        { bs3CpuInstr4_minps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     12021        { bs3CpuInstr4_minps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     12022
     12023        { bs3CpuInstr4_vminps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     12024        { bs3CpuInstr4_vminps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     12025
     12026        { bs3CpuInstr4_vminps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     12027        { bs3CpuInstr4_vminps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    1204412028    };
    1204512029    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1204612030    {
    12047         { bs3CpuInstr4_minps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    12048         { bs3CpuInstr4_minps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    12049 
    12050         { bs3CpuInstr4_vminps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    12051         { bs3CpuInstr4_vminps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    12052 
    12053         { bs3CpuInstr4_vminps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    12054         { bs3CpuInstr4_vminps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     12031        { bs3CpuInstr4_minps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     12032        { bs3CpuInstr4_minps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     12033
     12034        { bs3CpuInstr4_vminps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     12035        { bs3CpuInstr4_vminps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     12036
     12037        { bs3CpuInstr4_vminps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     12038        { bs3CpuInstr4_vminps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    1205512039    };
    1205612040    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1205712041    {
    12058         { bs3CpuInstr4_minps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    12059         { bs3CpuInstr4_minps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    12060 
    12061         { bs3CpuInstr4_vminps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    12062         { bs3CpuInstr4_vminps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    12063 
    12064         { bs3CpuInstr4_vminps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    12065         { bs3CpuInstr4_vminps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    12066 
    12067         { bs3CpuInstr4_minps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    12068         { bs3CpuInstr4_minps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    12069 
    12070         { bs3CpuInstr4_vminps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    12071         { bs3CpuInstr4_vminps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    12072         { bs3CpuInstr4_vminps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 10, PASS_s_aValues },
    12073         { bs3CpuInstr4_vminps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
     12042        { bs3CpuInstr4_minps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     12043        { bs3CpuInstr4_minps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     12044
     12045        { bs3CpuInstr4_vminps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     12046        { bs3CpuInstr4_vminps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     12047
     12048        { bs3CpuInstr4_vminps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     12049        { bs3CpuInstr4_vminps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
     12050
     12051        { bs3CpuInstr4_minps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     12052        { bs3CpuInstr4_minps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     12053
     12054        { bs3CpuInstr4_vminps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     12055        { bs3CpuInstr4_vminps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
     12056        { bs3CpuInstr4_vminps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues },
     12057        { bs3CpuInstr4_vminps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues },
    1207412058    };
    1207512059
    … …  
    1231912303    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1232012304    {
    12321         { bs3CpuInstr4_minpd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    12322         { bs3CpuInstr4_minpd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    12323 
    12324         { bs3CpuInstr4_vminpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    12325         { bs3CpuInstr4_vminpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    12326 
    12327         { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    12328         { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     12305        { bs3CpuInstr4_minpd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     12306        { bs3CpuInstr4_minpd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     12307
     12308        { bs3CpuInstr4_vminpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     12309        { bs3CpuInstr4_vminpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     12310
     12311        { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     12312        { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    1232912313    };
    1233012314    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1233112315    {
    12332         { bs3CpuInstr4_minpd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    12333         { bs3CpuInstr4_minpd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    12334 
    12335         { bs3CpuInstr4_vminpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    12336         { bs3CpuInstr4_vminpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    12337 
    12338         { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    12339         { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
     12316        { bs3CpuInstr4_minpd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     12317        { bs3CpuInstr4_minpd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     12318
     12319        { bs3CpuInstr4_vminpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     12320        { bs3CpuInstr4_vminpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     12321
     12322        { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     12323        { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
    1234012324    };
    1234112325    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1234212326    {
    12343         { bs3CpuInstr4_minpd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE2, 1, 1, 2,   PASS_s_aValues },
    12344         { bs3CpuInstr4_minpd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, PASS_s_aValues },
    12345 
    12346         { bs3CpuInstr4_vminpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    12347         { bs3CpuInstr4_vminpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    12348 
    12349         { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, 1, 2, 3,   PASS_s_aValues },
    12350         { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 1, 2, 255, PASS_s_aValues },
    12351 
    12352         { bs3CpuInstr4_minpd_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE2, 8, 8, 9,   PASS_s_aValues },
    12353         { bs3CpuInstr4_minpd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 8, 8, 255, PASS_s_aValues },
    12354 
    12355         { bs3CpuInstr4_vminpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    12356         { bs3CpuInstr4_vminpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
    12357         { bs3CpuInstr4_vminpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, 8, 9, 10, PASS_s_aValues },
    12358         { bs3CpuInstr4_vminpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, 8, 9, 255, PASS_s_aValues },
     12327        { bs3CpuInstr4_minpd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_s_aValues },
     12328        { bs3CpuInstr4_minpd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_s_aValues },
     12329
     12330        { bs3CpuInstr4_vminpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues },
     12331        { bs3CpuInstr4_vminpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues },
     12332
     12333        { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_s_aValues },
     12334        { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_s_aValues },
     12335
     12336        { bs3CpuInstr4_minpd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_s_aValues },
     12337        { bs3CpuInstr4_minpd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_s_aValues },
     12338
     12339        { bs3CpuInstr4_vminpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     12340        { bs3CpuInstr4_vminpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
     12341        { bs3CpuInstr4_vminpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_s_aValues },
     12342        { bs3CpuInstr4_vminpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_s_aValues },
    1235912343    };
    1236012344
    … …  
    1272912713    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1273012714    {
    12731         { bs3CpuInstr4_minss_XMM3_XMM4_icebp_c16,  255, RM_REG, T_SSE, 3, 3, 4,   PASS_s_aValues },
    12732         { bs3CpuInstr4_minss_XMM3_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 3, 3, 255, PASS_s_aValues },
    12733 
    12734         { bs3CpuInstr4_vminss_XMM1_XMM6_XMM7_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 6, 7,   PASS_s_aValues },
    12735         { bs3CpuInstr4_vminss_XMM1_XMM6_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 6, 255, PASS_s_aValues },
     12715        { bs3CpuInstr4_minss_XMM3_XMM4_icebp_c16,        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_s_aValues },
     12716        { bs3CpuInstr4_minss_XMM3_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_s_aValues },
     12717
     12718        { bs3CpuInstr4_vminss_XMM1_XMM6_XMM7_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_s_aValues },
     12719        { bs3CpuInstr4_vminss_XMM1_XMM6_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_s_aValues },
    1273612720    };
    1273712721    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1273812722    {
    12739         { bs3CpuInstr4_minss_XMM3_XMM4_icebp_c32,  255, RM_REG, T_SSE, 3, 3, 4,   PASS_s_aValues },
    12740         { bs3CpuInstr4_minss_XMM3_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 3, 3, 255, PASS_s_aValues },
    12741 
    12742         { bs3CpuInstr4_vminss_XMM1_XMM6_XMM7_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 6, 7,   PASS_s_aValues },
    12743         { bs3CpuInstr4_vminss_XMM1_XMM6_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 6, 255, PASS_s_aValues },
     12723        { bs3CpuInstr4_minss_XMM3_XMM4_icebp_c32,        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_s_aValues },
     12724        { bs3CpuInstr4_minss_XMM3_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_s_aValues },
     12725
     12726        { bs3CpuInstr4_vminss_XMM1_XMM6_XMM7_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_s_aValues },
     12727        { bs3CpuInstr4_vminss_XMM1_XMM6_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_s_aValues },
    1274412728    };
    1274512729    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1274612730    {
    12747         { bs3CpuInstr4_minss_XMM3_XMM4_icebp_c64,  255, RM_REG, T_SSE, 3, 3, 4,   PASS_s_aValues },
    12748         { bs3CpuInstr4_minss_XMM3_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 3, 3, 255, PASS_s_aValues },
    12749 
    12750         { bs3CpuInstr4_vminss_XMM1_XMM6_XMM7_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 6, 7,   PASS_s_aValues },
    12751         { bs3CpuInstr4_vminss_XMM1_XMM6_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 6, 255, PASS_s_aValues },
    12752 
    12753         { bs3CpuInstr4_minss_XMM8_XMM9_icebp_c64,  255,         RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    12754         { bs3CpuInstr4_minss_XMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    12755 
    12756         { bs3CpuInstr4_vminss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    12757         { bs3CpuInstr4_vminss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
     12731        { bs3CpuInstr4_minss_XMM3_XMM4_icebp_c64,        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_s_aValues },
     12732        { bs3CpuInstr4_minss_XMM3_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_s_aValues },
     12733
     12734        { bs3CpuInstr4_vminss_XMM1_XMM6_XMM7_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_s_aValues },
     12735        { bs3CpuInstr4_vminss_XMM1_XMM6_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_s_aValues },
     12736
     12737        { bs3CpuInstr4_minss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     12738        { bs3CpuInstr4_minss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     12739
     12740        { bs3CpuInstr4_vminss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     12741        { bs3CpuInstr4_vminss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
    1275812742    };
    1275912743
    … …  
    1313113115    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1313213116    {
    13133         { bs3CpuInstr4_minsd_XMM3_XMM4_icebp_c16,  255, RM_REG, T_SSE2, 3, 3, 4,   PASS_s_aValues },
    13134         { bs3CpuInstr4_minsd_XMM3_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 3, 3, 255, PASS_s_aValues },
    13135 
    13136         { bs3CpuInstr4_vminsd_XMM1_XMM6_XMM7_icebp_c16,  255,         RM_REG, T_AVX_128, 1, 6, 7,   PASS_s_aValues },
    13137         { bs3CpuInstr4_vminsd_XMM1_XMM6_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 6, 255, PASS_s_aValues },
     13117        { bs3CpuInstr4_minsd_XMM3_XMM4_icebp_c16,        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_s_aValues },
     13118        { bs3CpuInstr4_minsd_XMM3_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_s_aValues },
     13119
     13120        { bs3CpuInstr4_vminsd_XMM1_XMM6_XMM7_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_s_aValues },
     13121        { bs3CpuInstr4_vminsd_XMM1_XMM6_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_s_aValues },
    1313813122    };
    1313913123    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1314013124    {
    13141         { bs3CpuInstr4_minsd_XMM3_XMM4_icebp_c32,  255, RM_REG, T_SSE2, 3, 3, 4,   PASS_s_aValues },
    13142         { bs3CpuInstr4_minsd_XMM3_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 3, 3, 255, PASS_s_aValues },
    13143 
    13144         { bs3CpuInstr4_vminsd_XMM1_XMM6_XMM7_icebp_c32,  255,         RM_REG, T_AVX_128, 1, 6, 7,   PASS_s_aValues },
    13145         { bs3CpuInstr4_vminsd_XMM1_XMM6_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 6, 255, PASS_s_aValues },
     13125        { bs3CpuInstr4_minsd_XMM3_XMM4_icebp_c32,        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_s_aValues },
     13126        { bs3CpuInstr4_minsd_XMM3_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_s_aValues },
     13127
     13128        { bs3CpuInstr4_vminsd_XMM1_XMM6_XMM7_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_s_aValues },
     13129        { bs3CpuInstr4_vminsd_XMM1_XMM6_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_s_aValues },
    1314613130    };
    1314713131    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1314813132    {
    13149         { bs3CpuInstr4_minsd_XMM3_XMM4_icebp_c64,  255, RM_REG, T_SSE2, 3, 3, 4,   PASS_s_aValues },
    13150         { bs3CpuInstr4_minsd_XMM3_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 3, 3, 255, PASS_s_aValues },
    13151 
    13152         { bs3CpuInstr4_vminsd_XMM1_XMM6_XMM7_icebp_c64,  255,         RM_REG, T_AVX_128, 1, 6, 7,   PASS_s_aValues },
    13153         { bs3CpuInstr4_vminsd_XMM1_XMM6_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 6, 255, PASS_s_aValues },
    13154 
    13155         { bs3CpuInstr4_minsd_XMM8_XMM9_icebp_c64,  255,         RM_REG, T_SSE2, 8, 8, 9,   PASS_s_aValues },
    13156         { bs3CpuInstr4_minsd_XMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_SSE2, 8, 8, 255, PASS_s_aValues },
    13157 
    13158         { bs3CpuInstr4_vminsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues },
    13159         { bs3CpuInstr4_vminsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues },
     13133        { bs3CpuInstr4_minsd_XMM3_XMM4_icebp_c64,        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_s_aValues },
     13134        { bs3CpuInstr4_minsd_XMM3_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_s_aValues },
     13135
     13136        { bs3CpuInstr4_vminsd_XMM1_XMM6_XMM7_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_s_aValues },
     13137        { bs3CpuInstr4_vminsd_XMM1_XMM6_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_s_aValues },
     13138
     13139        { bs3CpuInstr4_minsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_s_aValues },
     13140        { bs3CpuInstr4_minsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_s_aValues },
     13141
     13142        { bs3CpuInstr4_vminsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues },
     13143        { bs3CpuInstr4_vminsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues },
    1316013144    };
    1316113145
    … …  
    1345113435    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1345213436    {
    13453         { bs3CpuInstr4_rcpps_XMM1_XMM2_icebp_c16,   255, RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    13454         { bs3CpuInstr4_rcpps_XMM1_FSxBX_icebp_c16,  255, RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    13455 
    13456         { bs3CpuInstr4_vrcpps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues },
    13457         { bs3CpuInstr4_vrcpps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues },
    13458 
    13459         { bs3CpuInstr4_vrcpps_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValues },
    13460         { bs3CpuInstr4_vrcpps_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValues },
     13437        { bs3CpuInstr4_rcpps_XMM1_XMM2_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     13438        { bs3CpuInstr4_rcpps_XMM1_FSxBX_icebp_c16,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     13439
     13440        { bs3CpuInstr4_vrcpps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues },
     13441        { bs3CpuInstr4_vrcpps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues },
     13442
     13443        { bs3CpuInstr4_vrcpps_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValues },
     13444        { bs3CpuInstr4_vrcpps_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValues },
    1346113445    };
    1346213446    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1346313447    {
    13464         { bs3CpuInstr4_rcpps_XMM1_XMM2_icebp_c32,   255, RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    13465         { bs3CpuInstr4_rcpps_XMM1_FSxBX_icebp_c32,  255, RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    13466 
    13467         { bs3CpuInstr4_vrcpps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues },
    13468         { bs3CpuInstr4_vrcpps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues },
    13469 
    13470         { bs3CpuInstr4_vrcpps_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValues },
    13471         { bs3CpuInstr4_vrcpps_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValues },
     13448        { bs3CpuInstr4_rcpps_XMM1_XMM2_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     13449        { bs3CpuInstr4_rcpps_XMM1_FSxBX_icebp_c32,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     13450
     13451        { bs3CpuInstr4_vrcpps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues },
     13452        { bs3CpuInstr4_vrcpps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues },
     13453
     13454        { bs3CpuInstr4_vrcpps_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValues },
     13455        { bs3CpuInstr4_vrcpps_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValues },
    1347213456    };
    1347313457    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1347413458    {
    13475         { bs3CpuInstr4_rcpps_XMM1_XMM2_icebp_c64,   255, RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    13476         { bs3CpuInstr4_rcpps_XMM1_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    13477 
    13478         { bs3CpuInstr4_vrcpps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues },
    13479         { bs3CpuInstr4_vrcpps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues },
    13480 
    13481         { bs3CpuInstr4_vrcpps_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValues },
    13482         { bs3CpuInstr4_vrcpps_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValues },
    13483 
    13484         { bs3CpuInstr4_rcpps_XMM8_XMM9_icebp_c64,   255, RM_REG, T_SSE,     8, 8, 9,   PASS_s_aValues },
    13485         { bs3CpuInstr4_rcpps_XMM8_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     8, 8, 255, PASS_s_aValues },
    13486 
    13487         { bs3CpuInstr4_vrcpps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, 8, 8, 9,   PASS_s_aValues },
    13488         { bs3CpuInstr4_vrcpps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 8, 255, PASS_s_aValues },
    13489         { bs3CpuInstr4_vrcpps_YMM8_YMM9_icebp_c64,  255, RM_REG, T_AVX_256, 8, 8, 9,   PASS_s_aValues },
    13490         { bs3CpuInstr4_vrcpps_YMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 8, 255, PASS_s_aValues },
     13459        { bs3CpuInstr4_rcpps_XMM1_XMM2_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     13460        { bs3CpuInstr4_rcpps_XMM1_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     13461
     13462        { bs3CpuInstr4_vrcpps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues },
     13463        { bs3CpuInstr4_vrcpps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues },
     13464
     13465        { bs3CpuInstr4_vrcpps_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValues },
     13466        { bs3CpuInstr4_vrcpps_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValues },
     13467
     13468        { bs3CpuInstr4_rcpps_XMM8_XMM9_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     13469        { bs3CpuInstr4_rcpps_XMM8_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     13470
     13471        { bs3CpuInstr4_vrcpps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM8, XMM9,  PASS_s_aValues },
     13472        { bs3CpuInstr4_vrcpps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_s_aValues },
     13473        { bs3CpuInstr4_vrcpps_YMM8_YMM9_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM9,  PASS_s_aValues },
     13474        { bs3CpuInstr4_vrcpps_YMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_s_aValues },
    1349113475    };
    1349213476
    … …  
    1431314297    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1431414298    {
    14315         { bs3CpuInstr4_rcpss_XMM1_XMM2_icebp_c16,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    14316         { bs3CpuInstr4_rcpss_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    14317 
    14318         { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    14319         { bs3CpuInstr4_vrcpss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    14320 
    14321         { bs3CpuInstr4_rcpss_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    14322         { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM1_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    14323         { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues   },
    14324         { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 2,   PASS_s_aValuesSR },
    14325         { bs3CpuInstr4_vrcpss_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues   },
     14299        { bs3CpuInstr4_rcpss_XMM1_XMM2_icebp_c16,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM2,  PASS_s_aValues  },
     14300        { bs3CpuInstr4_rcpss_XMM1_FSxBX_icebp_c16,         255,         RM_MEM, T_SSE,     XMM1,  XMM1,  FSxBX, PASS_s_aValues  },
     14301
     14302        { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM3_icebp_c16,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_s_aValues  },
     14303        { bs3CpuInstr4_vrcpss_XMM1_XMM2_FSxBX_icebp_c16,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_s_aValues  },
     14304
     14305        { bs3CpuInstr4_rcpss_XMM1_XMM1_icebp_c16,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM1,  PASS_s_aValuesSR },
     14306        { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM1_icebp_c16,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM1,  PASS_s_aValuesSR },
     14307        { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM2_icebp_c16,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM2,  PASS_s_aValues   },
     14308        { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM2_icebp_c16,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM2,  PASS_s_aValuesSR },
     14309        { bs3CpuInstr4_vrcpss_XMM1_XMM1_FSxBX_icebp_c16,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM1,  FSxBX, PASS_s_aValues   },
    1432614310    };
    1432714311    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1432814312    {
    14329         { bs3CpuInstr4_rcpss_XMM1_XMM2_icebp_c32,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    14330         { bs3CpuInstr4_rcpss_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    14331 
    14332         { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    14333         { bs3CpuInstr4_vrcpss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    14334 
    14335         { bs3CpuInstr4_rcpss_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    14336         { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM1_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    14337         { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues   },
    14338         { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 2,   PASS_s_aValuesSR },
    14339         { bs3CpuInstr4_vrcpss_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues   },
     14313        { bs3CpuInstr4_rcpss_XMM1_XMM2_icebp_c32,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM2,  PASS_s_aValues  },
     14314        { bs3CpuInstr4_rcpss_XMM1_FSxBX_icebp_c32,         255,         RM_MEM, T_SSE,     XMM1,  XMM1,  FSxBX, PASS_s_aValues  },
     14315
     14316        { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM3_icebp_c32,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_s_aValues  },
     14317        { bs3CpuInstr4_vrcpss_XMM1_XMM2_FSxBX_icebp_c32,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_s_aValues  },
     14318
     14319        { bs3CpuInstr4_rcpss_XMM1_XMM1_icebp_c32,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM1,  PASS_s_aValuesSR },
     14320        { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM1_icebp_c32,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM1,  PASS_s_aValuesSR },
     14321        { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM2_icebp_c32,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM2,  PASS_s_aValues   },
     14322        { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM2_icebp_c32,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM2,  PASS_s_aValuesSR },
     14323        { bs3CpuInstr4_vrcpss_XMM1_XMM1_FSxBX_icebp_c32,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM1,  FSxBX, PASS_s_aValues   },
    1434014324    };
    1434114325    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1434214326    {
    14343         { bs3CpuInstr4_rcpss_XMM1_XMM2_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 2,   PASS_s_aValues },
    14344         { bs3CpuInstr4_rcpss_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 1, 1, 255, PASS_s_aValues },
    14345 
    14346         { bs3CpuInstr4_rcpss_XMM8_XMM9_icebp_c64,  255, RM_REG, T_SSE, 8, 8, 9,   PASS_s_aValues },
    14347         { bs3CpuInstr4_rcpss_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE, 8, 8, 255, PASS_s_aValues },
    14348 
    14349         { bs3CpuInstr4_rcpss_XMM1_XMM1_icebp_c64,  255, RM_REG, T_SSE, 1, 1, 1, PASS_s_aValuesSR },
    14350 
    14351         { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues },
    14352         { bs3CpuInstr4_vrcpss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues },
    14353 
    14354         { bs3CpuInstr4_vrcpss_XMM13_XMM14_XMM15_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, 13, 14, 15,  PASS_s_aValues },
    14355         { bs3CpuInstr4_vrcpss_XMM13_XMM14_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 13, 14, 255, PASS_s_aValues },
    14356 
    14357         { bs3CpuInstr4_rcpss_XMM1_XMM1_icebp_c64,          255,         RM_REG, T_SSE,     1, 1,   1,   PASS_s_aValuesSR },
    14358         { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM1_icebp_c64,    X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1,   1,   PASS_s_aValuesSR },
    14359         { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM2_icebp_c64,    X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1,   2,   PASS_s_aValues   },
    14360         { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM2_icebp_c64,    X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2,   2,   PASS_s_aValuesSR },
    14361         { bs3CpuInstr4_vrcpss_XMM1_XMM1_FSxBX_icebp_c64,   X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1,   255, PASS_s_aValues   },
    14362         { bs3CpuInstr4_vrcpss_XMM15_XMM15_XMM15_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, 15, 15, 15, PASS_s_aValuesSR },
    14363         { bs3CpuInstr4_vrcpss_XMM15_XMM15_XMM13_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, 15, 15, 13, PASS_s_aValues   },
    14364         { bs3CpuInstr4_vrcpss_XMM13_XMM14_XMM14_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, 13, 14, 14, PASS_s_aValuesSR },
     14327        { bs3CpuInstr4_rcpss_XMM1_XMM2_icebp_c64,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM2,  PASS_s_aValues  },
     14328        { bs3CpuInstr4_rcpss_XMM1_FSxBX_icebp_c64,         255,         RM_MEM, T_SSE,     XMM1,  XMM1,  FSxBX, PASS_s_aValues  },
     14329
     14330        { bs3CpuInstr4_rcpss_XMM8_XMM9_icebp_c64,          255,         RM_REG, T_SSE,     XMM8,  XMM8,  XMM9,  PASS_s_aValues  },
     14331        { bs3CpuInstr4_rcpss_XMM8_FSxBX_icebp_c64,         255,         RM_MEM, T_SSE,     XMM8,  XMM8,  FSxBX, PASS_s_aValues  },
     14332
     14333        { bs3CpuInstr4_rcpss_XMM1_XMM1_icebp_c64,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM1, PASS_s_aValuesSR },
     14334
     14335        { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM3_icebp_c64,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_s_aValues  },
     14336        { bs3CpuInstr4_vrcpss_XMM1_XMM2_FSxBX_icebp_c64,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_s_aValues  },
     14337
     14338        { bs3CpuInstr4_vrcpss_XMM13_XMM14_XMM15_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM13, XMM14, XMM15, PASS_s_aValues  },
     14339        { bs3CpuInstr4_vrcpss_XMM13_XMM14_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM13, XMM14, FSxBX, PASS_s_aValues  },
     14340
     14341        { bs3CpuInstr4_rcpss_XMM1_XMM1_icebp_c64,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM1,  PASS_s_aValuesSR },
     14342        { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM1_icebp_c64,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM1,  PASS_s_aValuesSR },
     14343        { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM2_icebp_c64,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM2,  PASS_s_aValues   },
     14344        { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM2_icebp_c64,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM2,  PASS_s_aValuesSR },
     14345        { bs3CpuInstr4_vrcpss_XMM1_XMM1_FSxBX_icebp_c64,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM1,  FSxBX, PASS_s_aValues   },
     14346        { bs3CpuInstr4_vrcpss_XMM15_XMM15_XMM15_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM15, XMM15, XMM15, PASS_s_aValuesSR },
     14347        { bs3CpuInstr4_vrcpss_XMM15_XMM15_XMM13_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM15, XMM15, XMM13, PASS_s_aValues   },
     14348        { bs3CpuInstr4_vrcpss_XMM13_XMM14_XMM14_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM13, XMM14, XMM14, PASS_s_aValuesSR },
    1436514349    };
    1436614350
    … …  
    1462114605    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1462214606    {
    14623         { bs3CpuInstr4_sqrtps_XMM1_XMM2_icebp_c16,   255, RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    14624         { bs3CpuInstr4_sqrtps_XMM1_FSxBX_icebp_c16,  255, RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    14625 
    14626         { bs3CpuInstr4_vsqrtps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues },
    14627         { bs3CpuInstr4_vsqrtps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues },
    14628 
    14629         { bs3CpuInstr4_vsqrtps_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValues },
    14630         { bs3CpuInstr4_vsqrtps_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValues },
    14631 
    14632         { bs3CpuInstr4_sqrtps_XMM1_XMM1_icebp_c16,   255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValues },
    14633         { bs3CpuInstr4_vsqrtps_XMM1_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValues },
    14634         { bs3CpuInstr4_vsqrtps_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValues },
     14607        { bs3CpuInstr4_sqrtps_XMM1_XMM2_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     14608        { bs3CpuInstr4_sqrtps_XMM1_FSxBX_icebp_c16,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     14609
     14610        { bs3CpuInstr4_vsqrtps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues },
     14611        { bs3CpuInstr4_vsqrtps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues },
     14612
     14613        { bs3CpuInstr4_vsqrtps_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValues },
     14614        { bs3CpuInstr4_vsqrtps_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValues },
     14615
     14616        { bs3CpuInstr4_sqrtps_XMM1_XMM1_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValues },
     14617        { bs3CpuInstr4_vsqrtps_XMM1_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValues },
     14618        { bs3CpuInstr4_vsqrtps_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValues },
    1463514619    };
    1463614620    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1463714621    {
    14638         { bs3CpuInstr4_sqrtps_XMM1_XMM2_icebp_c32,   255, RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    14639         { bs3CpuInstr4_sqrtps_XMM1_FSxBX_icebp_c32,  255, RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    14640 
    14641         { bs3CpuInstr4_vsqrtps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues },
    14642         { bs3CpuInstr4_vsqrtps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues },
    14643 
    14644         { bs3CpuInstr4_vsqrtps_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValues },
    14645         { bs3CpuInstr4_vsqrtps_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValues },
    14646 
    14647         { bs3CpuInstr4_sqrtps_XMM1_XMM1_icebp_c32,   255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValues },
    14648         { bs3CpuInstr4_vsqrtps_XMM1_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValues },
    14649         { bs3CpuInstr4_vsqrtps_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValues },
     14622        { bs3CpuInstr4_sqrtps_XMM1_XMM2_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     14623        { bs3CpuInstr4_sqrtps_XMM1_FSxBX_icebp_c32,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     14624
     14625        { bs3CpuInstr4_vsqrtps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues },
     14626        { bs3CpuInstr4_vsqrtps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues },
     14627
     14628        { bs3CpuInstr4_vsqrtps_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValues },
     14629        { bs3CpuInstr4_vsqrtps_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValues },
     14630
     14631        { bs3CpuInstr4_sqrtps_XMM1_XMM1_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValues },
     14632        { bs3CpuInstr4_vsqrtps_XMM1_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValues },
     14633        { bs3CpuInstr4_vsqrtps_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValues },
    1465014634    };
    1465114635    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1465214636    {
    14653         { bs3CpuInstr4_sqrtps_XMM1_XMM2_icebp_c64,   255, RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    14654         { bs3CpuInstr4_sqrtps_XMM1_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    14655 
    14656         { bs3CpuInstr4_vsqrtps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues },
    14657         { bs3CpuInstr4_vsqrtps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues },
    14658 
    14659         { bs3CpuInstr4_vsqrtps_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValues },
    14660         { bs3CpuInstr4_vsqrtps_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValues },
    14661 
    14662         { bs3CpuInstr4_sqrtps_XMM8_XMM9_icebp_c64,   255, RM_REG, T_SSE,     8, 8, 9,   PASS_s_aValues },
    14663         { bs3CpuInstr4_sqrtps_XMM8_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     8, 8, 255, PASS_s_aValues },
    14664 
    14665         { bs3CpuInstr4_vsqrtps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, 8, 8, 9,   PASS_s_aValues },
    14666         { bs3CpuInstr4_vsqrtps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 8, 255, PASS_s_aValues },
    14667         { bs3CpuInstr4_vsqrtps_YMM8_YMM9_icebp_c64,  255, RM_REG, T_AVX_256, 8, 8, 9,   PASS_s_aValues },
    14668         { bs3CpuInstr4_vsqrtps_YMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 8, 255, PASS_s_aValues },
    14669 
    14670         { bs3CpuInstr4_sqrtps_XMM1_XMM1_icebp_c64,   255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValues },
    14671         { bs3CpuInstr4_sqrtps_XMM8_XMM8_icebp_c64,   255, RM_REG, T_SSE,     8, 8, 8,   PASS_s_aValues },
    14672         { bs3CpuInstr4_vsqrtps_XMM1_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValues },
    14673         { bs3CpuInstr4_vsqrtps_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValues },
    14674         { bs3CpuInstr4_vsqrtps_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, 8, 8, 8,   PASS_s_aValues },
     14637        { bs3CpuInstr4_sqrtps_XMM1_XMM2_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     14638        { bs3CpuInstr4_sqrtps_XMM1_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     14639
     14640        { bs3CpuInstr4_vsqrtps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues },
     14641        { bs3CpuInstr4_vsqrtps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues },
     14642
     14643        { bs3CpuInstr4_vsqrtps_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValues },
     14644        { bs3CpuInstr4_vsqrtps_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValues },
     14645
     14646        { bs3CpuInstr4_sqrtps_XMM8_XMM9_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     14647        { bs3CpuInstr4_sqrtps_XMM8_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     14648
     14649        { bs3CpuInstr4_vsqrtps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM8, XMM9,  PASS_s_aValues },
     14650        { bs3CpuInstr4_vsqrtps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_s_aValues },
     14651        { bs3CpuInstr4_vsqrtps_YMM8_YMM9_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM9,  PASS_s_aValues },
     14652        { bs3CpuInstr4_vsqrtps_YMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_s_aValues },
     14653
     14654        { bs3CpuInstr4_sqrtps_XMM1_XMM1_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValues },
     14655        { bs3CpuInstr4_sqrtps_XMM8_XMM8_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_s_aValues },
     14656        { bs3CpuInstr4_vsqrtps_XMM1_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValues },
     14657        { bs3CpuInstr4_vsqrtps_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValues },
     14658        { bs3CpuInstr4_vsqrtps_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_s_aValues },
    1467514659    };
    1467614660
    … …  
    1488714871    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1488814872    {
    14889         { bs3CpuInstr4_sqrtpd_XMM1_XMM2_icebp_c16,   255, RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    14890         { bs3CpuInstr4_sqrtpd_XMM1_FSxBX_icebp_c16,  255, RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    14891 
    14892         { bs3CpuInstr4_vsqrtpd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues },
    14893         { bs3CpuInstr4_vsqrtpd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues },
    14894 
    14895         { bs3CpuInstr4_vsqrtpd_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValues },
    14896         { bs3CpuInstr4_vsqrtpd_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValues },
    14897 
    14898         { bs3CpuInstr4_sqrtpd_XMM1_XMM1_icebp_c16,   255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValues },
    14899         { bs3CpuInstr4_vsqrtpd_XMM1_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValues },
    14900         { bs3CpuInstr4_vsqrtpd_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValues },
     14873        { bs3CpuInstr4_sqrtpd_XMM1_XMM2_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     14874        { bs3CpuInstr4_sqrtpd_XMM1_FSxBX_icebp_c16,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     14875
     14876        { bs3CpuInstr4_vsqrtpd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues },
     14877        { bs3CpuInstr4_vsqrtpd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues },
     14878
     14879        { bs3CpuInstr4_vsqrtpd_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValues },
     14880        { bs3CpuInstr4_vsqrtpd_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValues },
     14881
     14882        { bs3CpuInstr4_sqrtpd_XMM1_XMM1_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValues },
     14883        { bs3CpuInstr4_vsqrtpd_XMM1_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValues },
     14884        { bs3CpuInstr4_vsqrtpd_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValues },
    1490114885    };
    1490214886    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1490314887    {
    14904         { bs3CpuInstr4_sqrtpd_XMM1_XMM2_icebp_c32,   255, RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    14905         { bs3CpuInstr4_sqrtpd_XMM1_FSxBX_icebp_c32,  255, RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    14906 
    14907         { bs3CpuInstr4_vsqrtpd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues },
    14908         { bs3CpuInstr4_vsqrtpd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues },
    14909 
    14910         { bs3CpuInstr4_vsqrtpd_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValues },
    14911         { bs3CpuInstr4_vsqrtpd_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValues },
    14912 
    14913         { bs3CpuInstr4_sqrtpd_XMM1_XMM1_icebp_c32,   255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValues },
    14914         { bs3CpuInstr4_vsqrtpd_XMM1_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValues },
    14915         { bs3CpuInstr4_vsqrtpd_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValues },
     14888        { bs3CpuInstr4_sqrtpd_XMM1_XMM2_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     14889        { bs3CpuInstr4_sqrtpd_XMM1_FSxBX_icebp_c32,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     14890
     14891        { bs3CpuInstr4_vsqrtpd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues },
     14892        { bs3CpuInstr4_vsqrtpd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues },
     14893
     14894        { bs3CpuInstr4_vsqrtpd_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValues },
     14895        { bs3CpuInstr4_vsqrtpd_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValues },
     14896
     14897        { bs3CpuInstr4_sqrtpd_XMM1_XMM1_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValues },
     14898        { bs3CpuInstr4_vsqrtpd_XMM1_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValues },
     14899        { bs3CpuInstr4_vsqrtpd_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValues },
    1491614900    };
    1491714901    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1491814902    {
    14919         { bs3CpuInstr4_sqrtpd_XMM1_XMM2_icebp_c64,   255, RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    14920         { bs3CpuInstr4_sqrtpd_XMM1_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    14921 
    14922         { bs3CpuInstr4_vsqrtpd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues },
    14923         { bs3CpuInstr4_vsqrtpd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues },
    14924 
    14925         { bs3CpuInstr4_vsqrtpd_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValues },
    14926         { bs3CpuInstr4_vsqrtpd_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValues },
    14927 
    14928         { bs3CpuInstr4_sqrtpd_XMM8_XMM9_icebp_c64,   255, RM_REG, T_SSE,     8, 8, 9,   PASS_s_aValues },
    14929         { bs3CpuInstr4_sqrtpd_XMM8_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     8, 8, 255, PASS_s_aValues },
    14930 
    14931         { bs3CpuInstr4_vsqrtpd_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, 8, 8, 9,   PASS_s_aValues },
    14932         { bs3CpuInstr4_vsqrtpd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 8, 255, PASS_s_aValues },
    14933         { bs3CpuInstr4_vsqrtpd_YMM8_YMM9_icebp_c64,  255, RM_REG, T_AVX_256, 8, 8, 9,   PASS_s_aValues },
    14934         { bs3CpuInstr4_vsqrtpd_YMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 8, 255, PASS_s_aValues },
    14935 
    14936         { bs3CpuInstr4_sqrtpd_XMM1_XMM1_icebp_c64,   255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValues },
    14937         { bs3CpuInstr4_sqrtpd_XMM8_XMM8_icebp_c64,   255, RM_REG, T_SSE,     8, 8, 8,   PASS_s_aValues },
    14938         { bs3CpuInstr4_vsqrtpd_XMM1_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValues },
    14939         { bs3CpuInstr4_vsqrtpd_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValues },
    14940         { bs3CpuInstr4_vsqrtpd_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, 8, 8, 8,   PASS_s_aValues },
     14903        { bs3CpuInstr4_sqrtpd_XMM1_XMM2_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     14904        { bs3CpuInstr4_sqrtpd_XMM1_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     14905
     14906        { bs3CpuInstr4_vsqrtpd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues },
     14907        { bs3CpuInstr4_vsqrtpd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues },
     14908
     14909        { bs3CpuInstr4_vsqrtpd_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValues },
     14910        { bs3CpuInstr4_vsqrtpd_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValues },
     14911
     14912        { bs3CpuInstr4_sqrtpd_XMM8_XMM9_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     14913        { bs3CpuInstr4_sqrtpd_XMM8_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     14914
     14915        { bs3CpuInstr4_vsqrtpd_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM8, XMM9,  PASS_s_aValues },
     14916        { bs3CpuInstr4_vsqrtpd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_s_aValues },
     14917        { bs3CpuInstr4_vsqrtpd_YMM8_YMM9_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM9,  PASS_s_aValues },
     14918        { bs3CpuInstr4_vsqrtpd_YMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_s_aValues },
     14919
     14920        { bs3CpuInstr4_sqrtpd_XMM1_XMM1_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValues },
     14921        { bs3CpuInstr4_sqrtpd_XMM8_XMM8_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_s_aValues },
     14922        { bs3CpuInstr4_vsqrtpd_XMM1_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValues },
     14923        { bs3CpuInstr4_vsqrtpd_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValues },
     14924        { bs3CpuInstr4_vsqrtpd_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_s_aValues },
    1494114925    };
    1494214926
    … …  
    1532215306    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1532315307    {
    15324         { bs3CpuInstr4_sqrtss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues   },
    15325         { bs3CpuInstr4_sqrtss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues   },
    15326 
    15327         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues   },
    15328         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues   },
    15329 
    15330         { bs3CpuInstr4_sqrtss_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    15331         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM1_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    15332         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues   },
    15333         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 2,   PASS_s_aValuesSR },
    15334         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues   },
     15308        { bs3CpuInstr4_sqrtss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues   },
     15309        { bs3CpuInstr4_sqrtss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues   },
     15310
     15311        { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues   },
     15312        { bs3CpuInstr4_vsqrtss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues   },
     15313
     15314        { bs3CpuInstr4_sqrtss_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     15315        { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM1_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     15316        { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues   },
     15317        { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_s_aValuesSR },
     15318        { bs3CpuInstr4_vsqrtss_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues   },
    1533515319    };
    1533615320    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1533715321    {
    15338         { bs3CpuInstr4_sqrtss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues   },
    15339         { bs3CpuInstr4_sqrtss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues   },
    15340 
    15341         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues   },
    15342         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues   },
    15343 
    15344         { bs3CpuInstr4_sqrtss_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    15345         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM1_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    15346         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues   },
    15347         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 2,   PASS_s_aValuesSR },
    15348         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues   },
     15322        { bs3CpuInstr4_sqrtss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues   },
     15323        { bs3CpuInstr4_sqrtss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues   },
     15324
     15325        { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues   },
     15326        { bs3CpuInstr4_vsqrtss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues   },
     15327
     15328        { bs3CpuInstr4_sqrtss_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     15329        { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM1_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     15330        { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues   },
     15331        { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_s_aValuesSR },
     15332        { bs3CpuInstr4_vsqrtss_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues   },
    1534915333    };
    1535015334    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1535115335    {
    15352         { bs3CpuInstr4_sqrtss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues   },
    15353         { bs3CpuInstr4_sqrtss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues   },
    15354 
    15355         { bs3CpuInstr4_sqrtss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     8, 8, 9,   PASS_s_aValues   },
    15356         { bs3CpuInstr4_sqrtss_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     8, 8, 255, PASS_s_aValues   },
    15357 
    15358         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues   },
    15359         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues   },
    15360 
    15361         { bs3CpuInstr4_vsqrtss_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues   },
    15362         { bs3CpuInstr4_vsqrtss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues   },
    15363 
    15364         { bs3CpuInstr4_sqrtss_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    15365         { bs3CpuInstr4_sqrtss_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     8, 8, 8,   PASS_s_aValuesSR },
    15366         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM1_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    15367         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues   },
    15368         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 2,   PASS_s_aValuesSR },
    15369         { bs3CpuInstr4_vsqrtss_XMM8_XMM8_XMM8_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 8, 8, 8,   PASS_s_aValuesSR },
    15370         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues   },
     15336        { bs3CpuInstr4_sqrtss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues   },
     15337        { bs3CpuInstr4_sqrtss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues   },
     15338
     15339        { bs3CpuInstr4_sqrtss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues   },
     15340        { bs3CpuInstr4_sqrtss_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues   },
     15341
     15342        { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues   },
     15343        { bs3CpuInstr4_vsqrtss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues   },
     15344
     15345        { bs3CpuInstr4_vsqrtss_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues   },
     15346        { bs3CpuInstr4_vsqrtss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues   },
     15347
     15348        { bs3CpuInstr4_sqrtss_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     15349        { bs3CpuInstr4_sqrtss_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
     15350        { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM1_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     15351        { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues   },
     15352        { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_s_aValuesSR },
     15353        { bs3CpuInstr4_vsqrtss_XMM8_XMM8_XMM8_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
     15354        { bs3CpuInstr4_vsqrtss_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues   },
    1537115355    };
    1537215356
    … …  
    1575215736    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1575315737    {
    15754         { bs3CpuInstr4_sqrtsd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues   },
    15755         { bs3CpuInstr4_sqrtsd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues   },
    15756 
    15757         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues   },
    15758         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues   },
    15759 
    15760         { bs3CpuInstr4_sqrtsd_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    15761         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM1_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    15762         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues   },
    15763         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 2,   PASS_s_aValuesSR },
    15764         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues   },
     15738        { bs3CpuInstr4_sqrtsd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues   },
     15739        { bs3CpuInstr4_sqrtsd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues   },
     15740
     15741        { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues   },
     15742        { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues   },
     15743
     15744        { bs3CpuInstr4_sqrtsd_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     15745        { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM1_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     15746        { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues   },
     15747        { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_s_aValuesSR },
     15748        { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues   },
    1576515749    };
    1576615750    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1576715751    {
    15768         { bs3CpuInstr4_sqrtsd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues   },
    15769         { bs3CpuInstr4_sqrtsd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues   },
    15770 
    15771         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues   },
    15772         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues   },
    15773 
    15774         { bs3CpuInstr4_sqrtsd_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    15775         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM1_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    15776         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues   },
    15777         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 2,   PASS_s_aValuesSR },
    15778         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues   },
     15752        { bs3CpuInstr4_sqrtsd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues   },
     15753        { bs3CpuInstr4_sqrtsd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues   },
     15754
     15755        { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues   },
     15756        { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues   },
     15757
     15758        { bs3CpuInstr4_sqrtsd_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     15759        { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM1_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     15760        { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues   },
     15761        { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_s_aValuesSR },
     15762        { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues   },
    1577915763    };
    1578015764    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1578115765    {
    15782         { bs3CpuInstr4_sqrtsd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues   },
    15783         { bs3CpuInstr4_sqrtsd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues   },
    15784 
    15785         { bs3CpuInstr4_sqrtsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     8, 8, 9,   PASS_s_aValues   },
    15786         { bs3CpuInstr4_sqrtsd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     8, 8, 255, PASS_s_aValues   },
    15787 
    15788         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues   },
    15789         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues   },
    15790 
    15791         { bs3CpuInstr4_vsqrtsd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues   },
    15792         { bs3CpuInstr4_vsqrtsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues   },
    15793 
    15794         { bs3CpuInstr4_sqrtsd_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    15795         { bs3CpuInstr4_sqrtsd_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     8, 8, 8,   PASS_s_aValuesSR },
    15796         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM1_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    15797         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues   },
    15798         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 2,   PASS_s_aValuesSR },
    15799         { bs3CpuInstr4_vsqrtsd_XMM8_XMM8_XMM8_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 8, 8, 8,   PASS_s_aValuesSR },
    15800         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues   },
     15766        { bs3CpuInstr4_sqrtsd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues   },
     15767        { bs3CpuInstr4_sqrtsd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues   },
     15768
     15769        { bs3CpuInstr4_sqrtsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues   },
     15770        { bs3CpuInstr4_sqrtsd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues   },
     15771
     15772        { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues   },
     15773        { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues   },
     15774
     15775        { bs3CpuInstr4_vsqrtsd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues   },
     15776        { bs3CpuInstr4_vsqrtsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues   },
     15777
     15778        { bs3CpuInstr4_sqrtsd_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     15779        { bs3CpuInstr4_sqrtsd_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
     15780        { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM1_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     15781        { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues   },
     15782        { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_s_aValuesSR },
     15783        { bs3CpuInstr4_vsqrtsd_XMM8_XMM8_XMM8_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
     15784        { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues   },
    1580115785    };
    1580215786
    … …  
    1600315987    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1600415988    {
    16005         { bs3CpuInstr4_rsqrtps_XMM1_XMM2_icebp_c16,   255, RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    16006         { bs3CpuInstr4_rsqrtps_XMM1_FSxBX_icebp_c16,  255, RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    16007 
    16008         { bs3CpuInstr4_vrsqrtps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues },
    16009         { bs3CpuInstr4_vrsqrtps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues },
    16010 
    16011         { bs3CpuInstr4_vrsqrtps_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValues },
    16012         { bs3CpuInstr4_vrsqrtps_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValues },
    16013 
    16014         { bs3CpuInstr4_rsqrtps_XMM1_XMM1_icebp_c16,   255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValues },
    16015         { bs3CpuInstr4_vrsqrtps_XMM1_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValues },
    16016         { bs3CpuInstr4_vrsqrtps_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValues },
     15989        { bs3CpuInstr4_rsqrtps_XMM1_XMM2_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     15990        { bs3CpuInstr4_rsqrtps_XMM1_FSxBX_icebp_c16,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     15991
     15992        { bs3CpuInstr4_vrsqrtps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues },
     15993        { bs3CpuInstr4_vrsqrtps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues },
     15994
     15995        { bs3CpuInstr4_vrsqrtps_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValues },
     15996        { bs3CpuInstr4_vrsqrtps_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValues },
     15997
     15998        { bs3CpuInstr4_rsqrtps_XMM1_XMM1_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValues },
     15999        { bs3CpuInstr4_vrsqrtps_XMM1_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValues },
     16000        { bs3CpuInstr4_vrsqrtps_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValues },
    1601716001    };
    1601816002    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1601916003    {
    16020         { bs3CpuInstr4_rsqrtps_XMM1_XMM2_icebp_c32,   255, RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    16021         { bs3CpuInstr4_rsqrtps_XMM1_FSxBX_icebp_c32,  255, RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    16022 
    16023         { bs3CpuInstr4_vrsqrtps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues },
    16024         { bs3CpuInstr4_vrsqrtps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues },
    16025 
    16026         { bs3CpuInstr4_vrsqrtps_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValues },
    16027         { bs3CpuInstr4_vrsqrtps_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValues },
    16028 
    16029         { bs3CpuInstr4_rsqrtps_XMM1_XMM1_icebp_c32,   255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValues },
    16030         { bs3CpuInstr4_vrsqrtps_XMM1_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValues },
    16031         { bs3CpuInstr4_vrsqrtps_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValues },
     16004        { bs3CpuInstr4_rsqrtps_XMM1_XMM2_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     16005        { bs3CpuInstr4_rsqrtps_XMM1_FSxBX_icebp_c32,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     16006
     16007        { bs3CpuInstr4_vrsqrtps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues },
     16008        { bs3CpuInstr4_vrsqrtps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues },
     16009
     16010        { bs3CpuInstr4_vrsqrtps_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValues },
     16011        { bs3CpuInstr4_vrsqrtps_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValues },
     16012
     16013        { bs3CpuInstr4_rsqrtps_XMM1_XMM1_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValues },
     16014        { bs3CpuInstr4_vrsqrtps_XMM1_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValues },
     16015        { bs3CpuInstr4_vrsqrtps_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValues },
    1603216016    };
    1603316017    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1603416018    {
    16035         { bs3CpuInstr4_rsqrtps_XMM1_XMM2_icebp_c64,   255, RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues },
    16036         { bs3CpuInstr4_rsqrtps_XMM1_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues },
    16037 
    16038         { bs3CpuInstr4_vrsqrtps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues },
    16039         { bs3CpuInstr4_vrsqrtps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValues },
    16040 
    16041         { bs3CpuInstr4_vrsqrtps_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 2,   PASS_s_aValues },
    16042         { bs3CpuInstr4_vrsqrtps_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 1, 1, 255, PASS_s_aValues },
    16043 
    16044         { bs3CpuInstr4_rsqrtps_XMM8_XMM9_icebp_c64,   255, RM_REG, T_SSE,     8, 8, 9,   PASS_s_aValues },
    16045         { bs3CpuInstr4_rsqrtps_XMM8_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     8, 8, 255, PASS_s_aValues },
    16046 
    16047         { bs3CpuInstr4_vrsqrtps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, 8, 8, 9,   PASS_s_aValues },
    16048         { bs3CpuInstr4_vrsqrtps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, 8, 8, 255, PASS_s_aValues },
    16049         { bs3CpuInstr4_vrsqrtps_YMM8_YMM9_icebp_c64,  255, RM_REG, T_AVX_256, 8, 8, 9,   PASS_s_aValues },
    16050         { bs3CpuInstr4_vrsqrtps_YMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, 8, 8, 255, PASS_s_aValues },
    16051 
    16052         { bs3CpuInstr4_rsqrtps_XMM1_XMM1_icebp_c64,   255, RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValues },
    16053         { bs3CpuInstr4_rsqrtps_XMM8_XMM8_icebp_c64,   255, RM_REG, T_SSE,     8, 8, 8,   PASS_s_aValues },
    16054         { bs3CpuInstr4_vrsqrtps_XMM1_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValues },
    16055         { bs3CpuInstr4_vrsqrtps_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, 1, 1, 1,   PASS_s_aValues },
    16056         { bs3CpuInstr4_vrsqrtps_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, 8, 8, 8,   PASS_s_aValues },
     16019        { bs3CpuInstr4_rsqrtps_XMM1_XMM2_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues },
     16020        { bs3CpuInstr4_rsqrtps_XMM1_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues },
     16021
     16022        { bs3CpuInstr4_vrsqrtps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues },
     16023        { bs3CpuInstr4_vrsqrtps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValues },
     16024
     16025        { bs3CpuInstr4_vrsqrtps_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_s_aValues },
     16026        { bs3CpuInstr4_vrsqrtps_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_s_aValues },
     16027
     16028        { bs3CpuInstr4_rsqrtps_XMM8_XMM9_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues },
     16029        { bs3CpuInstr4_rsqrtps_XMM8_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues },
     16030
     16031        { bs3CpuInstr4_vrsqrtps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM8, XMM9,  PASS_s_aValues },
     16032        { bs3CpuInstr4_vrsqrtps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_s_aValues },
     16033        { bs3CpuInstr4_vrsqrtps_YMM8_YMM9_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM9,  PASS_s_aValues },
     16034        { bs3CpuInstr4_vrsqrtps_YMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_s_aValues },
     16035
     16036        { bs3CpuInstr4_rsqrtps_XMM1_XMM1_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValues },
     16037        { bs3CpuInstr4_rsqrtps_XMM8_XMM8_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_s_aValues },
     16038        { bs3CpuInstr4_vrsqrtps_XMM1_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValues },
     16039        { bs3CpuInstr4_vrsqrtps_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_s_aValues },
     16040        { bs3CpuInstr4_vrsqrtps_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_s_aValues },
    1605716041    };
    1605816042
    … …  
    1626316247    static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
    1626416248    {
    16265         { bs3CpuInstr4_rsqrtss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues   },
    16266         { bs3CpuInstr4_rsqrtss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues   },
    16267 
    16268         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues   },
    16269         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues   },
    16270 
    16271         { bs3CpuInstr4_rsqrtss_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    16272         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM1_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    16273         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues   },
    16274         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 2,   PASS_s_aValuesSR },
    16275         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValuesSR },
     16249        { bs3CpuInstr4_rsqrtss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues   },
     16250        { bs3CpuInstr4_rsqrtss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues   },
     16251
     16252        { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues   },
     16253        { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues   },
     16254
     16255        { bs3CpuInstr4_rsqrtss_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     16256        { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM1_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     16257        { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues   },
     16258        { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_s_aValuesSR },
     16259        { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValuesSR },
    1627616260    };
    1627716261    static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    1627816262    {
    16279         { bs3CpuInstr4_rsqrtss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues   },
    16280         { bs3CpuInstr4_rsqrtss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues   },
    16281 
    16282         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues   },
    16283         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues   },
    16284 
    16285         { bs3CpuInstr4_rsqrtss_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    16286         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM1_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    16287         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues   },
    16288         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 2,   PASS_s_aValuesSR },
    16289         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValuesSR },
     16263        { bs3CpuInstr4_rsqrtss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues   },
     16264        { bs3CpuInstr4_rsqrtss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues   },
     16265
     16266        { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues   },
     16267        { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues   },
     16268
     16269        { bs3CpuInstr4_rsqrtss_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     16270        { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM1_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     16271        { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues   },
     16272        { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_s_aValuesSR },
     16273        { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValuesSR },
    1629016274    };
    1629116275    static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    1629216276    {
    16293         { bs3CpuInstr4_rsqrtss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     1, 1, 2,   PASS_s_aValues   },
    16294         { bs3CpuInstr4_rsqrtss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     1, 1, 255, PASS_s_aValues   },
    16295 
    16296         { bs3CpuInstr4_rsqrtss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     8, 8, 9,   PASS_s_aValues   },
    16297         { bs3CpuInstr4_rsqrtss_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     8, 8, 255, PASS_s_aValues   },
    16298 
    16299         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 3,   PASS_s_aValues   },
    16300         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 2, 255, PASS_s_aValues   },
    16301 
    16302         { bs3CpuInstr4_vrsqrtss_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, 8, 9, 10, PASS_s_aValues   },
    16303         { bs3CpuInstr4_vrsqrtss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 8, 9, 255, PASS_s_aValues   },
    16304 
    16305         { bs3CpuInstr4_rsqrtss_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     1, 1, 1,   PASS_s_aValuesSR },
    16306         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM1_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 1,   PASS_s_aValuesSR },
    16307         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 1, 2,   PASS_s_aValues   },
    16308         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 1, 2, 2,   PASS_s_aValuesSR },
    16309         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, 1, 1, 255, PASS_s_aValuesSR },
    16310         { bs3CpuInstr4_vrsqrtss_XMM8_XMM8_XMM8_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, 8, 8, 8,   PASS_s_aValuesSR },
     16277        { bs3CpuInstr4_rsqrtss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_s_aValues   },
     16278        { bs3CpuInstr4_rsqrtss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_s_aValues   },
     16279
     16280        { bs3CpuInstr4_rsqrtss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_s_aValues   },
     16281        { bs3CpuInstr4_rsqrtss_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_s_aValues   },
     16282
     16283        { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_s_aValues   },
     16284        { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_s_aValues   },
     16285
     16286        { bs3CpuInstr4_vrsqrtss_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_s_aValues   },
     16287        { bs3CpuInstr4_vrsqrtss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_s_aValues   },
     16288
     16289        { bs3CpuInstr4_rsqrtss_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     16290        { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM1_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_s_aValuesSR },
     16291        { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_s_aValues   },
     16292        { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_s_aValuesSR },
     16293        { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_s_aValuesSR },
     16294        { bs3CpuInstr4_vrsqrtss_XMM8_XMM8_XMM8_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_s_aValuesSR },
    1631116295    };
    1631216296
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