VirtualBox

Changeset 106634 in vbox


Ignore:
Timestamp:
Oct 23, 2024 8:33:54 PM (5 weeks ago)
Author:
vboxsync
Message:

SUPDrv: Making it build on win.arm64... jiraref:VBP-1253

Location:
trunk/src/VBox/HostDrivers/Support
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/HostDrivers/Support/Makefile.kmk

    r106625 r106634  
    614614                | $$(dir $$@)
    615615        $(SED) \
     616                -e '/not-arch-$(KBUILD_TARGET_ARCH)/d' \
    616617                -f $(dir $<)/SUPR0-def-$(VBOX_LDR_FMT).sed \
    617618                --output $@ \
  • trunk/src/VBox/HostDrivers/Support/SUPDrv.cpp

    r106625 r106634  
    253253        /* Entries with absolute addresses determined at runtime, fixup
    254254           code makes ugly ASSUMPTIONS about the order here: */
    255     SUPEXP_CUSTOM(      0,  SUPR0AbsIs64bit,          0),   /* only-amd64, only-x86 */
    256     SUPEXP_CUSTOM(      0,  SUPR0Abs64bitKernelCS,    0),   /* only-amd64, only-x86 */
    257     SUPEXP_CUSTOM(      0,  SUPR0Abs64bitKernelSS,    0),   /* only-amd64, only-x86 */
    258     SUPEXP_CUSTOM(      0,  SUPR0Abs64bitKernelDS,    0),   /* only-amd64, only-x86 */
    259     SUPEXP_CUSTOM(      0,  SUPR0AbsKernelCS,         0),   /* only-amd64, only-x86 */
    260     SUPEXP_CUSTOM(      0,  SUPR0AbsKernelSS,         0),   /* only-amd64, only-x86 */
    261     SUPEXP_CUSTOM(      0,  SUPR0AbsKernelDS,         0),   /* only-amd64, only-x86 */
    262     SUPEXP_CUSTOM(      0,  SUPR0AbsKernelES,         0),   /* only-amd64, only-x86 */
    263     SUPEXP_CUSTOM(      0,  SUPR0AbsKernelFS,         0),   /* only-amd64, only-x86 */
    264     SUPEXP_CUSTOM(      0,  SUPR0AbsKernelGS,         0),   /* only-amd64, only-x86 */
     255#if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
     256    SUPEXP_CUSTOM(      0,  SUPR0AbsIs64bit,       0),  /* not-arch-arm64 */
     257    SUPEXP_CUSTOM(      0,  SUPR0Abs64bitKernelCS, 0),  /* not-arch-arm64 */
     258    SUPEXP_CUSTOM(      0,  SUPR0Abs64bitKernelSS, 0),  /* not-arch-arm64 */
     259    SUPEXP_CUSTOM(      0,  SUPR0Abs64bitKernelDS, 0),  /* not-arch-arm64 */
     260    SUPEXP_CUSTOM(      0,  SUPR0AbsKernelCS,      0),  /* not-arch-arm64 */
     261    SUPEXP_CUSTOM(      0,  SUPR0AbsKernelSS,      0),  /* not-arch-arm64 */
     262    SUPEXP_CUSTOM(      0,  SUPR0AbsKernelDS,      0),  /* not-arch-arm64 */
     263    SUPEXP_CUSTOM(      0,  SUPR0AbsKernelES,      0),  /* not-arch-arm64 */
     264    SUPEXP_CUSTOM(      0,  SUPR0AbsKernelFS,      0),  /* not-arch-arm64 */
     265    SUPEXP_CUSTOM(      0,  SUPR0AbsKernelGS,      0),  /* not-arch-arm64 */
     266#endif
    265267        /* Normal function & data pointers: */
    266     SUPEXP_CUSTOM(      0,  g_pSUPGlobalInfoPage,     &g_pSUPGlobalInfoPage),            /* SED: DATA */
     268    SUPEXP_CUSTOM(      0,  g_pSUPGlobalInfoPage,  &g_pSUPGlobalInfoPage),            /* SED: DATA */
    267269    SUPEXP_STK_OKAY(    0,  SUPGetGIP),
    268270    SUPEXP_STK_BACK(    1,  SUPReadTscWithDelta),
     
    277279    SUPEXP_STK_BACK(    5,  SUPR0ContAlloc),
    278280    SUPEXP_STK_BACK(    2,  SUPR0ContFree),
    279     SUPEXP_STK_BACK(    2,  SUPR0ChangeCR4),                /* only-amd64, only-x86 */
    280     SUPEXP_STK_BACK(    1,  SUPR0EnableVTx),                /* only-amd64, only-x86 */
     281    SUPEXP_STK_OKAY(    0,  SUPR0GetKernelFeatures),
     282    SUPEXP_STK_BACK(    0,  SUPR0GetPagingMode),
    281283    SUPEXP_STK_OKAY(    1,  SUPR0FpuBegin),
    282284    SUPEXP_STK_OKAY(    1,  SUPR0FpuEnd),
    283     SUPEXP_STK_BACK(    0,  SUPR0SuspendVTxOnCpu),          /* only-amd64, only-x86 */
    284     SUPEXP_STK_BACK(    1,  SUPR0ResumeVTxOnCpu),           /* only-amd64, only-x86 */
    285     SUPEXP_STK_OKAY(    1,  SUPR0GetCurrentGdtRw),          /* only-amd64, only-x86 */
    286     SUPEXP_STK_OKAY(    0,  SUPR0GetKernelFeatures),
    287     SUPEXP_STK_BACK(    3,  SUPR0GetHwvirtMsrs),            /* only-amd64, only-x86 */
    288     SUPEXP_STK_BACK(    0,  SUPR0GetPagingMode),
    289     SUPEXP_STK_BACK(    1,  SUPR0GetSvmUsability),          /* only-amd64, only-x86 */
    290     SUPEXP_STK_BACK(    1,  SUPR0GetVTSupport),             /* only-amd64, only-x86 */
    291     SUPEXP_STK_BACK(    1,  SUPR0GetVmxUsability),          /* only-amd64, only-x86 */
     285#if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
     286    SUPEXP_STK_BACK(    2,  SUPR0ChangeCR4),            /* not-arch-arm64 */
     287    SUPEXP_STK_BACK(    1,  SUPR0EnableVTx),            /* not-arch-arm64 */
     288    SUPEXP_STK_BACK(    0,  SUPR0SuspendVTxOnCpu),      /* not-arch-arm64 */
     289    SUPEXP_STK_BACK(    1,  SUPR0ResumeVTxOnCpu),       /* not-arch-arm64 */
     290    SUPEXP_STK_OKAY(    1,  SUPR0GetCurrentGdtRw),      /* not-arch-arm64 */
     291    SUPEXP_STK_BACK(    3,  SUPR0GetHwvirtMsrs),        /* not-arch-arm64 */
     292    SUPEXP_STK_BACK(    1,  SUPR0GetSvmUsability),      /* not-arch-arm64 */
     293    SUPEXP_STK_BACK(    1,  SUPR0GetVTSupport),         /* not-arch-arm64 */
     294    SUPEXP_STK_BACK(    1,  SUPR0GetVmxUsability),      /* not-arch-arm64 */
     295#endif
    292296    SUPEXP_STK_BACK(    2,  SUPR0LdrIsLockOwnerByMod),
    293297    SUPEXP_STK_BACK(    1,  SUPR0LdrLock),
     
    24112415        }
    24122416
    2413         case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_VT_CAPS):
    2414         {
    2415             /* validate */
    2416             PSUPVTCAPS pReq = (PSUPVTCAPS)pReqHdr;
    2417             REQ_CHECK_SIZES(SUP_IOCTL_VT_CAPS);
    2418 
    2419             /* execute */
    2420             pReq->Hdr.rc = SUPR0QueryVTCaps(pSession, &pReq->u.Out.fCaps);
    2421             if (RT_FAILURE(pReq->Hdr.rc))
    2422                 pReq->Hdr.cbOut = sizeof(pReq->Hdr);
    2423             return 0;
    2424         }
    2425 
    24262417        case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_TRACER_OPEN):
    24272418        {
     
    25452536        }
    25462537
     2538#if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
     2539
     2540        case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_VT_CAPS):
     2541        {
     2542            /* validate */
     2543            PSUPVTCAPS pReq = (PSUPVTCAPS)pReqHdr;
     2544            REQ_CHECK_SIZES(SUP_IOCTL_VT_CAPS);
     2545
     2546            /* execute */
     2547            pReq->Hdr.rc = SUPR0QueryVTCaps(pSession, &pReq->u.Out.fCaps);
     2548            if (RT_FAILURE(pReq->Hdr.rc))
     2549                pReq->Hdr.cbOut = sizeof(pReq->Hdr);
     2550            return 0;
     2551        }
     2552
    25472553        case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_UCODE_REV):
    25482554        {
     
    25732579            return 0;
    25742580        }
     2581
     2582#endif /* !defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86) */
    25752583
    25762584        default:
     
    26462654        }
    26472655
     2656#if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
    26482657        case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_VT_CAPS):
    26492658        {
     
    26582667            return 0;
    26592668        }
     2669#endif /* !defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86) */
    26602670
    26612671        default:
     
    42254235
    42264236
     4237#if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
     4238
    42274239/**
    42284240 * Change CR4 and take care of the kernel CR4 shadow if applicable.
     
    42414253SUPR0DECL(RTCCUINTREG) SUPR0ChangeCR4(RTCCUINTREG fOrMask, RTCCUINTREG fAndMask)
    42424254{
    4243 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
    42444255# ifdef RT_OS_LINUX
    42454256    return supdrvOSChangeCR4(fOrMask, fAndMask);
     
    42514262    return uOld;
    42524263# endif
    4253 #else
    4254     RT_NOREF(fOrMask, fAndMask);
    4255     return RTCCUINTREG_MAX;
    4256 #endif
    42574264}
    42584265SUPR0_EXPORT_SYMBOL(SUPR0ChangeCR4);
     
    42704277SUPR0DECL(int) SUPR0EnableVTx(bool fEnable)
    42714278{
    4272 #if defined(RT_OS_DARWIN) && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
     4279# if defined(RT_OS_DARWIN) && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
    42734280    return supdrvOSEnableVTx(fEnable);
    4274 #else
     4281# else
    42754282    RT_NOREF1(fEnable);
    42764283    return VERR_NOT_SUPPORTED;
    4277 #endif
     4284# endif
    42784285}
    42794286SUPR0_EXPORT_SYMBOL(SUPR0EnableVTx);
     
    42894296SUPR0DECL(bool) SUPR0SuspendVTxOnCpu(void)
    42904297{
    4291 #if defined(RT_OS_DARWIN) && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
     4298# if defined(RT_OS_DARWIN) && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
    42924299    return supdrvOSSuspendVTxOnCpu();
    4293 #else
     4300# else
    42944301    return false;
    4295 #endif
     4302# endif
    42964303}
    42974304SUPR0_EXPORT_SYMBOL(SUPR0SuspendVTxOnCpu);
     
    43074314SUPR0DECL(void) SUPR0ResumeVTxOnCpu(bool fSuspended)
    43084315{
    4309 #if defined(RT_OS_DARWIN) && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
     4316# if defined(RT_OS_DARWIN) && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
    43104317    supdrvOSResumeVTxOnCpu(fSuspended);
    4311 #else
     4318# else
    43124319    RT_NOREF1(fSuspended);
    43134320    Assert(!fSuspended);
    4314 #endif
     4321# endif
    43154322}
    43164323SUPR0_EXPORT_SYMBOL(SUPR0ResumeVTxOnCpu);
     
    43194326SUPR0DECL(int) SUPR0GetCurrentGdtRw(RTHCUINTPTR *pGdtRw)
    43204327{
    4321 #if defined(RT_OS_LINUX) && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
     4328# if defined(RT_OS_LINUX) && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
    43224329    return supdrvOSGetCurrentGdtRw(pGdtRw);
    4323 #else
     4330# else
    43244331    NOREF(pGdtRw);
    43254332    return VERR_NOT_IMPLEMENTED;
    4326 #endif
     4333# endif
    43274334}
    43284335SUPR0_EXPORT_SYMBOL(SUPR0GetCurrentGdtRw);
     
    43414348    *pfCaps = 0;
    43424349
    4343 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
    43444350    /* Check if the CPU even supports CPUID (extremely ancient CPUs). */
    43454351    if (ASMHasCpuId())
     
    43924398        }
    43934399    }
    4394 #endif
    43954400    return VERR_UNSUPPORTED_CPU;
    43964401}
     
    44144419SUPR0DECL(int) SUPR0GetVmxUsability(bool *pfIsSmxModeAmbiguous)
    44154420{
    4416 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
    44174421    uint64_t   fFeatMsr;
    44184422    bool       fMaybeSmxMode;
     
    44734477         */
    44744478        uint32_t fFeaturesECX, uDummy;
    4475 #ifdef VBOX_STRICT
     4479# ifdef VBOX_STRICT
    44764480        /* Callers should have verified these at some point. */
    44774481        uint32_t uMaxId, uVendorEBX, uVendorECX, uVendorEDX;
     
    44814485               || RTX86IsViaCentaurCpu(uVendorEBX, uVendorECX, uVendorEDX)
    44824486               || RTX86IsShanghaiCpu(  uVendorEBX, uVendorECX, uVendorEDX));
    4483 #endif
     4487# endif
    44844488        ASMCpuId(1, &uDummy, &uDummy, &fFeaturesECX, &uDummy);
    44854489        bool fSmxVmxHwSupport = false;
     
    45224526
    45234527    return rc;
    4524 
    4525 #else  /* !defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86) */
    4526     if (pfIsSmxModeAmbiguous)
    4527         *pfIsSmxModeAmbiguous = false;
    4528     return VERR_UNSUPPORTED_CPU;
    4529 #endif /* !defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86) */
    45304528}
    45314529SUPR0_EXPORT_SYMBOL(SUPR0GetVmxUsability);
     
    45424540SUPR0DECL(int) SUPR0GetSvmUsability(bool fInitSvm)
    45434541{
    4544 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
    45454542    int      rc;
    45464543    uint64_t fVmCr;
     
    45774574        rc = VERR_SVM_DISABLED;
    45784575    return rc;
    4579 
    4580 #else  /* !defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86) */
    4581     RT_NOREF(fInitSvm);
    4582     return VERR_UNSUPPORTED_CPU;
    4583 #endif /* !defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86) */
    45844576}
    45854577SUPR0_EXPORT_SYMBOL(SUPR0GetSvmUsability);
    45864578
    45874579
    4588 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
    45894580/**
    45904581 * Queries the AMD-V and VT-x capabilities of the calling CPU.
     
    46724663    return rc;
    46734664}
    4674 #endif /* !defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86) */
    46754665
    46764666
     
    47014691    AssertPtrReturn(pfCaps, VERR_INVALID_POINTER);
    47024692
    4703 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
    47044693    /*
    47054694     * Call common worker.
    47064695     */
    47074696    return supdrvQueryVTCapsInternal(pfCaps);
    4708 #else
    4709     return VERR_UNSUPPORTED_CPU;
    4710 #endif
    47114697}
    47124698SUPR0_EXPORT_SYMBOL(SUPR0QueryVTCaps);
    47134699
    47144700
    4715 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
    47164701/**
    47174702 * Queries the CPU microcode revision.
     
    47804765    return rc;
    47814766}
    4782 #endif /* !defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86) */
    47834767
    47844768
     
    48044788     * Call common worker.
    48054789     */
    4806 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
    48074790    return supdrvQueryUcodeRev(puRevision);
    4808 #else
    4809     return VERR_UNSUPPORTED_CPU;
    4810 #endif
    48114791}
    48124792SUPR0_EXPORT_SYMBOL(SUPR0QueryUcodeRev);
     
    48254805SUPR0DECL(int) SUPR0GetHwvirtMsrs(PSUPHWVIRTMSRS pMsrs, uint32_t fCaps, bool fForce)
    48264806{
    4827 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
    48284807    int rc;
    48294808    RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
     
    49164895
    49174896    return rc;
    4918 
    4919 #else  /* !defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86) */
    4920     RT_NOREF(pMsrs, fCaps, fForce);
    4921     return VERR_UNSUPPORTED_CPU;
     4897}
     4898SUPR0_EXPORT_SYMBOL(SUPR0GetHwvirtMsrs);
     4899
    49224900#endif /* !defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86) */
    4923 }
    4924 SUPR0_EXPORT_SYMBOL(SUPR0GetHwvirtMsrs);
    49254901
    49264902
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