Changeset 106652 in vbox for trunk/src/VBox/Disassembler

Timestamp:

Oct 24, 2024 11:50:02 AM (4 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

165497

Message:

Disassembler: Decode more branch instructions, change the opcode table format again to have the decoder steps set the appropriate parameter types instead of hardcoding them in the instruction class table (required for retaa/retab which don't take a register parameter as opposed to ret, bugref:10394 [build fix]

Location:

trunk/src/VBox/Disassembler

Files:

• DisasmCore-armv8.cpp (modified) (1 diff)
• DisasmTables-armv8-a64.cpp (modified) (1 diff)

trunk/src/VBox/Disassembler/DisasmCore-armv8.cpp

@@ -399 +399 @@
 static int disArmV8ParseRegFixed31(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8OPCODE pOp, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit)
 {
-    RT_NOREF(pDis, pOp, pInsnClass, pf64Bit);
+    RT_NOREF(pDis, pOp, pInsnClass, pParam, pf64Bit);
     Assert(pParam->armv8.enmType == kDisArmv8OpParmNone);
 

trunk/src/VBox/Disassembler/DisasmTables-armv8-a64.cpp

@@ -684 +684 @@
     INVALID_OPCODE,
     INVALID_OPCODE,
-    DIS_ARMV8_OP_ALT_DECODE(0x9ac04c00, "crc32x",  OP_ARMV8_A64_CRC32X,    DISOPTYPE_HARMLESS, Reg2SrcCrc32X),
-    INVALID_OPCODE,
-    INVALID_OPCODE,
-    INVALID_OPCODE,
-    DIS_ARMV8_OP_ALT_DECODE(0x9ac05c00, "crc32cx", OP_ARMV8_A64_CRC32CX,   DISOPTYPE_HARMLESS, Reg2SrcCrc32X),
+    DIS_ARMV8_OP_ALT_DECODE(0x9ac04c00, "crc32x",          OP_ARMV8_A64_CRC32X,    DISOPTYPE_HARMLESS, Reg2SrcCrc32X),
+    INVALID_OPCODE,
+    INVALID_OPCODE,
+    INVALID_OPCODE,
+    DIS_ARMV8_OP_ALT_DECODE(0x9ac05c00, "crc32cx",         OP_ARMV8_A64_CRC32CX,   DISOPTYPE_HARMLESS, Reg2SrcCrc32X),
     DIS_ARMV8_OP(           0x9ac06000, "smax",            OP_ARMV8_A64_SMAX,      DISOPTYPE_HARMLESS),
     DIS_ARMV8_OP(           0x9ac06400, "umax",            OP_ARMV8_A64_UMAX,      DISOPTYPE_HARMLESS),