Changeset 106886 in vbox
- Timestamp:
- Nov 8, 2024 9:56:24 AM (2 months ago)
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 2 edited
-
bs3-cpu-instr-3-template.mac (modified) (2 diffs)
-
bs3-cpu-instr-3.c32 (modified) (5 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac
r106864 r106886 1020 1020 EMIT_INSTR_PLUS_ICEBP_C64 movhlps, XMM8, XMM12 1021 1021 EMIT_INSTR_PLUS_ICEBP_C64 vmovhlps, XMM10, XMM14, XMM12 1022 1023 ; 1024 ; [V]MOVLHPS 1025 ; 1026 EMIT_INSTR_PLUS_ICEBP movlhps, XMM1, XMM2 1027 EMIT_INSTR_PLUS_ICEBP vmovlhps, XMM1, XMM2, XMM3 1028 EMIT_INSTR_PLUS_ICEBP_C64 movlhps, XMM8, XMM12 1029 EMIT_INSTR_PLUS_ICEBP_C64 vmovlhps, XMM10, XMM14, XMM12 1022 1030 1023 1031 ; … … 3276 3284 3277 3285 ; 3286 ; VPERMPS 3287 ; 3288 EMIT_INSTR_PLUS_ICEBP vpermps, YMM1, YMM2, YMM3 3289 EMIT_INSTR_PLUS_ICEBP vpermps, YMM1, YMM2, FSxBX 3290 EMIT_INSTR_PLUS_ICEBP_C64 vpermps, YMM8, YMM9, YMM10 3291 EMIT_INSTR_PLUS_ICEBP_C64 vpermps, YMM8, YMM9, FSxBX 3292 EMIT_INSTR_PLUS_ICEBP vpermps, YMM1, YMM2, YMM2 3293 EMIT_INSTR_PLUS_ICEBP vpermps, YMM1, YMM1, YMM2 3294 EMIT_INSTR_PLUS_ICEBP vpermps, YMM1, YMM2, YMM1 3295 EMIT_INSTR_PLUS_ICEBP vpermps, YMM1, YMM1, YMM1 3296 EMIT_INSTR_PLUS_ICEBP vpermps, YMM1, YMM1, FSxBX 3297 3298 ; 3299 ; VPERMPD 3300 ; 3301 EMIT_INSTR_PLUS_ICEBP vpermpd, YMM1, YMM2, 000h 3302 EMIT_INSTR_PLUS_ICEBP vpermpd, YMM1, YMM2, 0E7h 3303 EMIT_INSTR_PLUS_ICEBP vpermpd, YMM1, YMM2, 091h 3304 EMIT_INSTR_PLUS_ICEBP vpermpd, YMM1, FSxBX, 000h 3305 EMIT_INSTR_PLUS_ICEBP vpermpd, YMM1, FSxBX, 0E7h 3306 EMIT_INSTR_PLUS_ICEBP vpermpd, YMM1, FSxBX, 091h 3307 EMIT_INSTR_PLUS_ICEBP_C64 vpermpd, YMM8, YMM9, 000h 3308 EMIT_INSTR_PLUS_ICEBP_C64 vpermpd, YMM8, YMM9, 0E7h 3309 EMIT_INSTR_PLUS_ICEBP_C64 vpermpd, YMM8, YMM9, 091h 3310 EMIT_INSTR_PLUS_ICEBP_C64 vpermpd, YMM8, FSxBX, 000h 3311 EMIT_INSTR_PLUS_ICEBP_C64 vpermpd, YMM8, FSxBX, 0E7h 3312 EMIT_INSTR_PLUS_ICEBP_C64 vpermpd, YMM8, FSxBX, 091h 3313 EMIT_INSTR_PLUS_ICEBP vpermpd, YMM1, YMM1, 000h 3314 EMIT_INSTR_PLUS_ICEBP vpermpd, YMM1, YMM1, 0E7h 3315 EMIT_INSTR_PLUS_ICEBP vpermpd, YMM1, YMM1, 091h 3316 3317 ; 3278 3318 ; [V]PMADDUBSW 3279 3319 ; -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32
r106885 r106886 4372 4372 { bs3CpuInstr3_vmovhlps_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3, PASS_ELEMENTS(s_aValues) }, 4373 4373 { bs3CpuInstr3_vmovhlps_XMM10_XMM14_XMM12_icebp_c64, 255, RM_REG, T_AVX_128, XMM10, XMM14, XMM12, PASS_ELEMENTS(s_aValues) }, 4374 }; 4375 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); 4376 unsigned const iTest = BS3CPUINSTR3_TEST_MODES_INDEX(bMode); 4377 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 4378 g_aXcptConfig5, RT_ELEMENTS(g_aXcptConfig5)); 4379 } 4380 4381 4382 /* 4383 * [V]MOVLHPS - Move high qword in source (2) to low qword in destination, leaving 4384 * the high qword in the destination as it was. The VEX variant 4385 * takes the high qword from the first source operand. 4386 */ 4387 BS3_DECL_FAR(uint8_t) bs3CpuInstr3_v_movlhps(uint8_t bMode) 4388 { 4389 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues[] = 4390 { 4391 { /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0), 4392 /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0), 4393 /* => */ RTUINT256_INIT_C(0, 0, 0, 0) }, 4394 { /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8), 4395 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), 4396 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0xc1c2c3c4c5c6c7c8, 0x8182838485868788) }, 4397 { /*src2*/ RTUINT256_INIT_C(0x5555666677778888, 0x1111222233334444, 0x1111222233334444, 0x81828384c5c6c7c8), 4398 /*src1*/ RTUINT256_INIT_C(0xddddeeeeffff0000, 0x9999aaaabbbbcccc, 0x9999aaaabbbbcccc, 0xddddeeeeffff0000), 4399 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x81828384c5c6c7c8, 0xddddeeeeffff0000) }, 4400 { /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 4401 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 4402 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x9c5ce073930996bb, 0x43d3cda0238499fd) }, 4403 }; 4404 4405 static BS3CPUINSTR3_TEST1_T const s_aTests16[] = 4406 { 4407 { bs3CpuInstr3_movlhps_XMM1_XMM2_icebp_c16, 255, RM_REG, T_SSE, XMM1, XMM1, XMM2, PASS_ELEMENTS(s_aValues) }, 4408 { bs3CpuInstr3_vmovlhps_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3, PASS_ELEMENTS(s_aValues) }, 4409 }; 4410 static BS3CPUINSTR3_TEST1_T const s_aTests32[] = 4411 { 4412 { bs3CpuInstr3_movlhps_XMM1_XMM2_icebp_c32, 255, RM_REG, T_SSE, XMM1, XMM1, XMM2, PASS_ELEMENTS(s_aValues) }, 4413 { bs3CpuInstr3_vmovlhps_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3, PASS_ELEMENTS(s_aValues) }, 4414 }; 4415 static BS3CPUINSTR3_TEST1_T const s_aTests64[] = 4416 { 4417 { bs3CpuInstr3_movlhps_XMM1_XMM2_icebp_c64, 255, RM_REG, T_SSE, XMM1, XMM1, XMM2, PASS_ELEMENTS(s_aValues) }, 4418 { bs3CpuInstr3_movlhps_XMM8_XMM12_icebp_c64, 255, RM_REG, T_SSE, XMM8, XMM8, XMM12, PASS_ELEMENTS(s_aValues) }, 4419 { bs3CpuInstr3_vmovlhps_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3, PASS_ELEMENTS(s_aValues) }, 4420 { bs3CpuInstr3_vmovlhps_XMM10_XMM14_XMM12_icebp_c64, 255, RM_REG, T_AVX_128, XMM10, XMM14, XMM12, PASS_ELEMENTS(s_aValues) }, 4374 4421 }; 4375 4422 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); … … 9347 9394 9348 9395 /* 9396 * VPERMPS - Permute Single Precision Floating-Point Values 9397 */ 9398 BS3_DECL_FAR(uint8_t) bs3CpuInstr3_vpermps(uint8_t bMode) 9399 { 9400 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues[] = 9401 { 9402 { /*src2*/ RTUINT256_INIT_C(0xf0e1d2c3eeddccbb, 0x1234567880806502, 0x6809400453589793, 0xfaf0f00f31415926), 9403 /*src1*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000), 9404 /* => */ RTUINT256_INIT_C(0x3141592631415926, 0x3141592631415926, 0x3141592631415926, 0x3141592631415926) }, /* lo => all 8 slots */ 9405 { /*src2*/ RTUINT256_INIT_C(0xf0e1d2c3eeddccbb, 0x1234567880806502, 0x6809400453589793, 0xfaf0f00f31415926), 9406 /*src1*/ RTUINT256_INIT_C(0x0000000000000001, 0x0000000200000000, 0x0000000000000005, 0x0000000600000007), 9407 /* => */ RTUINT256_INIT_C(0x31415926faf0f00f, 0x5358979331415926, 0x3141592612345678, 0xeeddccbbf0e1d2c3) }, /* backwards except middle 2 = lo */ 9408 { /*src2*/ RTUINT256_INIT_C(0xf0e1d2c3eeddccbb, 0x1234567880806502, 0x6809400453589793, 0xfaf0f00f31415926), 9409 /*src1*/ RTUINT256_INIT_C(0x013456789abcdef2, 0x1236789abcdef045, 0x23456abcdef01789, 0x345678def0129abc), 9410 /* => */ RTUINT256_INIT_C(0x3141592653589793, 0x5358979312345678, 0x80806502faf0f00f, 0xeeddccbb80806502) }, /* assorted */ 9411 }; 9412 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesSR[] = 9413 { 9414 { /*igno*/ RTUINT256_INIT_C(0, 0, 0, 0), 9415 /*src1*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000), 9416 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000) }, 9417 { /*igno*/ RTUINT256_INIT_C(0, 0, 0, 0), 9418 /*src1*/ RTUINT256_INIT_C(0x0000000000000001, 0x0000000200000000, 0x0000000000000005, 0x0000000600000007), 9419 /* => */ RTUINT256_INIT_C(0x0000000700000006, 0x0000000500000007, 0x0000000700000002, 0x0000000100000000) }, 9420 { /*igno*/ RTUINT256_INIT_C(0, 0, 0, 0), 9421 /*src1*/ RTUINT256_INIT_C(0x013456789abcdef2, 0x1236789abcdef045, 0x23456abcdef01789, 0x345678def0129abc), 9422 /* => */ RTUINT256_INIT_C(0xf0129abcdef01789, 0xdef017891236789a, 0xbcdef045345678de, 0x9abcdef2bcdef045) }, 9423 }; 9424 9425 static BS3CPUINSTR3_TEST1_T const s_aTests16[] = 9426 { 9427 { bs3CpuInstr3_vpermps_YMM1_YMM2_YMM3_icebp_c16, 255, RM_REG, T_AVX2_256, YMM1, YMM2, YMM3, PASS_ELEMENTS(s_aValues) }, 9428 { bs3CpuInstr3_vpermps_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) }, 9429 9430 { bs3CpuInstr3_vpermps_YMM1_YMM2_YMM2_icebp_c16, 255, RM_REG, T_AVX2_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValuesSR) }, 9431 { bs3CpuInstr3_vpermps_YMM1_YMM1_YMM2_icebp_c16, 255, RM_REG, T_AVX2_256, YMM1, YMM1, YMM2, PASS_ELEMENTS(s_aValues) }, 9432 { bs3CpuInstr3_vpermps_YMM1_YMM2_YMM1_icebp_c16, 255, RM_REG, T_AVX2_256, YMM1, YMM2, YMM1, PASS_ELEMENTS(s_aValues) }, 9433 { bs3CpuInstr3_vpermps_YMM1_YMM1_YMM1_icebp_c16, 255, RM_REG, T_AVX2_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) }, 9434 { bs3CpuInstr3_vpermps_YMM1_YMM1_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) }, 9435 }; 9436 static BS3CPUINSTR3_TEST1_T const s_aTests32[] = 9437 { 9438 { bs3CpuInstr3_vpermps_YMM1_YMM2_YMM3_icebp_c32, 255, RM_REG, T_AVX2_256, YMM1, YMM2, YMM3, PASS_ELEMENTS(s_aValues) }, 9439 { bs3CpuInstr3_vpermps_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) }, 9440 9441 { bs3CpuInstr3_vpermps_YMM1_YMM2_YMM2_icebp_c32, 255, RM_REG, T_AVX2_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValuesSR) }, 9442 { bs3CpuInstr3_vpermps_YMM1_YMM1_YMM2_icebp_c32, 255, RM_REG, T_AVX2_256, YMM1, YMM1, YMM2, PASS_ELEMENTS(s_aValues) }, 9443 { bs3CpuInstr3_vpermps_YMM1_YMM2_YMM1_icebp_c32, 255, RM_REG, T_AVX2_256, YMM1, YMM2, YMM1, PASS_ELEMENTS(s_aValues) }, 9444 { bs3CpuInstr3_vpermps_YMM1_YMM1_YMM1_icebp_c32, 255, RM_REG, T_AVX2_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) }, 9445 { bs3CpuInstr3_vpermps_YMM1_YMM1_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) }, 9446 }; 9447 static BS3CPUINSTR3_TEST1_T const s_aTests64[] = 9448 { 9449 { bs3CpuInstr3_vpermps_YMM1_YMM2_YMM3_icebp_c64, 255, RM_REG, T_AVX2_256, YMM1, YMM2, YMM3, PASS_ELEMENTS(s_aValues) }, 9450 { bs3CpuInstr3_vpermps_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) }, 9451 9452 { bs3CpuInstr3_vpermps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX2_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) }, 9453 { bs3CpuInstr3_vpermps_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) }, 9454 9455 { bs3CpuInstr3_vpermps_YMM1_YMM2_YMM2_icebp_c64, 255, RM_REG, T_AVX2_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValuesSR) }, 9456 { bs3CpuInstr3_vpermps_YMM1_YMM1_YMM2_icebp_c64, 255, RM_REG, T_AVX2_256, YMM1, YMM1, YMM2, PASS_ELEMENTS(s_aValues) }, 9457 { bs3CpuInstr3_vpermps_YMM1_YMM2_YMM1_icebp_c64, 255, RM_REG, T_AVX2_256, YMM1, YMM2, YMM1, PASS_ELEMENTS(s_aValues) }, 9458 { bs3CpuInstr3_vpermps_YMM1_YMM1_YMM1_icebp_c64, 255, RM_REG, T_AVX2_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) }, 9459 { bs3CpuInstr3_vpermps_YMM1_YMM1_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) }, 9460 }; 9461 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); 9462 unsigned const iTest = BS3CPUINSTR3_TEST_MODES_INDEX(bMode); 9463 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 9464 g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4)); 9465 } 9466 9467 9468 /* 9349 9469 * VPERMILPD - Permute In-Lane of Pairs of Double Precision Floating-Point Values 9350 9470 * - ('Double Precision Floating-Point Values' AKA 'uninterpreted strings of 64-bits') … … 9460 9580 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 9461 9581 g_aXcptConfig6, RT_ELEMENTS(g_aXcptConfig6)); 9582 } 9583 9584 9585 /* 9586 * VPERMPD - Permute Double Precision Floating-Point Values 9587 */ 9588 BS3_DECL_FAR(uint8_t) bs3CpuInstr3_vpermpd(uint8_t bMode) 9589 { 9590 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues00[] = 9591 { 9592 { /*igno*/ RTUINT256_INIT_C(0, 0, 0, 0), 9593 /*src1*/ RTUINT256_INIT_C(0xf0e1d2c3eeddccbb, 0x1234567880806502, 0x6809400453589793, 0xfaf0f00f31415926), 9594 /* => */ RTUINT256_INIT_C(0xfaf0f00f31415926, 0xfaf0f00f31415926, 0xfaf0f00f31415926, 0xfaf0f00f31415926) }, 9595 { /*igno*/ RTUINT256_INIT_C(0, 0, 0, 0), 9596 /*src1*/ RTUINT256_INIT_C(0x0000000000000001, 0x0000000200000000, 0x0000000000000005, 0x0000000600000007), 9597 /* => */ RTUINT256_INIT_C(0x0000000600000007, 0x0000000600000007, 0x0000000600000007, 0x0000000600000007) }, 9598 { /*igno*/ RTUINT256_INIT_C(0, 0, 0, 0), 9599 /*src1*/ RTUINT256_INIT_C(0x013456789abcdef2, 0x1236789abcdef045, 0x23456abcdef01789, 0x345678def0129abc), 9600 /* => */ RTUINT256_INIT_C(0x345678def0129abc, 0x345678def0129abc, 0x345678def0129abc, 0x345678def0129abc) }, 9601 }; 9602 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues91[] = 9603 { 9604 { /*igno*/ RTUINT256_INIT_C(0, 0, 0, 0), 9605 /*src1*/ RTUINT256_INIT_C(0xf0e1d2c3eeddccbb, 0x1234567880806502, 0x6809400453589793, 0xfaf0f00f31415926), 9606 /* => */ RTUINT256_INIT_C(0x1234567880806502, 0x6809400453589793, 0xfaf0f00f31415926, 0x6809400453589793) }, 9607 { /*igno*/ RTUINT256_INIT_C(0, 0, 0, 0), 9608 /*src1*/ RTUINT256_INIT_C(0x0000000000000001, 0x0000000200000000, 0x0000000000000005, 0x0000000600000007), 9609 /* => */ RTUINT256_INIT_C(0x0000000200000000, 0x0000000000000005, 0x0000000600000007, 0x0000000000000005) }, 9610 { /*igno*/ RTUINT256_INIT_C(0, 0, 0, 0), 9611 /*src1*/ RTUINT256_INIT_C(0x013456789abcdef2, 0x1236789abcdef045, 0x23456abcdef01789, 0x345678def0129abc), 9612 /* => */ RTUINT256_INIT_C(0x1236789abcdef045, 0x23456abcdef01789, 0x345678def0129abc, 0x23456abcdef01789) }, 9613 }; 9614 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesE7[] = 9615 { 9616 { /*igno*/ RTUINT256_INIT_C(0, 0, 0, 0), 9617 /*src1*/ RTUINT256_INIT_C(0xf0e1d2c3eeddccbb, 0x1234567880806502, 0x6809400453589793, 0xfaf0f00f31415926), 9618 /* => */ RTUINT256_INIT_C(0xf0e1d2c3eeddccbb, 0x1234567880806502, 0x6809400453589793, 0xf0e1d2c3eeddccbb) }, 9619 { /*igno*/ RTUINT256_INIT_C(0, 0, 0, 0), 9620 /*src1*/ RTUINT256_INIT_C(0x0000000000000001, 0x0000000200000000, 0x0000000000000005, 0x0000000600000007), 9621 /* => */ RTUINT256_INIT_C(0x0000000000000001, 0x0000000200000000, 0x0000000000000005, 0x0000000000000001) }, 9622 { /*igno*/ RTUINT256_INIT_C(0, 0, 0, 0), 9623 /*src1*/ RTUINT256_INIT_C(0x013456789abcdef2, 0x1236789abcdef045, 0x23456abcdef01789, 0x345678def0129abc), 9624 /* => */ RTUINT256_INIT_C(0x013456789abcdef2, 0x1236789abcdef045, 0x23456abcdef01789, 0x013456789abcdef2) }, 9625 }; 9626 9627 static BS3CPUINSTR3_TEST1_T const s_aTests16[] = 9628 { 9629 { bs3CpuInstr3_vpermpd_YMM1_YMM2_000h_icebp_c16, 255, RM_REG, T_AVX2_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValues00) }, 9630 { bs3CpuInstr3_vpermpd_YMM1_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues00) }, 9631 { bs3CpuInstr3_vpermpd_YMM1_YMM2_091h_icebp_c16, 255, RM_REG, T_AVX2_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValues91) }, 9632 { bs3CpuInstr3_vpermpd_YMM1_FSxBX_091h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues91) }, 9633 { bs3CpuInstr3_vpermpd_YMM1_YMM2_0E7h_icebp_c16, 255, RM_REG, T_AVX2_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValuesE7) }, 9634 { bs3CpuInstr3_vpermpd_YMM1_FSxBX_0E7h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesE7) }, 9635 9636 { bs3CpuInstr3_vpermpd_YMM1_YMM1_000h_icebp_c16, 255, RM_REG, T_AVX2_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValues00) }, 9637 { bs3CpuInstr3_vpermpd_YMM1_YMM1_091h_icebp_c16, 255, RM_REG, T_AVX2_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValues91) }, 9638 { bs3CpuInstr3_vpermpd_YMM1_YMM1_0E7h_icebp_c16, 255, RM_REG, T_AVX2_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValuesE7) }, 9639 }; 9640 static BS3CPUINSTR3_TEST1_T const s_aTests32[] = 9641 { 9642 { bs3CpuInstr3_vpermpd_YMM1_YMM2_000h_icebp_c32, 255, RM_REG, T_AVX2_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValues00) }, 9643 { bs3CpuInstr3_vpermpd_YMM1_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues00) }, 9644 { bs3CpuInstr3_vpermpd_YMM1_YMM2_091h_icebp_c32, 255, RM_REG, T_AVX2_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValues91) }, 9645 { bs3CpuInstr3_vpermpd_YMM1_FSxBX_091h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues91) }, 9646 { bs3CpuInstr3_vpermpd_YMM1_YMM2_0E7h_icebp_c32, 255, RM_REG, T_AVX2_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValuesE7) }, 9647 { bs3CpuInstr3_vpermpd_YMM1_FSxBX_0E7h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesE7) }, 9648 9649 { bs3CpuInstr3_vpermpd_YMM1_YMM1_000h_icebp_c32, 255, RM_REG, T_AVX2_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValues00) }, 9650 { bs3CpuInstr3_vpermpd_YMM1_YMM1_091h_icebp_c32, 255, RM_REG, T_AVX2_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValues91) }, 9651 { bs3CpuInstr3_vpermpd_YMM1_YMM1_0E7h_icebp_c32, 255, RM_REG, T_AVX2_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValuesE7) }, 9652 }; 9653 static BS3CPUINSTR3_TEST1_T const s_aTests64[] = 9654 { 9655 { bs3CpuInstr3_vpermpd_YMM1_YMM2_000h_icebp_c64, 255, RM_REG, T_AVX2_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValues00) }, 9656 { bs3CpuInstr3_vpermpd_YMM1_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues00) }, 9657 { bs3CpuInstr3_vpermpd_YMM1_YMM2_091h_icebp_c64, 255, RM_REG, T_AVX2_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValues91) }, 9658 { bs3CpuInstr3_vpermpd_YMM1_FSxBX_091h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues91) }, 9659 { bs3CpuInstr3_vpermpd_YMM1_YMM2_0E7h_icebp_c64, 255, RM_REG, T_AVX2_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValuesE7) }, 9660 { bs3CpuInstr3_vpermpd_YMM1_FSxBX_0E7h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesE7) }, 9661 9662 { bs3CpuInstr3_vpermpd_YMM8_YMM9_000h_icebp_c64, 255, RM_REG, T_AVX2_256, YMM8, YMM9, NOREG, PASS_ELEMENTS(s_aValues00) }, 9663 { bs3CpuInstr3_vpermpd_YMM8_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues00) }, 9664 { bs3CpuInstr3_vpermpd_YMM8_YMM9_091h_icebp_c64, 255, RM_REG, T_AVX2_256, YMM8, YMM9, NOREG, PASS_ELEMENTS(s_aValues91) }, 9665 { bs3CpuInstr3_vpermpd_YMM8_FSxBX_091h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues91) }, 9666 { bs3CpuInstr3_vpermpd_YMM8_YMM9_0E7h_icebp_c64, 255, RM_REG, T_AVX2_256, YMM8, YMM9, NOREG, PASS_ELEMENTS(s_aValuesE7) }, 9667 { bs3CpuInstr3_vpermpd_YMM8_FSxBX_0E7h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, YMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesE7) }, 9668 9669 { bs3CpuInstr3_vpermpd_YMM1_YMM1_000h_icebp_c64, 255, RM_REG, T_AVX2_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValues00) }, 9670 { bs3CpuInstr3_vpermpd_YMM1_YMM1_091h_icebp_c64, 255, RM_REG, T_AVX2_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValues91) }, 9671 { bs3CpuInstr3_vpermpd_YMM1_YMM1_0E7h_icebp_c64, 255, RM_REG, T_AVX2_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValuesE7) }, 9672 }; 9673 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); 9674 unsigned const iTest = BS3CPUINSTR3_TEST_MODES_INDEX(bMode); 9675 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 9676 g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4)); 9462 9677 } 9463 9678 … … 15925 16140 { "[v]movsd", bs3CpuInstr3_v_movsd, 0 }, 15926 16141 { "[v]movhlps", bs3CpuInstr3_v_movhlps, 0 }, 16142 { "[v]movlhps", bs3CpuInstr3_v_movlhps, 0 }, 15927 16143 { "[v]movlps/[v]movlpd", bs3CpuInstr3_v_movlps_movlpd, 0 }, 15928 16144 { "[v]movhps/[v]movhpd", bs3CpuInstr3_v_movhps_movhpd, 0 }, … … 16046 16262 { "vpermilps", bs3CpuInstr3_vpermilps, 0 }, 16047 16263 { "vpermilpd", bs3CpuInstr3_vpermilpd, 0 }, 16264 { "vpermps", bs3CpuInstr3_vpermps, 0 }, 16265 { "vpermpd", bs3CpuInstr3_vpermpd, 0 }, 16048 16266 #endif 16049 16267 #if defined(ALL_TESTS)
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