Changeset 106924 in vbox
- Timestamp:
- Nov 11, 2024 11:57:12 AM (3 months ago)
- svn:sync-xref-src-repo-rev:
- 165850
- Location:
- trunk/src/VBox/Runtime/testcase
- Files:
-
- 4 edited
-
tstRTR0Thread.cpp (modified) (1 diff)
-
tstRTR0ThreadPreemption.cpp (modified) (1 diff)
-
tstRTR0Timer.cpp (modified) (1 diff)
-
tstTSC.cpp (modified) (11 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/Runtime/testcase/tstRTR0Thread.cpp
r106061 r106924 41 41 #include <iprt/thread.h> 42 42 43 #include <iprt/asm-amd64-x86.h> 43 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 44 # include <iprt/asm-amd64-x86.h> 45 #elif defined(RT_ARCH_ARM64) 46 # include <iprt/asm-arm.h> 47 #endif 44 48 #include <iprt/errcore.h> 45 49 #include <VBox/sup.h> -
trunk/src/VBox/Runtime/testcase/tstRTR0ThreadPreemption.cpp
r106061 r106924 41 41 #include <iprt/thread.h> 42 42 43 #include <iprt/asm-amd64-x86.h> 43 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 44 # include <iprt/asm-amd64-x86.h> 45 #elif defined(RT_ARCH_ARM64) 46 # include <iprt/asm-arm.h> 47 #endif 44 48 #include <iprt/errcore.h> 45 49 #include <iprt/mem.h> -
trunk/src/VBox/Runtime/testcase/tstRTR0Timer.cpp
r106061 r106924 42 42 43 43 #include <iprt/asm.h> 44 #include <iprt/asm-amd64-x86.h> 44 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 45 # include <iprt/asm-amd64-x86.h> 46 #elif defined(RT_ARCH_ARM64) 47 # include <iprt/asm-arm.h> 48 #endif 45 49 #include <iprt/cpuset.h> 46 50 #include <iprt/err.h> -
trunk/src/VBox/Runtime/testcase/tstTSC.cpp
r106061 r106924 39 39 * Header Files * 40 40 *********************************************************************************************************************************/ 41 #include <iprt/asm-amd64-x86.h> 41 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 42 # include <iprt/asm-amd64-x86.h> 43 #elif defined(RT_ARCH_ARM64) 44 # include <iprt/asm-arm.h> 45 #endif 42 46 #include <iprt/asm.h> 43 47 #include <iprt/getopt.h> … … 51 55 52 56 /********************************************************************************************************************************* 57 * Defined Constants And Macros * 58 *********************************************************************************************************************************/ 59 /** @todo this depends on TSC frequency, which is not necessarily related 60 * to the CPU speed on arm. */ 61 #define MAX_TSC_DELTA 2750 /* WARNING: This is just a guess, increase if it doesn't work for you. */ 62 63 64 /********************************************************************************************************************************* 53 65 * Structures and Typedefs * 54 66 *********************************************************************************************************************************/ … … 57 69 /** The TSC. */ 58 70 uint64_t volatile TSC; 59 /** The APIC ID. */60 uint8_t volatile u8ApicId;71 /** The CPU ID or APIC ID. */ 72 RTCPUID volatile idCpu; 61 73 /** Did it succeed? */ 62 74 bool volatile fRead; … … 95 107 96 108 109 /** Wrapper around RTMpCpuId/ASMGetStuff. */ 110 static RTCPUID MyGetCpuId(void) 111 { 112 RTCPUID idCpu = RTMpCpuId(); 113 if (idCpu != NIL_RTCPUID) 114 return idCpu; 115 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 116 return ASMGetApicId(); 117 #elif defined(RT_ARCH_ARM64) 118 return (RTCPUID)ASMGetThreadIdRoEL0(); 119 #else 120 return idCpu; 121 #endif 122 } 123 97 124 /** 98 125 * Thread function for catching the other cpus. … … 124 151 while (!g_fDone) 125 152 { 126 const uint8_t ApicId1 = ASMGetApicId();127 const uint64_t TSC1 128 const uint32_t u32Go 153 const RTCPUID idCpu1 = MyGetCpuId(); 154 const uint64_t TSC1 = ASMReadTSC(); 155 const uint32_t u32Go = g_u32Go; 129 156 if (u32Go == 0) 130 157 continue; … … 133 160 { 134 161 /* do the reading. */ 135 const uint8_t ApicId2 = ASMGetApicId();136 const uint64_t TSC2 137 const uint8_t ApicId3 = ASMGetApicId();138 const uint64_t TSC3 139 const uint8_t ApicId4 = ASMGetApicId();140 141 if ( ApicId1 == ApicId2142 && ApicId1 == ApicId3143 && ApicId1 == ApicId4144 && TSC3 - TSC1 < 2250 /* WARNING: This is just a guess, increase if it doesn't work for you. */162 const RTCPUID idCpu2 = MyGetCpuId(); 163 const uint64_t TSC2 = ASMReadTSC(); 164 const RTCPUID idCpu3 = MyGetCpuId(); 165 const uint64_t TSC3 = ASMReadTSC(); 166 const uint8_t idCpu4 = MyGetCpuId(); 167 168 if ( idCpu1 == idCpu2 169 && idCpu1 == idCpu3 170 && idCpu1 == idCpu4 171 && TSC3 - TSC1 < MAX_TSC_DELTA 145 172 && TSC2 - TSC1 < TSC3 - TSC1 146 173 ) 147 174 { 148 175 /* succeeded. */ 149 pTscData->TSC = TSC2;150 pTscData-> u8ApicId = ApicId1;176 pTscData->TSC = TSC2; 177 pTscData->idCpu = idCpu1; 151 178 pTscData->fFailed = false; 152 pTscData->fRead = true;179 pTscData->fRead = true; 153 180 ASMAtomicIncU32(&g_cRead); 154 181 break; … … 248 275 ASMAtomicXchgSize(&s_aData[i].fFailed, false); 249 276 ASMAtomicXchgSize(&s_aData[i].fRead, false); 250 ASMAtomicXchgU 8(&s_aData[i].u8ApicId, 0xff);277 ASMAtomicXchgU32(&s_aData[i].idCpu, NIL_RTCPUID); 251 278 252 279 int rc = RTThreadUserSignal(s_aData[i].Thread); … … 270 297 /* 271 298 * Flip the "go" switch and do our readings. 272 * We give the other threads the slack it takes to two extra TSC and APICID reads.273 */ 274 const uint8_t ApicId1 = ASMGetApicId();275 const uint64_t TSC1 299 * We give the other threads the slack it takes to two extra TSC and CPU ID reads. 300 */ 301 const RTCPUID idCpu1 = MyGetCpuId(); 302 const uint64_t TSC1 = ASMReadTSC(); 276 303 ASMAtomicXchgU32(&g_u32Go, 1); 277 const uint8_t ApicId2 = ASMGetApicId();278 const uint64_t TSC2 279 const uint8_t ApicId3 = ASMGetApicId();280 const uint64_t TSC3 281 const uint8_t ApicId4 = ASMGetApicId();282 const uint64_t TSC4 304 const RTCPUID idCpu2 = MyGetCpuId(); 305 const uint64_t TSC2 = ASMReadTSC(); 306 const RTCPUID idCpu3 = MyGetCpuId(); 307 const uint64_t TSC3 = ASMReadTSC(); 308 const RTCPUID idCpu4 = MyGetCpuId(); 309 const uint64_t TSC4 = ASMReadTSC(); 283 310 ASMAtomicXchgU32(&g_u32Go, 2); 284 const uint8_t ApicId5 = ASMGetApicId();285 const uint64_t TSC5 286 const uint8_t ApicId6 = ASMGetApicId();311 const RTCPUID idCpu5 = MyGetCpuId(); 312 const uint64_t TSC5 = ASMReadTSC(); 313 const RTCPUID idCpu6 = MyGetCpuId(); 287 314 288 315 /* Compose our own result. */ 289 if ( ApicId1 == ApicId2290 && ApicId1 == ApicId3291 && ApicId1 == ApicId4292 && ApicId1 == ApicId5293 && ApicId1 == ApicId6294 && TSC5 - TSC1 < 2750 /* WARNING: This is just a guess, increase if it doesn't work for you. */316 if ( idCpu1 == idCpu2 317 && idCpu1 == idCpu3 318 && idCpu1 == idCpu4 319 && idCpu1 == idCpu5 320 && idCpu1 == idCpu6 321 && TSC5 - TSC1 < MAX_TSC_DELTA 295 322 && TSC4 - TSC1 < TSC5 - TSC1 296 323 && TSC3 - TSC1 < TSC4 - TSC1 … … 300 327 /* succeeded. */ 301 328 s_aData[0].TSC = TSC2; 302 s_aData[0]. u8ApicId = ApicId1;329 s_aData[0].idCpu = idCpu1; 303 330 s_aData[0].fFailed = false; 304 331 s_aData[0].fRead = true; … … 340 367 { 341 368 for (i = 1, fDone = true; i < cCpus; i++) 342 if (s_aData[i - 1]. u8ApicId > s_aData[i].u8ApicId)369 if (s_aData[i - 1].idCpu > s_aData[i].idCpu) 343 370 { 344 371 TSCDATA Tmp = s_aData[i - 1]; … … 351 378 RTPrintf(" # ID TSC delta0 (decimal)\n" 352 379 "-----------------------------------------\n"); 353 RTPrintf("%2d %02x %RX64\n", 0, s_aData[0]. u8ApicId, s_aData[0].TSC);380 RTPrintf("%2d %02x %RX64\n", 0, s_aData[0].idCpu, s_aData[0].TSC); 354 381 for (i = 1; i < cCpus; i++) 355 RTPrintf("%2d %02x %RX64 %s%lld\n", i, s_aData[i]. u8ApicId, s_aData[i].TSC,382 RTPrintf("%2d %02x %RX64 %s%lld\n", i, s_aData[i].idCpu, s_aData[i].TSC, 356 383 s_aData[i].TSC > s_aData[0].TSC ? "+" : "", s_aData[i].TSC - s_aData[0].TSC); 357 384 RTPrintf("(Needed %u attempt%s.)\n", cTries + 1, cTries ? "s" : "");
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