VirtualBox

Changeset 106952 in vbox


Ignore:
Timestamp:
Nov 12, 2024 9:51:44 AM (2 months ago)
Author:
vboxsync
Message:

VMM/ARM: Implement configuring the GICv3 emulated by Hyper-V. This API is available starting with Windows build 27744 but there is no public SDK for this yet so we have to resort to defining these structures ourselves, bugref:10392

Location:
trunk/src/VBox/VMM
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR3/GICR3Nem-win.cpp

    r106404 r106952  
    7676
    7777
     78/*
     79 * The following definitions appeared in build 27744 allow interacting with the GICv3 controller,
     80 * (there is no official SDK for this yet).
     81 */
     82/** @todo Better way of defining these which doesn't require casting later on when calling APIs. */
     83#define MY_WHV_ARM64_IINTERRUPT_TYPE_FIXED UINT32_C(0)
     84
     85typedef union MY_WHV_INTERRUPT_CONTROL2
     86{
     87    UINT64 AsUINT64;
     88    struct
     89    {
     90        uint32_t InterruptType;
     91        UINT32 Reserved1:2;
     92        UINT32 Asserted:1;
     93        UINT32 Retarget:1;
     94        UINT32 Reserved2:28;
     95    };
     96} MY_WHV_INTERRUPT_CONTROL2;
     97
     98
     99typedef struct MY_WHV_INTERRUPT_CONTROL
     100{
     101    UINT64                  TargetPartition;
     102    MY_WHV_INTERRUPT_CONTROL2  InterruptControl;
     103    UINT64                  DestinationAddress;
     104    UINT32                  RequestedVector;
     105    UINT8                   TargetVtl;
     106    UINT8                   ReservedZ0;
     107    UINT16                  ReservedZ1;
     108} MY_WHV_INTERRUPT_CONTROL;
     109AssertCompileSize(MY_WHV_INTERRUPT_CONTROL, 32);
     110
     111
    78112/*********************************************************************************************************************************
    79113*   Global Variables                                                                                                             *
    … …  
    86120#ifndef IN_SLICKEDIT
    87121# define WHvRequestInterrupt                        g_pfnWHvRequestInterrupt
    88 #endif
    89 
    90 #if 0
    91 /**
    92  * System register ranges for the GICv3.
    93  */
    94 static CPUMSYSREGRANGE const g_aSysRegRanges_GICv3[] =
    95 {
    96     GIC_SYSREGRANGE(ARMV8_AARCH64_SYSREG_ICC_PMR_EL1,   ARMV8_AARCH64_SYSREG_ICC_PMR_EL1,     "ICC_PMR_EL1"),
    97     GIC_SYSREGRANGE(ARMV8_AARCH64_SYSREG_ICC_IAR0_EL1,  ARMV8_AARCH64_SYSREG_ICC_AP0R3_EL1,   "ICC_IAR0_EL1 - ICC_AP0R3_EL1"),
    98     GIC_SYSREGRANGE(ARMV8_AARCH64_SYSREG_ICC_AP1R0_EL1, ARMV8_AARCH64_SYSREG_ICC_NMIAR1_EL1,  "ICC_AP1R0_EL1 - ICC_NMIAR1_EL1"),
    99     GIC_SYSREGRANGE(ARMV8_AARCH64_SYSREG_ICC_DIR_EL1,   ARMV8_AARCH64_SYSREG_ICC_SGI0R_EL1,   "ICC_DIR_EL1 - ICC_SGI0R_EL1"),
    100     GIC_SYSREGRANGE(ARMV8_AARCH64_SYSREG_ICC_IAR1_EL1,  ARMV8_AARCH64_SYSREG_ICC_IGRPEN1_EL1, "ICC_IAR1_EL1 - ICC_IGRPEN1_EL1"),
    101 };
    102122#endif
    103123
    … …  
    120140    PGICHVDEV pThis = PDMDEVINS_2_DATA(pDevIns, PGICHVDEV);
    121141
    122     WHV_INTERRUPT_CONTROL IntrCtrl;
     142    MY_WHV_INTERRUPT_CONTROL IntrCtrl;
    123143    IntrCtrl.TargetPartition                         = 0;
    124     IntrCtrl.InterruptControl.InterruptType          = WHvArm64InterruptTypeFixed;
    125     IntrCtrl.InterruptControl.LevelTriggered         = 1;
    126     IntrCtrl.InterruptControl.LogicalDestinationMode = 0;
     144    IntrCtrl.InterruptControl.InterruptType          = MY_WHV_ARM64_IINTERRUPT_TYPE_FIXED;
     145    IntrCtrl.InterruptControl.Reserved1              = 0;
    127146    IntrCtrl.InterruptControl.Asserted               = fAsserted ? 1 : 0;
    128     IntrCtrl.InterruptControl.Reserved               = 0;
     147    IntrCtrl.InterruptControl.Retarget               = 0;
     148    IntrCtrl.InterruptControl.Reserved2              = 0;
    129149    IntrCtrl.DestinationAddress                      = fPpi ? RT_BIT(idCpu) : 0; /* SGI1R_EL1 */
    130150    IntrCtrl.RequestedVector                         = fPpi ? uIntId : uIntId;
    … …  
    132152    IntrCtrl.ReservedZ0                              = 0;
    133153    IntrCtrl.ReservedZ1                              = 0;
    134     HRESULT hrc = WHvRequestInterrupt(pThis->hPartition, &IntrCtrl, sizeof(IntrCtrl));
     154    HRESULT hrc = WHvRequestInterrupt(pThis->hPartition, (const WHV_INTERRUPT_CONTROL *)&IntrCtrl, sizeof(IntrCtrl));
    135155    if (SUCCEEDED(hrc))
    136156        return VINF_SUCCESS;
    137157
     158    AssertFailed();
    138159    LogFlowFunc(("WHvRequestInterrupt() failed with %Rhrc (Last=%#x/%u)\n", hrc, RTNtLastStatusValue(), RTNtLastErrorValue()));
    139160    return VERR_NEM_IPE_9; /** @todo */
    … …  
    227248     * Validate GIC settings.
    228249     */
    229     PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "DistributorMmioBase|RedistributorMmioBase", "");
     250    PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "DistributorMmioBase|RedistributorMmioBase|ItsMmioBase", "");
    230251
    231252    /*
    … …  
    255276        return PDMDEV_SET_ERROR(pDevIns, rc,
    256277                                N_("Configuration error: Failed to get the \"RedistributorMmioBase\" value"));
    257 
    258     /** @todo Configure the MMIO bases when MS released a new SDK with support for it (currently hard coded in the FDT in the
    259      *        Main constructor):
    260      *     GICD: 0xffff0000
    261      *     GICR: 0xeffee000 (0x20000 per VP)
    262      *     GITS: 0xeff68000
    263      */
    264278
    265279    gicR3HvReset(pDevIns);

  • trunk/src/VBox/VMM/VMMR3/NEMR3Native-win-armv8.cpp

    r106728 r106952  
    6363#include <VBox/vmm/vmcc.h>
    6464
     65#include <iprt/formats/arm-psci.h>
     66
    6567#include <iprt/ldr.h>
    6668#include <iprt/path.h>
    … …  
    7375# define WHvMapGpaRangeFlagTrackDirtyPages      ((WHV_MAP_GPA_RANGE_FLAGS)0x00000008)
    7476#endif
     77
     78
     79/*
     80 * The following definitions appeared in build 27744 allow configuring the base address of the GICv3 controller,
     81 * (there is no official SDK for this yet).
     82 */
     83/** @todo Better way of defining these which doesn't require casting later on when calling APIs. */
     84#define WHV_PARTITION_PROPERTY_CODE_ARM64_IC_PARAMETERS UINT32_C(0x00001012)
     85/** No GIC present. */
     86#define WHV_ARM64_IC_EMULATION_MODE_NONE  0
     87/** Hyper-V emulates a GICv3. */
     88#define WHV_ARM64_IC_EMULATION_MODE_GICV3 1
     89
     90/**
     91 * Configures the interrupt controller emulated by Hyper-V.
     92 */
     93typedef struct MY_WHV_ARM64_IC_PARAMETERS
     94{
     95    uint32_t u32EmulationMode;
     96    uint32_t u32Rsvd;
     97    union
     98    {
     99        struct
     100        {
     101            RTGCPHYS        GCPhysGicdBase;
     102            RTGCPHYS        GCPhysGitsTranslaterBase;
     103            uint32_t        u32Rsvd;
     104            uint32_t        cLpiIntIdBits;
     105            uint32_t        u32PpiCntvOverflw;
     106            uint32_t        u32PpiPmu;
     107            uint32_t        au32Rsvd[6];
     108        } GicV3;
     109    } u;
     110} MY_WHV_ARM64_IC_PARAMETERS;
     111AssertCompileSize(MY_WHV_ARM64_IC_PARAMETERS, 64);
     112
     113
     114/**
     115 * The hypercall exit context.
     116 */
     117typedef struct MY_WHV_HYPERCALL_CONTEXT
     118{
     119    WHV_INTERCEPT_MESSAGE_HEADER Header;
     120    uint16_t                     Immediate;
     121    uint16_t                     u16Rsvd;
     122    uint32_t                     u32Rsvd;
     123    uint64_t                     X[18];
     124} MY_WHV_HYPERCALL_CONTEXT;
     125typedef MY_WHV_HYPERCALL_CONTEXT *PMY_WHV_HYPERCALL_CONTEXT;
     126AssertCompileSize(MY_WHV_HYPERCALL_CONTEXT, 24 + 19 * sizeof(uint64_t));
     127
     128
     129/**
     130 * The exit reason context for arm64, the size is different
     131 * from the default SDK we build against.
     132 */
     133typedef struct MY_WHV_RUN_VP_EXIT_CONTEXT
     134{
     135    WHV_RUN_VP_EXIT_REASON  ExitReason;
     136    uint32_t                u32Rsvd;
     137    uint64_t                u64Rsvd;
     138    union
     139    {
     140        WHV_MEMORY_ACCESS_CONTEXT           MemoryAccess;
     141        WHV_RUN_VP_CANCELED_CONTEXT         CancelReason;
     142        MY_WHV_HYPERCALL_CONTEXT            Hypercall;
     143        WHV_UNRECOVERABLE_EXCEPTION_CONTEXT UnrecoverableException;
     144        uint64_t au64Rsvd2[32];
     145    };
     146} MY_WHV_RUN_VP_EXIT_CONTEXT;
     147typedef MY_WHV_RUN_VP_EXIT_CONTEXT *PMY_WHV_RUN_VP_EXIT_CONTEXT;
     148AssertCompileSize(MY_WHV_RUN_VP_EXIT_CONTEXT, 272);
     149
     150#define My_WHvArm64RegisterGicrBaseGpa ((WHV_REGISTER_NAME)UINT32_C(0x00063000))
    75151
    76152
    … …  
    101177static decltype(WHvGetVirtualProcessorRegisters) *  g_pfnWHvGetVirtualProcessorRegisters;
    102178static decltype(WHvSetVirtualProcessorRegisters) *  g_pfnWHvSetVirtualProcessorRegisters;
     179//static decltype(WHvGetVirtualProcessorState) *      g_pfnWHvGetVirtualProcessorState;
    103180decltype(WHvRequestInterrupt) *                     g_pfnWHvRequestInterrupt;
    104181/** @} */
    … …  
    137214    NEM_WIN_IMPORT(0, false, WHvGetVirtualProcessorRegisters),
    138215    NEM_WIN_IMPORT(0, false, WHvSetVirtualProcessorRegisters),
     216//    NEM_WIN_IMPORT(0, false, WHvGetVirtualProcessorState),
    139217    NEM_WIN_IMPORT(0, false, WHvRequestInterrupt),
    140218#undef NEM_WIN_IMPORT
    … …  
    163241# define WHvGetVirtualProcessorRegisters            g_pfnWHvGetVirtualProcessorRegisters
    164242# define WHvSetVirtualProcessorRegisters            g_pfnWHvSetVirtualProcessorRegisters
     243//# define WHvGetVirtualProcessorState                g_pfnWHvGetVirtualProcessorState
    165244# define WHvRequestInterrupt                        g_pfnWHvRequestInterrupt
    166245
    … …  
    525604
    526605/**
     606 * Initializes the GIC controller emulation provided by Hyper-V.
     607 *
     608 * @returns VBox status code.
     609 * @param   pVM             The cross context VM structure.
     610 *
     611 * @note Needs to be done early when setting up the partition so this has to live here and not in GICNem-win.cpp
     612 */
     613static int nemR3WinGicCreate(PVM pVM)
     614{
     615    PCFGMNODE pGicCfg = CFGMR3GetChild(CFGMR3GetRoot(pVM), "Devices/gic-nem/0/Config");
     616    AssertPtrReturn(pGicCfg, VERR_NEM_IPE_5);
     617
     618    /*
     619     * Query the MMIO ranges.
     620     */
     621    RTGCPHYS GCPhysMmioBaseDist = 0;
     622    int rc = CFGMR3QueryU64(pGicCfg, "DistributorMmioBase", &GCPhysMmioBaseDist);
     623    if (RT_FAILURE(rc))
     624        return VMSetError(pVM, rc, RT_SRC_POS,
     625                          "Configuration error: Failed to get the \"DistributorMmioBase\" value\n");
     626
     627    RTGCPHYS GCPhysMmioBaseReDist = 0;
     628    rc = CFGMR3QueryU64(pGicCfg, "RedistributorMmioBase", &GCPhysMmioBaseReDist);
     629    if (RT_FAILURE(rc))
     630        return VMSetError(pVM, rc, RT_SRC_POS,
     631                          "Configuration error: Failed to get the \"RedistributorMmioBase\" value\n");
     632
     633    RTGCPHYS GCPhysMmioBaseIts = 0;
     634    rc = CFGMR3QueryU64(pGicCfg, "ItsMmioBase", &GCPhysMmioBaseIts);
     635    if (RT_FAILURE(rc))
     636        return VMSetError(pVM, rc, RT_SRC_POS,
     637                          "Configuration error: Failed to get the \"ItsMmioBase\" value\n");
     638
     639    /*
     640     * One can only set the GIC distributor base. The re-distributor regions for the individual
     641     * vCPUs are configured when the vCPUs are created, so we need to save the base of the MMIO region.
     642     */
     643    pVM->nem.s.GCPhysMmioBaseReDist = GCPhysMmioBaseReDist;
     644
     645    WHV_PARTITION_HANDLE hPartition = pVM->nem.s.hPartition;
     646
     647    MY_WHV_ARM64_IC_PARAMETERS Property; RT_ZERO(Property);
     648    Property.u32EmulationMode                 = WHV_ARM64_IC_EMULATION_MODE_GICV3;
     649    Property.u.GicV3.GCPhysGicdBase           = GCPhysMmioBaseDist;
     650    Property.u.GicV3.GCPhysGitsTranslaterBase = GCPhysMmioBaseIts;
     651    Property.u.GicV3.cLpiIntIdBits            = 1; /** @todo LPIs are currently not supported with our device emulations. */
     652    Property.u.GicV3.u32PpiCntvOverflw        = pVM->nem.s.u32GicPpiVTimer + 16; /* Calculate the absolute timer INTID. */
     653    Property.u.GicV3.u32PpiPmu                = 23; /** @todo Configure dynamically (from SBSA, needs a PMU/NEM emulation just like with the GIC probably). */
     654    HRESULT hrc = WHvSetPartitionProperty(hPartition, (WHV_PARTITION_PROPERTY_CODE)WHV_PARTITION_PROPERTY_CODE_ARM64_IC_PARAMETERS, &Property, sizeof(Property));
     655    if (FAILED(hrc))
     656        return VMSetError(pVM, VERR_NEM_VM_CREATE_FAILED, RT_SRC_POS,
     657                          "Failed to set WHvPartitionPropertyCodeArm64IcParameters: %Rhrc (Last=%#x/%u)",
     658                          hrc, RTNtLastStatusValue(), RTNtLastErrorValue());
     659
     660    return rc;
     661}
     662
     663
     664/**
    527665 * Creates and sets up a Hyper-V (exo) partition.
    528666 *
    … …  
    642780                          "Failed to set WHvPartitionPropertyCodeProcessorFeatures to %'#RX64: %Rhrc (Last=%#x/%u)",
    643781                          pVM->nem.s.uCpuFeatures.u64, hrc, RTNtLastStatusValue(), RTNtLastErrorValue());
     782
     783    /* Configure the GIC. */
     784    int rc = nemR3WinGicCreate(pVM);
     785    if (RT_FAILURE(rc))
     786        return rc;
    644787
    645788    /*
    … …  
    681824            CPUMIDREGS IdRegs; RT_ZERO(IdRegs);
    682825
    683 #if 1
     826#if 0
    684827            WHV_REGISTER_NAME  aenmNames[12];
    685828            WHV_REGISTER_VALUE aValues[12];
    … …  
    731874#endif
    732875
    733             int rc = CPUMR3PopulateFeaturesByIdRegisters(pVM, &IdRegs);
     876            rc = CPUMR3PopulateFeaturesByIdRegisters(pVM, &IdRegs);
    734877            if (RT_FAILURE(rc))
    735878                return rc;
    736879        }
    737     }
     880
     881        /* Configure the GIC re-distributor region for the GIC. */
     882        WHV_REGISTER_NAME  enmName = My_WHvArm64RegisterGicrBaseGpa;
     883        WHV_REGISTER_VALUE Value;
     884        Value.Reg64 = pVM->nem.s.GCPhysMmioBaseReDist + idCpu * _128K;
     885
     886        hrc = WHvSetVirtualProcessorRegisters(hPartition, idCpu, &enmName, 1, &Value);
     887        AssertLogRelMsgReturn(SUCCEEDED(hrc),
     888                              ("WHvSetVirtualProcessorRegisters(%p, %u, WHvArm64RegisterGicrBaseGpa,) -> %Rhrc (Last=%#x/%u)\n",
     889                               hPartition, idCpu, hrc, RTNtLastStatusValue(), RTNtLastErrorValue())
     890                              , VERR_NEM_SET_REGISTERS_FAILED);
     891    }
     892
    738893    pVM->nem.s.fCreatedEmts = true;
    739894
    … …  
    18111966 */
    18121967NEM_TMPL_STATIC VBOXSTRICTRC
    1813 nemR3WinHandleExitMemory(PVMCC pVM, PVMCPUCC pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
     1968nemR3WinHandleExitMemory(PVMCC pVM, PVMCPUCC pVCpu, MY_WHV_RUN_VP_EXIT_CONTEXT const *pExit)
    18141969{
    18151970    uint64_t const uHostTsc = ASMReadTSC();
    … …  
    19242079
    19252080/**
     2081 * Deals with memory access exits (WHvRunVpExitReasonMemoryAccess).
     2082 *
     2083 * @returns Strict VBox status code.
     2084 * @param   pVM             The cross context VM structure.
     2085 * @param   pVCpu           The cross context per CPU structure.
     2086 * @param   pExit           The VM exit information to handle.
     2087 * @sa      nemHCWinHandleMessageMemory
     2088 */
     2089NEM_TMPL_STATIC VBOXSTRICTRC
     2090nemR3WinHandleExitHypercall(PVMCC pVM, PVMCPUCC pVCpu, MY_WHV_RUN_VP_EXIT_CONTEXT const *pExit)
     2091{
     2092    VBOXSTRICTRC rcStrict = VINF_SUCCESS;
     2093
     2094    /** @todo Raise exception to EL1 if PSCI not configured. */
     2095    /** @todo Need a generic mechanism here to pass this to, GIM maybe?. */
     2096    uint32_t uFunId = pExit->Hypercall.Immediate;
     2097    bool fHvc64 = RT_BOOL(uFunId & ARM_SMCCC_FUNC_ID_64BIT); RT_NOREF(fHvc64);
     2098    uint32_t uEntity = ARM_SMCCC_FUNC_ID_ENTITY_GET(uFunId);
     2099    uint32_t uFunNum = ARM_SMCCC_FUNC_ID_NUM_GET(uFunId);
     2100    if (uEntity == ARM_SMCCC_FUNC_ID_ENTITY_STD_SEC_SERVICE)
     2101    {
     2102        switch (uFunNum)
     2103        {
     2104            case ARM_PSCI_FUNC_ID_PSCI_VERSION:
     2105                nemR3WinSetGReg(pVCpu, ARMV8_AARCH64_REG_X0, false /*f64BitReg*/, false /*fSignExtend*/, ARM_PSCI_FUNC_ID_PSCI_VERSION_SET(1, 2));
     2106                break;
     2107            case ARM_PSCI_FUNC_ID_SYSTEM_OFF:
     2108                rcStrict = VMR3PowerOff(pVM->pUVM);
     2109                break;
     2110            case ARM_PSCI_FUNC_ID_SYSTEM_RESET:
     2111            case ARM_PSCI_FUNC_ID_SYSTEM_RESET2:
     2112            {
     2113                bool fHaltOnReset;
     2114                int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
     2115                if (RT_SUCCESS(rc) && fHaltOnReset)
     2116                {
     2117                    Log(("nemHCLnxHandleExitHypercall: Halt On Reset!\n"));
     2118                    rcStrict = VINF_EM_HALT;
     2119                }
     2120                else
     2121                {
     2122                    /** @todo pVM->pdm.s.fResetFlags = fFlags; */
     2123                    VM_FF_SET(pVM, VM_FF_RESET);
     2124                    rcStrict = VINF_EM_RESET;
     2125                }
     2126                break;
     2127            }
     2128            case ARM_PSCI_FUNC_ID_CPU_ON:
     2129            {
     2130                uint64_t u64TgtCpu      = pExit->Hypercall.X[1];
     2131                RTGCPHYS GCPhysExecAddr = pExit->Hypercall.X[2];
     2132                uint64_t u64CtxId       = pExit->Hypercall.X[3];
     2133                VMMR3CpuOn(pVM, u64TgtCpu & 0xff, GCPhysExecAddr, u64CtxId);
     2134                nemR3WinSetGReg(pVCpu, ARMV8_AARCH64_REG_X0, true /*f64BitReg*/, false /*fSignExtend*/, ARM_PSCI_STS_SUCCESS);
     2135                break;
     2136            }
     2137            case ARM_PSCI_FUNC_ID_PSCI_FEATURES:
     2138            {
     2139                uint32_t u32FunNum = (uint32_t)pExit->Hypercall.X[1];
     2140                switch (u32FunNum)
     2141                {
     2142                    case ARM_PSCI_FUNC_ID_PSCI_VERSION:
     2143                    case ARM_PSCI_FUNC_ID_SYSTEM_OFF:
     2144                    case ARM_PSCI_FUNC_ID_SYSTEM_RESET:
     2145                    case ARM_PSCI_FUNC_ID_SYSTEM_RESET2:
     2146                    case ARM_PSCI_FUNC_ID_CPU_ON:
     2147                        nemR3WinSetGReg(pVCpu, ARMV8_AARCH64_REG_X0,
     2148                                        false /*f64BitReg*/, false /*fSignExtend*/,
     2149                                        (uint64_t)ARM_PSCI_STS_SUCCESS);
     2150                        break;
     2151                    default:
     2152                        nemR3WinSetGReg(pVCpu, ARMV8_AARCH64_REG_X0,
     2153                                        false /*f64BitReg*/, false /*fSignExtend*/,
     2154                                        (uint64_t)ARM_PSCI_STS_NOT_SUPPORTED);
     2155                }
     2156                break;
     2157            }
     2158            default:
     2159                nemR3WinSetGReg(pVCpu, ARMV8_AARCH64_REG_X0, false /*f64BitReg*/, false /*fSignExtend*/, (uint64_t)ARM_PSCI_STS_NOT_SUPPORTED);
     2160        }
     2161    }
     2162    else
     2163        nemR3WinSetGReg(pVCpu, ARMV8_AARCH64_REG_X0, false /*f64BitReg*/, false /*fSignExtend*/, (uint64_t)ARM_PSCI_STS_NOT_SUPPORTED);
     2164
     2165
     2166    return rcStrict;
     2167}
     2168
     2169
     2170/**
    19262171 * Deals with MSR access exits (WHvRunVpExitReasonUnrecoverableException).
    19272172 *
    … …  
    19322177 * @sa      nemHCWinHandleMessageUnrecoverableException
    19332178 */
    1934 NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExitUnrecoverableException(PVMCC pVM, PVMCPUCC pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
     2179NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExitUnrecoverableException(PVMCC pVM, PVMCPUCC pVCpu, MY_WHV_RUN_VP_EXIT_CONTEXT const *pExit)
    19352180{
    19362181#if 0
    … …  
    19662211 * @sa      nemHCWinHandleMessage
    19672212 */
    1968 NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExit(PVMCC pVM, PVMCPUCC pVCpu, WHV_RUN_VP_EXIT_CONTEXT const *pExit)
     2213NEM_TMPL_STATIC VBOXSTRICTRC nemR3WinHandleExit(PVMCC pVM, PVMCPUCC pVCpu, MY_WHV_RUN_VP_EXIT_CONTEXT const *pExit)
    19692214{
    19702215    int rc = nemHCWinCopyStateFromHyperV(pVM, pVCpu, CPUMCTX_EXTRN_ALL);
    … …  
    19852230            Log4(("CanceledExit/%u\n", pVCpu->idCpu));
    19862231            return VINF_SUCCESS;
     2232
     2233        case WHvRunVpExitReasonHypercall:
     2234            return nemR3WinHandleExitHypercall(pVM, pVCpu, pExit);
    19872235
    19882236        case WHvRunVpExitReasonUnrecoverableException:
    … …  
    21222370                }
    21232371#endif
    2124                 WHV_RUN_VP_EXIT_CONTEXT ExitReason = {0};
     2372                MY_WHV_RUN_VP_EXIT_CONTEXT ExitReason = {0};
    21252373                TMNotifyStartOfExecution(pVM, pVCpu);
    21262374
    … …  
    22162464        pVCpu->cpum.GstCtx.fExtrn = 0;
    22172465    }
     2466
     2467#if 0
     2468    UINT32 cbWritten;
     2469    WHV_ARM64_LOCAL_INTERRUPT_CONTROLLER_STATE IntrState;
     2470    HRESULT hrc = WHvGetVirtualProcessorState(pVM->nem.s.hPartition, pVCpu->idCpu, WHvVirtualProcessorStateTypeInterruptControllerState2,
     2471                                              &IntrState, sizeof(IntrState), &cbWritten);
     2472    AssertLogRelMsgReturn(SUCCEEDED(hrc),
     2473                          ("WHvGetVirtualProcessorState(%p, %u,WHvVirtualProcessorStateTypeInterruptControllerState2,) -> %Rhrc (Last=%#x/%u)\n",
     2474                           pVM->nem.s.hPartition, pVCpu->idCpu, hrc, RTNtLastStatusValue(), RTNtLastErrorValue())
     2475                          , VERR_NEM_GET_REGISTERS_FAILED);
     2476    LogFlowFunc(("IntrState: cbWritten=%u\n"));
     2477    for (uint32_t i = 0; i < RT_ELEMENTS(IntrState.BankedInterruptState); i++)
     2478    {
     2479        WHV_ARM64_INTERRUPT_STATE *pState = &IntrState.BankedInterruptState[i];
     2480        LogFlowFunc(("IntrState: Intr %u:\n"
     2481                     "    Enabled=%RTbool\n"
     2482                     "    EdgeTriggered=%RTbool\n"
     2483                     "    Asserted=%RTbool\n"
     2484                     "    SetPending=%RTbool\n"
     2485                     "    Active=%RTbool\n"
     2486                     "    Direct=%RTbool\n"
     2487                     "    GicrIpriorityrConfigured=%u\n"
     2488                     "    GicrIpriorityrActive=%u\n",
     2489                     i, pState->Enabled, pState->EdgeTriggered, pState->Asserted, pState->SetPending, pState->Active, pState->Direct,
     2490                     pState->GicrIpriorityrConfigured, pState->GicrIpriorityrActive));
     2491    }
     2492#endif
    22182493
    22192494#if 0

  • trunk/src/VBox/VMM/include/NEMInternal.h

    r106061 r106952  
    315315        uint64_t                cPagesInUse;
    316316    } R0Stats;
     317
     318# if defined(VBOX_VMM_TARGET_ARMV8)
     319    RTGCPHYS                    GCPhysMmioBaseReDist;
     320# endif
    317321
    318322#elif defined(RT_OS_DARWIN)
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