VirtualBox

Ignore:
Timestamp:
Nov 18, 2024 6:54:02 AM (6 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
165963
Message:

ValidationKit/bootsectors: unify the instr-4 test tables across execution modes; bugref:10658; jiraref:VBP-1205

The roundxx instructions pushed data size too big to fit in the image.
This saves a chunk of space while simplifying source maintenance &
improving test result interpretation.

  • add macros to make unification work
  • replace 3 tables in each instruction's test function with 1 unified table
  • each entry in the new table has 3x pointers for the actual opcode functions
File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4.c32

    r106974 r107021  
    5050*   Defined Constants And Macros                                                                                                 *
    5151*********************************************************************************************************************************/
    52 /** Converts an execution mode (BS3_MODE_XXX) into an index into an array
    53  *  initialized by BS3CPUINSTR4_TEST1_MODES_INIT etc. */
    54 #define BS3CPUINSTR4_TEST_MODES_INDEX(a_bMode) (BS3_MODE_IS_16BIT_CODE(bMode) ? 0 : BS3_MODE_IS_32BIT_CODE(bMode) ? 1 : 2)
    55 
    5652/** Maximum length for the names of all SIMD FP exception flags combined. */
    5753#define FP_XCPT_FLAGS_NAMES_MAXLEN          sizeof(" IE DE ZE OE UE PE ")
    5854/** Maximum length for the names of all SIMD FP exception masks combined. */
    59 #define FP_XCPT_MASKS_NAMES_MAXLEN          sizeof(" IE DE ZE OE UE PE ")
     55#define FP_XCPT_MASKS_NAMES_MAXLEN          sizeof(" IM DM ZM OM UM PM ")
    6056/** Maximum length for the names of all SIMD FP exception other bits combined. */
    6157#define FP_XCPT_OTHERS_NAMES_MAXLEN         sizeof(" DAZ FZ MM RC=NEAREST ")
    … …  
    24422438
    24432439
     2440/** Utility macro for generally passing an array along with its length. */
     2441#define PASS_ARRAY(s_aArray)    RT_ELEMENTS(s_aArray), s_aArray
     2442
     2443/** Utility macro for inserting value table references into test arrays. */
     2444#define PASS_TEST_ARRAY(s_aArray)   RT_ELEMENTS(s_aArray), (BS3CPUINSTR4_TEST1_VALUES_T *)s_aArray
     2445
     2446/** Table-building macros for inserting instruction-test functions into test arrays. */
     2447#define BS3_INSTR4_ONE(instr_stuff, bits) bs3CpuInstr4_ ## instr_stuff ## _icebp_c ## bits
     2448#define BS3_INSTR4_ALL(instr_stuff)       BS3_INSTR4_ONE(instr_stuff, 16), BS3_INSTR4_ONE(instr_stuff, 32), BS3_INSTR4_ONE(instr_stuff, 64)
     2449#define BS3_INSTR4_386(instr_stuff)       BS3_INSTR4_ONE(instr_stuff, 16), BS3_INSTR4_ONE(instr_stuff, 32), NULL
     2450#define BS3_INSTR4_C64(instr_stuff)       NULL,                            NULL,                            BS3_INSTR4_ONE(instr_stuff, 64)
     2451
     2452
    24442453/*
    24452454 * Test type #1.
    … …  
    25912600typedef struct BS3CPUINSTR4_TEST1_T
    25922601{
    2593     FPFNBS3FAR          pfnWorker;           /**< Test function worker. */
     2602    FPFNBS3FAR          pfnWorker_16;        /**< Test function worker for 16-bit execution modes. */
     2603    FPFNBS3FAR          pfnWorker_32;        /**< Test function worker for 32-bit execution modes. */
     2604    FPFNBS3FAR          pfnWorker_64;        /**< Test function worker for 64-bit execution modes. */
    25942605    uint8_t             bAltXcpt;            /**< AVX misalignment exception, or always-expected exception. */
    25952606    uint8_t             enmRm;               /**< R/M type. */
    … …  
    26132624    unsigned                            cTests;
    26142625} BS3CPUINSTR4_TEST1_MODE_T;
    2615 
    2616 /** Initializer for a BS3CPUINSTR4_TEST1_MODE_T array (three entries). */
    2617 #define BS3CPUINSTR4_TEST1_MODES_INIT(a_aTests16, a_aTests32, a_aTests64) \
    2618     { { a_aTests16, RT_ELEMENTS(a_aTests16) }, { a_aTests32, RT_ELEMENTS(a_aTests32) }, { a_aTests64, RT_ELEMENTS(a_aTests64) } }
    2619 
    2620 /** Utility macro for inserting value table references into test arrays. */
    2621 #define PASS_ELEMENTS(s_aArray)   RT_ELEMENTS(s_aArray), (BS3CPUINSTR4_TEST1_VALUES_T *)s_aArray
    26222626
    26232627typedef struct BS3CPUINSTR4_TEST1_CTX_T
    … …  
    26922696    uint8_t BS3_FAR *puMemOpAlias        = pTestCtx->puMemOpAlias;
    26932697    uint8_t          cbMemOp             = pTestCtx->cbMemOp;
    2694     uint8_t const    cbInstr             = ((uint8_t const BS3_FAR *)(uintptr_t)pTestCtx->pTest->pfnWorker)[-1];
    26952698    uint8_t          bXcptExpect         = pTestCtx->bXcptExpect;
    26962699    bool const       fNonFpOK            = bXcptExpect == X86_XCPT_DB;
    … …  
    29202923         * Prepare globals and execute.
    29212924         */
    2922         cbBytesExecuted = (fNonFpOK && !fFpXcptExpected) ? cbInstr + 1 : 0;
     2925        cbBytesExecuted = (fNonFpOK && !fFpXcptExpected) ? pTestCtx->cbInstr + 1 : 0;
    29232926        g_uBs3TrapEipHint = pCtx->rip.u32 + cbBytesExecuted;
    29242927        Bs3TrapSetJmpAndRestoreWithExtCtxAndRm(pCtx, pExtCtx, pTrapFrame, pExtCtxOut);
    … …  
    30373040 * Test type #1 worker.
    30383041 */
    3039 static uint8_t bs3CpuInstr4_WorkerTestType1(uint8_t bMode, BS3CPUINSTR4_TEST1_T const BS3_FAR *paTests, unsigned cTests,
    3040                                             PCBS3CPUINSTR4_CONFIG_T paConfigs, unsigned cConfigs)
     3042static uint8_t bs3CpuInstr4_WorkerTestType1(uint8_t bMode, unsigned cTests, BS3CPUINSTR4_TEST1_T const BS3_FAR *paTests,
     3043                                            unsigned cConfigs, PCBS3CPUINSTR4_CONFIG_T paConfigs)
    30413044{
    30423045    BS3REGCTX                   Ctx;
    … …  
    30943097                {
    30953098                    BS3CPUINSTR4_TEST1_T const BS3_FAR *pTest = &paTests[iTest];
     3099                    FPFNBS3FAR const  pfnWorker     = BS3_MODE_IS_16BIT_CODE(bMode) ? pTest->pfnWorker_16
     3100                                                    : BS3_MODE_IS_32BIT_CODE(bMode) ? pTest->pfnWorker_32
     3101                                                                                    : pTest->pfnWorker_64;
    30963102                    unsigned const    cValues       = pTest->cValues;
    30973103                    bool const        fSseInstr     = bs3CpuInstr4IsSse(pTest->enmType);
    … …  
    31153121                    unsigned         iVal;
    31163122
     3123                    /* Some tests are for specific modes only. */
     3124                    if (!pfnWorker)
     3125                        continue;
     3126
    31173127                    /* If testing unaligned memory accesses (or #PF), skip register-only tests.  This
    31183128                       allows setting bXcptSse and bXcptAvx to reflect the misaligned exceptions. */
    … …  
    31363146                        bXcptExpect = X86_XCPT_PF;
    31373147
    3138                     Bs3RegCtxSetRipCsFromCurPtr(&Ctx, pTest->pfnWorker);
     3148                    Bs3RegCtxSetRipCsFromCurPtr(&Ctx, pfnWorker);
    31393149
    31403150                    /*
    … …  
    31753185                            TestCtx.bXcptExpect  = bXcptExpect;
    31763186                            TestCtx.idTestStep   = idTestStep;
     3187                            TestCtx.cbInstr      = ((uint8_t const BS3_FAR *)(uintptr_t)pfnWorker)[-1];
    31773188                            Bs3StrPrintf(szTestIdStr, TESTID_MAXSIZE, "%s: ring-%d/%u:%s/tst#%u/val#%u",
    31783189                                         pszMode, bRing, iCfg, paConfigs[iCfg].pszCfgName, iTest, iVal);
    … …  
    35333544    };
    35343545
    3535     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     3546    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    35363547    {
    3537         { bs3CpuInstr4_addps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    3538         { bs3CpuInstr4_addps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3539 
    3540         { bs3CpuInstr4_vaddps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    3541         { bs3CpuInstr4_vaddps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3542 
    3543         { bs3CpuInstr4_vaddps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues)   },
    3544         { bs3CpuInstr4_vaddps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3545 
    3546         { bs3CpuInstr4_addps_XMM1_XMM1_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    3547         { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValuesSR) },
    3548         { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesSR) },
    3549         { bs3CpuInstr4_vaddps_YMM1_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
     3548        { BS3_INSTR4_ALL(addps_XMM1_XMM2),        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     3549        { BS3_INSTR4_ALL(addps_XMM1_FSxBX),       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     3550
     3551        { BS3_INSTR4_ALL(vaddps_XMM1_XMM2_XMM3),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues)   },
     3552        { BS3_INSTR4_ALL(vaddps_XMM1_XMM2_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     3553
     3554        { BS3_INSTR4_ALL(vaddps_YMM1_YMM2_YMM3),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues)   },
     3555        { BS3_INSTR4_ALL(vaddps_YMM1_YMM2_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     3556
     3557        { BS3_INSTR4_C64(addps_XMM8_XMM9),        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues)   },
     3558        { BS3_INSTR4_C64(addps_XMM8_FSxBX),       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     3559
     3560        { BS3_INSTR4_C64(vaddps_XMM8_XMM9_XMM10), 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues)   },
     3561        { BS3_INSTR4_C64(vaddps_XMM8_XMM9_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     3562        { BS3_INSTR4_C64(vaddps_YMM8_YMM9_YMM10), 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues)   },
     3563        { BS3_INSTR4_C64(vaddps_YMM8_YMM9_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     3564
     3565        { BS3_INSTR4_ALL(addps_XMM1_XMM1),        255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     3566        { BS3_INSTR4_C64(addps_XMM8_XMM8),        255, RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     3567        { BS3_INSTR4_ALL(vaddps_YMM1_YMM1_YMM1),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     3568        { BS3_INSTR4_C64(vaddps_YMM8_YMM8_YMM8),  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     3569        { BS3_INSTR4_ALL(vaddps_YMM1_YMM1_YMM2),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     3570        { BS3_INSTR4_ALL(vaddps_YMM1_YMM1_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_TEST_ARRAY(s_aValuesSR) },
    35503571    };
    3551     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    3552     {
    3553         { bs3CpuInstr4_addps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    3554         { bs3CpuInstr4_addps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3555 
    3556         { bs3CpuInstr4_vaddps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    3557         { bs3CpuInstr4_vaddps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3558 
    3559         { bs3CpuInstr4_vaddps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues)   },
    3560         { bs3CpuInstr4_vaddps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3561 
    3562         { bs3CpuInstr4_addps_XMM1_XMM1_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    3563         { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValuesSR) },
    3564         { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesSR) },
    3565         { bs3CpuInstr4_vaddps_YMM1_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    3566     };
    3567     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    3568     {
    3569         { bs3CpuInstr4_addps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    3570         { bs3CpuInstr4_addps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3571 
    3572         { bs3CpuInstr4_vaddps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    3573         { bs3CpuInstr4_vaddps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3574 
    3575         { bs3CpuInstr4_vaddps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues)   },
    3576         { bs3CpuInstr4_vaddps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3577 
    3578         { bs3CpuInstr4_addps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues)   },
    3579         { bs3CpuInstr4_addps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3580 
    3581         { bs3CpuInstr4_vaddps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues)   },
    3582         { bs3CpuInstr4_vaddps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3583         { bs3CpuInstr4_vaddps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues)   },
    3584         { bs3CpuInstr4_vaddps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3585 
    3586         { bs3CpuInstr4_addps_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    3587         { bs3CpuInstr4_addps_XMM8_XMM8_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    3588         { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValuesSR) },
    3589         { bs3CpuInstr4_vaddps_YMM8_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_ELEMENTS(s_aValuesSR) },
    3590         { bs3CpuInstr4_vaddps_YMM1_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesSR) },
    3591         { bs3CpuInstr4_vaddps_YMM1_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    3592     };
    3593 
    3594     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    3595     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    3596     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    3597                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     3572
     3573    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    35983574}
    35993575
    … …  
    38363812    };
    38373813
    3838     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     3814    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    38393815    {
    3840         { bs3CpuInstr4_addpd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    3841         { bs3CpuInstr4_addpd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3842 
    3843         { bs3CpuInstr4_vaddpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    3844         { bs3CpuInstr4_vaddpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3845 
    3846         { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues)   },
    3847         { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3848 
    3849         { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    3850         { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM1_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValuesSR) },
    3851         { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM2_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesSR) },
    3852         { bs3CpuInstr4_vaddpd_YMM1_YMM1_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
     3816        { BS3_INSTR4_ALL(addpd_XMM1_XMM2),        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     3817        { BS3_INSTR4_ALL(addpd_XMM1_FSxBX),       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     3818
     3819        { BS3_INSTR4_ALL(vaddpd_XMM1_XMM2_XMM3),  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues)   },
     3820        { BS3_INSTR4_ALL(vaddpd_XMM1_XMM2_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     3821
     3822        { BS3_INSTR4_ALL(vaddpd_YMM1_YMM2_YMM3),  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues)   },
     3823        { BS3_INSTR4_ALL(vaddpd_YMM1_YMM2_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     3824
     3825        { BS3_INSTR4_C64(addpd_XMM8_XMM9),        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues)   },
     3826        { BS3_INSTR4_C64(addpd_XMM8_FSxBX),       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     3827
     3828        { BS3_INSTR4_C64(vaddpd_XMM8_XMM9_XMM10), X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues)   },
     3829        { BS3_INSTR4_C64(vaddpd_XMM8_XMM9_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     3830        { BS3_INSTR4_C64(vaddpd_YMM8_YMM9_YMM10), X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues)   },
     3831        { BS3_INSTR4_C64(vaddpd_YMM8_YMM9_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     3832
     3833        { BS3_INSTR4_ALL(addpd_XMM1_XMM1),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     3834        { BS3_INSTR4_C64(addpd_XMM8_XMM8),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     3835        { BS3_INSTR4_ALL(vaddpd_YMM1_YMM1_YMM1),  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     3836        { BS3_INSTR4_C64(vaddpd_YMM8_YMM8_YMM8),  X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     3837        { BS3_INSTR4_ALL(vaddpd_YMM1_YMM1_YMM2),  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     3838        { BS3_INSTR4_ALL(vaddpd_YMM1_YMM1_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_TEST_ARRAY(s_aValuesSR) },
    38533839    };
    3854     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    3855     {
    3856         { bs3CpuInstr4_addpd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    3857         { bs3CpuInstr4_addpd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3858 
    3859         { bs3CpuInstr4_vaddpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    3860         { bs3CpuInstr4_vaddpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3861 
    3862         { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues)   },
    3863         { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3864 
    3865         { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    3866         { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM1_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValuesSR) },
    3867         { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM2_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesSR) },
    3868         { bs3CpuInstr4_vaddpd_YMM1_YMM1_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    3869     };
    3870     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    3871     {
    3872         { bs3CpuInstr4_addpd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    3873         { bs3CpuInstr4_addpd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3874 
    3875         { bs3CpuInstr4_vaddpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    3876         { bs3CpuInstr4_vaddpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3877 
    3878         { bs3CpuInstr4_vaddpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues)   },
    3879         { bs3CpuInstr4_vaddpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3880 
    3881         { bs3CpuInstr4_addpd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues)   },
    3882         { bs3CpuInstr4_addpd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3883 
    3884         { bs3CpuInstr4_vaddpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues)   },
    3885         { bs3CpuInstr4_vaddpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3886         { bs3CpuInstr4_vaddpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues)   },
    3887         { bs3CpuInstr4_vaddpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    3888 
    3889         { bs3CpuInstr4_addpd_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    3890         { bs3CpuInstr4_addpd_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    3891         { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM1_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValuesSR) },
    3892         { bs3CpuInstr4_vaddpd_YMM8_YMM8_YMM8_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_ELEMENTS(s_aValuesSR) },
    3893         { bs3CpuInstr4_vaddpd_YMM1_YMM1_YMM2_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesSR) },
    3894         { bs3CpuInstr4_vaddpd_YMM1_YMM1_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    3895     };
    3896 
    3897     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    3898     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    3899     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    3900                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     3840
     3841    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    39013842}
    39023843
    … …  
    41864127    };
    41874128
    4188     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     4129    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    41894130    {
    4190         { bs3CpuInstr4_addss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    4191         { bs3CpuInstr4_addss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4192 
    4193         { bs3CpuInstr4_vaddss_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    4194         { bs3CpuInstr4_vaddss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4195 
    4196         { bs3CpuInstr4_addss_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4197         { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4198         { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM2_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    4199         { bs3CpuInstr4_vaddss_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
     4131        { BS3_INSTR4_ALL(addss_XMM1_XMM2),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     4132        { BS3_INSTR4_ALL(addss_XMM1_FSxBX),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4133
     4134        { BS3_INSTR4_ALL(vaddss_XMM1_XMM2_XMM3),  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues)   },
     4135        { BS3_INSTR4_ALL(vaddss_XMM1_XMM2_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4136
     4137        { BS3_INSTR4_C64(addss_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues)   },
     4138        { BS3_INSTR4_C64(addss_XMM8_FSxBX),       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4139
     4140        { BS3_INSTR4_C64(vaddss_XMM8_XMM9_XMM10), 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues)   },
     4141        { BS3_INSTR4_C64(vaddss_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4142
     4143        { BS3_INSTR4_ALL(addss_XMM1_XMM1),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     4144        { BS3_INSTR4_C64(addss_XMM8_XMM8),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     4145        { BS3_INSTR4_ALL(vaddss_XMM1_XMM1_XMM1),  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     4146        { BS3_INSTR4_C64(vaddss_XMM8_XMM8_XMM8),  255,         RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     4147        { BS3_INSTR4_ALL(vaddss_XMM1_XMM1_XMM2),  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     4148        { BS3_INSTR4_ALL(vaddss_XMM1_XMM1_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValuesSR) },
    42004149    };
    4201     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    4202     {
    4203         { bs3CpuInstr4_addss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    4204         { bs3CpuInstr4_addss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4205 
    4206         { bs3CpuInstr4_vaddss_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    4207         { bs3CpuInstr4_vaddss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4208 
    4209         { bs3CpuInstr4_addss_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4210         { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4211         { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM2_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    4212         { bs3CpuInstr4_vaddss_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    4213     };
    4214     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    4215     {
    4216         { bs3CpuInstr4_addss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    4217         { bs3CpuInstr4_addss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4218 
    4219         { bs3CpuInstr4_vaddss_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    4220         { bs3CpuInstr4_vaddss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4221 
    4222         { bs3CpuInstr4_addss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues)   },
    4223         { bs3CpuInstr4_addss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4224 
    4225         { bs3CpuInstr4_vaddss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues)   },
    4226         { bs3CpuInstr4_vaddss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4227 
    4228         { bs3CpuInstr4_addss_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4229         { bs3CpuInstr4_addss_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    4230         { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4231         { bs3CpuInstr4_vaddss_XMM8_XMM8_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    4232         { bs3CpuInstr4_vaddss_XMM1_XMM1_XMM2_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    4233         { bs3CpuInstr4_vaddss_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    4234     };
    4235 
    4236     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    4237     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    4238     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    4239                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     4150
     4151    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    42404152}
    42414153
    … …  
    45394451    };
    45404452
    4541     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     4453    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    45424454    {
    4543         { bs3CpuInstr4_addsd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    4544         { bs3CpuInstr4_addsd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4545 
    4546         { bs3CpuInstr4_vaddsd_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    4547         { bs3CpuInstr4_vaddsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4548 
    4549         { bs3CpuInstr4_addsd_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4550         { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4551         { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM2_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    4552         { bs3CpuInstr4_vaddsd_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
     4455        { BS3_INSTR4_ALL(addsd_XMM1_XMM2),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     4456        { BS3_INSTR4_ALL(addsd_XMM1_FSxBX),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4457
     4458        { BS3_INSTR4_ALL(vaddsd_XMM1_XMM2_XMM3),  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues)   },
     4459        { BS3_INSTR4_ALL(vaddsd_XMM1_XMM2_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4460
     4461        { BS3_INSTR4_C64(addsd_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues)   },
     4462        { BS3_INSTR4_C64(addsd_XMM8_FSxBX),       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4463
     4464        { BS3_INSTR4_C64(vaddsd_XMM8_XMM9_XMM10), 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues)   },
     4465        { BS3_INSTR4_C64(vaddsd_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4466
     4467        { BS3_INSTR4_ALL(addsd_XMM1_XMM1),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     4468        { BS3_INSTR4_C64(addsd_XMM8_XMM8),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     4469        { BS3_INSTR4_ALL(vaddsd_XMM1_XMM1_XMM1),  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     4470        { BS3_INSTR4_C64(vaddsd_XMM8_XMM8_XMM8),  255,         RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     4471        { BS3_INSTR4_ALL(vaddsd_XMM1_XMM1_XMM2),  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     4472        { BS3_INSTR4_ALL(vaddsd_XMM1_XMM1_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValuesSR) },
    45534473    };
    4554     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    4555     {
    4556         { bs3CpuInstr4_addsd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    4557         { bs3CpuInstr4_addsd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4558 
    4559         { bs3CpuInstr4_vaddsd_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    4560         { bs3CpuInstr4_vaddsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4561 
    4562         { bs3CpuInstr4_addsd_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4563         { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4564         { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM2_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    4565         { bs3CpuInstr4_vaddsd_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    4566     };
    4567     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    4568     {
    4569         { bs3CpuInstr4_addsd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    4570         { bs3CpuInstr4_addsd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4571 
    4572         { bs3CpuInstr4_vaddsd_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    4573         { bs3CpuInstr4_vaddsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4574 
    4575         { bs3CpuInstr4_addsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues)   },
    4576         { bs3CpuInstr4_addsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4577 
    4578         { bs3CpuInstr4_vaddsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues)   },
    4579         { bs3CpuInstr4_vaddsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4580 
    4581         { bs3CpuInstr4_addsd_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4582         { bs3CpuInstr4_addsd_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    4583         { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4584         { bs3CpuInstr4_vaddsd_XMM8_XMM8_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    4585         { bs3CpuInstr4_vaddsd_XMM1_XMM1_XMM2_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    4586         { bs3CpuInstr4_vaddsd_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    4587     };
    4588 
    4589     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    4590     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    4591     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    4592                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     4474
     4475    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    45934476}
    45944477
    … …  
    48934776    };
    48944777
    4895     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     4778    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    48964779    {
    4897         { bs3CpuInstr4_haddps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    4898         { bs3CpuInstr4_haddps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4899 
    4900         { bs3CpuInstr4_vhaddps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    4901         { bs3CpuInstr4_vhaddps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4902 
    4903         { bs3CpuInstr4_vhaddps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues)   },
    4904         { bs3CpuInstr4_vhaddps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4905 
    4906         { bs3CpuInstr4_haddps_XMM1_XMM1_icebp_c16,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4907         { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4908         { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesSR) },
    4909         { bs3CpuInstr4_vhaddps_YMM1_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
     4780        { BS3_INSTR4_ALL(haddps_XMM1_XMM2),        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     4781        { BS3_INSTR4_ALL(haddps_XMM1_FSxBX),       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4782
     4783        { BS3_INSTR4_ALL(vhaddps_XMM1_XMM2_XMM3),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues)   },
     4784        { BS3_INSTR4_ALL(vhaddps_XMM1_XMM2_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4785
     4786        { BS3_INSTR4_ALL(vhaddps_YMM1_YMM2_YMM3),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues)   },
     4787        { BS3_INSTR4_ALL(vhaddps_YMM1_YMM2_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4788
     4789        { BS3_INSTR4_C64(haddps_XMM8_XMM9),        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues)   },
     4790        { BS3_INSTR4_C64(haddps_XMM8_FSxBX),       255, RM_MEM, T_SSE3,    XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4791
     4792        { BS3_INSTR4_C64(vhaddps_XMM8_XMM9_XMM10), 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues)   },
     4793        { BS3_INSTR4_C64(vhaddps_XMM8_XMM9_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4794        { BS3_INSTR4_C64(vhaddps_YMM8_YMM9_YMM10), 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues)   },
     4795        { BS3_INSTR4_C64(vhaddps_YMM8_YMM9_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     4796
     4797        { BS3_INSTR4_ALL(haddps_XMM1_XMM1),        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     4798        { BS3_INSTR4_C64(haddps_XMM8_XMM8),        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     4799        { BS3_INSTR4_ALL(vhaddps_YMM1_YMM1_YMM1),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     4800        { BS3_INSTR4_C64(vhaddps_YMM8_YMM8_YMM8),  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     4801        { BS3_INSTR4_ALL(vhaddps_YMM1_YMM1_YMM2),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     4802        { BS3_INSTR4_ALL(vhaddps_YMM1_YMM1_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_TEST_ARRAY(s_aValuesSR) },
    49104803    };
    4911     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    4912     {
    4913         { bs3CpuInstr4_haddps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    4914         { bs3CpuInstr4_haddps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4915 
    4916         { bs3CpuInstr4_vhaddps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    4917         { bs3CpuInstr4_vhaddps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4918 
    4919         { bs3CpuInstr4_vhaddps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues)   },
    4920         { bs3CpuInstr4_vhaddps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4921 
    4922         { bs3CpuInstr4_haddps_XMM1_XMM1_icebp_c32,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4923         { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4924         { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesSR) },
    4925         { bs3CpuInstr4_vhaddps_YMM1_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    4926     };
    4927     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    4928     {
    4929         { bs3CpuInstr4_haddps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    4930         { bs3CpuInstr4_haddps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4931 
    4932         { bs3CpuInstr4_vhaddps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    4933         { bs3CpuInstr4_vhaddps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4934 
    4935         { bs3CpuInstr4_vhaddps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues)   },
    4936         { bs3CpuInstr4_vhaddps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4937 
    4938         { bs3CpuInstr4_haddps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues)   },
    4939         { bs3CpuInstr4_haddps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4940 
    4941         { bs3CpuInstr4_vhaddps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues)   },
    4942         { bs3CpuInstr4_vhaddps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4943         { bs3CpuInstr4_vhaddps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues)   },
    4944         { bs3CpuInstr4_vhaddps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    4945 
    4946         { bs3CpuInstr4_haddps_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4947         { bs3CpuInstr4_haddps_XMM8_XMM8_icebp_c64,        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    4948         { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValuesSR) },
    4949         { bs3CpuInstr4_vhaddps_YMM8_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_ELEMENTS(s_aValuesSR) },
    4950         { bs3CpuInstr4_vhaddps_YMM1_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesSR) },
    4951         { bs3CpuInstr4_vhaddps_YMM1_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    4952     };
    4953 
    4954     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    4955     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    4956     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    4957                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     4804
     4805    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    49584806}
    49594807
    … …  
    52285076    };
    52295077
    5230     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     5078    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    52315079    {
    5232         { bs3CpuInstr4_haddpd_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    5233         { bs3CpuInstr4_haddpd_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    5234 
    5235         { bs3CpuInstr4_vhaddpd_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    5236         { bs3CpuInstr4_vhaddpd_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    5237 
    5238         { bs3CpuInstr4_vhaddpd_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues)   },
    5239         { bs3CpuInstr4_vhaddpd_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    5240 
    5241         { bs3CpuInstr4_haddpd_XMM1_XMM1_icebp_c16,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    5242         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValuesSR) },
    5243         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesSR) },
    5244         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
     5080        { BS3_INSTR4_ALL(haddpd_XMM1_XMM2),        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     5081        { BS3_INSTR4_ALL(haddpd_XMM1_FSxBX),       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     5082
     5083        { BS3_INSTR4_ALL(vhaddpd_XMM1_XMM2_XMM3),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues)   },
     5084        { BS3_INSTR4_ALL(vhaddpd_XMM1_XMM2_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     5085
     5086        { BS3_INSTR4_ALL(vhaddpd_YMM1_YMM2_YMM3),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues)   },
     5087        { BS3_INSTR4_ALL(vhaddpd_YMM1_YMM2_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     5088
     5089        { BS3_INSTR4_C64(haddpd_XMM8_XMM9),        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues)   },
     5090        { BS3_INSTR4_C64(haddpd_XMM8_FSxBX),       255, RM_MEM, T_SSE3,    XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     5091
     5092        { BS3_INSTR4_C64(vhaddpd_XMM8_XMM9_XMM10), 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues)   },
     5093        { BS3_INSTR4_C64(vhaddpd_XMM8_XMM9_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     5094        { BS3_INSTR4_C64(vhaddpd_YMM8_YMM9_YMM10), 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues)   },
     5095        { BS3_INSTR4_C64(vhaddpd_YMM8_YMM9_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     5096
     5097        { BS3_INSTR4_ALL(haddpd_XMM1_XMM1),        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     5098        { BS3_INSTR4_C64(haddpd_XMM8_XMM8),        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     5099        { BS3_INSTR4_ALL(vhaddpd_YMM1_YMM1_YMM1),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     5100        { BS3_INSTR4_C64(vhaddpd_YMM8_YMM8_YMM8),  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     5101        { BS3_INSTR4_ALL(vhaddpd_YMM1_YMM1_YMM2),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     5102        { BS3_INSTR4_ALL(vhaddpd_YMM1_YMM1_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_TEST_ARRAY(s_aValuesSR) },
    52455103    };
    5246     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    5247     {
    5248         { bs3CpuInstr4_haddpd_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    5249         { bs3CpuInstr4_haddpd_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    5250 
    5251         { bs3CpuInstr4_vhaddpd_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    5252         { bs3CpuInstr4_vhaddpd_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    5253 
    5254         { bs3CpuInstr4_vhaddpd_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues)   },
    5255         { bs3CpuInstr4_vhaddpd_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    5256 
    5257         { bs3CpuInstr4_haddpd_XMM1_XMM1_icebp_c32,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    5258         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValuesSR) },
    5259         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesSR) },
    5260         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    5261     };
    5262     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    5263     {
    5264         { bs3CpuInstr4_haddpd_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    5265         { bs3CpuInstr4_haddpd_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    5266 
    5267         { bs3CpuInstr4_vhaddpd_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    5268         { bs3CpuInstr4_vhaddpd_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    5269 
    5270         { bs3CpuInstr4_vhaddpd_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues)   },
    5271         { bs3CpuInstr4_vhaddpd_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    5272 
    5273         { bs3CpuInstr4_haddpd_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues)   },
    5274         { bs3CpuInstr4_haddpd_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues)   },
    5275 
    5276         { bs3CpuInstr4_vhaddpd_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues)   },
    5277         { bs3CpuInstr4_vhaddpd_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    5278         { bs3CpuInstr4_vhaddpd_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues)   },
    5279         { bs3CpuInstr4_vhaddpd_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    5280 
    5281         { bs3CpuInstr4_haddpd_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    5282         { bs3CpuInstr4_haddpd_XMM8_XMM8_icebp_c64,        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    5283         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValuesSR) },
    5284         { bs3CpuInstr4_vhaddpd_YMM8_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_ELEMENTS(s_aValuesSR) },
    5285         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesSR) },
    5286         { bs3CpuInstr4_vhaddpd_YMM1_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    5287     };
    5288 
    5289     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    5290     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    5291     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    5292                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     5104
     5105    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    52935106}
    52945107
    … …  
    56205433    };
    56215434
    5622     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     5435    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    56235436    {
    5624         { bs3CpuInstr4_subps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    5625         { bs3CpuInstr4_subps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    5626 
    5627         { bs3CpuInstr4_vsubps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    5628         { bs3CpuInstr4_vsubps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    5629 
    5630         { bs3CpuInstr4_vsubps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    5631         { bs3CpuInstr4_vsubps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     5437        { BS3_INSTR4_ALL(subps_XMM1_XMM2),        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     5438        { BS3_INSTR4_ALL(subps_XMM1_FSxBX),       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5439
     5440        { BS3_INSTR4_ALL(vsubps_XMM1_XMM2_XMM3),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     5441        { BS3_INSTR4_ALL(vsubps_XMM1_XMM2_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5442
     5443        { BS3_INSTR4_ALL(vsubps_YMM1_YMM2_YMM3),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues) },
     5444        { BS3_INSTR4_ALL(vsubps_YMM1_YMM2_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5445
     5446        { BS3_INSTR4_C64(subps_XMM8_XMM9),        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     5447        { BS3_INSTR4_C64(subps_XMM8_FSxBX),       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5448
     5449        { BS3_INSTR4_C64(vsubps_XMM8_XMM9_XMM10), 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     5450        { BS3_INSTR4_C64(vsubps_XMM8_XMM9_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5451        { BS3_INSTR4_C64(vsubps_YMM8_YMM9_YMM10), 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues) },
     5452        { BS3_INSTR4_C64(vsubps_YMM8_YMM9_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    56325453    };
    5633     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    5634     {
    5635         { bs3CpuInstr4_subps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    5636         { bs3CpuInstr4_subps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    5637 
    5638         { bs3CpuInstr4_vsubps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    5639         { bs3CpuInstr4_vsubps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    5640 
    5641         { bs3CpuInstr4_vsubps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    5642         { bs3CpuInstr4_vsubps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    5643     };
    5644     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    5645     {
    5646         { bs3CpuInstr4_subps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    5647         { bs3CpuInstr4_subps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    5648 
    5649         { bs3CpuInstr4_vsubps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    5650         { bs3CpuInstr4_vsubps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    5651 
    5652         { bs3CpuInstr4_vsubps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    5653         { bs3CpuInstr4_vsubps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    5654 
    5655         { bs3CpuInstr4_subps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    5656         { bs3CpuInstr4_subps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    5657 
    5658         { bs3CpuInstr4_vsubps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    5659         { bs3CpuInstr4_vsubps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    5660         { bs3CpuInstr4_vsubps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) },
    5661         { bs3CpuInstr4_vsubps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    5662     };
    5663 
    5664     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    5665     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    5666     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    5667                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     5454
     5455    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    56685456}
    56695457
    … …  
    59055693    };
    59065694
    5907     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     5695    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    59085696    {
    5909         { bs3CpuInstr4_subpd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    5910         { bs3CpuInstr4_subpd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    5911 
    5912         { bs3CpuInstr4_vsubpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    5913         { bs3CpuInstr4_vsubpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    5914 
    5915         { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    5916         { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     5697        { BS3_INSTR4_ALL(subpd_XMM1_XMM2),        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     5698        { BS3_INSTR4_ALL(subpd_XMM1_FSxBX),       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5699
     5700        { BS3_INSTR4_ALL(vsubpd_XMM1_XMM2_XMM3),  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     5701        { BS3_INSTR4_ALL(vsubpd_XMM1_XMM2_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5702
     5703        { BS3_INSTR4_ALL(vsubpd_YMM1_YMM2_YMM3),  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues) },
     5704        { BS3_INSTR4_ALL(vsubpd_YMM1_YMM2_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5705
     5706        { BS3_INSTR4_C64(subpd_XMM8_XMM9),        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     5707        { BS3_INSTR4_C64(subpd_XMM8_FSxBX),       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5708
     5709        { BS3_INSTR4_C64(vsubpd_XMM8_XMM9_XMM10), X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     5710        { BS3_INSTR4_C64(vsubpd_XMM8_XMM9_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5711        { BS3_INSTR4_C64(vsubpd_YMM8_YMM9_YMM10), X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues) },
     5712        { BS3_INSTR4_C64(vsubpd_YMM8_YMM9_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    59175713    };
    5918     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    5919     {
    5920         { bs3CpuInstr4_subpd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    5921         { bs3CpuInstr4_subpd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    5922 
    5923         { bs3CpuInstr4_vsubpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    5924         { bs3CpuInstr4_vsubpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    5925 
    5926         { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    5927         { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    5928     };
    5929     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    5930     {
    5931         { bs3CpuInstr4_subpd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    5932         { bs3CpuInstr4_subpd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    5933 
    5934         { bs3CpuInstr4_vsubpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    5935         { bs3CpuInstr4_vsubpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    5936 
    5937         { bs3CpuInstr4_vsubpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    5938         { bs3CpuInstr4_vsubpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    5939 
    5940         { bs3CpuInstr4_subpd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    5941         { bs3CpuInstr4_subpd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    5942 
    5943         { bs3CpuInstr4_vsubpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    5944         { bs3CpuInstr4_vsubpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    5945         { bs3CpuInstr4_vsubpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) },
    5946         { bs3CpuInstr4_vsubpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    5947     };
    5948 
    5949     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    5950     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    5951     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    5952                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     5714
     5715    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    59535716}
    59545717
    … …  
    61835946 /*--|34*/{ { /*src2     */ { FP32_DENORM_MAX(0), FP32_RAND_x7_V2 } },
    61845947            { /*src1     */ { FP32_0(0),          FP32_RAND_x7_V3 } },
    6185             { /* =>      */ { FP32_0(0),          FP32_RAND_x7_V3 } }/* result on HW (i7-10700) */,
    6186     // IEM: { /* =>      */ { FP32_DENORM_MAX(1), FP32_RAND_x7_V3 } }/* result on IEM */,
     5948            { /* =>      */ { FP32_0(0),          FP32_RAND_x7_V3 } } /* result on HW (i7-10700) */,
     5949    // IEM: { /* =>      */ { FP32_DENORM_MAX(1), FP32_RAND_x7_V3 } } /* result on IEM */,
    61875950              /*mxcsr:in */ X86_MXCSR_DM,
    61885951              /*128:out  */ X86_MXCSR_DM | X86_MXCSR_DE | X86_MXCSR_UE | BS3_MXCSR_DM_FIXED | BS3_MXCSR_UM_FIXED,
    … …  
    62155978    };
    62165979
    6217     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     5980    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    62185981    {
    6219         { bs3CpuInstr4_subss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    6220         { bs3CpuInstr4_subss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    6221 
    6222         { bs3CpuInstr4_vsubss_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    6223         { bs3CpuInstr4_vsubss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     5982        { BS3_INSTR4_ALL(subss_XMM1_XMM2),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     5983        { BS3_INSTR4_ALL(subss_XMM1_FSxBX),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5984
     5985        { BS3_INSTR4_ALL(vsubss_XMM1_XMM2_XMM3),  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     5986        { BS3_INSTR4_ALL(vsubss_XMM1_XMM2_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5987
     5988        { BS3_INSTR4_C64(subss_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     5989        { BS3_INSTR4_C64(subss_XMM8_FSxBX),       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     5990
     5991        { BS3_INSTR4_C64(vsubss_XMM8_XMM9_XMM10), 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     5992        { BS3_INSTR4_C64(vsubss_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    62245993    };
    6225     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    6226     {
    6227         { bs3CpuInstr4_subss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    6228         { bs3CpuInstr4_subss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    6229 
    6230         { bs3CpuInstr4_vsubss_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    6231         { bs3CpuInstr4_vsubss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    6232     };
    6233     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    6234     {
    6235         { bs3CpuInstr4_subss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    6236         { bs3CpuInstr4_subss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    6237 
    6238         { bs3CpuInstr4_vsubss_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    6239         { bs3CpuInstr4_vsubss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    6240 
    6241         { bs3CpuInstr4_subss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    6242         { bs3CpuInstr4_subss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    6243 
    6244         { bs3CpuInstr4_vsubss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    6245         { bs3CpuInstr4_vsubss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    6246     };
    6247 
    6248     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    6249     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    6250     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    6251                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     5994
     5995    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    62525996}
    62535997
    … …  
    65436287    };
    65446288
    6545     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     6289    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    65466290    {
    6547         { bs3CpuInstr4_subsd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    6548         { bs3CpuInstr4_subsd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    6549 
    6550         { bs3CpuInstr4_vsubsd_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    6551         { bs3CpuInstr4_vsubsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     6291        { BS3_INSTR4_ALL(subsd_XMM1_XMM2),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     6292        { BS3_INSTR4_ALL(subsd_XMM1_FSxBX),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6293
     6294        { BS3_INSTR4_ALL(vsubsd_XMM1_XMM2_XMM3),  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     6295        { BS3_INSTR4_ALL(vsubsd_XMM1_XMM2_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6296
     6297        { BS3_INSTR4_C64(subsd_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     6298        { BS3_INSTR4_C64(subsd_XMM8_FSxBX),       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6299
     6300        { BS3_INSTR4_C64(vsubsd_XMM8_XMM9_XMM10), 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     6301        { BS3_INSTR4_C64(vsubsd_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    65526302    };
    6553     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    6554     {
    6555         { bs3CpuInstr4_subsd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    6556         { bs3CpuInstr4_subsd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    6557 
    6558         { bs3CpuInstr4_vsubsd_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    6559         { bs3CpuInstr4_vsubsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    6560     };
    6561     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    6562     {
    6563         { bs3CpuInstr4_subsd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    6564         { bs3CpuInstr4_subsd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    6565 
    6566         { bs3CpuInstr4_vsubsd_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    6567         { bs3CpuInstr4_vsubsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    6568 
    6569         { bs3CpuInstr4_subsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    6570         { bs3CpuInstr4_subsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    6571 
    6572         { bs3CpuInstr4_vsubsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    6573         { bs3CpuInstr4_vsubsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    6574     };
    6575 
    6576     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    6577     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    6578     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    6579                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     6303
     6304    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    65806305}
    65816306
    … …  
    68636588    };
    68646589
    6865     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     6590    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    68666591    {
    6867         { bs3CpuInstr4_hsubps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    6868         { bs3CpuInstr4_hsubps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    6869 
    6870         { bs3CpuInstr4_vhsubps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    6871         { bs3CpuInstr4_vhsubps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    6872 
    6873         { bs3CpuInstr4_vhsubps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    6874         { bs3CpuInstr4_vhsubps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     6592        { BS3_INSTR4_ALL(hsubps_XMM1_XMM2),        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     6593        { BS3_INSTR4_ALL(hsubps_XMM1_FSxBX),       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6594
     6595        { BS3_INSTR4_ALL(vhsubps_XMM1_XMM2_XMM3),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     6596        { BS3_INSTR4_ALL(vhsubps_XMM1_XMM2_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6597
     6598        { BS3_INSTR4_ALL(vhsubps_YMM1_YMM2_YMM3),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues) },
     6599        { BS3_INSTR4_ALL(vhsubps_YMM1_YMM2_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6600
     6601        { BS3_INSTR4_C64(hsubps_XMM8_XMM9),        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     6602        { BS3_INSTR4_C64(hsubps_XMM8_FSxBX),       255, RM_MEM, T_SSE3,    XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6603
     6604        { BS3_INSTR4_C64(vhsubps_XMM8_XMM9_XMM10), 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     6605        { BS3_INSTR4_C64(vhsubps_XMM8_XMM9_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6606        { BS3_INSTR4_C64(vhsubps_YMM8_YMM9_YMM10), 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues) },
     6607        { BS3_INSTR4_C64(vhsubps_YMM8_YMM9_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    68756608    };
    6876     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    6877     {
    6878         { bs3CpuInstr4_hsubps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    6879         { bs3CpuInstr4_hsubps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    6880 
    6881         { bs3CpuInstr4_vhsubps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    6882         { bs3CpuInstr4_vhsubps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    6883 
    6884         { bs3CpuInstr4_vhsubps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    6885         { bs3CpuInstr4_vhsubps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    6886     };
    6887     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    6888     {
    6889         { bs3CpuInstr4_hsubps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    6890         { bs3CpuInstr4_hsubps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    6891 
    6892         { bs3CpuInstr4_vhsubps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    6893         { bs3CpuInstr4_vhsubps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    6894 
    6895         { bs3CpuInstr4_vhsubps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    6896         { bs3CpuInstr4_vhsubps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    6897 
    6898         { bs3CpuInstr4_hsubps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    6899         { bs3CpuInstr4_hsubps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    6900 
    6901         { bs3CpuInstr4_vhsubps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    6902         { bs3CpuInstr4_vhsubps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    6903         { bs3CpuInstr4_vhsubps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) },
    6904         { bs3CpuInstr4_vhsubps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    6905     };
    6906 
    6907     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    6908     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    6909     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    6910                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     6609
     6610    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    69116611}
    69126612
    … …  
    71366836    };
    71376837
    7138     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     6838    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    71396839    {
    7140         { bs3CpuInstr4_hsubpd_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    7141         { bs3CpuInstr4_hsubpd_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    7142 
    7143         { bs3CpuInstr4_vhsubpd_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    7144         { bs3CpuInstr4_vhsubpd_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7145 
    7146         { bs3CpuInstr4_vhsubpd_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    7147         { bs3CpuInstr4_vhsubpd_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     6840        { BS3_INSTR4_ALL(hsubpd_XMM1_XMM2),        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     6841        { BS3_INSTR4_ALL(hsubpd_XMM1_FSxBX),       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6842
     6843        { BS3_INSTR4_ALL(vhsubpd_XMM1_XMM2_XMM3),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     6844        { BS3_INSTR4_ALL(vhsubpd_XMM1_XMM2_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6845
     6846        { BS3_INSTR4_ALL(vhsubpd_YMM1_YMM2_YMM3),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues) },
     6847        { BS3_INSTR4_ALL(vhsubpd_YMM1_YMM2_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6848
     6849        { BS3_INSTR4_C64(hsubpd_XMM8_XMM9),        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     6850        { BS3_INSTR4_C64(hsubpd_XMM8_FSxBX),       255, RM_MEM, T_SSE3,    XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6851
     6852        { BS3_INSTR4_C64(vhsubpd_XMM8_XMM9_XMM10), 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     6853        { BS3_INSTR4_C64(vhsubpd_XMM8_XMM9_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     6854        { BS3_INSTR4_C64(vhsubpd_YMM8_YMM9_YMM10), 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues) },
     6855        { BS3_INSTR4_C64(vhsubpd_YMM8_YMM9_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    71486856    };
    7149     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    7150     {
    7151         { bs3CpuInstr4_hsubpd_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    7152         { bs3CpuInstr4_hsubpd_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    7153 
    7154         { bs3CpuInstr4_vhsubpd_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    7155         { bs3CpuInstr4_vhsubpd_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7156 
    7157         { bs3CpuInstr4_vhsubpd_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    7158         { bs3CpuInstr4_vhsubpd_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7159     };
    7160     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    7161     {
    7162         { bs3CpuInstr4_hsubpd_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE3,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    7163         { bs3CpuInstr4_hsubpd_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    7164 
    7165         { bs3CpuInstr4_vhsubpd_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    7166         { bs3CpuInstr4_vhsubpd_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7167 
    7168         { bs3CpuInstr4_vhsubpd_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    7169         { bs3CpuInstr4_vhsubpd_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7170 
    7171         { bs3CpuInstr4_hsubpd_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE3,    XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    7172         { bs3CpuInstr4_hsubpd_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE3,    XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    7173 
    7174         { bs3CpuInstr4_vhsubpd_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    7175         { bs3CpuInstr4_vhsubpd_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    7176         { bs3CpuInstr4_vhsubpd_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) },
    7177         { bs3CpuInstr4_vhsubpd_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    7178     };
    7179 
    7180     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    7181     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    7182     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    7183                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     6857
     6858    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    71846859}
    71856860
    … …  
    75357210    };
    75367211
    7537     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     7212    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    75387213    {
    7539         { bs3CpuInstr4_mulps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    7540         { bs3CpuInstr4_mulps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    7541 
    7542         { bs3CpuInstr4_vmulps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    7543         { bs3CpuInstr4_vmulps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7544 
    7545         { bs3CpuInstr4_vmulps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    7546         { bs3CpuInstr4_vmulps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     7214        { BS3_INSTR4_ALL(mulps_XMM1_XMM2),        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     7215        { BS3_INSTR4_ALL(mulps_XMM1_FSxBX),       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7216
     7217        { BS3_INSTR4_ALL(vmulps_XMM1_XMM2_XMM3),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     7218        { BS3_INSTR4_ALL(vmulps_XMM1_XMM2_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7219
     7220        { BS3_INSTR4_ALL(vmulps_YMM1_YMM2_YMM3),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues) },
     7221        { BS3_INSTR4_ALL(vmulps_YMM1_YMM2_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7222
     7223        { BS3_INSTR4_C64(mulps_XMM8_XMM9),        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     7224        { BS3_INSTR4_C64(mulps_XMM8_FSxBX),       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7225
     7226        { BS3_INSTR4_C64(vmulps_XMM8_XMM9_XMM10), 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     7227        { BS3_INSTR4_C64(vmulps_XMM8_XMM9_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7228        { BS3_INSTR4_C64(vmulps_YMM8_YMM9_YMM10), 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues) },
     7229        { BS3_INSTR4_C64(vmulps_YMM8_YMM9_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    75477230    };
    7548     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    7549     {
    7550         { bs3CpuInstr4_mulps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    7551         { bs3CpuInstr4_mulps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    7552 
    7553         { bs3CpuInstr4_vmulps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    7554         { bs3CpuInstr4_vmulps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7555 
    7556         { bs3CpuInstr4_vmulps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    7557         { bs3CpuInstr4_vmulps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7558     };
    7559     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    7560     {
    7561         { bs3CpuInstr4_mulps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    7562         { bs3CpuInstr4_mulps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    7563 
    7564         { bs3CpuInstr4_vmulps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    7565         { bs3CpuInstr4_vmulps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7566 
    7567         { bs3CpuInstr4_vmulps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    7568         { bs3CpuInstr4_vmulps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7569 
    7570         { bs3CpuInstr4_mulps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    7571         { bs3CpuInstr4_mulps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    7572 
    7573         { bs3CpuInstr4_vmulps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    7574         { bs3CpuInstr4_vmulps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    7575         { bs3CpuInstr4_vmulps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) },
    7576         { bs3CpuInstr4_vmulps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    7577     };
    7578 
    7579     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    7580     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    7581     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    7582                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     7231
     7232    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    75837233}
    75847234
    … …  
    78127462    };
    78137463
    7814     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     7464    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    78157465    {
    7816         { bs3CpuInstr4_mulpd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    7817         { bs3CpuInstr4_mulpd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    7818 
    7819         { bs3CpuInstr4_vmulpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    7820         { bs3CpuInstr4_vmulpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7821 
    7822         { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    7823         { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     7466        { BS3_INSTR4_ALL(mulpd_XMM1_XMM2),        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     7467        { BS3_INSTR4_ALL(mulpd_XMM1_FSxBX),       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7468
     7469        { BS3_INSTR4_ALL(vmulpd_XMM1_XMM2_XMM3),  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     7470        { BS3_INSTR4_ALL(vmulpd_XMM1_XMM2_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7471
     7472        { BS3_INSTR4_ALL(vmulpd_YMM1_YMM2_YMM3),  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues) },
     7473        { BS3_INSTR4_ALL(vmulpd_YMM1_YMM2_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7474
     7475        { BS3_INSTR4_C64(mulpd_XMM8_XMM9),        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     7476        { BS3_INSTR4_C64(mulpd_XMM8_FSxBX),       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7477
     7478        { BS3_INSTR4_C64(vmulpd_XMM8_XMM9_XMM10), X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     7479        { BS3_INSTR4_C64(vmulpd_XMM8_XMM9_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7480        { BS3_INSTR4_C64(vmulpd_YMM8_YMM9_YMM10), X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues) },
     7481        { BS3_INSTR4_C64(vmulpd_YMM8_YMM9_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    78247482    };
    7825     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    7826     {
    7827         { bs3CpuInstr4_mulpd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    7828         { bs3CpuInstr4_mulpd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    7829 
    7830         { bs3CpuInstr4_vmulpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    7831         { bs3CpuInstr4_vmulpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7832 
    7833         { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    7834         { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7835     };
    7836     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    7837     {
    7838         { bs3CpuInstr4_mulpd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    7839         { bs3CpuInstr4_mulpd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    7840 
    7841         { bs3CpuInstr4_vmulpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    7842         { bs3CpuInstr4_vmulpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7843 
    7844         { bs3CpuInstr4_vmulpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    7845         { bs3CpuInstr4_vmulpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    7846 
    7847         { bs3CpuInstr4_mulpd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    7848         { bs3CpuInstr4_mulpd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    7849 
    7850         { bs3CpuInstr4_vmulpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    7851         { bs3CpuInstr4_vmulpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    7852         { bs3CpuInstr4_vmulpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) },
    7853         { bs3CpuInstr4_vmulpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    7854     };
    7855 
    7856     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    7857     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    7858     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    7859                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     7483
     7484    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    78607485}
    78617486
    … …  
    80517676    };
    80527677
    8053     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     7678    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    80547679    {
    8055         { bs3CpuInstr4_mulss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    8056         { bs3CpuInstr4_mulss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    8057 
    8058         { bs3CpuInstr4_vmulss_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    8059         { bs3CpuInstr4_vmulss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     7680        { BS3_INSTR4_ALL(mulss_XMM1_XMM2),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     7681        { BS3_INSTR4_ALL(mulss_XMM1_FSxBX),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7682
     7683        { BS3_INSTR4_ALL(vmulss_XMM1_XMM2_XMM3),  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     7684        { BS3_INSTR4_ALL(vmulss_XMM1_XMM2_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7685
     7686        { BS3_INSTR4_C64(mulss_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     7687        { BS3_INSTR4_C64(mulss_XMM8_FSxBX),       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7688
     7689        { BS3_INSTR4_C64(vmulss_XMM8_XMM9_XMM10), 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     7690        { BS3_INSTR4_C64(vmulss_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    80607691    };
    8061     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    8062     {
    8063         { bs3CpuInstr4_mulss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    8064         { bs3CpuInstr4_mulss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    8065 
    8066         { bs3CpuInstr4_vmulss_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    8067         { bs3CpuInstr4_vmulss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    8068     };
    8069     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    8070     {
    8071         { bs3CpuInstr4_mulss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    8072         { bs3CpuInstr4_mulss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    8073 
    8074         { bs3CpuInstr4_vmulss_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    8075         { bs3CpuInstr4_vmulss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    8076 
    8077         { bs3CpuInstr4_mulss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    8078         { bs3CpuInstr4_mulss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    8079 
    8080         { bs3CpuInstr4_vmulss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    8081         { bs3CpuInstr4_vmulss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    8082     };
    8083 
    8084     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    8085     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    8086     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    8087                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     7692
     7693    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    80887694}
    80897695
    … …  
    83457951    };
    83467952
    8347     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     7953    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    83487954    {
    8349         { bs3CpuInstr4_mulsd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    8350         { bs3CpuInstr4_mulsd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    8351 
    8352         { bs3CpuInstr4_vmulsd_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    8353         { bs3CpuInstr4_vmulsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     7955        { BS3_INSTR4_ALL(mulsd_XMM1_XMM2),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     7956        { BS3_INSTR4_ALL(mulsd_XMM1_FSxBX),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7957
     7958        { BS3_INSTR4_ALL(vmulsd_XMM1_XMM2_XMM3),  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     7959        { BS3_INSTR4_ALL(vmulsd_XMM1_XMM2_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7960
     7961        { BS3_INSTR4_C64(mulsd_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     7962        { BS3_INSTR4_C64(mulsd_XMM8_FSxBX),       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     7963
     7964        { BS3_INSTR4_C64(vmulsd_XMM8_XMM9_XMM10), 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     7965        { BS3_INSTR4_C64(vmulsd_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    83547966    };
    8355     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    8356     {
    8357         { bs3CpuInstr4_mulsd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    8358         { bs3CpuInstr4_mulsd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    8359 
    8360         { bs3CpuInstr4_vmulsd_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    8361         { bs3CpuInstr4_vmulsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    8362     };
    8363     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    8364     {
    8365         { bs3CpuInstr4_mulsd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    8366         { bs3CpuInstr4_mulsd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    8367 
    8368         { bs3CpuInstr4_vmulsd_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    8369         { bs3CpuInstr4_vmulsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    8370 
    8371         { bs3CpuInstr4_mulsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    8372         { bs3CpuInstr4_mulsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    8373 
    8374         { bs3CpuInstr4_vmulsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    8375         { bs3CpuInstr4_vmulsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    8376     };
    8377 
    8378     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    8379     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    8380     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    8381                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     7967
     7968    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    83827969}
    83837970
    … …  
    86908277    };
    86918278
    8692     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     8279    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    86938280    {
    8694         { bs3CpuInstr4_divps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    8695         { bs3CpuInstr4_divps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    8696 
    8697         { bs3CpuInstr4_vdivps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    8698         { bs3CpuInstr4_vdivps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    8699 
    8700         { bs3CpuInstr4_vdivps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    8701         { bs3CpuInstr4_vdivps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     8281        { BS3_INSTR4_ALL(divps_XMM1_XMM2),        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     8282        { BS3_INSTR4_ALL(divps_XMM1_FSxBX),       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8283
     8284        { BS3_INSTR4_ALL(vdivps_XMM1_XMM2_XMM3),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     8285        { BS3_INSTR4_ALL(vdivps_XMM1_XMM2_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8286
     8287        { BS3_INSTR4_ALL(vdivps_YMM1_YMM2_YMM3),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues) },
     8288        { BS3_INSTR4_ALL(vdivps_YMM1_YMM2_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8289
     8290        { BS3_INSTR4_C64(divps_XMM8_XMM9),        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     8291        { BS3_INSTR4_C64(divps_XMM8_FSxBX),       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8292
     8293        { BS3_INSTR4_C64(vdivps_XMM8_XMM9_XMM10), 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     8294        { BS3_INSTR4_C64(vdivps_XMM8_XMM9_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8295        { BS3_INSTR4_C64(vdivps_YMM8_YMM9_YMM10), 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues) },
     8296        { BS3_INSTR4_C64(vdivps_YMM8_YMM9_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    87028297    };
    8703     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    8704     {
    8705         { bs3CpuInstr4_divps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    8706         { bs3CpuInstr4_divps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    8707 
    8708         { bs3CpuInstr4_vdivps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    8709         { bs3CpuInstr4_vdivps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    8710 
    8711         { bs3CpuInstr4_vdivps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    8712         { bs3CpuInstr4_vdivps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    8713     };
    8714     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    8715     {
    8716         { bs3CpuInstr4_divps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    8717         { bs3CpuInstr4_divps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    8718 
    8719         { bs3CpuInstr4_vdivps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    8720         { bs3CpuInstr4_vdivps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    8721 
    8722         { bs3CpuInstr4_vdivps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    8723         { bs3CpuInstr4_vdivps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    8724 
    8725         { bs3CpuInstr4_divps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    8726         { bs3CpuInstr4_divps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    8727 
    8728         { bs3CpuInstr4_vdivps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    8729         { bs3CpuInstr4_vdivps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    8730         { bs3CpuInstr4_vdivps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) },
    8731         { bs3CpuInstr4_vdivps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    8732     };
    8733 
    8734     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    8735     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    8736     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    8737                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     8298
     8299    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    87388300}
    87398301
    … …  
    90258587    };
    90268588
    9027     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     8589    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    90288590    {
    9029         { bs3CpuInstr4_divpd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    9030         { bs3CpuInstr4_divpd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    9031 
    9032         { bs3CpuInstr4_vdivpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    9033         { bs3CpuInstr4_vdivpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    9034 
    9035         { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    9036         { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     8591        { BS3_INSTR4_ALL(divpd_XMM1_XMM2),        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     8592        { BS3_INSTR4_ALL(divpd_XMM1_FSxBX),       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8593
     8594        { BS3_INSTR4_ALL(vdivpd_XMM1_XMM2_XMM3),  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     8595        { BS3_INSTR4_ALL(vdivpd_XMM1_XMM2_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8596
     8597        { BS3_INSTR4_ALL(vdivpd_YMM1_YMM2_YMM3),  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues) },
     8598        { BS3_INSTR4_ALL(vdivpd_YMM1_YMM2_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8599
     8600        { BS3_INSTR4_C64(divpd_XMM8_XMM9),        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     8601        { BS3_INSTR4_C64(divpd_XMM8_FSxBX),       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8602
     8603        { BS3_INSTR4_C64(vdivpd_XMM8_XMM9_XMM10), X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     8604        { BS3_INSTR4_C64(vdivpd_XMM8_XMM9_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8605        { BS3_INSTR4_C64(vdivpd_YMM8_YMM9_YMM10), X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues) },
     8606        { BS3_INSTR4_C64(vdivpd_YMM8_YMM9_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    90378607    };
    9038     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    9039     {
    9040         { bs3CpuInstr4_divpd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    9041         { bs3CpuInstr4_divpd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    9042 
    9043         { bs3CpuInstr4_vdivpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    9044         { bs3CpuInstr4_vdivpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    9045 
    9046         { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    9047         { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    9048     };
    9049     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    9050     {
    9051         { bs3CpuInstr4_divpd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    9052         { bs3CpuInstr4_divpd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    9053 
    9054         { bs3CpuInstr4_vdivpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    9055         { bs3CpuInstr4_vdivpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    9056 
    9057         { bs3CpuInstr4_vdivpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    9058         { bs3CpuInstr4_vdivpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    9059 
    9060         { bs3CpuInstr4_divpd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    9061         { bs3CpuInstr4_divpd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    9062 
    9063         { bs3CpuInstr4_vdivpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    9064         { bs3CpuInstr4_vdivpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    9065         { bs3CpuInstr4_vdivpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) },
    9066         { bs3CpuInstr4_vdivpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    9067     };
    9068 
    9069     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    9070     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    9071     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    9072                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     8608
     8609    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    90738610}
    90748611
    … …  
    92648801    };
    92658802
    9266     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     8803    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    92678804    {
    9268         { bs3CpuInstr4_divss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    9269         { bs3CpuInstr4_divss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    9270 
    9271         { bs3CpuInstr4_vdivss_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    9272         { bs3CpuInstr4_vdivss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     8805        { BS3_INSTR4_ALL(divss_XMM1_XMM2),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     8806        { BS3_INSTR4_ALL(divss_XMM1_FSxBX),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8807
     8808        { BS3_INSTR4_ALL(vdivss_XMM1_XMM2_XMM3),  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     8809        { BS3_INSTR4_ALL(vdivss_XMM1_XMM2_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8810
     8811        { BS3_INSTR4_C64(divss_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     8812        { BS3_INSTR4_C64(divss_XMM8_FSxBX),       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     8813
     8814        { BS3_INSTR4_C64(vdivss_XMM8_XMM9_XMM10), 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     8815        { BS3_INSTR4_C64(vdivss_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    92738816    };
    9274     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    9275     {
    9276         { bs3CpuInstr4_divss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    9277         { bs3CpuInstr4_divss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    9278 
    9279         { bs3CpuInstr4_vdivss_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    9280         { bs3CpuInstr4_vdivss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    9281     };
    9282     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    9283     {
    9284         { bs3CpuInstr4_divss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    9285         { bs3CpuInstr4_divss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    9286 
    9287         { bs3CpuInstr4_vdivss_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    9288         { bs3CpuInstr4_vdivss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    9289 
    9290         { bs3CpuInstr4_divss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    9291         { bs3CpuInstr4_divss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    9292 
    9293         { bs3CpuInstr4_vdivss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    9294         { bs3CpuInstr4_vdivss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    9295     };
    9296 
    9297     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    9298     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    9299     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    9300                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     8817
     8818    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    93018819}
    93028820
    … …  
    96389156    };
    96399157
    9640     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     9158    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    96419159    {
    9642         { bs3CpuInstr4_divsd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    9643         { bs3CpuInstr4_divsd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    9644 
    9645         { bs3CpuInstr4_vdivsd_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    9646         { bs3CpuInstr4_vdivsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     9160        { BS3_INSTR4_ALL(divsd_XMM1_XMM2),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     9161        { BS3_INSTR4_ALL(divsd_XMM1_FSxBX),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9162
     9163        { BS3_INSTR4_ALL(vdivsd_XMM1_XMM2_XMM3),  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     9164        { BS3_INSTR4_ALL(vdivsd_XMM1_XMM2_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9165
     9166        { BS3_INSTR4_C64(divsd_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     9167        { BS3_INSTR4_C64(divsd_XMM8_FSxBX),       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9168
     9169        { BS3_INSTR4_C64(vdivsd_XMM8_XMM9_XMM10), 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     9170        { BS3_INSTR4_C64(vdivsd_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    96479171    };
    9648     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    9649     {
    9650         { bs3CpuInstr4_divsd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    9651         { bs3CpuInstr4_divsd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    9652 
    9653         { bs3CpuInstr4_vdivsd_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    9654         { bs3CpuInstr4_vdivsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    9655     };
    9656     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    9657     {
    9658         { bs3CpuInstr4_divsd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    9659         { bs3CpuInstr4_divsd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    9660 
    9661         { bs3CpuInstr4_vdivsd_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    9662         { bs3CpuInstr4_vdivsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    9663 
    9664         { bs3CpuInstr4_divsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    9665         { bs3CpuInstr4_divsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    9666 
    9667         { bs3CpuInstr4_vdivsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    9668         { bs3CpuInstr4_vdivsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    9669     };
    9670 
    9671     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    9672     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    9673     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    9674                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     9172
     9173    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    96759174}
    96769175
    … …  
    99939492    };
    99949493
    9995     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     9494    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    99969495    {
    9997         { bs3CpuInstr4_addsubps_XMM1_XMM2_icebp_c16,          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_ELEMENTS(s_aValues) },
    9998         { bs3CpuInstr4_addsubps_XMM1_FSxBX_icebp_c16,         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_ELEMENTS(s_aValues) },
    9999 
    10000         { bs3CpuInstr4_vaddsubps_XMM1_XMM2_XMM3_icebp_c16,    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_ELEMENTS(s_aValues) },
    10001         { bs3CpuInstr4_vaddsubps_XMM1_XMM2_FSxBX_icebp_c16,   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10002 
    10003         { bs3CpuInstr4_vaddsubps_YMM1_YMM2_YMM3_icebp_c16,    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_ELEMENTS(s_aValues) },
    10004         { bs3CpuInstr4_vaddsubps_YMM1_YMM2_FSxBX_icebp_c16,   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
     9496        { BS3_INSTR4_ALL(addsubps_XMM1_XMM2),          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValues) },
     9497        { BS3_INSTR4_ALL(addsubps_XMM1_FSxBX),         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9498
     9499        { BS3_INSTR4_ALL(vaddsubps_XMM1_XMM2_XMM3),    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValues) },
     9500        { BS3_INSTR4_ALL(vaddsubps_XMM1_XMM2_FSxBX),   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9501
     9502        { BS3_INSTR4_ALL(vaddsubps_YMM1_YMM2_YMM3),    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_TEST_ARRAY(s_aValues) },
     9503        { BS3_INSTR4_ALL(vaddsubps_YMM1_YMM2_FSxBX),   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9504
     9505        { BS3_INSTR4_C64(addsubps_XMM8_XMM9),          255, RM_REG, T_SSE3,    XMM8,  XMM8,  XMM9,  PASS_TEST_ARRAY(s_aValues) },
     9506        { BS3_INSTR4_C64(addsubps_XMM8_FSxBX),         255, RM_MEM, T_SSE3,    XMM8,  XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9507
     9508        { BS3_INSTR4_C64(vaddsubps_XMM8_XMM9_XMM10),   255, RM_REG, T_AVX_128, XMM8,  XMM9,  XMM10, PASS_TEST_ARRAY(s_aValues) },
     9509        { BS3_INSTR4_C64(vaddsubps_XMM8_XMM9_FSxBX),   255, RM_MEM, T_AVX_128, XMM8,  XMM9,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9510        { BS3_INSTR4_C64(vaddsubps_YMM13_YMM14_YMM15), 255, RM_REG, T_AVX_256, YMM13, YMM14, YMM15, PASS_TEST_ARRAY(s_aValues) },
     9511        { BS3_INSTR4_C64(vaddsubps_YMM13_YMM14_FSxBX), 255, RM_MEM, T_AVX_256, YMM13, YMM14, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    100059512    };
    10006     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    10007     {
    10008         { bs3CpuInstr4_addsubps_XMM1_XMM2_icebp_c32,          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_ELEMENTS(s_aValues) },
    10009         { bs3CpuInstr4_addsubps_XMM1_FSxBX_icebp_c32,         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10010 
    10011         { bs3CpuInstr4_vaddsubps_XMM1_XMM2_XMM3_icebp_c32,    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_ELEMENTS(s_aValues) },
    10012         { bs3CpuInstr4_vaddsubps_XMM1_XMM2_FSxBX_icebp_c32,   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10013 
    10014         { bs3CpuInstr4_vaddsubps_YMM1_YMM2_YMM3_icebp_c32,    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_ELEMENTS(s_aValues) },
    10015         { bs3CpuInstr4_vaddsubps_YMM1_YMM2_FSxBX_icebp_c32,   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10016     };
    10017     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    10018     {
    10019         { bs3CpuInstr4_addsubps_XMM1_XMM2_icebp_c64,          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_ELEMENTS(s_aValues) },
    10020         { bs3CpuInstr4_addsubps_XMM1_FSxBX_icebp_c64,         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10021 
    10022         { bs3CpuInstr4_vaddsubps_XMM1_XMM2_XMM3_icebp_c64,    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_ELEMENTS(s_aValues) },
    10023         { bs3CpuInstr4_vaddsubps_XMM1_XMM2_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10024 
    10025         { bs3CpuInstr4_vaddsubps_YMM1_YMM2_YMM3_icebp_c64,    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_ELEMENTS(s_aValues) },
    10026         { bs3CpuInstr4_vaddsubps_YMM1_YMM2_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10027 
    10028         { bs3CpuInstr4_addsubps_XMM8_XMM9_icebp_c64,          255, RM_REG, T_SSE3,    XMM8,  XMM8,  XMM9,  PASS_ELEMENTS(s_aValues) },
    10029         { bs3CpuInstr4_addsubps_XMM8_FSxBX_icebp_c64,         255, RM_MEM, T_SSE3,    XMM8,  XMM8,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10030 
    10031         { bs3CpuInstr4_vaddsubps_XMM8_XMM9_XMM10_icebp_c64,   255, RM_REG, T_AVX_128, XMM8,  XMM9,  XMM10, PASS_ELEMENTS(s_aValues) },
    10032         { bs3CpuInstr4_vaddsubps_XMM8_XMM9_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_128, XMM8,  XMM9,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10033         { bs3CpuInstr4_vaddsubps_YMM13_YMM14_YMM15_icebp_c64, 255, RM_REG, T_AVX_256, YMM13, YMM14, YMM15, PASS_ELEMENTS(s_aValues) },
    10034         { bs3CpuInstr4_vaddsubps_YMM13_YMM14_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM13, YMM14, FSxBX, PASS_ELEMENTS(s_aValues) },
    10035     };
    10036 
    10037     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    10038     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    10039     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    10040                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     9513
     9514    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    100419515}
    100429516
    … …  
    104419915    };
    104429916
    10443     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     9917    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    104449918    {
    10445         { bs3CpuInstr4_addsubpd_XMM1_XMM2_icebp_c16,          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_ELEMENTS(s_aValues) },
    10446         { bs3CpuInstr4_addsubpd_XMM1_FSxBX_icebp_c16,         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10447 
    10448         { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_XMM3_icebp_c16,    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_ELEMENTS(s_aValues) },
    10449         { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_FSxBX_icebp_c16,   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10450 
    10451         { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_YMM3_icebp_c16,    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_ELEMENTS(s_aValues) },
    10452         { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_FSxBX_icebp_c16,   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
     9919        { BS3_INSTR4_ALL(addsubpd_XMM1_XMM2),          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValues) },
     9920        { BS3_INSTR4_ALL(addsubpd_XMM1_FSxBX),         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9921
     9922        { BS3_INSTR4_ALL(vaddsubpd_XMM1_XMM2_XMM3),    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValues) },
     9923        { BS3_INSTR4_ALL(vaddsubpd_XMM1_XMM2_FSxBX),   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9924
     9925        { BS3_INSTR4_ALL(vaddsubpd_YMM1_YMM2_YMM3),    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_TEST_ARRAY(s_aValues) },
     9926        { BS3_INSTR4_ALL(vaddsubpd_YMM1_YMM2_FSxBX),   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9927
     9928        { BS3_INSTR4_C64(addsubpd_XMM8_XMM9),          255, RM_REG, T_SSE3,    XMM8,  XMM8,  XMM9,  PASS_TEST_ARRAY(s_aValues) },
     9929        { BS3_INSTR4_C64(addsubpd_XMM8_FSxBX),         255, RM_MEM, T_SSE3,    XMM8,  XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9930
     9931        { BS3_INSTR4_C64(vaddsubpd_XMM8_XMM9_XMM10),   255, RM_REG, T_AVX_128, XMM8,  XMM9,  XMM10, PASS_TEST_ARRAY(s_aValues) },
     9932        { BS3_INSTR4_C64(vaddsubpd_XMM8_XMM9_FSxBX),   255, RM_MEM, T_AVX_128, XMM8,  XMM9,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     9933        { BS3_INSTR4_C64(vaddsubpd_YMM13_YMM14_YMM15), 255, RM_REG, T_AVX_256, YMM13, YMM14, YMM15, PASS_TEST_ARRAY(s_aValues) },
     9934        { BS3_INSTR4_C64(vaddsubpd_YMM13_YMM14_FSxBX), 255, RM_MEM, T_AVX_256, YMM13, YMM14, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    104539935    };
    10454     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    10455     {
    10456         { bs3CpuInstr4_addsubpd_XMM1_XMM2_icebp_c32,          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_ELEMENTS(s_aValues) },
    10457         { bs3CpuInstr4_addsubpd_XMM1_FSxBX_icebp_c32,         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10458 
    10459         { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_XMM3_icebp_c32,    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_ELEMENTS(s_aValues) },
    10460         { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_FSxBX_icebp_c32,   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10461 
    10462         { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_YMM3_icebp_c32,    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_ELEMENTS(s_aValues) },
    10463         { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_FSxBX_icebp_c32,   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10464     };
    10465     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    10466     {
    10467         { bs3CpuInstr4_addsubpd_XMM1_XMM2_icebp_c64,          255, RM_REG, T_SSE3,    XMM1,  XMM1,  XMM2,  PASS_ELEMENTS(s_aValues) },
    10468         { bs3CpuInstr4_addsubpd_XMM1_FSxBX_icebp_c64,         255, RM_MEM, T_SSE3,    XMM1,  XMM1,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10469 
    10470         { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_XMM3_icebp_c64,    255, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_ELEMENTS(s_aValues) },
    10471         { bs3CpuInstr4_vaddsubpd_XMM1_XMM2_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10472 
    10473         { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_YMM3_icebp_c64,    255, RM_REG, T_AVX_256, YMM1,  YMM2,  YMM3,  PASS_ELEMENTS(s_aValues) },
    10474         { bs3CpuInstr4_vaddsubpd_YMM1_YMM2_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_256, YMM1,  YMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10475 
    10476         { bs3CpuInstr4_addsubpd_XMM8_XMM9_icebp_c64,          255, RM_REG, T_SSE3,    XMM8,  XMM8,  XMM9,  PASS_ELEMENTS(s_aValues) },
    10477         { bs3CpuInstr4_addsubpd_XMM8_FSxBX_icebp_c64,         255, RM_MEM, T_SSE3,    XMM8,  XMM8,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10478 
    10479         { bs3CpuInstr4_vaddsubpd_XMM8_XMM9_XMM10_icebp_c64,   255, RM_REG, T_AVX_128, XMM8,  XMM9,  XMM10, PASS_ELEMENTS(s_aValues) },
    10480         { bs3CpuInstr4_vaddsubpd_XMM8_XMM9_FSxBX_icebp_c64,   255, RM_MEM, T_AVX_128, XMM8,  XMM9,  FSxBX, PASS_ELEMENTS(s_aValues) },
    10481         { bs3CpuInstr4_vaddsubpd_YMM13_YMM14_YMM15_icebp_c64, 255, RM_REG, T_AVX_256, YMM13, YMM14, YMM15, PASS_ELEMENTS(s_aValues) },
    10482         { bs3CpuInstr4_vaddsubpd_YMM13_YMM14_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM13, YMM14, FSxBX, PASS_ELEMENTS(s_aValues) },
    10483     };
    10484 
    10485     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    10486     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    10487     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    10488                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     9936
     9937    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    104899938}
    104909939
    … …  
    1072410173    };
    1072510174
    10726     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     10175    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1072710176    {
    10728         { bs3CpuInstr4_maxps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    10729         { bs3CpuInstr4_maxps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    10730 
    10731         { bs3CpuInstr4_vmaxps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    10732         { bs3CpuInstr4_vmaxps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    10733 
    10734         { bs3CpuInstr4_vmaxps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    10735         { bs3CpuInstr4_vmaxps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     10177        { BS3_INSTR4_ALL(maxps_XMM1_XMM2),        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     10178        { BS3_INSTR4_ALL(maxps_XMM1_FSxBX),       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10179
     10180        { BS3_INSTR4_ALL(vmaxps_XMM1_XMM2_XMM3),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     10181        { BS3_INSTR4_ALL(vmaxps_XMM1_XMM2_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10182
     10183        { BS3_INSTR4_ALL(vmaxps_YMM1_YMM2_YMM3),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues) },
     10184        { BS3_INSTR4_ALL(vmaxps_YMM1_YMM2_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10185
     10186        { BS3_INSTR4_C64(maxps_XMM8_XMM9),        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     10187        { BS3_INSTR4_C64(maxps_XMM8_FSxBX),       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10188
     10189        { BS3_INSTR4_C64(vmaxps_XMM8_XMM9_XMM10), 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     10190        { BS3_INSTR4_C64(vmaxps_XMM8_XMM9_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10191        { BS3_INSTR4_C64(vmaxps_YMM8_YMM9_YMM10), 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues) },
     10192        { BS3_INSTR4_C64(vmaxps_YMM8_YMM9_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    1073610193    };
    10737     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    10738     {
    10739         { bs3CpuInstr4_maxps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    10740         { bs3CpuInstr4_maxps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    10741 
    10742         { bs3CpuInstr4_vmaxps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    10743         { bs3CpuInstr4_vmaxps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    10744 
    10745         { bs3CpuInstr4_vmaxps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    10746         { bs3CpuInstr4_vmaxps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    10747     };
    10748     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    10749     {
    10750         { bs3CpuInstr4_maxps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    10751         { bs3CpuInstr4_maxps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    10752 
    10753         { bs3CpuInstr4_vmaxps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    10754         { bs3CpuInstr4_vmaxps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    10755 
    10756         { bs3CpuInstr4_vmaxps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    10757         { bs3CpuInstr4_vmaxps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    10758 
    10759         { bs3CpuInstr4_maxps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    10760         { bs3CpuInstr4_maxps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    10761 
    10762         { bs3CpuInstr4_vmaxps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    10763         { bs3CpuInstr4_vmaxps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    10764         { bs3CpuInstr4_vmaxps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) },
    10765         { bs3CpuInstr4_vmaxps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    10766     };
    10767 
    10768     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    10769     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    10770     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    10771                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     10194
     10195    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    1077210196}
    1077310197
    … …  
    1100910433    };
    1101010434
    11011     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     10435    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1101210436    {
    11013         { bs3CpuInstr4_maxpd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    11014         { bs3CpuInstr4_maxpd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    11015 
    11016         { bs3CpuInstr4_vmaxpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    11017         { bs3CpuInstr4_vmaxpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    11018 
    11019         { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    11020         { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     10437        { BS3_INSTR4_ALL(maxpd_XMM1_XMM2),        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     10438        { BS3_INSTR4_ALL(maxpd_XMM1_FSxBX),       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10439
     10440        { BS3_INSTR4_ALL(vmaxpd_XMM1_XMM2_XMM3),  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     10441        { BS3_INSTR4_ALL(vmaxpd_XMM1_XMM2_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10442
     10443        { BS3_INSTR4_ALL(vmaxpd_YMM1_YMM2_YMM3),  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues) },
     10444        { BS3_INSTR4_ALL(vmaxpd_YMM1_YMM2_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10445
     10446        { BS3_INSTR4_C64(maxpd_XMM8_XMM9),        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     10447        { BS3_INSTR4_C64(maxpd_XMM8_FSxBX),       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10448
     10449        { BS3_INSTR4_C64(vmaxpd_XMM8_XMM9_XMM10), X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     10450        { BS3_INSTR4_C64(vmaxpd_XMM8_XMM9_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10451        { BS3_INSTR4_C64(vmaxpd_YMM8_YMM9_YMM10), X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues) },
     10452        { BS3_INSTR4_C64(vmaxpd_YMM8_YMM9_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    1102110453    };
    11022     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    11023     {
    11024         { bs3CpuInstr4_maxpd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    11025         { bs3CpuInstr4_maxpd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    11026 
    11027         { bs3CpuInstr4_vmaxpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    11028         { bs3CpuInstr4_vmaxpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    11029 
    11030         { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    11031         { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    11032     };
    11033     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    11034     {
    11035         { bs3CpuInstr4_maxpd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    11036         { bs3CpuInstr4_maxpd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    11037 
    11038         { bs3CpuInstr4_vmaxpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    11039         { bs3CpuInstr4_vmaxpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    11040 
    11041         { bs3CpuInstr4_vmaxpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    11042         { bs3CpuInstr4_vmaxpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    11043 
    11044         { bs3CpuInstr4_maxpd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    11045         { bs3CpuInstr4_maxpd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    11046 
    11047         { bs3CpuInstr4_vmaxpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    11048         { bs3CpuInstr4_vmaxpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    11049         { bs3CpuInstr4_vmaxpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) },
    11050         { bs3CpuInstr4_vmaxpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    11051     };
    11052 
    11053     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    11054     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    11055     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    11056                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     10454
     10455    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    1105710456}
    1105810457
    … …  
    1141910818    };
    1142010819
    11421     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     10820    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1142210821    {
    11423         { bs3CpuInstr4_maxss_XMM3_XMM4_icebp_c16,        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_ELEMENTS(s_aValues) },
    11424         { bs3CpuInstr4_maxss_XMM3_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_ELEMENTS(s_aValues) },
    11425 
    11426         { bs3CpuInstr4_vmaxss_XMM1_XMM6_XMM7_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_ELEMENTS(s_aValues) },
    11427         { bs3CpuInstr4_vmaxss_XMM1_XMM6_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_ELEMENTS(s_aValues) },
     10822        { BS3_INSTR4_ALL(maxss_XMM3_XMM4),        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_TEST_ARRAY(s_aValues) },
     10823        { BS3_INSTR4_ALL(maxss_XMM3_FSxBX),       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10824
     10825        { BS3_INSTR4_ALL(vmaxss_XMM1_XMM6_XMM7),  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_TEST_ARRAY(s_aValues) },
     10826        { BS3_INSTR4_ALL(vmaxss_XMM1_XMM6_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10827
     10828        { BS3_INSTR4_C64(maxss_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     10829        { BS3_INSTR4_C64(maxss_XMM8_FSxBX),       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     10830
     10831        { BS3_INSTR4_C64(vmaxss_XMM8_XMM9_XMM10), 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     10832        { BS3_INSTR4_C64(vmaxss_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    1142810833    };
    11429     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    11430     {
    11431         { bs3CpuInstr4_maxss_XMM3_XMM4_icebp_c32,        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_ELEMENTS(s_aValues) },
    11432         { bs3CpuInstr4_maxss_XMM3_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_ELEMENTS(s_aValues) },
    11433 
    11434         { bs3CpuInstr4_vmaxss_XMM1_XMM6_XMM7_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_ELEMENTS(s_aValues) },
    11435         { bs3CpuInstr4_vmaxss_XMM1_XMM6_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_ELEMENTS(s_aValues) },
    11436     };
    11437     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    11438     {
    11439         { bs3CpuInstr4_maxss_XMM3_XMM4_icebp_c64,        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_ELEMENTS(s_aValues) },
    11440         { bs3CpuInstr4_maxss_XMM3_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_ELEMENTS(s_aValues) },
    11441 
    11442         { bs3CpuInstr4_vmaxss_XMM1_XMM6_XMM7_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_ELEMENTS(s_aValues) },
    11443         { bs3CpuInstr4_vmaxss_XMM1_XMM6_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_ELEMENTS(s_aValues) },
    11444 
    11445         { bs3CpuInstr4_maxss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    11446         { bs3CpuInstr4_maxss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    11447 
    11448         { bs3CpuInstr4_vmaxss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    11449         { bs3CpuInstr4_vmaxss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    11450     };
    11451 
    11452     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    11453     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    11454     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    11455                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     10834
     10835    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    1145610836}
    1145710837
    … …  
    1182011200    };
    1182111201
    11822     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     11202    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1182311203    {
    11824         { bs3CpuInstr4_maxsd_XMM3_XMM4_icebp_c16,        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_ELEMENTS(s_aValues) },
    11825         { bs3CpuInstr4_maxsd_XMM3_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_ELEMENTS(s_aValues) },
    11826 
    11827         { bs3CpuInstr4_vmaxsd_XMM1_XMM6_XMM7_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_ELEMENTS(s_aValues) },
    11828         { bs3CpuInstr4_vmaxsd_XMM1_XMM6_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_ELEMENTS(s_aValues) },
     11204        { BS3_INSTR4_ALL(maxsd_XMM3_XMM4),        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_TEST_ARRAY(s_aValues) },
     11205        { BS3_INSTR4_ALL(maxsd_XMM3_FSxBX),       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11206
     11207        { BS3_INSTR4_ALL(vmaxsd_XMM1_XMM6_XMM7),  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_TEST_ARRAY(s_aValues) },
     11208        { BS3_INSTR4_ALL(vmaxsd_XMM1_XMM6_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11209
     11210        { BS3_INSTR4_C64(maxsd_XMM8_XMM9),        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     11211        { BS3_INSTR4_C64(maxsd_XMM8_FSxBX),       X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11212
     11213        { BS3_INSTR4_C64(vmaxsd_XMM8_XMM9_XMM10), 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     11214        { BS3_INSTR4_C64(vmaxsd_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    1182911215    };
    11830     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    11831     {
    11832         { bs3CpuInstr4_maxsd_XMM3_XMM4_icebp_c32,        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_ELEMENTS(s_aValues) },
    11833         { bs3CpuInstr4_maxsd_XMM3_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_ELEMENTS(s_aValues) },
    11834 
    11835         { bs3CpuInstr4_vmaxsd_XMM1_XMM6_XMM7_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_ELEMENTS(s_aValues) },
    11836         { bs3CpuInstr4_vmaxsd_XMM1_XMM6_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_ELEMENTS(s_aValues) },
    11837     };
    11838     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    11839     {
    11840         { bs3CpuInstr4_maxsd_XMM3_XMM4_icebp_c64,        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_ELEMENTS(s_aValues) },
    11841         { bs3CpuInstr4_maxsd_XMM3_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_ELEMENTS(s_aValues) },
    11842 
    11843         { bs3CpuInstr4_vmaxsd_XMM1_XMM6_XMM7_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_ELEMENTS(s_aValues) },
    11844         { bs3CpuInstr4_vmaxsd_XMM1_XMM6_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_ELEMENTS(s_aValues) },
    11845 
    11846         { bs3CpuInstr4_maxsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    11847         { bs3CpuInstr4_maxsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    11848 
    11849         { bs3CpuInstr4_vmaxsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    11850         { bs3CpuInstr4_vmaxsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    11851     };
    11852 
    11853     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    11854     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    11855     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    11856                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     11216
     11217    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    1185711218}
    1185811219
    … …  
    1209211453    };
    1209311454
    12094     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     11455    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1209511456    {
    12096         { bs3CpuInstr4_minps_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    12097         { bs3CpuInstr4_minps_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    12098 
    12099         { bs3CpuInstr4_vminps_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    12100         { bs3CpuInstr4_vminps_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    12101 
    12102         { bs3CpuInstr4_vminps_YMM1_YMM2_YMM3_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    12103         { bs3CpuInstr4_vminps_YMM1_YMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     11457        { BS3_INSTR4_ALL(minps_XMM1_XMM2),        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     11458        { BS3_INSTR4_ALL(minps_XMM1_FSxBX),       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11459
     11460        { BS3_INSTR4_ALL(vminps_XMM1_XMM2_XMM3),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     11461        { BS3_INSTR4_ALL(vminps_XMM1_XMM2_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11462
     11463        { BS3_INSTR4_ALL(vminps_YMM1_YMM2_YMM3),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues) },
     11464        { BS3_INSTR4_ALL(vminps_YMM1_YMM2_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11465
     11466        { BS3_INSTR4_C64(minps_XMM8_XMM9),        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     11467        { BS3_INSTR4_C64(minps_XMM8_FSxBX),       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11468
     11469        { BS3_INSTR4_C64(vminps_XMM8_XMM9_XMM10), 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     11470        { BS3_INSTR4_C64(vminps_XMM8_XMM9_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11471        { BS3_INSTR4_C64(vminps_YMM8_YMM9_YMM10), 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues) },
     11472        { BS3_INSTR4_C64(vminps_YMM8_YMM9_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    1210411473    };
    12105     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    12106     {
    12107         { bs3CpuInstr4_minps_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    12108         { bs3CpuInstr4_minps_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    12109 
    12110         { bs3CpuInstr4_vminps_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    12111         { bs3CpuInstr4_vminps_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    12112 
    12113         { bs3CpuInstr4_vminps_YMM1_YMM2_YMM3_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    12114         { bs3CpuInstr4_vminps_YMM1_YMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    12115     };
    12116     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    12117     {
    12118         { bs3CpuInstr4_minps_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    12119         { bs3CpuInstr4_minps_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    12120 
    12121         { bs3CpuInstr4_vminps_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    12122         { bs3CpuInstr4_vminps_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    12123 
    12124         { bs3CpuInstr4_vminps_YMM1_YMM2_YMM3_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    12125         { bs3CpuInstr4_vminps_YMM1_YMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    12126 
    12127         { bs3CpuInstr4_minps_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    12128         { bs3CpuInstr4_minps_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    12129 
    12130         { bs3CpuInstr4_vminps_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    12131         { bs3CpuInstr4_vminps_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    12132         { bs3CpuInstr4_vminps_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) },
    12133         { bs3CpuInstr4_vminps_YMM8_YMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    12134     };
    12135 
    12136     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    12137     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    12138     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    12139                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     11474
     11475    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    1214011476}
    1214111477
    … …  
    1237711713    };
    1237811714
    12379     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     11715    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1238011716    {
    12381         { bs3CpuInstr4_minpd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    12382         { bs3CpuInstr4_minpd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    12383 
    12384         { bs3CpuInstr4_vminpd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    12385         { bs3CpuInstr4_vminpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    12386 
    12387         { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c16,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    12388         { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
     11717        { BS3_INSTR4_ALL(minpd_XMM1_XMM2),        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     11718        { BS3_INSTR4_ALL(minpd_XMM1_FSxBX),       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11719
     11720        { BS3_INSTR4_ALL(vminpd_XMM1_XMM2_XMM3),  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues) },
     11721        { BS3_INSTR4_ALL(vminpd_XMM1_XMM2_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11722
     11723        { BS3_INSTR4_ALL(vminpd_YMM1_YMM2_YMM3),  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues) },
     11724        { BS3_INSTR4_ALL(vminpd_YMM1_YMM2_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11725
     11726        { BS3_INSTR4_C64(minpd_XMM8_XMM9),        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     11727        { BS3_INSTR4_C64(minpd_XMM8_FSxBX),       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11728
     11729        { BS3_INSTR4_C64(vminpd_XMM8_XMM9_XMM10), X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     11730        { BS3_INSTR4_C64(vminpd_XMM8_XMM9_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     11731        { BS3_INSTR4_C64(vminpd_YMM8_YMM9_YMM10), X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValues) },
     11732        { BS3_INSTR4_C64(vminpd_YMM8_YMM9_FSxBX), X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    1238911733    };
    12390     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    12391     {
    12392         { bs3CpuInstr4_minpd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    12393         { bs3CpuInstr4_minpd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    12394 
    12395         { bs3CpuInstr4_vminpd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    12396         { bs3CpuInstr4_vminpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    12397 
    12398         { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c32,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    12399         { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    12400     };
    12401     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    12402     {
    12403         { bs3CpuInstr4_minpd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,    XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    12404         { bs3CpuInstr4_minpd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    12405 
    12406         { bs3CpuInstr4_vminpd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues) },
    12407         { bs3CpuInstr4_vminpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    12408 
    12409         { bs3CpuInstr4_vminpd_YMM1_YMM2_YMM3_icebp_c64,  X86_XCPT_GP, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues) },
    12410         { bs3CpuInstr4_vminpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues) },
    12411 
    12412         { bs3CpuInstr4_minpd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    12413         { bs3CpuInstr4_minpd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    12414 
    12415         { bs3CpuInstr4_vminpd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    12416         { bs3CpuInstr4_vminpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    12417         { bs3CpuInstr4_vminpd_YMM8_YMM9_YMM10_icebp_c64, X86_XCPT_GP, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValues) },
    12418         { bs3CpuInstr4_vminpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_GP, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    12419     };
    12420 
    12421     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    12422     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    12423     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    12424                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     11734
     11735    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    1242511736}
    1242611737
    … …  
    1278712098    };
    1278812099
    12789     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     12100    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1279012101    {
    12791         { bs3CpuInstr4_minss_XMM3_XMM4_icebp_c16,        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_ELEMENTS(s_aValues) },
    12792         { bs3CpuInstr4_minss_XMM3_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_ELEMENTS(s_aValues) },
    12793 
    12794         { bs3CpuInstr4_vminss_XMM1_XMM6_XMM7_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_ELEMENTS(s_aValues) },
    12795         { bs3CpuInstr4_vminss_XMM1_XMM6_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_ELEMENTS(s_aValues) },
     12102        { BS3_INSTR4_ALL(minss_XMM3_XMM4),        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_TEST_ARRAY(s_aValues) },
     12103        { BS3_INSTR4_ALL(minss_XMM3_FSxBX),       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     12104
     12105        { BS3_INSTR4_ALL(vminss_XMM1_XMM6_XMM7),  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_TEST_ARRAY(s_aValues) },
     12106        { BS3_INSTR4_ALL(vminss_XMM1_XMM6_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     12107
     12108        { BS3_INSTR4_C64(minss_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     12109        { BS3_INSTR4_C64(minss_XMM8_FSxBX),       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     12110
     12111        { BS3_INSTR4_C64(vminss_XMM8_XMM9_XMM10), 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     12112        { BS3_INSTR4_C64(vminss_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    1279612113    };
    12797     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    12798     {
    12799         { bs3CpuInstr4_minss_XMM3_XMM4_icebp_c32,        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_ELEMENTS(s_aValues) },
    12800         { bs3CpuInstr4_minss_XMM3_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_ELEMENTS(s_aValues) },
    12801 
    12802         { bs3CpuInstr4_vminss_XMM1_XMM6_XMM7_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_ELEMENTS(s_aValues) },
    12803         { bs3CpuInstr4_vminss_XMM1_XMM6_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_ELEMENTS(s_aValues) },
    12804     };
    12805     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    12806     {
    12807         { bs3CpuInstr4_minss_XMM3_XMM4_icebp_c64,        255,         RM_REG, T_SSE,     XMM3, XMM3, XMM4,  PASS_ELEMENTS(s_aValues) },
    12808         { bs3CpuInstr4_minss_XMM3_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM3, XMM3, FSxBX, PASS_ELEMENTS(s_aValues) },
    12809 
    12810         { bs3CpuInstr4_vminss_XMM1_XMM6_XMM7_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_ELEMENTS(s_aValues) },
    12811         { bs3CpuInstr4_vminss_XMM1_XMM6_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_ELEMENTS(s_aValues) },
    12812 
    12813         { bs3CpuInstr4_minss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    12814         { bs3CpuInstr4_minss_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    12815 
    12816         { bs3CpuInstr4_vminss_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    12817         { bs3CpuInstr4_vminss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    12818     };
    12819 
    12820     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    12821     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
     12114
    1282212115    /** Note: Intel 64 & IA-32 Architecture SDM Vol 2B says Table 2-19, "Type 2 Class Exception Conditions."; testing says Type 3 */
    12823     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    12824                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     12116    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    1282512117}
    1282612118
    … …  
    1318912481    };
    1319012482
    13191     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     12483    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1319212484    {
    13193         { bs3CpuInstr4_minsd_XMM3_XMM4_icebp_c16,        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_ELEMENTS(s_aValues) },
    13194         { bs3CpuInstr4_minsd_XMM3_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_ELEMENTS(s_aValues) },
    13195 
    13196         { bs3CpuInstr4_vminsd_XMM1_XMM6_XMM7_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_ELEMENTS(s_aValues) },
    13197         { bs3CpuInstr4_vminsd_XMM1_XMM6_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_ELEMENTS(s_aValues) },
     12485        { BS3_INSTR4_ALL(minsd_XMM3_XMM4),        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_TEST_ARRAY(s_aValues) },
     12486        { BS3_INSTR4_ALL(minsd_XMM3_FSxBX),       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     12487
     12488        { BS3_INSTR4_ALL(vminsd_XMM1_XMM6_XMM7),  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_TEST_ARRAY(s_aValues) },
     12489        { BS3_INSTR4_ALL(vminsd_XMM1_XMM6_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     12490
     12491        { BS3_INSTR4_C64(minsd_XMM8_XMM9),        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     12492        { BS3_INSTR4_C64(minsd_XMM8_FSxBX),       X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     12493
     12494        { BS3_INSTR4_C64(vminsd_XMM8_XMM9_XMM10), 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues) },
     12495        { BS3_INSTR4_C64(vminsd_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    1319812496    };
    13199     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    13200     {
    13201         { bs3CpuInstr4_minsd_XMM3_XMM4_icebp_c32,        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_ELEMENTS(s_aValues) },
    13202         { bs3CpuInstr4_minsd_XMM3_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_ELEMENTS(s_aValues) },
    13203 
    13204         { bs3CpuInstr4_vminsd_XMM1_XMM6_XMM7_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_ELEMENTS(s_aValues) },
    13205         { bs3CpuInstr4_vminsd_XMM1_XMM6_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_ELEMENTS(s_aValues) },
    13206     };
    13207     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    13208     {
    13209         { bs3CpuInstr4_minsd_XMM3_XMM4_icebp_c64,        255,         RM_REG, T_SSE2,    XMM3, XMM3, XMM4,  PASS_ELEMENTS(s_aValues) },
    13210         { bs3CpuInstr4_minsd_XMM3_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM3, XMM3, FSxBX, PASS_ELEMENTS(s_aValues) },
    13211 
    13212         { bs3CpuInstr4_vminsd_XMM1_XMM6_XMM7_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM6, XMM7,  PASS_ELEMENTS(s_aValues) },
    13213         { bs3CpuInstr4_vminsd_XMM1_XMM6_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM6, FSxBX, PASS_ELEMENTS(s_aValues) },
    13214 
    13215         { bs3CpuInstr4_minsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,    XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    13216         { bs3CpuInstr4_minsd_XMM8_FSxBX_icebp_c64,       X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    13217 
    13218         { bs3CpuInstr4_vminsd_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues) },
    13219         { bs3CpuInstr4_vminsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues) },
    13220     };
    13221 
    13222     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    13223     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    13224     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    13225                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     12497
     12498    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    1322612499}
    1322712500
    … …  
    1350912782    };
    1351012783
    13511     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     12784    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1351212785    {
    13513         { bs3CpuInstr4_rcpps_XMM1_XMM2_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    13514         { bs3CpuInstr4_rcpps_XMM1_FSxBX_icebp_c16,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    13515 
    13516         { bs3CpuInstr4_vrcpps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    13517         { bs3CpuInstr4_vrcpps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    13518 
    13519         { bs3CpuInstr4_vrcpps_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValues) },
    13520         { bs3CpuInstr4_vrcpps_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
     12786        { BS3_INSTR4_ALL(rcpps_XMM1_XMM2),   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     12787        { BS3_INSTR4_ALL(rcpps_XMM1_FSxBX),  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     12788
     12789        { BS3_INSTR4_ALL(vrcpps_XMM1_XMM2),  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     12790        { BS3_INSTR4_ALL(vrcpps_XMM1_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     12791
     12792        { BS3_INSTR4_ALL(vrcpps_YMM1_YMM2),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_TEST_ARRAY(s_aValues) },
     12793        { BS3_INSTR4_ALL(vrcpps_YMM1_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     12794
     12795        { BS3_INSTR4_C64(rcpps_XMM8_XMM9),   255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     12796        { BS3_INSTR4_C64(rcpps_XMM8_FSxBX),  255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     12797
     12798        { BS3_INSTR4_C64(vrcpps_XMM8_XMM9),  255, RM_REG, T_AVX_128, XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     12799        { BS3_INSTR4_C64(vrcpps_XMM8_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     12800        { BS3_INSTR4_C64(vrcpps_YMM8_YMM9),  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM9,  PASS_TEST_ARRAY(s_aValues) },
     12801        { BS3_INSTR4_C64(vrcpps_YMM8_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
    1352112802    };
    13522     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    13523     {
    13524         { bs3CpuInstr4_rcpps_XMM1_XMM2_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    13525         { bs3CpuInstr4_rcpps_XMM1_FSxBX_icebp_c32,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    13526 
    13527         { bs3CpuInstr4_vrcpps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    13528         { bs3CpuInstr4_vrcpps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    13529 
    13530         { bs3CpuInstr4_vrcpps_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValues) },
    13531         { bs3CpuInstr4_vrcpps_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    13532     };
    13533     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    13534     {
    13535         { bs3CpuInstr4_rcpps_XMM1_XMM2_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    13536         { bs3CpuInstr4_rcpps_XMM1_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    13537 
    13538         { bs3CpuInstr4_vrcpps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    13539         { bs3CpuInstr4_vrcpps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    13540 
    13541         { bs3CpuInstr4_vrcpps_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValues) },
    13542         { bs3CpuInstr4_vrcpps_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    13543 
    13544         { bs3CpuInstr4_rcpps_XMM8_XMM9_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    13545         { bs3CpuInstr4_rcpps_XMM8_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    13546 
    13547         { bs3CpuInstr4_vrcpps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    13548         { bs3CpuInstr4_vrcpps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    13549         { bs3CpuInstr4_vrcpps_YMM8_YMM9_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM9,  PASS_ELEMENTS(s_aValues) },
    13550         { bs3CpuInstr4_vrcpps_YMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    13551     };
    13552 
    13553     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    13554     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    13555     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    13556                                         g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4));
     12803
     12804    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig4));
    1355712805}
    1355812806
    … …  
    1437113619    };
    1437213620
    14373     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     13621    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1437413622    {
    14375         { bs3CpuInstr4_rcpss_XMM1_XMM2_icebp_c16,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM2,  PASS_ELEMENTS(s_aValues)   },
    14376         { bs3CpuInstr4_rcpss_XMM1_FSxBX_icebp_c16,         255,         RM_MEM, T_SSE,     XMM1,  XMM1,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    14377 
    14378         { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM3_icebp_c16,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_ELEMENTS(s_aValues)   },
    14379         { bs3CpuInstr4_vrcpss_XMM1_XMM2_FSxBX_icebp_c16,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    14380 
    14381         { bs3CpuInstr4_rcpss_XMM1_XMM1_icebp_c16,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    14382         { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM1_icebp_c16,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    14383         { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM2_icebp_c16,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM2,  PASS_ELEMENTS(s_aValues)   },
    14384         { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM2_icebp_c16,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    14385         { bs3CpuInstr4_vrcpss_XMM1_XMM1_FSxBX_icebp_c16,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM1,  FSxBX, PASS_ELEMENTS(s_aValues)   },
     13623        { BS3_INSTR4_ALL(rcpss_XMM1_XMM2),          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     13624        { BS3_INSTR4_ALL(rcpss_XMM1_FSxBX),         255,         RM_MEM, T_SSE,     XMM1,  XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     13625
     13626        { BS3_INSTR4_C64(rcpss_XMM8_XMM9),          255,         RM_REG, T_SSE,     XMM8,  XMM8,  XMM9,  PASS_TEST_ARRAY(s_aValues)   },
     13627        { BS3_INSTR4_C64(rcpss_XMM8_FSxBX),         255,         RM_MEM, T_SSE,     XMM8,  XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     13628
     13629        { BS3_INSTR4_ALL(vrcpss_XMM1_XMM2_XMM3),    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValues)   },
     13630        { BS3_INSTR4_ALL(vrcpss_XMM1_XMM2_FSxBX),   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     13631
     13632        { BS3_INSTR4_C64(vrcpss_XMM13_XMM14_XMM15), X86_XCPT_AC, RM_REG, T_AVX_128, XMM13, XMM14, XMM15, PASS_TEST_ARRAY(s_aValues)   },
     13633        { BS3_INSTR4_C64(vrcpss_XMM13_XMM14_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM13, XMM14, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     13634
     13635        { BS3_INSTR4_ALL(rcpss_XMM1_XMM1),          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     13636        { BS3_INSTR4_ALL(vrcpss_XMM1_XMM1_XMM1),    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     13637        { BS3_INSTR4_ALL(vrcpss_XMM1_XMM1_XMM2),    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     13638        { BS3_INSTR4_ALL(vrcpss_XMM1_XMM2_XMM2),    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     13639        { BS3_INSTR4_ALL(vrcpss_XMM1_XMM1_FSxBX),   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     13640        { BS3_INSTR4_C64(vrcpss_XMM15_XMM15_XMM15), X86_XCPT_AC, RM_REG, T_AVX_128, XMM15, XMM15, XMM15, PASS_TEST_ARRAY(s_aValuesSR) },
     13641        { BS3_INSTR4_C64(vrcpss_XMM15_XMM15_XMM13), X86_XCPT_AC, RM_REG, T_AVX_128, XMM15, XMM15, XMM13, PASS_TEST_ARRAY(s_aValues)   },
     13642        { BS3_INSTR4_C64(vrcpss_XMM13_XMM14_XMM14), X86_XCPT_AC, RM_REG, T_AVX_128, XMM13, XMM14, XMM14, PASS_TEST_ARRAY(s_aValuesSR) },
    1438613643    };
    14387     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    14388     {
    14389         { bs3CpuInstr4_rcpss_XMM1_XMM2_icebp_c32,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM2,  PASS_ELEMENTS(s_aValues)   },
    14390         { bs3CpuInstr4_rcpss_XMM1_FSxBX_icebp_c32,         255,         RM_MEM, T_SSE,     XMM1,  XMM1,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    14391 
    14392         { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM3_icebp_c32,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_ELEMENTS(s_aValues)   },
    14393         { bs3CpuInstr4_vrcpss_XMM1_XMM2_FSxBX_icebp_c32,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    14394 
    14395         { bs3CpuInstr4_rcpss_XMM1_XMM1_icebp_c32,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    14396         { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM1_icebp_c32,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    14397         { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM2_icebp_c32,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM2,  PASS_ELEMENTS(s_aValues)   },
    14398         { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM2_icebp_c32,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    14399         { bs3CpuInstr4_vrcpss_XMM1_XMM1_FSxBX_icebp_c32,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM1,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    14400     };
    14401     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    14402     {
    14403         { bs3CpuInstr4_rcpss_XMM1_XMM2_icebp_c64,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM2,  PASS_ELEMENTS(s_aValues)   },
    14404         { bs3CpuInstr4_rcpss_XMM1_FSxBX_icebp_c64,         255,         RM_MEM, T_SSE,     XMM1,  XMM1,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    14405 
    14406         { bs3CpuInstr4_rcpss_XMM8_XMM9_icebp_c64,          255,         RM_REG, T_SSE,     XMM8,  XMM8,  XMM9,  PASS_ELEMENTS(s_aValues)   },
    14407         { bs3CpuInstr4_rcpss_XMM8_FSxBX_icebp_c64,         255,         RM_MEM, T_SSE,     XMM8,  XMM8,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    14408 
    14409         { bs3CpuInstr4_rcpss_XMM1_XMM1_icebp_c64,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    14410 
    14411         { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM3_icebp_c64,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM3,  PASS_ELEMENTS(s_aValues)   },
    14412         { bs3CpuInstr4_vrcpss_XMM1_XMM2_FSxBX_icebp_c64,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM2,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    14413 
    14414         { bs3CpuInstr4_vrcpss_XMM13_XMM14_XMM15_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM13, XMM14, XMM15, PASS_ELEMENTS(s_aValues)   },
    14415         { bs3CpuInstr4_vrcpss_XMM13_XMM14_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM13, XMM14, FSxBX, PASS_ELEMENTS(s_aValues)   },
    14416 
    14417         { bs3CpuInstr4_rcpss_XMM1_XMM1_icebp_c64,          255,         RM_REG, T_SSE,     XMM1,  XMM1,  XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    14418         { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM1_icebp_c64,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    14419         { bs3CpuInstr4_vrcpss_XMM1_XMM1_XMM2_icebp_c64,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM1,  XMM2,  PASS_ELEMENTS(s_aValues)   },
    14420         { bs3CpuInstr4_vrcpss_XMM1_XMM2_XMM2_icebp_c64,    X86_XCPT_AC, RM_REG, T_AVX_128, XMM1,  XMM2,  XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    14421         { bs3CpuInstr4_vrcpss_XMM1_XMM1_FSxBX_icebp_c64,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1,  XMM1,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    14422         { bs3CpuInstr4_vrcpss_XMM15_XMM15_XMM15_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM15, XMM15, XMM15, PASS_ELEMENTS(s_aValuesSR) },
    14423         { bs3CpuInstr4_vrcpss_XMM15_XMM15_XMM13_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM15, XMM15, XMM13, PASS_ELEMENTS(s_aValues)   },
    14424         { bs3CpuInstr4_vrcpss_XMM13_XMM14_XMM14_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM13, XMM14, XMM14, PASS_ELEMENTS(s_aValuesSR) },
    14425     };
    14426 
    14427     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    14428     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    14429     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    14430                                         g_aXcptConfig5, RT_ELEMENTS(g_aXcptConfig5));
     13644
     13645    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig5));
    1443113646}
    1443213647
    … …  
    1467913894    };
    1468013895
    14681     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     13896    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1468213897    {
    14683         { bs3CpuInstr4_sqrtps_XMM1_XMM2_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    14684         { bs3CpuInstr4_sqrtps_XMM1_FSxBX_icebp_c16,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14685 
    14686         { bs3CpuInstr4_vsqrtps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    14687         { bs3CpuInstr4_vsqrtps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14688 
    14689         { bs3CpuInstr4_vsqrtps_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValues) },
    14690         { bs3CpuInstr4_vsqrtps_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14691 
    14692         { bs3CpuInstr4_sqrtps_XMM1_XMM1_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    14693         { bs3CpuInstr4_vsqrtps_XMM1_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    14694         { bs3CpuInstr4_vsqrtps_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValues) },
     13898        { BS3_INSTR4_ALL(sqrtps_XMM1_XMM2),   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     13899        { BS3_INSTR4_ALL(sqrtps_XMM1_FSxBX),  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     13900
     13901        { BS3_INSTR4_ALL(vsqrtps_XMM1_XMM2),  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     13902        { BS3_INSTR4_ALL(vsqrtps_XMM1_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     13903
     13904        { BS3_INSTR4_ALL(vsqrtps_YMM1_YMM2),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_TEST_ARRAY(s_aValues) },
     13905        { BS3_INSTR4_ALL(vsqrtps_YMM1_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     13906
     13907        { BS3_INSTR4_C64(sqrtps_XMM8_XMM9),   255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     13908        { BS3_INSTR4_C64(sqrtps_XMM8_FSxBX),  255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     13909
     13910        { BS3_INSTR4_C64(vsqrtps_XMM8_XMM9),  255, RM_REG, T_AVX_128, XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     13911        { BS3_INSTR4_C64(vsqrtps_XMM8_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     13912        { BS3_INSTR4_C64(vsqrtps_YMM8_YMM9),  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM9,  PASS_TEST_ARRAY(s_aValues) },
     13913        { BS3_INSTR4_C64(vsqrtps_YMM8_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     13914
     13915        { BS3_INSTR4_ALL(sqrtps_XMM1_XMM1),   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValues) },
     13916        { BS3_INSTR4_C64(sqrtps_XMM8_XMM8),   255, RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValues) },
     13917        { BS3_INSTR4_ALL(vsqrtps_XMM1_XMM1),  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValues) },
     13918        { BS3_INSTR4_ALL(vsqrtps_YMM1_YMM1),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_TEST_ARRAY(s_aValues) },
     13919        { BS3_INSTR4_C64(vsqrtps_YMM8_YMM8),  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_TEST_ARRAY(s_aValues) },
    1469513920    };
    14696     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    14697     {
    14698         { bs3CpuInstr4_sqrtps_XMM1_XMM2_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    14699         { bs3CpuInstr4_sqrtps_XMM1_FSxBX_icebp_c32,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14700 
    14701         { bs3CpuInstr4_vsqrtps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    14702         { bs3CpuInstr4_vsqrtps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14703 
    14704         { bs3CpuInstr4_vsqrtps_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValues) },
    14705         { bs3CpuInstr4_vsqrtps_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14706 
    14707         { bs3CpuInstr4_sqrtps_XMM1_XMM1_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    14708         { bs3CpuInstr4_vsqrtps_XMM1_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    14709         { bs3CpuInstr4_vsqrtps_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValues) },
    14710     };
    14711     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    14712     {
    14713         { bs3CpuInstr4_sqrtps_XMM1_XMM2_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    14714         { bs3CpuInstr4_sqrtps_XMM1_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14715 
    14716         { bs3CpuInstr4_vsqrtps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    14717         { bs3CpuInstr4_vsqrtps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14718 
    14719         { bs3CpuInstr4_vsqrtps_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValues) },
    14720         { bs3CpuInstr4_vsqrtps_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14721 
    14722         { bs3CpuInstr4_sqrtps_XMM8_XMM9_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    14723         { bs3CpuInstr4_sqrtps_XMM8_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    14724 
    14725         { bs3CpuInstr4_vsqrtps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    14726         { bs3CpuInstr4_vsqrtps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    14727         { bs3CpuInstr4_vsqrtps_YMM8_YMM9_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM9,  PASS_ELEMENTS(s_aValues) },
    14728         { bs3CpuInstr4_vsqrtps_YMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    14729 
    14730         { bs3CpuInstr4_sqrtps_XMM1_XMM1_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    14731         { bs3CpuInstr4_sqrtps_XMM8_XMM8_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValues) },
    14732         { bs3CpuInstr4_vsqrtps_XMM1_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    14733         { bs3CpuInstr4_vsqrtps_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValues) },
    14734         { bs3CpuInstr4_vsqrtps_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_ELEMENTS(s_aValues) },
    14735     };
    14736 
    14737     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    14738     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    14739     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    14740                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     13921
     13922    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    1474113923}
    1474213924
    … …  
    1494514127    };
    1494614128
    14947     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     14129    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1494814130    {
    14949         { bs3CpuInstr4_sqrtpd_XMM1_XMM2_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    14950         { bs3CpuInstr4_sqrtpd_XMM1_FSxBX_icebp_c16,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14951 
    14952         { bs3CpuInstr4_vsqrtpd_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    14953         { bs3CpuInstr4_vsqrtpd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14954 
    14955         { bs3CpuInstr4_vsqrtpd_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValues) },
    14956         { bs3CpuInstr4_vsqrtpd_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14957 
    14958         { bs3CpuInstr4_sqrtpd_XMM1_XMM1_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    14959         { bs3CpuInstr4_vsqrtpd_XMM1_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    14960         { bs3CpuInstr4_vsqrtpd_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValues) },
     14131        { BS3_INSTR4_ALL(sqrtpd_XMM1_XMM2),   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     14132        { BS3_INSTR4_ALL(sqrtpd_XMM1_FSxBX),  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     14133
     14134        { BS3_INSTR4_ALL(vsqrtpd_XMM1_XMM2),  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     14135        { BS3_INSTR4_ALL(vsqrtpd_XMM1_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     14136
     14137        { BS3_INSTR4_ALL(vsqrtpd_YMM1_YMM2),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_TEST_ARRAY(s_aValues) },
     14138        { BS3_INSTR4_ALL(vsqrtpd_YMM1_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     14139
     14140        { BS3_INSTR4_C64(sqrtpd_XMM8_XMM9),   255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     14141        { BS3_INSTR4_C64(sqrtpd_XMM8_FSxBX),  255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     14142
     14143        { BS3_INSTR4_C64(vsqrtpd_XMM8_XMM9),  255, RM_REG, T_AVX_128, XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     14144        { BS3_INSTR4_C64(vsqrtpd_XMM8_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     14145        { BS3_INSTR4_C64(vsqrtpd_YMM8_YMM9),  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM9,  PASS_TEST_ARRAY(s_aValues) },
     14146        { BS3_INSTR4_C64(vsqrtpd_YMM8_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     14147
     14148        { BS3_INSTR4_ALL(sqrtpd_XMM1_XMM1),   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValues) },
     14149        { BS3_INSTR4_C64(sqrtpd_XMM8_XMM8),   255, RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValues) },
     14150        { BS3_INSTR4_ALL(vsqrtpd_XMM1_XMM1),  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValues) },
     14151        { BS3_INSTR4_ALL(vsqrtpd_YMM1_YMM1),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_TEST_ARRAY(s_aValues) },
     14152        { BS3_INSTR4_C64(vsqrtpd_YMM8_YMM8),  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_TEST_ARRAY(s_aValues) },
    1496114153    };
    14962     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    14963     {
    14964         { bs3CpuInstr4_sqrtpd_XMM1_XMM2_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    14965         { bs3CpuInstr4_sqrtpd_XMM1_FSxBX_icebp_c32,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14966 
    14967         { bs3CpuInstr4_vsqrtpd_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    14968         { bs3CpuInstr4_vsqrtpd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14969 
    14970         { bs3CpuInstr4_vsqrtpd_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValues) },
    14971         { bs3CpuInstr4_vsqrtpd_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14972 
    14973         { bs3CpuInstr4_sqrtpd_XMM1_XMM1_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    14974         { bs3CpuInstr4_vsqrtpd_XMM1_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    14975         { bs3CpuInstr4_vsqrtpd_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValues) },
    14976     };
    14977     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    14978     {
    14979         { bs3CpuInstr4_sqrtpd_XMM1_XMM2_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    14980         { bs3CpuInstr4_sqrtpd_XMM1_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14981 
    14982         { bs3CpuInstr4_vsqrtpd_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    14983         { bs3CpuInstr4_vsqrtpd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14984 
    14985         { bs3CpuInstr4_vsqrtpd_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValues) },
    14986         { bs3CpuInstr4_vsqrtpd_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    14987 
    14988         { bs3CpuInstr4_sqrtpd_XMM8_XMM9_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    14989         { bs3CpuInstr4_sqrtpd_XMM8_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    14990 
    14991         { bs3CpuInstr4_vsqrtpd_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    14992         { bs3CpuInstr4_vsqrtpd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    14993         { bs3CpuInstr4_vsqrtpd_YMM8_YMM9_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM9,  PASS_ELEMENTS(s_aValues) },
    14994         { bs3CpuInstr4_vsqrtpd_YMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    14995 
    14996         { bs3CpuInstr4_sqrtpd_XMM1_XMM1_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    14997         { bs3CpuInstr4_sqrtpd_XMM8_XMM8_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValues) },
    14998         { bs3CpuInstr4_vsqrtpd_XMM1_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    14999         { bs3CpuInstr4_vsqrtpd_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValues) },
    15000         { bs3CpuInstr4_vsqrtpd_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_ELEMENTS(s_aValues) },
    15001     };
    15002 
    15003     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    15004     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    15005     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    15006                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     14154
     14155    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    1500714156}
    1500814157
    … …  
    1538014529    };
    1538114530
    15382     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     14531    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1538314532    {
    15384         { bs3CpuInstr4_sqrtss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    15385         { bs3CpuInstr4_sqrtss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15386 
    15387         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    15388         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15389 
    15390         { bs3CpuInstr4_sqrtss_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    15391         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM1_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    15392         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    15393         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    15394         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
     14533        { BS3_INSTR4_ALL(sqrtss_XMM1_XMM2),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     14534        { BS3_INSTR4_ALL(sqrtss_XMM1_FSxBX),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     14535
     14536        { BS3_INSTR4_C64(sqrtss_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues)   },
     14537        { BS3_INSTR4_C64(sqrtss_XMM8_FSxBX),       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     14538
     14539        { BS3_INSTR4_ALL(vsqrtss_XMM1_XMM2_XMM3),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues)   },
     14540        { BS3_INSTR4_ALL(vsqrtss_XMM1_XMM2_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     14541
     14542        { BS3_INSTR4_C64(vsqrtss_XMM8_XMM9_XMM10), X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues)   },
     14543        { BS3_INSTR4_C64(vsqrtss_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     14544
     14545        { BS3_INSTR4_ALL(sqrtss_XMM1_XMM1),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     14546        { BS3_INSTR4_C64(sqrtss_XMM8_XMM8),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     14547        { BS3_INSTR4_ALL(vsqrtss_XMM1_XMM1_XMM1),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     14548        { BS3_INSTR4_ALL(vsqrtss_XMM1_XMM1_XMM2),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     14549        { BS3_INSTR4_ALL(vsqrtss_XMM1_XMM2_XMM2),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     14550        { BS3_INSTR4_C64(vsqrtss_XMM8_XMM8_XMM8),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     14551        { BS3_INSTR4_ALL(vsqrtss_XMM1_XMM1_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
    1539514552    };
    15396     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    15397     {
    15398         { bs3CpuInstr4_sqrtss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    15399         { bs3CpuInstr4_sqrtss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15400 
    15401         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    15402         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15403 
    15404         { bs3CpuInstr4_sqrtss_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    15405         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM1_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    15406         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    15407         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    15408         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15409     };
    15410     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    15411     {
    15412         { bs3CpuInstr4_sqrtss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    15413         { bs3CpuInstr4_sqrtss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15414 
    15415         { bs3CpuInstr4_sqrtss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues)   },
    15416         { bs3CpuInstr4_sqrtss_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15417 
    15418         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    15419         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15420 
    15421         { bs3CpuInstr4_vsqrtss_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues)   },
    15422         { bs3CpuInstr4_vsqrtss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15423 
    15424         { bs3CpuInstr4_sqrtss_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    15425         { bs3CpuInstr4_sqrtss_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    15426         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM1_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    15427         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    15428         { bs3CpuInstr4_vsqrtss_XMM1_XMM2_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    15429         { bs3CpuInstr4_vsqrtss_XMM8_XMM8_XMM8_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    15430         { bs3CpuInstr4_vsqrtss_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15431     };
    15432 
    15433     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    15434     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    15435     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    15436                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     14553
     14554    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    1543714555}
    1543814556
    … …  
    1581014928    };
    1581114929
    15812     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     14930    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1581314931    {
    15814         { bs3CpuInstr4_sqrtsd_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    15815         { bs3CpuInstr4_sqrtsd_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15816 
    15817         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    15818         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15819 
    15820         { bs3CpuInstr4_sqrtsd_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    15821         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM1_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    15822         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    15823         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    15824         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
     14932        { BS3_INSTR4_ALL(sqrtsd_XMM1_XMM2),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     14933        { BS3_INSTR4_ALL(sqrtsd_XMM1_FSxBX),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     14934
     14935        { BS3_INSTR4_C64(sqrtsd_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues)   },
     14936        { BS3_INSTR4_C64(sqrtsd_XMM8_FSxBX),       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     14937
     14938        { BS3_INSTR4_ALL(vsqrtsd_XMM1_XMM2_XMM3),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues)   },
     14939        { BS3_INSTR4_ALL(vsqrtsd_XMM1_XMM2_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     14940
     14941        { BS3_INSTR4_C64(vsqrtsd_XMM8_XMM9_XMM10), X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues)   },
     14942        { BS3_INSTR4_C64(vsqrtsd_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     14943
     14944        { BS3_INSTR4_ALL(sqrtsd_XMM1_XMM1),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     14945        { BS3_INSTR4_C64(sqrtsd_XMM8_XMM8),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     14946        { BS3_INSTR4_ALL(vsqrtsd_XMM1_XMM1_XMM1),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     14947        { BS3_INSTR4_ALL(vsqrtsd_XMM1_XMM1_XMM2),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     14948        { BS3_INSTR4_ALL(vsqrtsd_XMM1_XMM2_XMM2),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     14949        { BS3_INSTR4_C64(vsqrtsd_XMM8_XMM8_XMM8),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     14950        { BS3_INSTR4_ALL(vsqrtsd_XMM1_XMM1_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
    1582514951    };
    15826     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    15827     {
    15828         { bs3CpuInstr4_sqrtsd_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    15829         { bs3CpuInstr4_sqrtsd_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15830 
    15831         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    15832         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15833 
    15834         { bs3CpuInstr4_sqrtsd_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    15835         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM1_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    15836         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    15837         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    15838         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15839     };
    15840     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    15841     {
    15842         { bs3CpuInstr4_sqrtsd_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    15843         { bs3CpuInstr4_sqrtsd_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15844 
    15845         { bs3CpuInstr4_sqrtsd_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues)   },
    15846         { bs3CpuInstr4_sqrtsd_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15847 
    15848         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    15849         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15850 
    15851         { bs3CpuInstr4_vsqrtsd_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues)   },
    15852         { bs3CpuInstr4_vsqrtsd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15853 
    15854         { bs3CpuInstr4_sqrtsd_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    15855         { bs3CpuInstr4_sqrtsd_XMM8_XMM8_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    15856         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM1_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    15857         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    15858         { bs3CpuInstr4_vsqrtsd_XMM1_XMM2_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    15859         { bs3CpuInstr4_vsqrtsd_XMM8_XMM8_XMM8_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    15860         { bs3CpuInstr4_vsqrtsd_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    15861     };
    15862 
    15863     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    15864     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    15865     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    15866                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     14952
     14953    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    1586714954}
    1586814955
    … …  
    1606015147    };
    1606115148
    16062     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     15149    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1606315150    {
    16064         { bs3CpuInstr4_rsqrtps_XMM1_XMM2_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    16065         { bs3CpuInstr4_rsqrtps_XMM1_FSxBX_icebp_c16,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    16066 
    16067         { bs3CpuInstr4_vrsqrtps_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    16068         { bs3CpuInstr4_vrsqrtps_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    16069 
    16070         { bs3CpuInstr4_vrsqrtps_YMM1_YMM2_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValues) },
    16071         { bs3CpuInstr4_vrsqrtps_YMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    16072 
    16073         { bs3CpuInstr4_rsqrtps_XMM1_XMM1_icebp_c16,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    16074         { bs3CpuInstr4_vrsqrtps_XMM1_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    16075         { bs3CpuInstr4_vrsqrtps_YMM1_YMM1_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValues) },
     15151        { BS3_INSTR4_ALL(rsqrtps_XMM1_XMM2),   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     15152        { BS3_INSTR4_ALL(rsqrtps_XMM1_FSxBX),  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     15153
     15154        { BS3_INSTR4_ALL(vrsqrtps_XMM1_XMM2),  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     15155        { BS3_INSTR4_ALL(vrsqrtps_XMM1_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     15156
     15157        { BS3_INSTR4_ALL(vrsqrtps_YMM1_YMM2),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_TEST_ARRAY(s_aValues) },
     15158        { BS3_INSTR4_ALL(vrsqrtps_YMM1_FSxBX), 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     15159
     15160        { BS3_INSTR4_C64(rsqrtps_XMM8_XMM9),   255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     15161        { BS3_INSTR4_C64(rsqrtps_XMM8_FSxBX),  255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     15162
     15163        { BS3_INSTR4_C64(vrsqrtps_XMM8_XMM9),  255, RM_REG, T_AVX_128, XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     15164        { BS3_INSTR4_C64(vrsqrtps_XMM8_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     15165        { BS3_INSTR4_C64(vrsqrtps_YMM8_YMM9),  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM9,  PASS_TEST_ARRAY(s_aValues) },
     15166        { BS3_INSTR4_C64(vrsqrtps_YMM8_FSxBX), 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     15167
     15168        { BS3_INSTR4_ALL(rsqrtps_XMM1_XMM1),   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValues) },
     15169        { BS3_INSTR4_C64(rsqrtps_XMM8_XMM8),   255, RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValues) },
     15170        { BS3_INSTR4_ALL(vrsqrtps_XMM1_XMM1),  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValues) },
     15171        { BS3_INSTR4_ALL(vrsqrtps_YMM1_YMM1),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_TEST_ARRAY(s_aValues) },
     15172        { BS3_INSTR4_C64(vrsqrtps_YMM8_YMM8),  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_TEST_ARRAY(s_aValues) },
    1607615173    };
    16077     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    16078     {
    16079         { bs3CpuInstr4_rsqrtps_XMM1_XMM2_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    16080         { bs3CpuInstr4_rsqrtps_XMM1_FSxBX_icebp_c32,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    16081 
    16082         { bs3CpuInstr4_vrsqrtps_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    16083         { bs3CpuInstr4_vrsqrtps_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    16084 
    16085         { bs3CpuInstr4_vrsqrtps_YMM1_YMM2_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValues) },
    16086         { bs3CpuInstr4_vrsqrtps_YMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    16087 
    16088         { bs3CpuInstr4_rsqrtps_XMM1_XMM1_icebp_c32,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    16089         { bs3CpuInstr4_vrsqrtps_XMM1_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    16090         { bs3CpuInstr4_vrsqrtps_YMM1_YMM1_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValues) },
    16091     };
    16092     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    16093     {
    16094         { bs3CpuInstr4_rsqrtps_XMM1_XMM2_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    16095         { bs3CpuInstr4_rsqrtps_XMM1_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    16096 
    16097         { bs3CpuInstr4_vrsqrtps_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues) },
    16098         { bs3CpuInstr4_vrsqrtps_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    16099 
    16100         { bs3CpuInstr4_vrsqrtps_YMM1_YMM2_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValues) },
    16101         { bs3CpuInstr4_vrsqrtps_YMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValues) },
    16102 
    16103         { bs3CpuInstr4_rsqrtps_XMM8_XMM9_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    16104         { bs3CpuInstr4_rsqrtps_XMM8_FSxBX_icebp_c64,  255, RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    16105 
    16106         { bs3CpuInstr4_vrsqrtps_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues) },
    16107         { bs3CpuInstr4_vrsqrtps_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    16108         { bs3CpuInstr4_vrsqrtps_YMM8_YMM9_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM9,  PASS_ELEMENTS(s_aValues) },
    16109         { bs3CpuInstr4_vrsqrtps_YMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_ELEMENTS(s_aValues) },
    16110 
    16111         { bs3CpuInstr4_rsqrtps_XMM1_XMM1_icebp_c64,   255, RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    16112         { bs3CpuInstr4_rsqrtps_XMM8_XMM8_icebp_c64,   255, RM_REG, T_SSE,     XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValues) },
    16113         { bs3CpuInstr4_vrsqrtps_XMM1_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValues) },
    16114         { bs3CpuInstr4_vrsqrtps_YMM1_YMM1_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM1,  PASS_ELEMENTS(s_aValues) },
    16115         { bs3CpuInstr4_vrsqrtps_YMM8_YMM8_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, YMM8,  PASS_ELEMENTS(s_aValues) },
    16116     };
    16117 
    16118     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    16119     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    16120     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    16121                                         g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4));
     15174
     15175    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig4));
    1612215176}
    1612315177
    … …  
    1632015374              /*256:out  */ -1 },
    1632115375    };
    16322     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     15376    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1632315377    {
    16324         { bs3CpuInstr4_rsqrtss_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    16325         { bs3CpuInstr4_rsqrtss_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    16326 
    16327         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM3_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    16328         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    16329 
    16330         { bs3CpuInstr4_rsqrtss_XMM1_XMM1_icebp_c16,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    16331         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM1_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    16332         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    16333         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM2_icebp_c16,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    16334         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
     15378        { BS3_INSTR4_ALL(rsqrtss_XMM1_XMM2),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     15379        { BS3_INSTR4_ALL(rsqrtss_XMM1_FSxBX),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     15380
     15381        { BS3_INSTR4_C64(rsqrtss_XMM8_XMM9),        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues)   },
     15382        { BS3_INSTR4_C64(rsqrtss_XMM8_FSxBX),       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     15383
     15384        { BS3_INSTR4_ALL(vrsqrtss_XMM1_XMM2_XMM3),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues)   },
     15385        { BS3_INSTR4_ALL(vrsqrtss_XMM1_XMM2_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     15386
     15387        { BS3_INSTR4_C64(vrsqrtss_XMM8_XMM9_XMM10), X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues)   },
     15388        { BS3_INSTR4_C64(vrsqrtss_XMM8_XMM9_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     15389
     15390        { BS3_INSTR4_ALL(rsqrtss_XMM1_XMM1),        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     15391        { BS3_INSTR4_ALL(vrsqrtss_XMM1_XMM1_XMM1),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     15392        { BS3_INSTR4_ALL(vrsqrtss_XMM1_XMM1_XMM2),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     15393        { BS3_INSTR4_ALL(vrsqrtss_XMM1_XMM2_XMM2),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     15394        { BS3_INSTR4_ALL(vrsqrtss_XMM1_XMM1_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValuesSR) },
     15395        { BS3_INSTR4_C64(vrsqrtss_XMM8_XMM8_XMM8),  X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
    1633515396    };
    16336     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    16337     {
    16338         { bs3CpuInstr4_rsqrtss_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    16339         { bs3CpuInstr4_rsqrtss_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    16340 
    16341         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM3_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    16342         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    16343 
    16344         { bs3CpuInstr4_rsqrtss_XMM1_XMM1_icebp_c32,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    16345         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM1_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    16346         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    16347         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM2_icebp_c32,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    16348         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    16349     };
    16350     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    16351     {
    16352         { bs3CpuInstr4_rsqrtss_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    16353         { bs3CpuInstr4_rsqrtss_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues)   },
    16354 
    16355         { bs3CpuInstr4_rsqrtss_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE,     XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues)   },
    16356         { bs3CpuInstr4_rsqrtss_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues)   },
    16357 
    16358         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM3_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues)   },
    16359         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues)   },
    16360 
    16361         { bs3CpuInstr4_vrsqrtss_XMM8_XMM9_XMM10_icebp_c64, X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues)   },
    16362         { bs3CpuInstr4_vrsqrtss_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues)   },
    16363 
    16364         { bs3CpuInstr4_rsqrtss_XMM1_XMM1_icebp_c64,        255,         RM_REG, T_SSE,     XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    16365         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM1_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    16366         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues)   },
    16367         { bs3CpuInstr4_vrsqrtss_XMM1_XMM2_XMM2_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM1, XMM2, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    16368         { bs3CpuInstr4_vrsqrtss_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesSR) },
    16369         { bs3CpuInstr4_vrsqrtss_XMM8_XMM8_XMM8_icebp_c64,  X86_XCPT_AC, RM_REG, T_AVX_128, XMM8, XMM8, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    16370     };
    16371 
    16372     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    16373     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    16374     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    16375                                         g_aXcptConfig5, RT_ELEMENTS(g_aXcptConfig5));
     15397
     15398    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig5));
    1637615399}
    1637715400
    … …  
    1683215855    };
    1683315856
    16834     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     15857    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1683515858    {
    16836         {  bs3CpuInstr4_dpps_XMM1_XMM2_000h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues00) },
    16837         {  bs3CpuInstr4_dpps_XMM1_XMM2_0E1h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesE1) },
    16838         {  bs3CpuInstr4_dpps_XMM1_XMM2_0FFh_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesFF) },
    16839         {  bs3CpuInstr4_dpps_XMM1_FSxBX_000h_icebp_c16,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues00) },
    16840         {  bs3CpuInstr4_dpps_XMM1_FSxBX_0E1h_icebp_c16,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16841         {  bs3CpuInstr4_dpps_XMM1_FSxBX_0FFh_icebp_c16,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    16842 
    16843         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM3_000h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues00) },
    16844         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM3_0E1h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValuesE1) },
    16845         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM3_0FFh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValuesFF) },
    16846         {  bs3CpuInstr4_vdpps_XMM1_XMM2_FSxBX_000h_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues00) },
    16847         {  bs3CpuInstr4_vdpps_XMM1_XMM2_FSxBX_0E1h_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16848         {  bs3CpuInstr4_vdpps_XMM1_XMM2_FSxBX_0FFh_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    16849 
    16850         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM3_000h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues00) },
    16851         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM3_0E1h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValuesE1) },
    16852         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM3_0FFh_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValuesFF) },
    16853         {  bs3CpuInstr4_vdpps_YMM1_YMM2_FSxBX_000h_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues00) },
    16854         {  bs3CpuInstr4_vdpps_YMM1_YMM2_FSxBX_0E1h_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16855         {  bs3CpuInstr4_vdpps_YMM1_YMM2_FSxBX_0FFh_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    16856 
    16857         {  bs3CpuInstr4_dpps_XMM1_XMM1_0E1h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16858 
    16859         {  bs3CpuInstr4_vdpps_XMM1_XMM1_XMM1_0E1h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16860         {  bs3CpuInstr4_vdpps_XMM1_XMM1_XMM2_0E1h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesE1) },
    16861         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM1_0E1h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM1,  PASS_ELEMENTS(s_aValuesE1) },
    16862         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM2_0E1h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16863         {  bs3CpuInstr4_vdpps_XMM1_XMM1_FSxBX_0E1h_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16864 
    16865         {  bs3CpuInstr4_vdpps_YMM1_YMM1_YMM1_0E1h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16866         {  bs3CpuInstr4_vdpps_YMM1_YMM1_YMM2_0E1h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesE1) },
    16867         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM1_0E1h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM1,  PASS_ELEMENTS(s_aValuesE1) },
    16868         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM2_0E1h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16869         {  bs3CpuInstr4_vdpps_YMM1_YMM1_FSxBX_0E1h_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
     15859        { BS3_INSTR4_ALL(dpps_XMM1_XMM2_000h),        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues00) },
     15860        { BS3_INSTR4_ALL(dpps_XMM1_XMM2_0E1h),        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValuesE1) },
     15861        { BS3_INSTR4_ALL(dpps_XMM1_XMM2_0FFh),        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValuesFF) },
     15862        { BS3_INSTR4_ALL(dpps_XMM1_FSxBX_000h),       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues00) },
     15863        { BS3_INSTR4_ALL(dpps_XMM1_FSxBX_0E1h),       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValuesE1) },
     15864        { BS3_INSTR4_ALL(dpps_XMM1_FSxBX_0FFh),       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValuesFF) },
     15865        { BS3_INSTR4_C64(dpps_XMM8_XMM9_0E1h),        255, RM_REG, T_SSE4_1,  XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValuesE1) },
     15866        { BS3_INSTR4_C64(dpps_XMM8_FSxBX_0E1h),       255, RM_MEM, T_SSE4_1,  XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValuesE1) },
     15867
     15868        { BS3_INSTR4_ALL(vdpps_XMM1_XMM2_XMM3_000h),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues00) },
     15869        { BS3_INSTR4_ALL(vdpps_XMM1_XMM2_XMM3_0E1h),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValuesE1) },
     15870        { BS3_INSTR4_ALL(vdpps_XMM1_XMM2_XMM3_0FFh),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValuesFF) },
     15871        { BS3_INSTR4_ALL(vdpps_XMM1_XMM2_FSxBX_000h), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues00) },
     15872        { BS3_INSTR4_ALL(vdpps_XMM1_XMM2_FSxBX_0E1h), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValuesE1) },
     15873        { BS3_INSTR4_ALL(vdpps_XMM1_XMM2_FSxBX_0FFh), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValuesFF) },
     15874        { BS3_INSTR4_C64(vdpps_XMM8_XMM9_XMM10_0E1h), 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValuesE1) },
     15875        { BS3_INSTR4_C64(vdpps_XMM8_XMM9_FSxBX_0E1h), 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValuesE1) },
     15876
     15877        { BS3_INSTR4_ALL(vdpps_YMM1_YMM2_YMM3_000h),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValues00) },
     15878        { BS3_INSTR4_ALL(vdpps_YMM1_YMM2_YMM3_0E1h),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValuesE1) },
     15879        { BS3_INSTR4_ALL(vdpps_YMM1_YMM2_YMM3_0FFh),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_TEST_ARRAY(s_aValuesFF) },
     15880        { BS3_INSTR4_ALL(vdpps_YMM1_YMM2_FSxBX_000h), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValues00) },
     15881        { BS3_INSTR4_ALL(vdpps_YMM1_YMM2_FSxBX_0E1h), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValuesE1) },
     15882        { BS3_INSTR4_ALL(vdpps_YMM1_YMM2_FSxBX_0FFh), 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_TEST_ARRAY(s_aValuesFF) },
     15883        { BS3_INSTR4_C64(vdpps_YMM8_YMM9_YMM10_0E1h), 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_TEST_ARRAY(s_aValuesE1) },
     15884        { BS3_INSTR4_C64(vdpps_YMM8_YMM9_FSxBX_0E1h), 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_TEST_ARRAY(s_aValuesE1) },
     15885
     15886        { BS3_INSTR4_ALL(dpps_XMM1_XMM1_0E1h),        255, RM_REG, T_SSE4_1,  XMM1, XMM1, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     15887        { BS3_INSTR4_C64(dpps_XMM8_XMM8_0E1h),        255, RM_REG, T_SSE4_1,  XMM8, XMM8, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     15888
     15889        { BS3_INSTR4_ALL(vdpps_XMM1_XMM1_XMM1_0E1h),  255, RM_REG, T_AVX_128, XMM1, XMM1, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     15890        { BS3_INSTR4_ALL(vdpps_XMM1_XMM1_XMM2_0E1h),  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValuesE1) },
     15891        { BS3_INSTR4_ALL(vdpps_XMM1_XMM2_XMM1_0E1h),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM1,  PASS_TEST_ARRAY(s_aValuesE1) },
     15892        { BS3_INSTR4_ALL(vdpps_XMM1_XMM2_XMM2_0E1h),  255, RM_REG, T_AVX_128, XMM1, XMM2, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     15893        { BS3_INSTR4_ALL(vdpps_XMM1_XMM1_FSxBX_0E1h), 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValuesE1) },
     15894        { BS3_INSTR4_C64(vdpps_XMM8_XMM8_XMM8_0E1h),  255, RM_REG, T_AVX_128, XMM8, XMM8, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     15895        { BS3_INSTR4_C64(vdpps_XMM8_XMM8_FSxBX_0E1h), 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValuesE1) },
     15896
     15897        { BS3_INSTR4_ALL(vdpps_YMM1_YMM1_YMM1_0E1h),  255, RM_REG, T_AVX_256, YMM1, YMM1, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     15898        { BS3_INSTR4_ALL(vdpps_YMM1_YMM1_YMM2_0E1h),  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_TEST_ARRAY(s_aValuesE1) },
     15899        { BS3_INSTR4_ALL(vdpps_YMM1_YMM2_YMM1_0E1h),  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM1,  PASS_TEST_ARRAY(s_aValuesE1) },
     15900        { BS3_INSTR4_ALL(vdpps_YMM1_YMM2_YMM2_0E1h),  255, RM_REG, T_AVX_256, YMM1, YMM2, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     15901        { BS3_INSTR4_ALL(vdpps_YMM1_YMM1_FSxBX_0E1h), 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_TEST_ARRAY(s_aValuesE1) },
     15902        { BS3_INSTR4_C64(vdpps_YMM8_YMM8_YMM8_0E1h),  255, RM_REG, T_AVX_256, YMM8, YMM8, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     15903        { BS3_INSTR4_C64(vdpps_YMM8_YMM8_FSxBX_0E1h), 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_TEST_ARRAY(s_aValuesE1) },
    1687015904    };
    16871     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    16872     {
    16873         {  bs3CpuInstr4_dpps_XMM1_XMM2_000h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues00) },
    16874         {  bs3CpuInstr4_dpps_XMM1_XMM2_0E1h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesE1) },
    16875         {  bs3CpuInstr4_dpps_XMM1_XMM2_0FFh_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesFF) },
    16876         {  bs3CpuInstr4_dpps_XMM1_FSxBX_000h_icebp_c32,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues00) },
    16877         {  bs3CpuInstr4_dpps_XMM1_FSxBX_0E1h_icebp_c32,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16878         {  bs3CpuInstr4_dpps_XMM1_FSxBX_0FFh_icebp_c32,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    16879 
    16880         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM3_000h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues00) },
    16881         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM3_0E1h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValuesE1) },
    16882         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM3_0FFh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValuesFF) },
    16883         {  bs3CpuInstr4_vdpps_XMM1_XMM2_FSxBX_000h_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues00) },
    16884         {  bs3CpuInstr4_vdpps_XMM1_XMM2_FSxBX_0E1h_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16885         {  bs3CpuInstr4_vdpps_XMM1_XMM2_FSxBX_0FFh_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    16886 
    16887         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM3_000h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues00) },
    16888         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM3_0E1h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValuesE1) },
    16889         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM3_0FFh_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValuesFF) },
    16890         {  bs3CpuInstr4_vdpps_YMM1_YMM2_FSxBX_000h_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues00) },
    16891         {  bs3CpuInstr4_vdpps_YMM1_YMM2_FSxBX_0E1h_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16892         {  bs3CpuInstr4_vdpps_YMM1_YMM2_FSxBX_0FFh_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    16893 
    16894         {  bs3CpuInstr4_dpps_XMM1_XMM1_0E1h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16895 
    16896         {  bs3CpuInstr4_vdpps_XMM1_XMM1_XMM1_0E1h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16897         {  bs3CpuInstr4_vdpps_XMM1_XMM1_XMM2_0E1h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesE1) },
    16898         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM1_0E1h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM1,  PASS_ELEMENTS(s_aValuesE1) },
    16899         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM2_0E1h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16900         {  bs3CpuInstr4_vdpps_XMM1_XMM1_FSxBX_0E1h_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16901 
    16902         {  bs3CpuInstr4_vdpps_YMM1_YMM1_YMM1_0E1h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16903         {  bs3CpuInstr4_vdpps_YMM1_YMM1_YMM2_0E1h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesE1) },
    16904         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM1_0E1h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM1,  PASS_ELEMENTS(s_aValuesE1) },
    16905         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM2_0E1h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16906         {  bs3CpuInstr4_vdpps_YMM1_YMM1_FSxBX_0E1h_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16907     };
    16908     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    16909     {
    16910         {  bs3CpuInstr4_dpps_XMM1_XMM2_000h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues00) },
    16911         {  bs3CpuInstr4_dpps_XMM1_XMM2_0E1h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesE1) },
    16912         {  bs3CpuInstr4_dpps_XMM1_XMM2_0FFh_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesFF) },
    16913         {  bs3CpuInstr4_dpps_XMM1_FSxBX_000h_icebp_c64,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues00) },
    16914         {  bs3CpuInstr4_dpps_XMM1_FSxBX_0E1h_icebp_c64,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16915         {  bs3CpuInstr4_dpps_XMM1_FSxBX_0FFh_icebp_c64,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    16916         {  bs3CpuInstr4_dpps_XMM8_XMM9_0E1h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValuesE1) },
    16917         {  bs3CpuInstr4_dpps_XMM8_FSxBX_0E1h_icebp_c64,       255, RM_MEM, T_SSE4_1,  XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16918 
    16919         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM3_000h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues00) },
    16920         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM3_0E1h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValuesE1) },
    16921         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM3_0FFh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValuesFF) },
    16922         {  bs3CpuInstr4_vdpps_XMM1_XMM2_FSxBX_000h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues00) },
    16923         {  bs3CpuInstr4_vdpps_XMM1_XMM2_FSxBX_0E1h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16924         {  bs3CpuInstr4_vdpps_XMM1_XMM2_FSxBX_0FFh_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    16925         {  bs3CpuInstr4_vdpps_XMM8_XMM9_XMM10_0E1h_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValuesE1) },
    16926         {  bs3CpuInstr4_vdpps_XMM8_XMM9_FSxBX_0E1h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16927 
    16928         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM3_000h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValues00) },
    16929         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM3_0E1h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValuesE1) },
    16930         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM3_0FFh_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM3,  PASS_ELEMENTS(s_aValuesFF) },
    16931         {  bs3CpuInstr4_vdpps_YMM1_YMM2_FSxBX_000h_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValues00) },
    16932         {  bs3CpuInstr4_vdpps_YMM1_YMM2_FSxBX_0E1h_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16933         {  bs3CpuInstr4_vdpps_YMM1_YMM2_FSxBX_0FFh_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM2, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    16934         {  bs3CpuInstr4_vdpps_YMM8_YMM9_YMM10_0E1h_icebp_c64, 255, RM_REG, T_AVX_256, YMM8, YMM9, YMM10, PASS_ELEMENTS(s_aValuesE1) },
    16935         {  bs3CpuInstr4_vdpps_YMM8_YMM9_FSxBX_0E1h_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM9, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16936 
    16937         {  bs3CpuInstr4_dpps_XMM1_XMM1_0E1h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16938         {  bs3CpuInstr4_dpps_XMM8_XMM8_0E1h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM8, XMM8, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16939 
    16940         {  bs3CpuInstr4_vdpps_XMM1_XMM1_XMM1_0E1h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16941         {  bs3CpuInstr4_vdpps_XMM1_XMM1_XMM2_0E1h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesE1) },
    16942         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM1_0E1h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM1,  PASS_ELEMENTS(s_aValuesE1) },
    16943         {  bs3CpuInstr4_vdpps_XMM1_XMM2_XMM2_0E1h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16944         {  bs3CpuInstr4_vdpps_XMM1_XMM1_FSxBX_0E1h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16945         {  bs3CpuInstr4_vdpps_XMM8_XMM8_XMM8_0E1h_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM8, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16946         {  bs3CpuInstr4_vdpps_XMM8_XMM8_FSxBX_0E1h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16947 
    16948         {  bs3CpuInstr4_vdpps_YMM1_YMM1_YMM1_0E1h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16949         {  bs3CpuInstr4_vdpps_YMM1_YMM1_YMM2_0E1h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM1, YMM2,  PASS_ELEMENTS(s_aValuesE1) },
    16950         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM1_0E1h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, YMM1,  PASS_ELEMENTS(s_aValuesE1) },
    16951         {  bs3CpuInstr4_vdpps_YMM1_YMM2_YMM2_0E1h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, YMM2, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16952         {  bs3CpuInstr4_vdpps_YMM1_YMM1_FSxBX_0E1h_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, YMM1, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16953         {  bs3CpuInstr4_vdpps_YMM8_YMM8_YMM8_0E1h_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, YMM8, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    16954         {  bs3CpuInstr4_vdpps_YMM8_YMM8_FSxBX_0E1h_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, YMM8, FSxBX, PASS_ELEMENTS(s_aValuesE1) },
    16955     };
    16956 
    16957     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16,s_aTests32,s_aTests64);
    16958     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    16959     return bs3CpuInstr4_WorkerTestType1(bMode,s_aTests[iTest].paTests,s_aTests[iTest].cTests,
    16960                                         g_aXcptConfig4,RT_ELEMENTS(g_aXcptConfig4));
     15905
     15906    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig4));
    1696115907}
    1696215908
    … …  
    1748616432    };
    1748716433
    17488     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     16434    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1748916435    {
    17490         {  bs3CpuInstr4_dppd_XMM1_XMM2_000h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues00) },
    17491         {  bs3CpuInstr4_dppd_XMM1_XMM2_022h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues22) },
    17492         {  bs3CpuInstr4_dppd_XMM1_XMM2_0FFh_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesFF) },
    17493         {  bs3CpuInstr4_dppd_XMM1_FSxBX_000h_icebp_c16,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues00) },
    17494         {  bs3CpuInstr4_dppd_XMM1_FSxBX_022h_icebp_c16,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues22) },
    17495         {  bs3CpuInstr4_dppd_XMM1_FSxBX_0FFh_icebp_c16,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    17496 
    17497         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM3_000h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues00) },
    17498         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM3_022h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues22) },
    17499         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM3_0FFh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValuesFF) },
    17500         {  bs3CpuInstr4_vdppd_XMM1_XMM2_FSxBX_000h_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues00) },
    17501         {  bs3CpuInstr4_vdppd_XMM1_XMM2_FSxBX_022h_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues22) },
    17502         {  bs3CpuInstr4_vdppd_XMM1_XMM2_FSxBX_0FFh_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    17503 
    17504         {  bs3CpuInstr4_dppd_XMM1_XMM1_022h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    17505 
    17506         {  bs3CpuInstr4_vdppd_XMM1_XMM1_XMM1_022h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    17507         {  bs3CpuInstr4_vdppd_XMM1_XMM1_XMM2_022h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues22) },
    17508         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM1_022h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM1,  PASS_ELEMENTS(s_aValues22) },
    17509         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM2_022h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    17510         {  bs3CpuInstr4_vdppd_XMM1_XMM1_FSxBX_022h_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues22) },
     16436        { BS3_INSTR4_ALL(dppd_XMM1_XMM2_000h),        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues00) },
     16437        { BS3_INSTR4_ALL(dppd_XMM1_XMM2_022h),        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues22) },
     16438        { BS3_INSTR4_ALL(dppd_XMM1_XMM2_0FFh),        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValuesFF) },
     16439        { BS3_INSTR4_ALL(dppd_XMM1_FSxBX_000h),       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues00) },
     16440        { BS3_INSTR4_ALL(dppd_XMM1_FSxBX_022h),       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues22) },
     16441        { BS3_INSTR4_ALL(dppd_XMM1_FSxBX_0FFh),       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValuesFF) },
     16442        { BS3_INSTR4_C64(dppd_XMM8_XMM9_022h),        255, RM_REG, T_SSE4_1,  XMM8, XMM8, XMM9,  PASS_TEST_ARRAY(s_aValues22) },
     16443        { BS3_INSTR4_C64(dppd_XMM8_FSxBX_022h),       255, RM_MEM, T_SSE4_1,  XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues22) },
     16444
     16445        { BS3_INSTR4_ALL(vdppd_XMM1_XMM2_XMM3_000h),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues00) },
     16446        { BS3_INSTR4_ALL(vdppd_XMM1_XMM2_XMM3_022h),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValues22) },
     16447        { BS3_INSTR4_ALL(vdppd_XMM1_XMM2_XMM3_0FFh),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_TEST_ARRAY(s_aValuesFF) },
     16448        { BS3_INSTR4_ALL(vdppd_XMM1_XMM2_FSxBX_000h), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues00) },
     16449        { BS3_INSTR4_ALL(vdppd_XMM1_XMM2_FSxBX_022h), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues22) },
     16450        { BS3_INSTR4_ALL(vdppd_XMM1_XMM2_FSxBX_0FFh), 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValuesFF) },
     16451        { BS3_INSTR4_C64(vdppd_XMM8_XMM9_XMM10_022h), 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_TEST_ARRAY(s_aValues22) },
     16452        { BS3_INSTR4_C64(vdppd_XMM8_XMM9_FSxBX_022h), 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues22) },
     16453
     16454        { BS3_INSTR4_ALL(dppd_XMM1_XMM1_022h),        255, RM_REG, T_SSE4_1,  XMM1, XMM1, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     16455        { BS3_INSTR4_C64(dppd_XMM8_XMM8_022h),        255, RM_REG, T_SSE4_1,  XMM8, XMM8, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     16456
     16457        { BS3_INSTR4_ALL(vdppd_XMM1_XMM1_XMM1_022h),  255, RM_REG, T_AVX_128, XMM1, XMM1, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     16458        { BS3_INSTR4_ALL(vdppd_XMM1_XMM1_XMM2_022h),  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_TEST_ARRAY(s_aValues22) },
     16459        { BS3_INSTR4_ALL(vdppd_XMM1_XMM2_XMM1_022h),  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM1,  PASS_TEST_ARRAY(s_aValues22) },
     16460        { BS3_INSTR4_ALL(vdppd_XMM1_XMM2_XMM2_022h),  255, RM_REG, T_AVX_128, XMM1, XMM2, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     16461        { BS3_INSTR4_ALL(vdppd_XMM1_XMM1_FSxBX_022h), 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues22) },
     16462        { BS3_INSTR4_C64(vdppd_XMM8_XMM8_XMM8_022h),  255, RM_REG, T_AVX_128, XMM8, XMM8, NOREG, PASS_TEST_ARRAY(s_aValuesSR) },
     16463        { BS3_INSTR4_C64(vdppd_XMM8_XMM8_FSxBX_022h), 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues22) },
    1751116464    };
    17512     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    17513     {
    17514         {  bs3CpuInstr4_dppd_XMM1_XMM2_000h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues00) },
    17515         {  bs3CpuInstr4_dppd_XMM1_XMM2_022h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues22) },
    17516         {  bs3CpuInstr4_dppd_XMM1_XMM2_0FFh_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesFF) },
    17517         {  bs3CpuInstr4_dppd_XMM1_FSxBX_000h_icebp_c32,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues00) },
    17518         {  bs3CpuInstr4_dppd_XMM1_FSxBX_022h_icebp_c32,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues22) },
    17519         {  bs3CpuInstr4_dppd_XMM1_FSxBX_0FFh_icebp_c32,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    17520 
    17521         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM3_000h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues00) },
    17522         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM3_022h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues22) },
    17523         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM3_0FFh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValuesFF) },
    17524         {  bs3CpuInstr4_vdppd_XMM1_XMM2_FSxBX_000h_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues00) },
    17525         {  bs3CpuInstr4_vdppd_XMM1_XMM2_FSxBX_022h_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues22) },
    17526         {  bs3CpuInstr4_vdppd_XMM1_XMM2_FSxBX_0FFh_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    17527 
    17528         {  bs3CpuInstr4_dppd_XMM1_XMM1_022h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    17529 
    17530         {  bs3CpuInstr4_vdppd_XMM1_XMM1_XMM1_022h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    17531         {  bs3CpuInstr4_vdppd_XMM1_XMM1_XMM2_022h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues22) },
    17532         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM1_022h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM1,  PASS_ELEMENTS(s_aValues22) },
    17533         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM2_022h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    17534         {  bs3CpuInstr4_vdppd_XMM1_XMM1_FSxBX_022h_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues22) },
    17535     };
    17536     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    17537     {
    17538         {  bs3CpuInstr4_dppd_XMM1_XMM2_000h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues00) },
    17539         {  bs3CpuInstr4_dppd_XMM1_XMM2_022h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues22) },
    17540         {  bs3CpuInstr4_dppd_XMM1_XMM2_0FFh_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValuesFF) },
    17541         {  bs3CpuInstr4_dppd_XMM1_FSxBX_000h_icebp_c64,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues00) },
    17542         {  bs3CpuInstr4_dppd_XMM1_FSxBX_022h_icebp_c64,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues22) },
    17543         {  bs3CpuInstr4_dppd_XMM1_FSxBX_0FFh_icebp_c64,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    17544         {  bs3CpuInstr4_dppd_XMM8_XMM9_022h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM8, XMM8, XMM9,  PASS_ELEMENTS(s_aValues22) },
    17545         {  bs3CpuInstr4_dppd_XMM8_FSxBX_022h_icebp_c64,       255, RM_MEM, T_SSE4_1,  XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues22) },
    17546 
    17547         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM3_000h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues00) },
    17548         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM3_022h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValues22) },
    17549         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM3_0FFh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM3,  PASS_ELEMENTS(s_aValuesFF) },
    17550         {  bs3CpuInstr4_vdppd_XMM1_XMM2_FSxBX_000h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues00) },
    17551         {  bs3CpuInstr4_vdppd_XMM1_XMM2_FSxBX_022h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues22) },
    17552         {  bs3CpuInstr4_vdppd_XMM1_XMM2_FSxBX_0FFh_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValuesFF) },
    17553         {  bs3CpuInstr4_vdppd_XMM8_XMM9_XMM10_022h_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9, XMM10, PASS_ELEMENTS(s_aValues22) },
    17554         {  bs3CpuInstr4_vdppd_XMM8_XMM9_FSxBX_022h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues22) },
    17555 
    17556         {  bs3CpuInstr4_dppd_XMM1_XMM1_022h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    17557         {  bs3CpuInstr4_dppd_XMM8_XMM8_022h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM8, XMM8, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    17558 
    17559         {  bs3CpuInstr4_vdppd_XMM1_XMM1_XMM1_022h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    17560         {  bs3CpuInstr4_vdppd_XMM1_XMM1_XMM2_022h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1, XMM2,  PASS_ELEMENTS(s_aValues22) },
    17561         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM1_022h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, XMM1,  PASS_ELEMENTS(s_aValues22) },
    17562         {  bs3CpuInstr4_vdppd_XMM1_XMM2_XMM2_022h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    17563         {  bs3CpuInstr4_vdppd_XMM1_XMM1_FSxBX_022h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues22) },
    17564         {  bs3CpuInstr4_vdppd_XMM8_XMM8_XMM8_022h_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM8, NOREG, PASS_ELEMENTS(s_aValuesSR) },
    17565         {  bs3CpuInstr4_vdppd_XMM8_XMM8_FSxBX_022h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues22) },
    17566     };
    17567 
    17568     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16,s_aTests32,s_aTests64);
    17569     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    17570     return bs3CpuInstr4_WorkerTestType1(bMode,s_aTests[iTest].paTests,s_aTests[iTest].cTests,
    17571                                         g_aXcptConfig4,RT_ELEMENTS(g_aXcptConfig4));
     16465
     16466    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig4));
    1757216467}
    1757316468
    … …  
    1764916544    };
    1765016545
    17651     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     16546    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1765216547    {
    17653         {  bs3CpuInstr4_roundps_XMM1_XMM1_008h_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17654         {  bs3CpuInstr4_roundps_XMM1_XMM2_000h_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17655         {  bs3CpuInstr4_roundps_XMM1_XMM2_008h_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17656         {  bs3CpuInstr4_roundps_XMM1_XMM2_009h_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17657         {  bs3CpuInstr4_roundps_XMM1_XMM2_00ah_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17658         {  bs3CpuInstr4_roundps_XMM1_XMM2_00bh_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17659         {  bs3CpuInstr4_roundps_XMM1_XMM2_00ch_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17660         {  bs3CpuInstr4_roundps_XMM1_XMM2_00dh_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17661         {  bs3CpuInstr4_roundps_XMM1_XMM2_00eh_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17662         {  bs3CpuInstr4_roundps_XMM1_XMM2_00fh_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17663         {  bs3CpuInstr4_roundps_XMM1_XMM2_0ffh_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17664         {  bs3CpuInstr4_roundps_XMM1_FSxBX_008h_icebp_c16,  255, RM_MEM, T_SSE4_1,  XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17665 
    17666         {  bs3CpuInstr4_vroundps_XMM1_XMM1_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17667         {  bs3CpuInstr4_vroundps_XMM1_XMM2_000h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17668         {  bs3CpuInstr4_vroundps_XMM1_XMM2_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17669         {  bs3CpuInstr4_vroundps_XMM1_XMM2_009h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17670         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00ah_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17671         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00bh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17672         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00ch_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17673         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00dh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17674         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00eh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17675         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00fh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17676         {  bs3CpuInstr4_vroundps_XMM1_XMM2_0ffh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17677         {  bs3CpuInstr4_vroundps_XMM1_FSxBX_008h_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17678 
    17679         {  bs3CpuInstr4_vroundps_YMM1_YMM1_008h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17680         {  bs3CpuInstr4_vroundps_YMM1_YMM2_000h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17681         {  bs3CpuInstr4_vroundps_YMM1_YMM2_008h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17682         {  bs3CpuInstr4_vroundps_YMM1_YMM2_009h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17683         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00ah_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17684         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00bh_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17685         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00ch_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17686         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00dh_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17687         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00eh_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17688         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00fh_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17689         {  bs3CpuInstr4_vroundps_YMM1_YMM2_0ffh_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17690         {  bs3CpuInstr4_vroundps_YMM1_FSxBX_008h_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
     16548        { BS3_INSTR4_ALL(roundps_XMM1_XMM1_008h),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValuesNE) },
     16549        { BS3_INSTR4_ALL(roundps_XMM1_XMM2_000h),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesPE) },
     16550        { BS3_INSTR4_ALL(roundps_XMM1_XMM2_008h),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesNE) },
     16551        { BS3_INSTR4_ALL(roundps_XMM1_XMM2_009h),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesNI) },
     16552        { BS3_INSTR4_ALL(roundps_XMM1_XMM2_00ah),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesPI) },
     16553        { BS3_INSTR4_ALL(roundps_XMM1_XMM2_00bh),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesZR) },
     16554        { BS3_INSTR4_ALL(roundps_XMM1_XMM2_00ch),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16555        { BS3_INSTR4_ALL(roundps_XMM1_XMM2_00dh),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16556        { BS3_INSTR4_ALL(roundps_XMM1_XMM2_00eh),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16557        { BS3_INSTR4_ALL(roundps_XMM1_XMM2_00fh),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16558        { BS3_INSTR4_ALL(roundps_XMM1_XMM2_0ffh),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesNV) },
     16559        { BS3_INSTR4_ALL(roundps_XMM1_FSxBX_008h),  255, RM_MEM, T_SSE4_1,  XMM1, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16560        { BS3_INSTR4_C64(roundps_XMM8_XMM8_008h),   255, RM_REG, T_SSE4_1,  XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValuesNE) },
     16561        { BS3_INSTR4_C64(roundps_XMM8_XMM9_008h),   255, RM_REG, T_SSE4_1,  XMM8, NOREG, XMM9,  PASS_TEST_ARRAY(s_aValuesNE) },
     16562        { BS3_INSTR4_C64(roundps_XMM8_FSxBX_008h),  255, RM_MEM, T_SSE4_1,  XMM8, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16563
     16564        { BS3_INSTR4_ALL(vroundps_XMM1_XMM1_008h),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValuesNE) },
     16565        { BS3_INSTR4_ALL(vroundps_XMM1_XMM2_000h),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesPE) },
     16566        { BS3_INSTR4_ALL(vroundps_XMM1_XMM2_008h),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesNE) },
     16567        { BS3_INSTR4_ALL(vroundps_XMM1_XMM2_009h),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesNI) },
     16568        { BS3_INSTR4_ALL(vroundps_XMM1_XMM2_00ah),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesPI) },
     16569        { BS3_INSTR4_ALL(vroundps_XMM1_XMM2_00bh),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesZR) },
     16570        { BS3_INSTR4_ALL(vroundps_XMM1_XMM2_00ch),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16571        { BS3_INSTR4_ALL(vroundps_XMM1_XMM2_00dh),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16572        { BS3_INSTR4_ALL(vroundps_XMM1_XMM2_00eh),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16573        { BS3_INSTR4_ALL(vroundps_XMM1_XMM2_00fh),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16574        { BS3_INSTR4_ALL(vroundps_XMM1_XMM2_0ffh),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesNV) },
     16575        { BS3_INSTR4_ALL(vroundps_XMM1_FSxBX_008h), 255, RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16576        { BS3_INSTR4_C64(vroundps_XMM8_XMM8_008h),  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValuesNE) },
     16577        { BS3_INSTR4_C64(vroundps_XMM8_XMM9_008h),  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM9,  PASS_TEST_ARRAY(s_aValuesNE) },
     16578        { BS3_INSTR4_C64(vroundps_XMM8_FSxBX_008h), 255, RM_MEM, T_AVX_128, XMM8, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16579
     16580        { BS3_INSTR4_ALL(vroundps_YMM1_YMM1_008h),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM1,  PASS_TEST_ARRAY(s_aValuesNE) },
     16581        { BS3_INSTR4_ALL(vroundps_YMM1_YMM2_000h),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesPE) },
     16582        { BS3_INSTR4_ALL(vroundps_YMM1_YMM2_008h),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesNE) },
     16583        { BS3_INSTR4_ALL(vroundps_YMM1_YMM2_009h),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesNI) },
     16584        { BS3_INSTR4_ALL(vroundps_YMM1_YMM2_00ah),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesPI) },
     16585        { BS3_INSTR4_ALL(vroundps_YMM1_YMM2_00bh),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesZR) },
     16586        { BS3_INSTR4_ALL(vroundps_YMM1_YMM2_00ch),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16587        { BS3_INSTR4_ALL(vroundps_YMM1_YMM2_00dh),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16588        { BS3_INSTR4_ALL(vroundps_YMM1_YMM2_00eh),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16589        { BS3_INSTR4_ALL(vroundps_YMM1_YMM2_00fh),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16590        { BS3_INSTR4_ALL(vroundps_YMM1_YMM2_0ffh),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesNV) },
     16591        { BS3_INSTR4_ALL(vroundps_YMM1_FSxBX_008h), 255, RM_MEM, T_AVX_256, YMM1, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16592        { BS3_INSTR4_C64(vroundps_YMM8_YMM8_008h),  255, RM_REG, T_AVX_256, YMM8, NOREG, YMM8,  PASS_TEST_ARRAY(s_aValuesNE) },
     16593        { BS3_INSTR4_C64(vroundps_YMM8_YMM9_008h),  255, RM_REG, T_AVX_256, YMM8, NOREG, YMM9,  PASS_TEST_ARRAY(s_aValuesNE) },
     16594        { BS3_INSTR4_C64(vroundps_YMM8_FSxBX_008h), 255, RM_MEM, T_AVX_256, YMM8, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
    1769116595    };
    17692     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    17693     {
    17694         {  bs3CpuInstr4_roundps_XMM1_XMM1_008h_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17695         {  bs3CpuInstr4_roundps_XMM1_XMM2_000h_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17696         {  bs3CpuInstr4_roundps_XMM1_XMM2_008h_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17697         {  bs3CpuInstr4_roundps_XMM1_XMM2_009h_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17698         {  bs3CpuInstr4_roundps_XMM1_XMM2_00ah_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17699         {  bs3CpuInstr4_roundps_XMM1_XMM2_00bh_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17700         {  bs3CpuInstr4_roundps_XMM1_XMM2_00ch_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17701         {  bs3CpuInstr4_roundps_XMM1_XMM2_00dh_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17702         {  bs3CpuInstr4_roundps_XMM1_XMM2_00eh_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17703         {  bs3CpuInstr4_roundps_XMM1_XMM2_00fh_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17704         {  bs3CpuInstr4_roundps_XMM1_XMM2_0ffh_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17705         {  bs3CpuInstr4_roundps_XMM1_FSxBX_008h_icebp_c32,  255, RM_MEM, T_SSE4_1,  XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17706 
    17707         {  bs3CpuInstr4_vroundps_XMM1_XMM1_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17708         {  bs3CpuInstr4_vroundps_XMM1_XMM2_000h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17709         {  bs3CpuInstr4_vroundps_XMM1_XMM2_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17710         {  bs3CpuInstr4_vroundps_XMM1_XMM2_009h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17711         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00ah_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17712         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00bh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17713         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00ch_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17714         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00dh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17715         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00eh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17716         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00fh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17717         {  bs3CpuInstr4_vroundps_XMM1_XMM2_0ffh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17718         {  bs3CpuInstr4_vroundps_XMM1_FSxBX_008h_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17719 
    17720         {  bs3CpuInstr4_vroundps_YMM1_YMM1_008h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17721         {  bs3CpuInstr4_vroundps_YMM1_YMM2_000h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17722         {  bs3CpuInstr4_vroundps_YMM1_YMM2_008h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17723         {  bs3CpuInstr4_vroundps_YMM1_YMM2_009h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17724         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00ah_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17725         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00bh_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17726         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00ch_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17727         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00dh_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17728         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00eh_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17729         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00fh_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17730         {  bs3CpuInstr4_vroundps_YMM1_YMM2_0ffh_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17731         {  bs3CpuInstr4_vroundps_YMM1_FSxBX_008h_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17732     };
    17733     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    17734     {
    17735         {  bs3CpuInstr4_roundps_XMM1_XMM1_008h_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17736         {  bs3CpuInstr4_roundps_XMM1_XMM2_000h_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17737         {  bs3CpuInstr4_roundps_XMM1_XMM2_008h_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17738         {  bs3CpuInstr4_roundps_XMM1_XMM2_009h_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17739         {  bs3CpuInstr4_roundps_XMM1_XMM2_00ah_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17740         {  bs3CpuInstr4_roundps_XMM1_XMM2_00bh_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17741         {  bs3CpuInstr4_roundps_XMM1_XMM2_00ch_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17742         {  bs3CpuInstr4_roundps_XMM1_XMM2_00dh_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17743         {  bs3CpuInstr4_roundps_XMM1_XMM2_00eh_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17744         {  bs3CpuInstr4_roundps_XMM1_XMM2_00fh_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17745         {  bs3CpuInstr4_roundps_XMM1_XMM2_0ffh_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17746         {  bs3CpuInstr4_roundps_XMM1_FSxBX_008h_icebp_c64,  255, RM_MEM, T_SSE4_1,  XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17747         {  bs3CpuInstr4_roundps_XMM8_XMM8_008h_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValuesNE) },
    17748         {  bs3CpuInstr4_roundps_XMM8_XMM9_008h_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM8, NOREG, XMM9,  PASS_ELEMENTS(s_aValuesNE) },
    17749         {  bs3CpuInstr4_roundps_XMM8_FSxBX_008h_icebp_c64,  255, RM_MEM, T_SSE4_1,  XMM8, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17750 
    17751         {  bs3CpuInstr4_vroundps_XMM1_XMM1_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17752         {  bs3CpuInstr4_vroundps_XMM1_XMM2_000h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17753         {  bs3CpuInstr4_vroundps_XMM1_XMM2_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17754         {  bs3CpuInstr4_vroundps_XMM1_XMM2_009h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17755         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00ah_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17756         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00bh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17757         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00ch_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17758         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00dh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17759         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00eh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17760         {  bs3CpuInstr4_vroundps_XMM1_XMM2_00fh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17761         {  bs3CpuInstr4_vroundps_XMM1_XMM2_0ffh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17762         {  bs3CpuInstr4_vroundps_XMM1_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17763         {  bs3CpuInstr4_vroundps_XMM8_XMM8_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValuesNE) },
    17764         {  bs3CpuInstr4_vroundps_XMM8_XMM9_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM9,  PASS_ELEMENTS(s_aValuesNE) },
    17765         {  bs3CpuInstr4_vroundps_XMM8_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17766 
    17767         {  bs3CpuInstr4_vroundps_YMM1_YMM1_008h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17768         {  bs3CpuInstr4_vroundps_YMM1_YMM2_000h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17769         {  bs3CpuInstr4_vroundps_YMM1_YMM2_008h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17770         {  bs3CpuInstr4_vroundps_YMM1_YMM2_009h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17771         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00ah_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17772         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00bh_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17773         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00ch_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17774         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00dh_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17775         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00eh_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17776         {  bs3CpuInstr4_vroundps_YMM1_YMM2_00fh_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17777         {  bs3CpuInstr4_vroundps_YMM1_YMM2_0ffh_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17778         {  bs3CpuInstr4_vroundps_YMM1_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17779         {  bs3CpuInstr4_vroundps_YMM8_YMM8_008h_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, NOREG, YMM8,  PASS_ELEMENTS(s_aValuesNE) },
    17780         {  bs3CpuInstr4_vroundps_YMM8_YMM9_008h_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, NOREG, YMM9,  PASS_ELEMENTS(s_aValuesNE) },
    17781         {  bs3CpuInstr4_vroundps_YMM8_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17782     };
    17783 
    17784     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16,s_aTests32,s_aTests64);
    17785     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    17786     return bs3CpuInstr4_WorkerTestType1(bMode,s_aTests[iTest].paTests,s_aTests[iTest].cTests,
    17787                                         g_aXcptConfig2,RT_ELEMENTS(g_aXcptConfig2));
     16596
     16597    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    1778816598}
    1778916599
    … …  
    1786516675    };
    1786616676
    17867     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     16677    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1786816678    {
    17869         {  bs3CpuInstr4_roundpd_XMM1_XMM1_008h_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17870         {  bs3CpuInstr4_roundpd_XMM1_XMM2_000h_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17871         {  bs3CpuInstr4_roundpd_XMM1_XMM2_008h_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17872         {  bs3CpuInstr4_roundpd_XMM1_XMM2_009h_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17873         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00ah_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17874         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00bh_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17875         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00ch_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17876         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00dh_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17877         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00eh_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17878         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00fh_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17879         {  bs3CpuInstr4_roundpd_XMM1_XMM2_0ffh_icebp_c16,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17880         {  bs3CpuInstr4_roundpd_XMM1_FSxBX_008h_icebp_c16,  255, RM_MEM, T_SSE4_1,  XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17881 
    17882         {  bs3CpuInstr4_vroundpd_XMM1_XMM1_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17883         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_000h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17884         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17885         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_009h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17886         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00ah_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17887         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00bh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17888         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00ch_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17889         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00dh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17890         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00eh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17891         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00fh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17892         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_0ffh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17893         {  bs3CpuInstr4_vroundpd_XMM1_FSxBX_008h_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17894 
    17895         {  bs3CpuInstr4_vroundpd_YMM1_YMM1_008h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17896         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_000h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17897         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_008h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17898         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_009h_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17899         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00ah_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17900         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00bh_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17901         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00ch_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17902         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00dh_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17903         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00eh_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17904         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00fh_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17905         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_0ffh_icebp_c16,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17906         {  bs3CpuInstr4_vroundpd_YMM1_FSxBX_008h_icebp_c16, 255, RM_MEM, T_AVX_256, YMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
     16679        { BS3_INSTR4_ALL(roundpd_XMM1_XMM1_008h),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValuesNE) },
     16680        { BS3_INSTR4_ALL(roundpd_XMM1_XMM2_000h),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesPE) },
     16681        { BS3_INSTR4_ALL(roundpd_XMM1_XMM2_008h),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesNE) },
     16682        { BS3_INSTR4_ALL(roundpd_XMM1_XMM2_009h),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesNI) },
     16683        { BS3_INSTR4_ALL(roundpd_XMM1_XMM2_00ah),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesPI) },
     16684        { BS3_INSTR4_ALL(roundpd_XMM1_XMM2_00bh),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesZR) },
     16685        { BS3_INSTR4_ALL(roundpd_XMM1_XMM2_00ch),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16686        { BS3_INSTR4_ALL(roundpd_XMM1_XMM2_00dh),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16687        { BS3_INSTR4_ALL(roundpd_XMM1_XMM2_00eh),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16688        { BS3_INSTR4_ALL(roundpd_XMM1_XMM2_00fh),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16689        { BS3_INSTR4_ALL(roundpd_XMM1_XMM2_0ffh),   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesNV) },
     16690        { BS3_INSTR4_ALL(roundpd_XMM1_FSxBX_008h),  255, RM_MEM, T_SSE4_1,  XMM1, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16691        { BS3_INSTR4_C64(roundpd_XMM8_XMM8_008h),   255, RM_REG, T_SSE4_1,  XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValuesNE) },
     16692        { BS3_INSTR4_C64(roundpd_XMM8_XMM9_008h),   255, RM_REG, T_SSE4_1,  XMM8, NOREG, XMM9,  PASS_TEST_ARRAY(s_aValuesNE) },
     16693        { BS3_INSTR4_C64(roundpd_XMM8_FSxBX_008h),  255, RM_MEM, T_SSE4_1,  XMM8, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16694
     16695        { BS3_INSTR4_ALL(vroundpd_XMM1_XMM1_008h),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValuesNE) },
     16696        { BS3_INSTR4_ALL(vroundpd_XMM1_XMM2_000h),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesPE) },
     16697        { BS3_INSTR4_ALL(vroundpd_XMM1_XMM2_008h),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesNE) },
     16698        { BS3_INSTR4_ALL(vroundpd_XMM1_XMM2_009h),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesNI) },
     16699        { BS3_INSTR4_ALL(vroundpd_XMM1_XMM2_00ah),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesPI) },
     16700        { BS3_INSTR4_ALL(vroundpd_XMM1_XMM2_00bh),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesZR) },
     16701        { BS3_INSTR4_ALL(vroundpd_XMM1_XMM2_00ch),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16702        { BS3_INSTR4_ALL(vroundpd_XMM1_XMM2_00dh),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16703        { BS3_INSTR4_ALL(vroundpd_XMM1_XMM2_00eh),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16704        { BS3_INSTR4_ALL(vroundpd_XMM1_XMM2_00fh),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16705        { BS3_INSTR4_ALL(vroundpd_XMM1_XMM2_0ffh),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesNV) },
     16706        { BS3_INSTR4_ALL(vroundpd_XMM1_FSxBX_008h), 255, RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16707        { BS3_INSTR4_C64(vroundpd_XMM8_XMM8_008h),  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValuesNE) },
     16708        { BS3_INSTR4_C64(vroundpd_XMM8_XMM9_008h),  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM9,  PASS_TEST_ARRAY(s_aValuesNE) },
     16709        { BS3_INSTR4_C64(vroundpd_XMM8_FSxBX_008h), 255, RM_MEM, T_AVX_128, XMM8, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16710
     16711        { BS3_INSTR4_ALL(vroundpd_YMM1_YMM1_008h),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM1,  PASS_TEST_ARRAY(s_aValuesNE) },
     16712        { BS3_INSTR4_ALL(vroundpd_YMM1_YMM2_000h),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesPE) },
     16713        { BS3_INSTR4_ALL(vroundpd_YMM1_YMM2_008h),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesNE) },
     16714        { BS3_INSTR4_ALL(vroundpd_YMM1_YMM2_009h),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesNI) },
     16715        { BS3_INSTR4_ALL(vroundpd_YMM1_YMM2_00ah),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesPI) },
     16716        { BS3_INSTR4_ALL(vroundpd_YMM1_YMM2_00bh),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesZR) },
     16717        { BS3_INSTR4_ALL(vroundpd_YMM1_YMM2_00ch),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16718        { BS3_INSTR4_ALL(vroundpd_YMM1_YMM2_00dh),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16719        { BS3_INSTR4_ALL(vroundpd_YMM1_YMM2_00eh),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16720        { BS3_INSTR4_ALL(vroundpd_YMM1_YMM2_00fh),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16721        { BS3_INSTR4_ALL(vroundpd_YMM1_YMM2_0ffh),  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesNV) },
     16722        { BS3_INSTR4_ALL(vroundpd_YMM1_FSxBX_008h), 255, RM_MEM, T_AVX_256, YMM1, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16723        { BS3_INSTR4_C64(vroundpd_YMM8_YMM8_008h),  255, RM_REG, T_AVX_256, YMM8, NOREG, YMM8,  PASS_TEST_ARRAY(s_aValuesNE) },
     16724        { BS3_INSTR4_C64(vroundpd_YMM8_YMM9_008h),  255, RM_REG, T_AVX_256, YMM8, NOREG, YMM9,  PASS_TEST_ARRAY(s_aValuesNE) },
     16725        { BS3_INSTR4_C64(vroundpd_YMM8_FSxBX_008h), 255, RM_MEM, T_AVX_256, YMM8, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
    1790716726    };
    17908     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    17909     {
    17910         {  bs3CpuInstr4_roundpd_XMM1_XMM1_008h_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17911         {  bs3CpuInstr4_roundpd_XMM1_XMM2_000h_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17912         {  bs3CpuInstr4_roundpd_XMM1_XMM2_008h_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17913         {  bs3CpuInstr4_roundpd_XMM1_XMM2_009h_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17914         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00ah_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17915         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00bh_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17916         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00ch_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17917         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00dh_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17918         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00eh_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17919         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00fh_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17920         {  bs3CpuInstr4_roundpd_XMM1_XMM2_0ffh_icebp_c32,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17921         {  bs3CpuInstr4_roundpd_XMM1_FSxBX_008h_icebp_c32,  255, RM_MEM, T_SSE4_1,  XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17922 
    17923         {  bs3CpuInstr4_vroundpd_XMM1_XMM1_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17924         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_000h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17925         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17926         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_009h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17927         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00ah_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17928         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00bh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17929         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00ch_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17930         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00dh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17931         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00eh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17932         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00fh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17933         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_0ffh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17934         {  bs3CpuInstr4_vroundpd_XMM1_FSxBX_008h_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17935 
    17936         {  bs3CpuInstr4_vroundpd_YMM1_YMM1_008h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17937         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_000h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17938         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_008h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17939         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_009h_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17940         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00ah_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17941         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00bh_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17942         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00ch_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17943         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00dh_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17944         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00eh_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17945         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00fh_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17946         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_0ffh_icebp_c32,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17947         {  bs3CpuInstr4_vroundpd_YMM1_FSxBX_008h_icebp_c32, 255, RM_MEM, T_AVX_256, YMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17948     };
    17949     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    17950     {
    17951         {  bs3CpuInstr4_roundpd_XMM1_XMM1_008h_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17952         {  bs3CpuInstr4_roundpd_XMM1_XMM2_000h_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17953         {  bs3CpuInstr4_roundpd_XMM1_XMM2_008h_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17954         {  bs3CpuInstr4_roundpd_XMM1_XMM2_009h_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17955         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00ah_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17956         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00bh_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17957         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00ch_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17958         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00dh_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17959         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00eh_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17960         {  bs3CpuInstr4_roundpd_XMM1_XMM2_00fh_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17961         {  bs3CpuInstr4_roundpd_XMM1_XMM2_0ffh_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17962         {  bs3CpuInstr4_roundpd_XMM1_FSxBX_008h_icebp_c64,  255, RM_MEM, T_SSE4_1,  XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17963         {  bs3CpuInstr4_roundpd_XMM8_XMM8_008h_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValuesNE) },
    17964         {  bs3CpuInstr4_roundpd_XMM8_XMM9_008h_icebp_c64,   255, RM_REG, T_SSE4_1,  XMM8, NOREG, XMM9,  PASS_ELEMENTS(s_aValuesNE) },
    17965         {  bs3CpuInstr4_roundpd_XMM8_FSxBX_008h_icebp_c64,  255, RM_MEM, T_SSE4_1,  XMM8, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17966 
    17967         {  bs3CpuInstr4_vroundpd_XMM1_XMM1_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17968         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_000h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17969         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17970         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_009h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17971         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00ah_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17972         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00bh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17973         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00ch_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17974         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00dh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17975         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00eh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17976         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_00fh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17977         {  bs3CpuInstr4_vroundpd_XMM1_XMM2_0ffh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17978         {  bs3CpuInstr4_vroundpd_XMM1_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17979         {  bs3CpuInstr4_vroundpd_XMM8_XMM8_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValuesNE) },
    17980         {  bs3CpuInstr4_vroundpd_XMM8_XMM9_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM9,  PASS_ELEMENTS(s_aValuesNE) },
    17981         {  bs3CpuInstr4_vroundpd_XMM8_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17982 
    17983         {  bs3CpuInstr4_vroundpd_YMM1_YMM1_008h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM1,  PASS_ELEMENTS(s_aValuesNE) },
    17984         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_000h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesPE) },
    17985         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_008h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNE) },
    17986         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_009h_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNI) },
    17987         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00ah_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesPI) },
    17988         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00bh_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesZR) },
    17989         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00ch_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17990         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00dh_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17991         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00eh_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17992         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_00fh_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesMX) },
    17993         {  bs3CpuInstr4_vroundpd_YMM1_YMM2_0ffh_icebp_c64,  255, RM_REG, T_AVX_256, YMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesNV) },
    17994         {  bs3CpuInstr4_vroundpd_YMM1_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_256, YMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17995         {  bs3CpuInstr4_vroundpd_YMM8_YMM8_008h_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, NOREG, YMM8,  PASS_ELEMENTS(s_aValuesNE) },
    17996         {  bs3CpuInstr4_vroundpd_YMM8_YMM9_008h_icebp_c64,  255, RM_REG, T_AVX_256, YMM8, NOREG, YMM9,  PASS_ELEMENTS(s_aValuesNE) },
    17997         {  bs3CpuInstr4_vroundpd_YMM8_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_256, YMM8, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    17998     };
    17999 
    18000     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16,s_aTests32,s_aTests64);
    18001     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    18002     return bs3CpuInstr4_WorkerTestType1(bMode,s_aTests[iTest].paTests,s_aTests[iTest].cTests,
    18003                                         g_aXcptConfig2,RT_ELEMENTS(g_aXcptConfig2));
     16727
     16728    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    1800416729}
    1800516730
    … …  
    1809716822    };
    1809816823
    18099     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     16824    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1810016825    {
    18101         {  bs3CpuInstr4_roundss_XMM1_XMM2_000h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    18102         {  bs3CpuInstr4_roundss_XMM1_XMM2_008h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    18103         {  bs3CpuInstr4_roundss_XMM1_XMM2_009h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    18104         {  bs3CpuInstr4_roundss_XMM1_XMM2_00ah_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    18105         {  bs3CpuInstr4_roundss_XMM1_XMM2_00bh_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    18106         {  bs3CpuInstr4_roundss_XMM1_XMM2_00ch_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18107         {  bs3CpuInstr4_roundss_XMM1_XMM2_00dh_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18108         {  bs3CpuInstr4_roundss_XMM1_XMM2_00eh_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18109         {  bs3CpuInstr4_roundss_XMM1_XMM2_00fh_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18110         {  bs3CpuInstr4_roundss_XMM1_XMM2_0ffh_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    18111         {  bs3CpuInstr4_roundss_XMM1_FSxBX_008h_icebp_c16,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18112 
    18113         {  bs3CpuInstr4_vroundss_XMM1_XMM1_XMM2_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    18114         {  bs3CpuInstr4_vroundss_XMM1_XMM1_FSxBX_008h_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18115         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM1_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    18116         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_000h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesPE) },
    18117         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNE) },
    18118         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_009h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNI) },
    18119         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00ah_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesPI) },
    18120         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00bh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesZR) },
    18121         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00ch_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18122         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00dh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18123         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00eh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18124         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00fh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18125         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_0ffh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNV) },
    18126         {  bs3CpuInstr4_vroundss_XMM1_XMM2_FSxBX_008h_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18127 
    18128         {  bs3CpuInstr4_roundss_XMM1_XMM1_008h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    18129         {  bs3CpuInstr4_vroundss_XMM1_XMM1_XMM1_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    18130         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM2_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
     16826        { BS3_INSTR4_ALL(roundss_XMM1_XMM2_000h),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesPE) },
     16827        { BS3_INSTR4_ALL(roundss_XMM1_XMM2_008h),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesNE) },
     16828        { BS3_INSTR4_ALL(roundss_XMM1_XMM2_009h),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesNI) },
     16829        { BS3_INSTR4_ALL(roundss_XMM1_XMM2_00ah),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesPI) },
     16830        { BS3_INSTR4_ALL(roundss_XMM1_XMM2_00bh),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesZR) },
     16831        { BS3_INSTR4_ALL(roundss_XMM1_XMM2_00ch),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16832        { BS3_INSTR4_ALL(roundss_XMM1_XMM2_00dh),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16833        { BS3_INSTR4_ALL(roundss_XMM1_XMM2_00eh),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16834        { BS3_INSTR4_ALL(roundss_XMM1_XMM2_00fh),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16835        { BS3_INSTR4_ALL(roundss_XMM1_XMM2_0ffh),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesNV) },
     16836        { BS3_INSTR4_ALL(roundss_XMM1_FSxBX_008h),       255, RM_MEM, T_SSE4_1,  XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16837        { BS3_INSTR4_C64(roundss_XMM8_XMM9_008h),        255, RM_REG, T_SSE4_1,  XMM8, XMM8,  XMM9,  PASS_TEST_ARRAY(s_aValuesNE) },
     16838        { BS3_INSTR4_C64(roundss_XMM8_FSxBX_008h),       255, RM_MEM, T_SSE4_1,  XMM8, XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16839
     16840        { BS3_INSTR4_ALL(vroundss_XMM1_XMM1_XMM2_008h),  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesNE) },
     16841        { BS3_INSTR4_ALL(vroundss_XMM1_XMM1_FSxBX_008h), 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16842        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_XMM1_008h),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_TEST_ARRAY(s_aValuesNE) },
     16843        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_XMM3_000h),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesPE) },
     16844        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_XMM3_008h),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesNE) },
     16845        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_XMM3_009h),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesNI) },
     16846        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_XMM3_00ah),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesPI) },
     16847        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_XMM3_00bh),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesZR) },
     16848        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_XMM3_00ch),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesMX) },
     16849        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_XMM3_00dh),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesMX) },
     16850        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_XMM3_00eh),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesMX) },
     16851        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_XMM3_00fh),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesMX) },
     16852        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_XMM3_0ffh),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesNV) },
     16853        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_FSxBX_008h), 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16854        { BS3_INSTR4_C64(vroundss_XMM8_XMM8_FSxBX_008h), 255, RM_MEM, T_AVX_128, XMM8, XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16855        { BS3_INSTR4_C64(vroundss_XMM8_XMM9_XMM10_008h), 255, RM_REG, T_AVX_128, XMM8, XMM9,  XMM10, PASS_TEST_ARRAY(s_aValuesNE) },
     16856        { BS3_INSTR4_C64(vroundss_XMM8_XMM9_FSxBX_008h), 255, RM_MEM, T_AVX_128, XMM8, XMM9,  FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16857
     16858        { BS3_INSTR4_ALL(roundss_XMM1_XMM1_008h),        255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     16859        { BS3_INSTR4_C64(roundss_XMM8_XMM8_008h),        255, RM_REG, T_SSE4_1,  XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     16860        { BS3_INSTR4_ALL(vroundss_XMM1_XMM1_XMM1_008h),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     16861        { BS3_INSTR4_ALL(vroundss_XMM1_XMM2_XMM2_008h),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     16862        { BS3_INSTR4_C64(vroundss_XMM8_XMM8_XMM8_008h),  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
    1813116863    };
    18132     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    18133     {
    18134         {  bs3CpuInstr4_roundss_XMM1_XMM2_000h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    18135         {  bs3CpuInstr4_roundss_XMM1_XMM2_008h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    18136         {  bs3CpuInstr4_roundss_XMM1_XMM2_009h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    18137         {  bs3CpuInstr4_roundss_XMM1_XMM2_00ah_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    18138         {  bs3CpuInstr4_roundss_XMM1_XMM2_00bh_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    18139         {  bs3CpuInstr4_roundss_XMM1_XMM2_00ch_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18140         {  bs3CpuInstr4_roundss_XMM1_XMM2_00dh_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18141         {  bs3CpuInstr4_roundss_XMM1_XMM2_00eh_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18142         {  bs3CpuInstr4_roundss_XMM1_XMM2_00fh_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18143         {  bs3CpuInstr4_roundss_XMM1_XMM2_0ffh_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    18144         {  bs3CpuInstr4_roundss_XMM1_FSxBX_008h_icebp_c32,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18145 
    18146         {  bs3CpuInstr4_vroundss_XMM1_XMM1_XMM2_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    18147         {  bs3CpuInstr4_vroundss_XMM1_XMM1_FSxBX_008h_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18148         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM1_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    18149         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_000h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesPE) },
    18150         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNE) },
    18151         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_009h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNI) },
    18152         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00ah_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesPI) },
    18153         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00bh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesZR) },
    18154         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00ch_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18155         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00dh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18156         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00eh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18157         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00fh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18158         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_0ffh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNV) },
    18159         {  bs3CpuInstr4_vroundss_XMM1_XMM2_FSxBX_008h_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18160 
    18161         {  bs3CpuInstr4_roundss_XMM1_XMM1_008h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    18162         {  bs3CpuInstr4_vroundss_XMM1_XMM1_XMM1_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    18163         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM2_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    18164     };
    18165     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    18166     {
    18167         {  bs3CpuInstr4_roundss_XMM1_XMM2_000h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    18168         {  bs3CpuInstr4_roundss_XMM1_XMM2_008h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    18169         {  bs3CpuInstr4_roundss_XMM1_XMM2_009h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    18170         {  bs3CpuInstr4_roundss_XMM1_XMM2_00ah_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    18171         {  bs3CpuInstr4_roundss_XMM1_XMM2_00bh_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    18172         {  bs3CpuInstr4_roundss_XMM1_XMM2_00ch_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18173         {  bs3CpuInstr4_roundss_XMM1_XMM2_00dh_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18174         {  bs3CpuInstr4_roundss_XMM1_XMM2_00eh_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18175         {  bs3CpuInstr4_roundss_XMM1_XMM2_00fh_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18176         {  bs3CpuInstr4_roundss_XMM1_XMM2_0ffh_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    18177         {  bs3CpuInstr4_roundss_XMM1_FSxBX_008h_icebp_c64,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18178         {  bs3CpuInstr4_roundss_XMM8_XMM9_008h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM8, XMM8,  XMM9,  PASS_ELEMENTS(s_aValuesNE) },
    18179         {  bs3CpuInstr4_roundss_XMM8_FSxBX_008h_icebp_c64,       255, RM_MEM, T_SSE4_1,  XMM8, XMM8,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18180 
    18181         {  bs3CpuInstr4_vroundss_XMM1_XMM1_XMM2_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    18182         {  bs3CpuInstr4_vroundss_XMM1_XMM1_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18183         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM1_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    18184         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_000h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesPE) },
    18185         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNE) },
    18186         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_009h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNI) },
    18187         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00ah_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesPI) },
    18188         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00bh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesZR) },
    18189         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00ch_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18190         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00dh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18191         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00eh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18192         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_00fh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18193         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM3_0ffh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNV) },
    18194         {  bs3CpuInstr4_vroundss_XMM1_XMM2_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18195         {  bs3CpuInstr4_vroundss_XMM8_XMM8_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18196         {  bs3CpuInstr4_vroundss_XMM8_XMM9_XMM10_008h_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9,  XMM10, PASS_ELEMENTS(s_aValuesNE) },
    18197         {  bs3CpuInstr4_vroundss_XMM8_XMM9_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18198 
    18199         {  bs3CpuInstr4_roundss_XMM1_XMM1_008h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    18200         {  bs3CpuInstr4_roundss_XMM8_XMM8_008h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    18201         {  bs3CpuInstr4_vroundss_XMM1_XMM1_XMM1_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    18202         {  bs3CpuInstr4_vroundss_XMM1_XMM2_XMM2_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    18203         {  bs3CpuInstr4_vroundss_XMM8_XMM8_XMM8_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    18204     };
    18205 
    18206     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16,s_aTests32,s_aTests64);
    18207     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    18208     return bs3CpuInstr4_WorkerTestType1(bMode,s_aTests[iTest].paTests,s_aTests[iTest].cTests,
    18209                                         g_aXcptConfig3,RT_ELEMENTS(g_aXcptConfig3));
     16864
     16865    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    1821016866}
    1821116867
    … …  
    1830316959    };
    1830416960
    18305     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     16961    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1830616962    {
    18307         {  bs3CpuInstr4_roundsd_XMM1_XMM2_000h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    18308         {  bs3CpuInstr4_roundsd_XMM1_XMM2_008h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    18309         {  bs3CpuInstr4_roundsd_XMM1_XMM2_009h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    18310         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00ah_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    18311         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00bh_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    18312         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00ch_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18313         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00dh_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18314         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00eh_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18315         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00fh_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18316         {  bs3CpuInstr4_roundsd_XMM1_XMM2_0ffh_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    18317         {  bs3CpuInstr4_roundsd_XMM1_FSxBX_008h_icebp_c16,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18318 
    18319         {  bs3CpuInstr4_vroundsd_XMM1_XMM1_XMM2_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    18320         {  bs3CpuInstr4_vroundsd_XMM1_XMM1_FSxBX_008h_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18321         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM1_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    18322         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_000h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesPE) },
    18323         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNE) },
    18324         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_009h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNI) },
    18325         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00ah_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesPI) },
    18326         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00bh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesZR) },
    18327         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00ch_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18328         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00dh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18329         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00eh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18330         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00fh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18331         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_0ffh_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNV) },
    18332         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_FSxBX_008h_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18333 
    18334         {  bs3CpuInstr4_roundsd_XMM1_XMM1_008h_icebp_c16,        255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    18335         {  bs3CpuInstr4_vroundsd_XMM1_XMM1_XMM1_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    18336         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM2_008h_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
     16963        { BS3_INSTR4_ALL(roundsd_XMM1_XMM2_000h),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesPE) },
     16964        { BS3_INSTR4_ALL(roundsd_XMM1_XMM2_008h),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesNE) },
     16965        { BS3_INSTR4_ALL(roundsd_XMM1_XMM2_009h),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesNI) },
     16966        { BS3_INSTR4_ALL(roundsd_XMM1_XMM2_00ah),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesPI) },
     16967        { BS3_INSTR4_ALL(roundsd_XMM1_XMM2_00bh),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesZR) },
     16968        { BS3_INSTR4_ALL(roundsd_XMM1_XMM2_00ch),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16969        { BS3_INSTR4_ALL(roundsd_XMM1_XMM2_00dh),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16970        { BS3_INSTR4_ALL(roundsd_XMM1_XMM2_00eh),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16971        { BS3_INSTR4_ALL(roundsd_XMM1_XMM2_00fh),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesMX) },
     16972        { BS3_INSTR4_ALL(roundsd_XMM1_XMM2_0ffh),        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesNV) },
     16973        { BS3_INSTR4_ALL(roundsd_XMM1_FSxBX_008h),       255, RM_MEM, T_SSE4_1,  XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16974        { BS3_INSTR4_C64(roundsd_XMM8_XMM9_008h),        255, RM_REG, T_SSE4_1,  XMM8, XMM8,  XMM9,  PASS_TEST_ARRAY(s_aValuesNE) },
     16975        { BS3_INSTR4_C64(roundsd_XMM8_FSxBX_008h),       255, RM_MEM, T_SSE4_1,  XMM8, XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16976
     16977        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM1_XMM2_008h),  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValuesNE) },
     16978        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM1_FSxBX_008h), 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16979        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_XMM1_008h),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_TEST_ARRAY(s_aValuesNE) },
     16980        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_XMM3_000h),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesPE) },
     16981        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_XMM3_008h),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesNE) },
     16982        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_XMM3_009h),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesNI) },
     16983        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_XMM3_00ah),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesPI) },
     16984        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_XMM3_00bh),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesZR) },
     16985        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_XMM3_00ch),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesMX) },
     16986        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_XMM3_00dh),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesMX) },
     16987        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_XMM3_00eh),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesMX) },
     16988        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_XMM3_00fh),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesMX) },
     16989        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_XMM3_0ffh),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValuesNV) },
     16990        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_FSxBX_008h), 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16991        { BS3_INSTR4_C64(vroundsd_XMM8_XMM8_FSxBX_008h), 255, RM_MEM, T_AVX_128, XMM8, XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16992        { BS3_INSTR4_C64(vroundsd_XMM8_XMM9_XMM10_008h), 255, RM_REG, T_AVX_128, XMM8, XMM9,  XMM10, PASS_TEST_ARRAY(s_aValuesNE) },
     16993        { BS3_INSTR4_C64(vroundsd_XMM8_XMM9_FSxBX_008h), 255, RM_MEM, T_AVX_128, XMM8, XMM9,  FSxBX, PASS_TEST_ARRAY(s_aValuesNE) },
     16994
     16995        { BS3_INSTR4_ALL(roundsd_XMM1_XMM1_008h),        255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     16996        { BS3_INSTR4_C64(roundsd_XMM8_XMM8_008h),        255, RM_REG, T_SSE4_1,  XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     16997        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM1_XMM1_008h),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     16998        { BS3_INSTR4_ALL(vroundsd_XMM1_XMM2_XMM2_008h),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     16999        { BS3_INSTR4_C64(vroundsd_XMM8_XMM8_XMM8_008h),  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
    1833717000    };
    18338     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    18339     {
    18340         {  bs3CpuInstr4_roundsd_XMM1_XMM2_000h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    18341         {  bs3CpuInstr4_roundsd_XMM1_XMM2_008h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    18342         {  bs3CpuInstr4_roundsd_XMM1_XMM2_009h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    18343         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00ah_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    18344         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00bh_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    18345         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00ch_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18346         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00dh_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18347         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00eh_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18348         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00fh_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18349         {  bs3CpuInstr4_roundsd_XMM1_XMM2_0ffh_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    18350         {  bs3CpuInstr4_roundsd_XMM1_FSxBX_008h_icebp_c32,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18351 
    18352         {  bs3CpuInstr4_vroundsd_XMM1_XMM1_XMM2_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    18353         {  bs3CpuInstr4_vroundsd_XMM1_XMM1_FSxBX_008h_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18354         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM1_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    18355         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_000h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesPE) },
    18356         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNE) },
    18357         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_009h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNI) },
    18358         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00ah_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesPI) },
    18359         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00bh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesZR) },
    18360         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00ch_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18361         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00dh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18362         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00eh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18363         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00fh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18364         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_0ffh_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNV) },
    18365         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_FSxBX_008h_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18366 
    18367         {  bs3CpuInstr4_roundsd_XMM1_XMM1_008h_icebp_c32,        255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    18368         {  bs3CpuInstr4_vroundsd_XMM1_XMM1_XMM1_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    18369         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM2_008h_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    18370     };
    18371     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    18372     {
    18373         {  bs3CpuInstr4_roundsd_XMM1_XMM2_000h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesPE) },
    18374         {  bs3CpuInstr4_roundsd_XMM1_XMM2_008h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    18375         {  bs3CpuInstr4_roundsd_XMM1_XMM2_009h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNI) },
    18376         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00ah_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesPI) },
    18377         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00bh_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesZR) },
    18378         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00ch_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18379         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00dh_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18380         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00eh_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18381         {  bs3CpuInstr4_roundsd_XMM1_XMM2_00fh_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesMX) },
    18382         {  bs3CpuInstr4_roundsd_XMM1_XMM2_0ffh_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNV) },
    18383         {  bs3CpuInstr4_roundsd_XMM1_FSxBX_008h_icebp_c64,       255, RM_MEM, T_SSE4_1,  XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18384         {  bs3CpuInstr4_roundsd_XMM8_XMM9_008h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM8, XMM8,  XMM9,  PASS_ELEMENTS(s_aValuesNE) },
    18385         {  bs3CpuInstr4_roundsd_XMM8_FSxBX_008h_icebp_c64,       255, RM_MEM, T_SSE4_1,  XMM8, XMM8,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18386 
    18387         {  bs3CpuInstr4_vroundsd_XMM1_XMM1_XMM2_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesNE) },
    18388         {  bs3CpuInstr4_vroundsd_XMM1_XMM1_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18389         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM1_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_ELEMENTS(s_aValuesNE) },
    18390         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_000h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesPE) },
    18391         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNE) },
    18392         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_009h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNI) },
    18393         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00ah_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesPI) },
    18394         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00bh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesZR) },
    18395         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00ch_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18396         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00dh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18397         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00eh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18398         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_00fh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesMX) },
    18399         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM3_0ffh_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValuesNV) },
    18400         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18401         {  bs3CpuInstr4_vroundsd_XMM8_XMM8_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18402         {  bs3CpuInstr4_vroundsd_XMM8_XMM9_XMM10_008h_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9,  XMM10, PASS_ELEMENTS(s_aValuesNE) },
    18403         {  bs3CpuInstr4_vroundsd_XMM8_XMM9_FSxBX_008h_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9,  FSxBX, PASS_ELEMENTS(s_aValuesNE) },
    18404 
    18405         {  bs3CpuInstr4_roundsd_XMM1_XMM1_008h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    18406         {  bs3CpuInstr4_roundsd_XMM8_XMM8_008h_icebp_c64,        255, RM_REG, T_SSE4_1,  XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    18407         {  bs3CpuInstr4_vroundsd_XMM1_XMM1_XMM1_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    18408         {  bs3CpuInstr4_vroundsd_XMM1_XMM2_XMM2_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    18409         {  bs3CpuInstr4_vroundsd_XMM8_XMM8_XMM8_008h_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    18410     };
    18411 
    18412     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16,s_aTests32,s_aTests64);
    18413     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    18414     return bs3CpuInstr4_WorkerTestType1(bMode,s_aTests[iTest].paTests,s_aTests[iTest].cTests,
    18415                                         g_aXcptConfig3,RT_ELEMENTS(g_aXcptConfig3));
     17001
     17002    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    1841617003}
    1841717004
    … …  
    1849917086     */
    1850017087
    18501     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     17088    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1850217089    {
    18503         { bs3CpuInstr4_cvtpi2ps_XMM1_MM1_icebp_c16,   255,             RM_REG, T_SSE2, XMM1, MM1,   XMM1, PASS_ELEMENTS(s_aValues) },
    18504         { bs3CpuInstr4_cvtpi2ps_XMM1_FSxBX_icebp_c16, BS3_XCPT_NOT_MF, RM_MEM, T_SSE2, XMM1, FSxBX, XMM1, PASS_ELEMENTS(s_aValues) },
     17090        { BS3_INSTR4_ALL(cvtpi2ps_XMM1_MM1),   255,             RM_REG, T_SSE2, XMM1, MM1,   XMM1, PASS_TEST_ARRAY(s_aValues) },
     17091        { BS3_INSTR4_ALL(cvtpi2ps_XMM1_FSxBX), BS3_XCPT_NOT_MF, RM_MEM, T_SSE2, XMM1, FSxBX, XMM1, PASS_TEST_ARRAY(s_aValues) },
     17092        { BS3_INSTR4_C64(cvtpi2ps_XMM8_MM1),   255,             RM_REG, T_SSE2, XMM8, MM1,   XMM8, PASS_TEST_ARRAY(s_aValues) },
     17093        { BS3_INSTR4_C64(cvtpi2ps_XMM8_FSxBX), BS3_XCPT_NOT_MF, RM_MEM, T_SSE2, XMM8, FSxBX, XMM8, PASS_TEST_ARRAY(s_aValues) },
    1850517094    };
    18506     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    18507     {
    18508         { bs3CpuInstr4_cvtpi2ps_XMM1_MM1_icebp_c32,   255,             RM_REG, T_SSE2, XMM1, MM1,   XMM1, PASS_ELEMENTS(s_aValues) },
    18509         { bs3CpuInstr4_cvtpi2ps_XMM1_FSxBX_icebp_c32, BS3_XCPT_NOT_MF, RM_MEM, T_SSE2, XMM1, FSxBX, XMM1, PASS_ELEMENTS(s_aValues) },
    18510     };
    18511     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    18512     {
    18513         { bs3CpuInstr4_cvtpi2ps_XMM1_MM1_icebp_c64,   255,             RM_REG, T_SSE2, XMM1, MM1,   XMM1, PASS_ELEMENTS(s_aValues) },
    18514         { bs3CpuInstr4_cvtpi2ps_XMM1_FSxBX_icebp_c64, BS3_XCPT_NOT_MF, RM_MEM, T_SSE2, XMM1, FSxBX, XMM1, PASS_ELEMENTS(s_aValues) },
    18515         { bs3CpuInstr4_cvtpi2ps_XMM8_MM1_icebp_c64,   255,             RM_REG, T_SSE2, XMM8, MM1,   XMM8, PASS_ELEMENTS(s_aValues) },
    18516         { bs3CpuInstr4_cvtpi2ps_XMM8_FSxBX_icebp_c64, BS3_XCPT_NOT_MF, RM_MEM, T_SSE2, XMM8, FSxBX, XMM8, PASS_ELEMENTS(s_aValues) },
    18517     };
    18518 
    18519     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    18520     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    18521     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    18522                                         g_aXcptConfig23_5, RT_ELEMENTS(g_aXcptConfig23_5));
     17095
     17096    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig23_5));
    1852317097}
    1852417098
    … …  
    1864017214    };
    1864117215
    18642     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     17216
     17217    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1864317218    {
    18644         { bs3CpuInstr4_cvtps2pi_MM1_XMM1_icebp_c16,  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    18645         { bs3CpuInstr4_cvtps2pi_MM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
     17219        { BS3_INSTR4_ALL(cvtps2pi_MM1_XMM1),  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     17220        { BS3_INSTR4_ALL(cvtps2pi_MM1_FSxBX), 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     17221        { BS3_INSTR4_C64(cvtps2pi_MM1_XMM8),  255, RM_REG, T_SSE2, MM1, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
    1864617222    };
    1864717223
    18648     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    18649     {
    18650         { bs3CpuInstr4_cvtps2pi_MM1_XMM1_icebp_c32,  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    18651         { bs3CpuInstr4_cvtps2pi_MM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    18652     };
    18653     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    18654     {
    18655         { bs3CpuInstr4_cvtps2pi_MM1_XMM1_icebp_c64,  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    18656         { bs3CpuInstr4_cvtps2pi_MM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    18657         { bs3CpuInstr4_cvtps2pi_MM1_XMM8_icebp_c64,  255, RM_REG, T_SSE2, MM1, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    18658     };
    18659 
    18660     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    18661     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    18662     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    18663                                         g_aXcptConfig23_5, RT_ELEMENTS(g_aXcptConfig23_5));
     17224    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig23_5));
    1866417225}
    1866517226
    … …  
    1878117342    };
    1878217343
    18783     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     17344
     17345    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1878417346    {
    18785         { bs3CpuInstr4_cvttps2pi_MM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    18786         { bs3CpuInstr4_cvttps2pi_MM1_XMM1_icebp_c16,  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
     17347        { BS3_INSTR4_ALL(cvttps2pi_MM1_FSxBX), 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     17348        { BS3_INSTR4_ALL(cvttps2pi_MM1_XMM1),  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     17349        { BS3_INSTR4_C64(cvttps2pi_MM1_XMM8),  255, RM_REG, T_SSE2, MM1, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
    1878717350    };
    1878817351
    18789     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    18790     {
    18791         { bs3CpuInstr4_cvttps2pi_MM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    18792         { bs3CpuInstr4_cvttps2pi_MM1_XMM1_icebp_c32,  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    18793     };
    18794     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    18795     {
    18796         { bs3CpuInstr4_cvttps2pi_MM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    18797         { bs3CpuInstr4_cvttps2pi_MM1_XMM1_icebp_c64,  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    18798         { bs3CpuInstr4_cvttps2pi_MM1_XMM8_icebp_c64,  255, RM_REG, T_SSE2, MM1, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    18799     };
    18800 
    18801     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    18802     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    18803     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    18804                                         g_aXcptConfig23_5, RT_ELEMENTS(g_aXcptConfig23_5));
     17352    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig23_5));
    1880517353}
    1880617354
    … …  
    1903817586     */
    1903917587
    19040     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     17588    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1904117589    {
    19042         { bs3CpuInstr4_cvtsi2ss_XMM1_EAX_icebp_c16,           255,         RM_REG, T_SSE,     XMM1, XMM1, EAX,   PASS_ELEMENTS(s_aValues32) },
    19043         { bs3CpuInstr4_cvtsi2ss_XMM1_FSxBX_D_icebp_c16,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues32) },
    19044 
    19045         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM2_EAX_icebp_c16,     255,         RM_REG, T_AVX_128, XMM1, XMM2, EAX,   PASS_ELEMENTS(s_aValues32) },
    19046         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM2_FSxBX_D_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues32) },
    19047 
    19048         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM2_RAX_icebp_c16,     BS3_XCPT_UD, RM_REG, T_AVX_128, XMM1, XMM2, RAX,   PASS_ELEMENTS(s_aValues64) },
    19049         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM2_FSxBX_Q_icebp_c16, BS3_XCPT_UD, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues64) },
    19050 
    19051         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM1_EAX_icebp_c16,     255,         RM_REG, T_AVX_128, XMM1, XMM1, EAX,   PASS_ELEMENTS(s_aValues32) },
    19052         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM1_FSxBX_D_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues32) },
    19053 
    19054         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM1_RAX_icebp_c16,     BS3_XCPT_UD, RM_REG, T_AVX_128, XMM1, XMM1, RAX,   PASS_ELEMENTS(s_aValues64) },
    19055         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM1_FSxBX_Q_icebp_c16, BS3_XCPT_UD, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues64) },
     17590        { BS3_INSTR4_ALL(cvtsi2ss_XMM1_EAX),           255,         RM_REG, T_SSE,     XMM1, XMM1, EAX,   PASS_TEST_ARRAY(s_aValues32) },
     17591        { BS3_INSTR4_ALL(cvtsi2ss_XMM1_FSxBX_D),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues32) },
     17592        { BS3_INSTR4_C64(cvtsi2ss_XMM8_R8D),           255,         RM_REG, T_SSE,     XMM8, XMM8, R8D,   PASS_TEST_ARRAY(s_aValues32) },
     17593        { BS3_INSTR4_C64(cvtsi2ss_XMM8_FSxBX_D),       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues32) },
     17594
     17595        { BS3_INSTR4_C64(cvtsi2ss_XMM1_RAX),           255,         RM_REG, T_SSE,     XMM1, XMM1, RAX,   PASS_TEST_ARRAY(s_aValues64) },
     17596        { BS3_INSTR4_C64(cvtsi2ss_XMM1_FSxBX_Q),       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     17597        { BS3_INSTR4_C64(cvtsi2ss_XMM8_R8),            255,         RM_REG, T_SSE,     XMM8, XMM8, R8,    PASS_TEST_ARRAY(s_aValues64) },
     17598        { BS3_INSTR4_C64(cvtsi2ss_XMM8_FSxBX_Q),       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     17599
     17600        { BS3_INSTR4_ALL(vcvtsi2ss_XMM1_XMM2_EAX),     255,         RM_REG, T_AVX_128, XMM1, XMM2, EAX,   PASS_TEST_ARRAY(s_aValues32) },
     17601        { BS3_INSTR4_ALL(vcvtsi2ss_XMM1_XMM2_FSxBX_D), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues32) },
     17602        { BS3_INSTR4_C64(vcvtsi2ss_XMM8_XMM9_R8D),     255,         RM_REG, T_AVX_128, XMM8, XMM9, R8D,   PASS_TEST_ARRAY(s_aValues32) },
     17603        { BS3_INSTR4_C64(vcvtsi2ss_XMM8_XMM9_FSxBX_D), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues32) },
     17604
     17605        { BS3_INSTR4_386(vcvtsi2ss_XMM1_XMM2_RAX),     BS3_XCPT_UD, RM_REG, T_AVX_128, XMM1, XMM2, RAX,   PASS_TEST_ARRAY(s_aValues64) },
     17606        { BS3_INSTR4_C64(vcvtsi2ss_XMM1_XMM2_RAX),     255,         RM_REG, T_AVX_128, XMM1, XMM2, RAX,   PASS_TEST_ARRAY(s_aValues64) },
     17607        { BS3_INSTR4_386(vcvtsi2ss_XMM1_XMM2_FSxBX_Q), BS3_XCPT_UD, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     17608        { BS3_INSTR4_C64(vcvtsi2ss_XMM1_XMM2_FSxBX_Q), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     17609        { BS3_INSTR4_C64(vcvtsi2ss_XMM8_XMM9_R8),      255,         RM_REG, T_AVX_128, XMM8, XMM9, R8,    PASS_TEST_ARRAY(s_aValues64) },
     17610        { BS3_INSTR4_C64(vcvtsi2ss_XMM8_XMM9_FSxBX_Q), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     17611
     17612        { BS3_INSTR4_ALL(vcvtsi2ss_XMM1_XMM1_EAX),     255,         RM_REG, T_AVX_128, XMM1, XMM1, EAX,   PASS_TEST_ARRAY(s_aValues32) },
     17613        { BS3_INSTR4_ALL(vcvtsi2ss_XMM1_XMM1_FSxBX_D), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues32) },
     17614        { BS3_INSTR4_C64(vcvtsi2ss_XMM8_XMM8_R8D),     255,         RM_REG, T_AVX_128, XMM8, XMM8, R8D,   PASS_TEST_ARRAY(s_aValues32) },
     17615        { BS3_INSTR4_C64(vcvtsi2ss_XMM8_XMM8_FSxBX_D), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues32) },
     17616
     17617        { BS3_INSTR4_386(vcvtsi2ss_XMM1_XMM1_RAX),     BS3_XCPT_UD, RM_REG, T_AVX_128, XMM1, XMM1, RAX,   PASS_TEST_ARRAY(s_aValues64) },
     17618        { BS3_INSTR4_C64(vcvtsi2ss_XMM1_XMM1_RAX),     255,         RM_REG, T_AVX_128, XMM1, XMM1, RAX,   PASS_TEST_ARRAY(s_aValues64) },
     17619        { BS3_INSTR4_386(vcvtsi2ss_XMM1_XMM1_FSxBX_Q), BS3_XCPT_UD, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     17620        { BS3_INSTR4_C64(vcvtsi2ss_XMM1_XMM1_FSxBX_Q), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     17621        { BS3_INSTR4_C64(vcvtsi2ss_XMM8_XMM8_R8),      255,         RM_REG, T_AVX_128, XMM8, XMM8, R8,    PASS_TEST_ARRAY(s_aValues64) },
     17622        { BS3_INSTR4_C64(vcvtsi2ss_XMM8_XMM8_FSxBX_Q), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_TEST_ARRAY(s_aValues64) },
    1905617623    };
    19057     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    19058     {
    19059         { bs3CpuInstr4_cvtsi2ss_XMM1_EAX_icebp_c32,           255,         RM_REG, T_SSE,     XMM1, XMM1, EAX,   PASS_ELEMENTS(s_aValues32) },
    19060         { bs3CpuInstr4_cvtsi2ss_XMM1_FSxBX_D_icebp_c32,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues32) },
    19061 
    19062         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM2_EAX_icebp_c32,     255,         RM_REG, T_AVX_128, XMM1, XMM2, EAX,   PASS_ELEMENTS(s_aValues32) },
    19063         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM2_FSxBX_D_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues32) },
    19064 
    19065         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM2_RAX_icebp_c32,     BS3_XCPT_UD, RM_REG, T_AVX_128, XMM1, XMM2, RAX,   PASS_ELEMENTS(s_aValues64) },
    19066         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM2_FSxBX_Q_icebp_c32, BS3_XCPT_UD, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues64) },
    19067 
    19068         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM1_EAX_icebp_c32,     255,         RM_REG, T_AVX_128, XMM1, XMM1, EAX,   PASS_ELEMENTS(s_aValues32) },
    19069         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM1_FSxBX_D_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues32) },
    19070         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM1_RAX_icebp_c32,     BS3_XCPT_UD, RM_REG, T_AVX_128, XMM1, XMM1, RAX,   PASS_ELEMENTS(s_aValues64) },
    19071         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM1_FSxBX_Q_icebp_c32, BS3_XCPT_UD, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues64) },
    19072     };
    19073     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    19074     {
    19075         { bs3CpuInstr4_cvtsi2ss_XMM1_EAX_icebp_c64,           255,         RM_REG, T_SSE,     XMM1, XMM1, EAX,   PASS_ELEMENTS(s_aValues32) },
    19076         { bs3CpuInstr4_cvtsi2ss_XMM1_FSxBX_D_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues32) },
    19077         { bs3CpuInstr4_cvtsi2ss_XMM8_R8D_icebp_c64,           255,         RM_REG, T_SSE,     XMM8, XMM8, R8D,   PASS_ELEMENTS(s_aValues32) },
    19078         { bs3CpuInstr4_cvtsi2ss_XMM8_FSxBX_D_icebp_c64,       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues32) },
    19079 
    19080         { bs3CpuInstr4_cvtsi2ss_XMM1_RAX_icebp_c64,           255,         RM_REG, T_SSE,     XMM1, XMM1, RAX,   PASS_ELEMENTS(s_aValues64) },
    19081         { bs3CpuInstr4_cvtsi2ss_XMM1_FSxBX_Q_icebp_c64,       255,         RM_MEM, T_SSE,     XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues64) },
    19082         { bs3CpuInstr4_cvtsi2ss_XMM8_R8_icebp_c64,            255,         RM_REG, T_SSE,     XMM8, XMM8, R8,    PASS_ELEMENTS(s_aValues64) },
    19083         { bs3CpuInstr4_cvtsi2ss_XMM8_FSxBX_Q_icebp_c64,       255,         RM_MEM, T_SSE,     XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues64) },
    19084 
    19085         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM2_EAX_icebp_c64,     255,         RM_REG, T_AVX_128, XMM1, XMM2, EAX,   PASS_ELEMENTS(s_aValues32) },
    19086         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM2_FSxBX_D_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues32) },
    19087         { bs3CpuInstr4_vcvtsi2ss_XMM8_XMM9_R8D_icebp_c64,     255,         RM_REG, T_AVX_128, XMM8, XMM9, R8D,   PASS_ELEMENTS(s_aValues32) },
    19088         { bs3CpuInstr4_vcvtsi2ss_XMM8_XMM9_FSxBX_D_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues32) },
    19089 
    19090         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM2_RAX_icebp_c64,     255,         RM_REG, T_AVX_128, XMM1, XMM2, RAX,   PASS_ELEMENTS(s_aValues64) },
    19091         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM2_FSxBX_Q_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2, FSxBX, PASS_ELEMENTS(s_aValues64) },
    19092         { bs3CpuInstr4_vcvtsi2ss_XMM8_XMM9_R8_icebp_c64,      255,         RM_REG, T_AVX_128, XMM8, XMM9, R8,    PASS_ELEMENTS(s_aValues64) },
    19093         { bs3CpuInstr4_vcvtsi2ss_XMM8_XMM9_FSxBX_Q_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9, FSxBX, PASS_ELEMENTS(s_aValues64) },
    19094 
    19095         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM1_EAX_icebp_c64,     255,         RM_REG, T_AVX_128, XMM1, XMM1, EAX,   PASS_ELEMENTS(s_aValues32) },
    19096         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM1_FSxBX_D_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues32) },
    19097         { bs3CpuInstr4_vcvtsi2ss_XMM8_XMM8_R8D_icebp_c64,     255,         RM_REG, T_AVX_128, XMM8, XMM8, R8D,   PASS_ELEMENTS(s_aValues32) },
    19098         { bs3CpuInstr4_vcvtsi2ss_XMM8_XMM8_FSxBX_D_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues32) },
    19099 
    19100         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM1_RAX_icebp_c64,     255,         RM_REG, T_AVX_128, XMM1, XMM1, RAX,   PASS_ELEMENTS(s_aValues64) },
    19101         { bs3CpuInstr4_vcvtsi2ss_XMM1_XMM1_FSxBX_Q_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1, FSxBX, PASS_ELEMENTS(s_aValues64) },
    19102         { bs3CpuInstr4_vcvtsi2ss_XMM8_XMM8_R8_icebp_c64,      255,         RM_REG, T_AVX_128, XMM8, XMM8, R8,    PASS_ELEMENTS(s_aValues64) },
    19103         { bs3CpuInstr4_vcvtsi2ss_XMM8_XMM8_FSxBX_Q_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM8, FSxBX, PASS_ELEMENTS(s_aValues64) },
    19104     };
    19105 
    19106     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    19107     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    19108     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    19109                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     17624
     17625    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    1911017626}
    1911117627
    … …  
    1949518011    };
    1949618012
    19497     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     18013
     18014    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1949818015    {
    19499         { bs3CpuInstr4_cvtss2si_EAX_XMM1_icebp_c16,   255,         RM_REG, T_SSE,     EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    19500         { bs3CpuInstr4_cvtss2si_EAX_FSxBX_icebp_c16,  255,         RM_MEM, T_SSE,     EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    19501 
    19502         { bs3CpuInstr4_vcvtss2si_EAX_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    19503         { bs3CpuInstr4_vcvtss2si_EAX_FSxBX_icebp_c16, 255,         RM_MEM, T_AVX_128, EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    19504 
    19505         { bs3CpuInstr4_vcvtss2si_RAX_XMM1_icebp_c16,  BS3_XCPT_UD, RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    19506         { bs3CpuInstr4_vcvtss2si_RAX_FSxBX_icebp_c16, BS3_XCPT_UD, RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
     18016        { BS3_INSTR4_ALL(cvtss2si_EAX_XMM1),   255,         RM_REG, T_SSE,     EAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18017        { BS3_INSTR4_ALL(cvtss2si_EAX_FSxBX),  255,         RM_MEM, T_SSE,     EAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18018
     18019        { BS3_INSTR4_C64(cvtss2si_R8D_XMM8),   255,         RM_REG, T_SSE,     R8D, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18020        { BS3_INSTR4_C64(cvtss2si_R8D_FSxBX),  255,         RM_MEM, T_SSE,     R8D, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18021
     18022        { BS3_INSTR4_ALL(vcvtss2si_EAX_XMM1),  255,         RM_REG, T_AVX_128, EAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18023        { BS3_INSTR4_ALL(vcvtss2si_EAX_FSxBX), 255,         RM_MEM, T_AVX_128, EAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18024
     18025        { BS3_INSTR4_C64(vcvtss2si_R8D_XMM8),  255,         RM_REG, T_AVX_128, R8D, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18026        { BS3_INSTR4_C64(vcvtss2si_R8D_FSxBX), 255,         RM_MEM, T_AVX_128, R8D, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18027
     18028        { BS3_INSTR4_C64(cvtss2si_RAX_XMM1),   255,         RM_REG, T_SSE,     RAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18029        { BS3_INSTR4_C64(cvtss2si_RAX_FSxBX),  255,         RM_MEM, T_SSE,     RAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18030
     18031        { BS3_INSTR4_C64(cvtss2si_R8_XMM8),    255,         RM_REG, T_SSE,     R8,  XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18032        { BS3_INSTR4_C64(cvtss2si_R8_FSxBX),   255,         RM_MEM, T_SSE,     R8,  FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18033
     18034        { BS3_INSTR4_386(vcvtss2si_RAX_XMM1),  BS3_XCPT_UD, RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18035        { BS3_INSTR4_C64(vcvtss2si_RAX_XMM1),  255,         RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18036        { BS3_INSTR4_386(vcvtss2si_RAX_FSxBX), BS3_XCPT_UD, RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18037        { BS3_INSTR4_C64(vcvtss2si_RAX_FSxBX), 255,         RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18038
     18039        { BS3_INSTR4_C64(vcvtss2si_R8_XMM8),   255,         RM_REG, T_AVX_128, R8,  XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18040        { BS3_INSTR4_C64(vcvtss2si_R8_FSxBX),  255,         RM_MEM, T_AVX_128, R8,  FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
    1950718041    };
    1950818042
    19509     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    19510     {
    19511         { bs3CpuInstr4_cvtss2si_EAX_XMM1_icebp_c32,   255,         RM_REG, T_SSE,     EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    19512         { bs3CpuInstr4_cvtss2si_EAX_FSxBX_icebp_c32,  255,         RM_MEM, T_SSE,     EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    19513 
    19514         { bs3CpuInstr4_vcvtss2si_EAX_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    19515         { bs3CpuInstr4_vcvtss2si_EAX_FSxBX_icebp_c32, 255,         RM_MEM, T_AVX_128, EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    19516 
    19517         { bs3CpuInstr4_vcvtss2si_RAX_XMM1_icebp_c32,  BS3_XCPT_UD, RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    19518         { bs3CpuInstr4_vcvtss2si_RAX_FSxBX_icebp_c32, BS3_XCPT_UD, RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    19519     };
    19520     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    19521     {
    19522         { bs3CpuInstr4_cvtss2si_EAX_XMM1_icebp_c64,   255,         RM_REG, T_SSE,     EAX, XMM1,  RAX,   PASS_ELEMENTS(s_aValues32) },
    19523         { bs3CpuInstr4_cvtss2si_EAX_FSxBX_icebp_c64,  255,         RM_MEM, T_SSE,     EAX, FSxBX, RAX,   PASS_ELEMENTS(s_aValues32) },
    19524 
    19525         { bs3CpuInstr4_cvtss2si_R8D_XMM8_icebp_c64,   255,         RM_REG, T_SSE,     R8D, XMM8,  R8,    PASS_ELEMENTS(s_aValues32) },
    19526         { bs3CpuInstr4_cvtss2si_R8D_FSxBX_icebp_c64,  255,         RM_MEM, T_SSE,     R8D, FSxBX, R8,    PASS_ELEMENTS(s_aValues32) },
    19527 
    19528         { bs3CpuInstr4_vcvtss2si_EAX_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, EAX, XMM1,  RAX,   PASS_ELEMENTS(s_aValues32) },
    19529         { bs3CpuInstr4_vcvtss2si_EAX_FSxBX_icebp_c64, 255,         RM_MEM, T_AVX_128, EAX, FSxBX, RAX,   PASS_ELEMENTS(s_aValues32) },
    19530 
    19531         { bs3CpuInstr4_vcvtss2si_R8D_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, R8D, XMM8,  R8,    PASS_ELEMENTS(s_aValues32) },
    19532         { bs3CpuInstr4_vcvtss2si_R8D_FSxBX_icebp_c64, 255,         RM_MEM, T_AVX_128, R8D, FSxBX, R8,    PASS_ELEMENTS(s_aValues32) },
    19533 
    19534         { bs3CpuInstr4_cvtss2si_RAX_XMM1_icebp_c64,   255,         RM_REG, T_SSE,     RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    19535         { bs3CpuInstr4_cvtss2si_RAX_FSxBX_icebp_c64,  255,         RM_MEM, T_SSE,     RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    19536 
    19537         { bs3CpuInstr4_cvtss2si_R8_XMM8_icebp_c64,    255,         RM_REG, T_SSE,     R8,  XMM8,  NOREG, PASS_ELEMENTS(s_aValues64) },
    19538         { bs3CpuInstr4_cvtss2si_R8_FSxBX_icebp_c64,   255,         RM_MEM, T_SSE,     R8,  FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    19539 
    19540         { bs3CpuInstr4_vcvtss2si_RAX_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    19541         { bs3CpuInstr4_vcvtss2si_RAX_FSxBX_icebp_c64, 255,         RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    19542 
    19543         { bs3CpuInstr4_vcvtss2si_R8_XMM8_icebp_c64,   255,         RM_REG, T_AVX_128, R8,  XMM8,  NOREG, PASS_ELEMENTS(s_aValues64) },
    19544         { bs3CpuInstr4_vcvtss2si_R8_FSxBX_icebp_c64,  255,         RM_MEM, T_AVX_128, R8,  FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    19545     };
    19546 
    19547     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    19548     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    19549     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    19550                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     18043    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    1955118044}
    1955218045
    … …  
    1993618429    };
    1993718430
    19938     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     18431
     18432    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    1993918433    {
    19940         { bs3CpuInstr4_cvttss2si_EAX_XMM1_icebp_c16,   255,         RM_REG, T_SSE,     EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    19941         { bs3CpuInstr4_cvttss2si_EAX_FSxBX_icebp_c16,  255,         RM_MEM, T_SSE,     EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    19942 
    19943         { bs3CpuInstr4_vcvttss2si_EAX_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    19944         { bs3CpuInstr4_vcvttss2si_EAX_FSxBX_icebp_c16, 255,         RM_MEM, T_AVX_128, EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    19945 
    19946         { bs3CpuInstr4_vcvttss2si_RAX_XMM1_icebp_c16,  BS3_XCPT_UD, RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    19947         { bs3CpuInstr4_vcvttss2si_RAX_FSxBX_icebp_c16, BS3_XCPT_UD, RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
     18434        { BS3_INSTR4_ALL(cvttss2si_EAX_XMM1),   255,         RM_REG, T_SSE,     EAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18435        { BS3_INSTR4_ALL(cvttss2si_EAX_FSxBX),  255,         RM_MEM, T_SSE,     EAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18436
     18437        { BS3_INSTR4_C64(cvttss2si_R8D_XMM8),   255,         RM_REG, T_SSE,     R8D, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18438        { BS3_INSTR4_C64(cvttss2si_R8D_FSxBX),  255,         RM_MEM, T_SSE,     R8D, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18439
     18440        { BS3_INSTR4_ALL(vcvttss2si_EAX_XMM1),  255,         RM_REG, T_AVX_128, EAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18441        { BS3_INSTR4_ALL(vcvttss2si_EAX_FSxBX), 255,         RM_MEM, T_AVX_128, EAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18442
     18443        { BS3_INSTR4_C64(vcvttss2si_R8D_XMM8),  255,         RM_REG, T_AVX_128, R8D, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18444        { BS3_INSTR4_C64(vcvttss2si_R8D_FSxBX), 255,         RM_MEM, T_AVX_128, R8D, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     18445
     18446        { BS3_INSTR4_C64(cvttss2si_RAX_XMM1),   255,         RM_REG, T_SSE,     RAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18447        { BS3_INSTR4_C64(cvttss2si_RAX_FSxBX),  255,         RM_MEM, T_SSE,     RAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18448
     18449        { BS3_INSTR4_C64(cvttss2si_R8_XMM8),    255,         RM_REG, T_SSE,     R8,  XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18450        { BS3_INSTR4_C64(cvttss2si_R8_FSxBX),   255,         RM_MEM, T_SSE,     R8,  FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18451
     18452        { BS3_INSTR4_386(vcvttss2si_RAX_XMM1),  BS3_XCPT_UD, RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18453        { BS3_INSTR4_C64(vcvttss2si_RAX_XMM1),  255,         RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18454        { BS3_INSTR4_386(vcvttss2si_RAX_FSxBX), BS3_XCPT_UD, RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18455        { BS3_INSTR4_C64(vcvttss2si_RAX_FSxBX), 255,         RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18456
     18457        { BS3_INSTR4_C64(vcvttss2si_R8_XMM8),   255,         RM_REG, T_AVX_128, R8,  XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     18458        { BS3_INSTR4_C64(vcvttss2si_R8_FSxBX),  255,         RM_MEM, T_AVX_128, R8,  FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
    1994818459    };
    1994918460
    19950     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    19951     {
    19952         { bs3CpuInstr4_cvttss2si_EAX_XMM1_icebp_c32,   255,         RM_REG, T_SSE,     EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    19953         { bs3CpuInstr4_cvttss2si_EAX_FSxBX_icebp_c32,  255,         RM_MEM, T_SSE,     EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    19954 
    19955         { bs3CpuInstr4_vcvttss2si_EAX_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    19956         { bs3CpuInstr4_vcvttss2si_EAX_FSxBX_icebp_c32, 255,         RM_MEM, T_AVX_128, EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    19957 
    19958         { bs3CpuInstr4_vcvttss2si_RAX_XMM1_icebp_c32,  BS3_XCPT_UD, RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    19959         { bs3CpuInstr4_vcvttss2si_RAX_FSxBX_icebp_c32, BS3_XCPT_UD, RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    19960     };
    19961     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    19962     {
    19963         { bs3CpuInstr4_cvttss2si_EAX_XMM1_icebp_c64,   255,         RM_REG, T_SSE,     EAX, XMM1,  RAX,   PASS_ELEMENTS(s_aValues32) },
    19964         { bs3CpuInstr4_cvttss2si_EAX_FSxBX_icebp_c64,  255,         RM_MEM, T_SSE,     EAX, FSxBX, RAX,   PASS_ELEMENTS(s_aValues32) },
    19965 
    19966         { bs3CpuInstr4_cvttss2si_R8D_XMM8_icebp_c64,   255,         RM_REG, T_SSE,     R8D, XMM8,  R8,    PASS_ELEMENTS(s_aValues32) },
    19967         { bs3CpuInstr4_cvttss2si_R8D_FSxBX_icebp_c64,  255,         RM_MEM, T_SSE,     R8D, FSxBX, R8,    PASS_ELEMENTS(s_aValues32) },
    19968 
    19969         { bs3CpuInstr4_vcvttss2si_EAX_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, EAX, XMM1,  RAX,   PASS_ELEMENTS(s_aValues32) },
    19970         { bs3CpuInstr4_vcvttss2si_EAX_FSxBX_icebp_c64, 255,         RM_MEM, T_AVX_128, EAX, FSxBX, RAX,   PASS_ELEMENTS(s_aValues32) },
    19971 
    19972         { bs3CpuInstr4_vcvttss2si_R8D_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, R8D, XMM8,  R8,    PASS_ELEMENTS(s_aValues32) },
    19973         { bs3CpuInstr4_vcvttss2si_R8D_FSxBX_icebp_c64, 255,         RM_MEM, T_AVX_128, R8D, FSxBX, R8,    PASS_ELEMENTS(s_aValues32) },
    19974 
    19975         { bs3CpuInstr4_cvttss2si_RAX_XMM1_icebp_c64,   255,         RM_REG, T_SSE,     RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    19976         { bs3CpuInstr4_cvttss2si_RAX_FSxBX_icebp_c64,  255,         RM_MEM, T_SSE,     RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    19977 
    19978         { bs3CpuInstr4_cvttss2si_R8_XMM8_icebp_c64,    255,         RM_REG, T_SSE,     R8,  XMM8,  NOREG, PASS_ELEMENTS(s_aValues64) },
    19979         { bs3CpuInstr4_cvttss2si_R8_FSxBX_icebp_c64,   255,         RM_MEM, T_SSE,     R8,  FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    19980 
    19981         { bs3CpuInstr4_vcvttss2si_RAX_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    19982         { bs3CpuInstr4_vcvttss2si_RAX_FSxBX_icebp_c64, 255,         RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    19983 
    19984         { bs3CpuInstr4_vcvttss2si_R8_XMM8_icebp_c64,   255,         RM_REG, T_AVX_128, R8,  XMM8,  NOREG, PASS_ELEMENTS(s_aValues64) },
    19985         { bs3CpuInstr4_vcvttss2si_R8_FSxBX_icebp_c64,  255,         RM_MEM, T_AVX_128, R8,  FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    19986     };
    19987 
    19988     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    19989     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    19990     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    19991                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     18461    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    1999218462}
    1999318463
    … …  
    2007518545    };
    2007618546
    20077     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     18547    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2007818548    {
    20079         { bs3CpuInstr4_cvtpi2pd_XMM1_MM1_icebp_c16,   255, RM_REG, T_SSE2, XMM1, MM1,   NOREG, PASS_ELEMENTS(s_aValues) },
    20080         { bs3CpuInstr4_cvtpi2pd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
     18549        { BS3_INSTR4_ALL(cvtpi2pd_XMM1_MM1),   255, RM_REG, T_SSE2, XMM1, MM1,   NOREG, PASS_TEST_ARRAY(s_aValues) },
     18550        { BS3_INSTR4_ALL(cvtpi2pd_XMM1_FSxBX), 255, RM_MEM, T_SSE2, XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     18551        { BS3_INSTR4_C64(cvtpi2pd_XMM8_MM1),   255, RM_REG, T_SSE2, XMM8, MM1,   NOREG, PASS_TEST_ARRAY(s_aValues) },
     18552        { BS3_INSTR4_C64(cvtpi2pd_XMM8_FSxBX), 255, RM_MEM, T_SSE2, XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
    2008118553    };
    20082     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    20083     {
    20084         { bs3CpuInstr4_cvtpi2pd_XMM1_MM1_icebp_c32,   255, RM_REG, T_SSE2, XMM1, MM1,   NOREG, PASS_ELEMENTS(s_aValues) },
    20085         { bs3CpuInstr4_cvtpi2pd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    20086     };
    20087     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    20088     {
    20089         { bs3CpuInstr4_cvtpi2pd_XMM1_MM1_icebp_c64,   255, RM_REG, T_SSE2, XMM1, MM1,   NOREG, PASS_ELEMENTS(s_aValues) },
    20090         { bs3CpuInstr4_cvtpi2pd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    20091         { bs3CpuInstr4_cvtpi2pd_XMM8_MM1_icebp_c64,   255, RM_REG, T_SSE2, XMM8, MM1,   NOREG, PASS_ELEMENTS(s_aValues) },
    20092         { bs3CpuInstr4_cvtpi2pd_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    20093     };
    20094 
    20095     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    20096     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    20097     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    20098                                         g_aXcptConfig23_6, RT_ELEMENTS(g_aXcptConfig23_6));
     18554
     18555    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig23_6));
    2009918556}
    2010018557
    … …  
    2021618673    };
    2021718674
    20218     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     18675
     18676    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2021918677    {
    20220         { bs3CpuInstr4_cvtpd2pi_MM1_XMM1_icebp_c16,  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    20221         { bs3CpuInstr4_cvtpd2pi_MM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
     18678        { BS3_INSTR4_ALL(cvtpd2pi_MM1_XMM1),  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     18679        { BS3_INSTR4_ALL(cvtpd2pi_MM1_FSxBX), 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     18680        { BS3_INSTR4_C64(cvtpd2pi_MM1_XMM8),  255, RM_REG, T_SSE2, MM1, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
    2022218681    };
    2022318682
    20224     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    20225     {
    20226         { bs3CpuInstr4_cvtpd2pi_MM1_XMM1_icebp_c32,  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    20227         { bs3CpuInstr4_cvtpd2pi_MM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    20228     };
    20229     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    20230     {
    20231         { bs3CpuInstr4_cvtpd2pi_MM1_XMM1_icebp_c64,  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    20232         { bs3CpuInstr4_cvtpd2pi_MM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    20233         { bs3CpuInstr4_cvtpd2pi_MM1_XMM8_icebp_c64,  255, RM_REG, T_SSE2, MM1, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    20234     };
    20235 
    20236     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    20237     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    20238     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    20239                                         g_aXcptConfig23_4, RT_ELEMENTS(g_aXcptConfig23_4));
     18683    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig23_4));
    2024018684}
    2024118685
    … …  
    2035718801    };
    2035818802
    20359     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     18803
     18804    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2036018805    {
    20361         { bs3CpuInstr4_cvttpd2pi_MM1_XMM1_icebp_c16,  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    20362         { bs3CpuInstr4_cvttpd2pi_MM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
     18806        { BS3_INSTR4_ALL(cvttpd2pi_MM1_XMM1),  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     18807        { BS3_INSTR4_ALL(cvttpd2pi_MM1_FSxBX), 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     18808        { BS3_INSTR4_C64(cvttpd2pi_MM1_XMM8),  255, RM_REG, T_SSE2, MM1, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
    2036318809    };
    2036418810
    20365     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    20366     {
    20367         { bs3CpuInstr4_cvttpd2pi_MM1_XMM1_icebp_c32,  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    20368         { bs3CpuInstr4_cvttpd2pi_MM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    20369     };
    20370     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    20371     {
    20372         { bs3CpuInstr4_cvttpd2pi_MM1_XMM1_icebp_c64,  255, RM_REG, T_SSE2, MM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    20373         { bs3CpuInstr4_cvttpd2pi_MM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, MM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    20374         { bs3CpuInstr4_cvttpd2pi_MM1_XMM8_icebp_c64,  255, RM_REG, T_SSE2, MM1, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    20375     };
    20376 
    20377     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    20378     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    20379     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    20380                                         g_aXcptConfig23_4, RT_ELEMENTS(g_aXcptConfig23_4));
     18811    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig23_4));
    2038118812}
    2038218813
    … …  
    2060319034     */
    2060419035
    20605     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     19036    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2060619037    {
    20607         { bs3CpuInstr4_cvtsi2sd_XMM1_EAX_icebp_c16,           255,         RM_REG, T_SSE2,    XMM1, XMM1,  EAX,   PASS_ELEMENTS(s_aValues32) },
    20608         { bs3CpuInstr4_cvtsi2sd_XMM1_FSxBX_D_icebp_c16,       255,         RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues32) },
    20609 
    20610         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM2_EAX_icebp_c16,     255,         RM_REG, T_AVX_128, XMM1, XMM2,  EAX,   PASS_ELEMENTS(s_aValues32) },
    20611         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM2_FSxBX_D_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValues32) },
    20612 
    20613         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM2_RAX_icebp_c16,     BS3_XCPT_UD, RM_REG, T_AVX_128, XMM1, XMM1,  RAX,   PASS_ELEMENTS(s_aValues64) },
    20614         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM2_FSxBX_Q_icebp_c16, BS3_XCPT_UD, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues64) },
    20615 
    20616         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM1_EAX_icebp_c16,     255,         RM_REG, T_AVX_128, XMM1, XMM1,  EAX,   PASS_ELEMENTS(s_aValues32) },
    20617         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM1_FSxBX_D_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues32) },
    20618 
    20619         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM1_RAX_icebp_c16,     BS3_XCPT_UD, RM_REG, T_AVX_128, XMM1, XMM1,  RAX,   PASS_ELEMENTS(s_aValues64) },
    20620         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM1_FSxBX_Q_icebp_c16, BS3_XCPT_UD, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues64) },
     19038        { BS3_INSTR4_ALL(cvtsi2sd_XMM1_EAX),           255,         RM_REG, T_SSE2,    XMM1, XMM1,  EAX,   PASS_TEST_ARRAY(s_aValues32) },
     19039        { BS3_INSTR4_ALL(cvtsi2sd_XMM1_FSxBX_D),       255,         RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues32) },
     19040        { BS3_INSTR4_C64(cvtsi2sd_XMM8_R8D),           255,         RM_REG, T_SSE2,    XMM8, XMM8,  R8D,   PASS_TEST_ARRAY(s_aValues32) },
     19041        { BS3_INSTR4_C64(cvtsi2sd_XMM8_FSxBX_D),       255,         RM_MEM, T_SSE2,    XMM8, XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValues32) },
     19042
     19043        { BS3_INSTR4_C64(cvtsi2sd_XMM1_RAX),           255,         RM_REG, T_SSE2,    XMM1, XMM1,  RAX,   PASS_TEST_ARRAY(s_aValues64) },
     19044        { BS3_INSTR4_C64(cvtsi2sd_XMM1_FSxBX_Q),       255,         RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     19045        { BS3_INSTR4_C64(cvtsi2sd_XMM8_R8),            255,         RM_REG, T_SSE2,    XMM8, XMM8,  R8,    PASS_TEST_ARRAY(s_aValues64) },
     19046        { BS3_INSTR4_C64(cvtsi2sd_XMM8_FSxBX_Q),       255,         RM_MEM, T_SSE2,    XMM8, XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     19047
     19048        { BS3_INSTR4_ALL(vcvtsi2sd_XMM1_XMM2_EAX),     255,         RM_REG, T_AVX_128, XMM1, XMM2,  EAX,   PASS_TEST_ARRAY(s_aValues32) },
     19049        { BS3_INSTR4_ALL(vcvtsi2sd_XMM1_XMM2_FSxBX_D), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_TEST_ARRAY(s_aValues32) },
     19050        { BS3_INSTR4_C64(vcvtsi2sd_XMM8_XMM9_R8D),     255,         RM_REG, T_AVX_128, XMM8, XMM9,  R8D,   PASS_TEST_ARRAY(s_aValues32) },
     19051        { BS3_INSTR4_C64(vcvtsi2sd_XMM8_XMM9_FSxBX_D), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9,  FSxBX, PASS_TEST_ARRAY(s_aValues32) },
     19052
     19053        { BS3_INSTR4_386(vcvtsi2sd_XMM1_XMM2_RAX),     BS3_XCPT_UD, RM_REG, T_AVX_128, XMM1, XMM1,  RAX,   PASS_TEST_ARRAY(s_aValues64) },
     19054        { BS3_INSTR4_C64(vcvtsi2sd_XMM1_XMM2_RAX),     255,         RM_REG, T_AVX_128, XMM1, XMM2,  RAX,   PASS_TEST_ARRAY(s_aValues64) },
     19055        { BS3_INSTR4_386(vcvtsi2sd_XMM1_XMM2_FSxBX_Q), BS3_XCPT_UD, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     19056        { BS3_INSTR4_C64(vcvtsi2sd_XMM1_XMM2_FSxBX_Q), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     19057        { BS3_INSTR4_C64(vcvtsi2sd_XMM8_XMM9_R8),      255,         RM_REG, T_AVX_128, XMM8, XMM9,  R8,    PASS_TEST_ARRAY(s_aValues64) },
     19058        { BS3_INSTR4_C64(vcvtsi2sd_XMM8_XMM9_FSxBX_Q), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9,  FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     19059
     19060        { BS3_INSTR4_ALL(vcvtsi2sd_XMM1_XMM1_EAX),     255,         RM_REG, T_AVX_128, XMM1, XMM1,  EAX,   PASS_TEST_ARRAY(s_aValues32) },
     19061        { BS3_INSTR4_ALL(vcvtsi2sd_XMM1_XMM1_FSxBX_D), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues32) },
     19062        { BS3_INSTR4_C64(vcvtsi2sd_XMM8_XMM8_R8D),     255,         RM_REG, T_AVX_128, XMM8, XMM8,  R8D,   PASS_TEST_ARRAY(s_aValues32) },
     19063        { BS3_INSTR4_C64(vcvtsi2sd_XMM8_XMM8_FSxBX_D), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValues32) },
     19064
     19065        { BS3_INSTR4_386(vcvtsi2sd_XMM1_XMM1_RAX),     BS3_XCPT_UD, RM_REG, T_AVX_128, XMM1, XMM1,  RAX,   PASS_TEST_ARRAY(s_aValues64) },
     19066        { BS3_INSTR4_C64(vcvtsi2sd_XMM1_XMM1_RAX),     255,         RM_REG, T_AVX_128, XMM1, XMM1,  RAX,   PASS_TEST_ARRAY(s_aValues64) },
     19067        { BS3_INSTR4_386(vcvtsi2sd_XMM1_XMM1_FSxBX_Q), BS3_XCPT_UD, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     19068        { BS3_INSTR4_C64(vcvtsi2sd_XMM1_XMM1_FSxBX_Q), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues64) },
     19069        { BS3_INSTR4_C64(vcvtsi2sd_XMM8_XMM8_R8),      255,         RM_REG, T_AVX_128, XMM8, XMM8,  R8,    PASS_TEST_ARRAY(s_aValues64) },
     19070        { BS3_INSTR4_C64(vcvtsi2sd_XMM8_XMM8_FSxBX_Q), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValues64) },
    2062119071    };
    20622     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    20623     {
    20624         { bs3CpuInstr4_cvtsi2sd_XMM1_EAX_icebp_c32,           255,         RM_REG, T_SSE2,    XMM1, XMM1,  EAX,   PASS_ELEMENTS(s_aValues32) },
    20625         { bs3CpuInstr4_cvtsi2sd_XMM1_FSxBX_D_icebp_c32,       255,         RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues32) },
    20626 
    20627         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM2_EAX_icebp_c32,     255,         RM_REG, T_AVX_128, XMM1, XMM2,  EAX,   PASS_ELEMENTS(s_aValues32) },
    20628         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM2_FSxBX_D_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValues32) },
    20629 
    20630         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM2_RAX_icebp_c32,     BS3_XCPT_UD, RM_REG, T_AVX_128, XMM1, XMM1,  RAX,   PASS_ELEMENTS(s_aValues64) },
    20631         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM2_FSxBX_Q_icebp_c32, BS3_XCPT_UD, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues64) },
    20632 
    20633         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM1_EAX_icebp_c32,     255,         RM_REG, T_AVX_128, XMM1, XMM1,  EAX,   PASS_ELEMENTS(s_aValues32) },
    20634         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM1_FSxBX_D_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues32) },
    20635         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM1_RAX_icebp_c32,     BS3_XCPT_UD, RM_REG, T_AVX_128, XMM1, XMM1,  RAX,   PASS_ELEMENTS(s_aValues64) },
    20636         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM1_FSxBX_Q_icebp_c32, BS3_XCPT_UD, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues64) },
    20637     };
    20638     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    20639     {
    20640         { bs3CpuInstr4_cvtsi2sd_XMM1_EAX_icebp_c64,           255,         RM_REG, T_SSE2,    XMM1, XMM1,  EAX,   PASS_ELEMENTS(s_aValues32) },
    20641         { bs3CpuInstr4_cvtsi2sd_XMM1_FSxBX_D_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues32) },
    20642         { bs3CpuInstr4_cvtsi2sd_XMM8_R8D_icebp_c64,           255,         RM_REG, T_SSE2,    XMM8, XMM8,  R8D,   PASS_ELEMENTS(s_aValues32) },
    20643         { bs3CpuInstr4_cvtsi2sd_XMM8_FSxBX_D_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8,  FSxBX, PASS_ELEMENTS(s_aValues32) },
    20644 
    20645         { bs3CpuInstr4_cvtsi2sd_XMM1_RAX_icebp_c64,           255,         RM_REG, T_SSE2,    XMM1, XMM1,  RAX,   PASS_ELEMENTS(s_aValues64) },
    20646         { bs3CpuInstr4_cvtsi2sd_XMM1_FSxBX_Q_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues64) },
    20647         { bs3CpuInstr4_cvtsi2sd_XMM8_R8_icebp_c64,            255,         RM_REG, T_SSE2,    XMM8, XMM8,  R8,    PASS_ELEMENTS(s_aValues64) },
    20648         { bs3CpuInstr4_cvtsi2sd_XMM8_FSxBX_Q_icebp_c64,       255,         RM_MEM, T_SSE2,    XMM8, XMM8,  FSxBX, PASS_ELEMENTS(s_aValues64) },
    20649 
    20650         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM2_EAX_icebp_c64,     255,         RM_REG, T_AVX_128, XMM1, XMM2,  EAX,   PASS_ELEMENTS(s_aValues32) },
    20651         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM2_FSxBX_D_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValues32) },
    20652         { bs3CpuInstr4_vcvtsi2sd_XMM8_XMM9_R8D_icebp_c64,     255,         RM_REG, T_AVX_128, XMM8, XMM9,  R8D,   PASS_ELEMENTS(s_aValues32) },
    20653         { bs3CpuInstr4_vcvtsi2sd_XMM8_XMM9_FSxBX_D_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9,  FSxBX, PASS_ELEMENTS(s_aValues32) },
    20654 
    20655         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM2_RAX_icebp_c64,     255,         RM_REG, T_AVX_128, XMM1, XMM2,  RAX,   PASS_ELEMENTS(s_aValues64) },
    20656         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM2_FSxBX_Q_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValues64) },
    20657         { bs3CpuInstr4_vcvtsi2sd_XMM8_XMM9_R8_icebp_c64,      255,         RM_REG, T_AVX_128, XMM8, XMM9,  R8,    PASS_ELEMENTS(s_aValues64) },
    20658         { bs3CpuInstr4_vcvtsi2sd_XMM8_XMM9_FSxBX_Q_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM9,  FSxBX, PASS_ELEMENTS(s_aValues64) },
    20659 
    20660         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM1_EAX_icebp_c64,     255,         RM_REG, T_AVX_128, XMM1, XMM1,  EAX,   PASS_ELEMENTS(s_aValues32) },
    20661         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM1_FSxBX_D_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues32) },
    20662         { bs3CpuInstr4_vcvtsi2sd_XMM8_XMM8_R8D_icebp_c64,     255,         RM_REG, T_AVX_128, XMM8, XMM8,  R8D,   PASS_ELEMENTS(s_aValues32) },
    20663         { bs3CpuInstr4_vcvtsi2sd_XMM8_XMM8_FSxBX_D_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM8,  FSxBX, PASS_ELEMENTS(s_aValues32) },
    20664 
    20665         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM1_RAX_icebp_c64,     255,         RM_REG, T_AVX_128, XMM1, XMM1,  RAX,   PASS_ELEMENTS(s_aValues64) },
    20666         { bs3CpuInstr4_vcvtsi2sd_XMM1_XMM1_FSxBX_Q_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues64) },
    20667         { bs3CpuInstr4_vcvtsi2sd_XMM8_XMM8_R8_icebp_c64,      255,         RM_REG, T_AVX_128, XMM8, XMM8,  R8,    PASS_ELEMENTS(s_aValues64) },
    20668         { bs3CpuInstr4_vcvtsi2sd_XMM8_XMM8_FSxBX_Q_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, XMM8,  FSxBX, PASS_ELEMENTS(s_aValues64) },
    20669     };
    20670 
    20671     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    20672     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    20673     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    20674                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     19072
     19073    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    2067519074}
    2067619075
    … …  
    2106019459    };
    2106119460
    21062     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     19461
     19462    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2106319463    {
    21064         { bs3CpuInstr4_cvtsd2si_EAX_XMM1_icebp_c16,   255,         RM_REG, T_SSE2,    EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    21065         { bs3CpuInstr4_cvtsd2si_EAX_FSxBX_icebp_c16,  255,         RM_MEM, T_SSE2,    EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    21066 
    21067         { bs3CpuInstr4_vcvtsd2si_EAX_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    21068         { bs3CpuInstr4_vcvtsd2si_EAX_FSxBX_icebp_c16, 255,         RM_MEM, T_AVX_128, EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    21069 
    21070         { bs3CpuInstr4_vcvtsd2si_RAX_XMM1_icebp_c16,  BS3_XCPT_UD, RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    21071         { bs3CpuInstr4_vcvtsd2si_RAX_FSxBX_icebp_c16, BS3_XCPT_UD, RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
     19464        { BS3_INSTR4_ALL(cvtsd2si_EAX_XMM1),   255,         RM_REG, T_SSE2,    EAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19465        { BS3_INSTR4_ALL(cvtsd2si_EAX_FSxBX),  255,         RM_MEM, T_SSE2,    EAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19466
     19467        { BS3_INSTR4_C64(cvtsd2si_R8D_XMM8),   255,         RM_REG, T_SSE2,    R8D, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19468        { BS3_INSTR4_C64(cvtsd2si_R8D_FSxBX),  255,         RM_MEM, T_SSE2,    R8D, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19469
     19470        { BS3_INSTR4_ALL(vcvtsd2si_EAX_XMM1),  255,         RM_REG, T_AVX_128, EAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19471        { BS3_INSTR4_ALL(vcvtsd2si_EAX_FSxBX), 255,         RM_MEM, T_AVX_128, EAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19472
     19473        { BS3_INSTR4_C64(vcvtsd2si_R8D_XMM8),  255,         RM_REG, T_AVX_128, R8D, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19474        { BS3_INSTR4_C64(vcvtsd2si_R8D_FSxBX), 255,         RM_MEM, T_AVX_128, R8D, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19475
     19476        { BS3_INSTR4_C64(cvtsd2si_RAX_XMM1),   255,         RM_REG, T_SSE2,    RAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19477        { BS3_INSTR4_C64(cvtsd2si_RAX_FSxBX),  255,         RM_MEM, T_SSE2,    RAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19478
     19479        { BS3_INSTR4_C64(cvtsd2si_R8_XMM8),    255,         RM_REG, T_SSE2,    R8,  XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19480        { BS3_INSTR4_C64(cvtsd2si_R8_FSxBX),   255,         RM_MEM, T_SSE2,    R8,  FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19481
     19482        { BS3_INSTR4_386(vcvtsd2si_RAX_XMM1),  BS3_XCPT_UD, RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19483        { BS3_INSTR4_C64(vcvtsd2si_RAX_XMM1),  255,         RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19484        { BS3_INSTR4_386(vcvtsd2si_RAX_FSxBX), BS3_XCPT_UD, RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19485        { BS3_INSTR4_C64(vcvtsd2si_RAX_FSxBX), 255,         RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19486
     19487        { BS3_INSTR4_C64(vcvtsd2si_R8_XMM8),   255,         RM_REG, T_AVX_128, R8,  XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19488        { BS3_INSTR4_C64(vcvtsd2si_R8_FSxBX),  255,         RM_MEM, T_AVX_128, R8,  FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
    2107219489    };
    2107319490
    21074     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    21075     {
    21076         { bs3CpuInstr4_cvtsd2si_EAX_XMM1_icebp_c32,   255,         RM_REG, T_SSE2,    EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    21077         { bs3CpuInstr4_cvtsd2si_EAX_FSxBX_icebp_c32,  255,         RM_MEM, T_SSE2,    EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    21078 
    21079         { bs3CpuInstr4_vcvtsd2si_EAX_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    21080         { bs3CpuInstr4_vcvtsd2si_EAX_FSxBX_icebp_c32, 255,         RM_MEM, T_AVX_128, EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    21081 
    21082         { bs3CpuInstr4_vcvtsd2si_RAX_XMM1_icebp_c32,  BS3_XCPT_UD, RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    21083         { bs3CpuInstr4_vcvtsd2si_RAX_FSxBX_icebp_c32, BS3_XCPT_UD, RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    21084     };
    21085     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    21086     {
    21087         { bs3CpuInstr4_cvtsd2si_EAX_XMM1_icebp_c64,   255,         RM_REG, T_SSE2,    EAX, XMM1,  RAX,   PASS_ELEMENTS(s_aValues32) },
    21088         { bs3CpuInstr4_cvtsd2si_EAX_FSxBX_icebp_c64,  255,         RM_MEM, T_SSE2,    EAX, FSxBX, RAX,   PASS_ELEMENTS(s_aValues32) },
    21089 
    21090         { bs3CpuInstr4_cvtsd2si_R8D_XMM8_icebp_c64,   255,         RM_REG, T_SSE2,    R8D, XMM8,  R8,    PASS_ELEMENTS(s_aValues32) },
    21091         { bs3CpuInstr4_cvtsd2si_R8D_FSxBX_icebp_c64,  255,         RM_MEM, T_SSE2,    R8D, FSxBX, R8,    PASS_ELEMENTS(s_aValues32) },
    21092 
    21093         { bs3CpuInstr4_vcvtsd2si_EAX_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, EAX, XMM1,  RAX,   PASS_ELEMENTS(s_aValues32) },
    21094         { bs3CpuInstr4_vcvtsd2si_EAX_FSxBX_icebp_c64, 255,         RM_MEM, T_AVX_128, EAX, FSxBX, RAX,   PASS_ELEMENTS(s_aValues32) },
    21095 
    21096         { bs3CpuInstr4_vcvtsd2si_R8D_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, R8D, XMM8,  R8,    PASS_ELEMENTS(s_aValues32) },
    21097         { bs3CpuInstr4_vcvtsd2si_R8D_FSxBX_icebp_c64, 255,         RM_MEM, T_AVX_128, R8D, FSxBX, R8,    PASS_ELEMENTS(s_aValues32) },
    21098 
    21099         { bs3CpuInstr4_cvtsd2si_RAX_XMM1_icebp_c64,   255,         RM_REG, T_SSE2,    RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    21100         { bs3CpuInstr4_cvtsd2si_RAX_FSxBX_icebp_c64,  255,         RM_MEM, T_SSE2,    RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    21101 
    21102         { bs3CpuInstr4_cvtsd2si_R8_XMM8_icebp_c64,    255,         RM_REG, T_SSE2,    R8,  XMM8,  NOREG, PASS_ELEMENTS(s_aValues64) },
    21103         { bs3CpuInstr4_cvtsd2si_R8_FSxBX_icebp_c64,   255,         RM_MEM, T_SSE2,    R8,  FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    21104 
    21105         { bs3CpuInstr4_vcvtsd2si_RAX_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    21106         { bs3CpuInstr4_vcvtsd2si_RAX_FSxBX_icebp_c64, 255,         RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    21107 
    21108         { bs3CpuInstr4_vcvtsd2si_R8_XMM8_icebp_c64,   255,         RM_REG, T_AVX_128, R8,  XMM8,  NOREG, PASS_ELEMENTS(s_aValues64) },
    21109         { bs3CpuInstr4_vcvtsd2si_R8_FSxBX_icebp_c64,  255,         RM_MEM, T_AVX_128, R8,  FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    21110     };
    21111 
    21112     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    21113     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    21114     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    21115                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     19491    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    2111619492}
    2111719493
    … …  
    2150119877    };
    2150219878
    21503     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     19879
     19880    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2150419881    {
    21505         { bs3CpuInstr4_cvttsd2si_EAX_XMM1_icebp_c16,   255,         RM_REG, T_SSE2,    EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    21506         { bs3CpuInstr4_cvttsd2si_EAX_FSxBX_icebp_c16,  255,         RM_MEM, T_SSE2,    EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    21507 
    21508         { bs3CpuInstr4_vcvttsd2si_EAX_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    21509         { bs3CpuInstr4_vcvttsd2si_EAX_FSxBX_icebp_c16, 255,         RM_MEM, T_AVX_128, EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    21510 
    21511         { bs3CpuInstr4_vcvttsd2si_RAX_XMM1_icebp_c16,  BS3_XCPT_UD, RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    21512         { bs3CpuInstr4_vcvttsd2si_RAX_FSxBX_icebp_c16, BS3_XCPT_UD, RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
     19882        { BS3_INSTR4_ALL(cvttsd2si_EAX_XMM1),   255,         RM_REG, T_SSE2,    EAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19883        { BS3_INSTR4_ALL(cvttsd2si_EAX_FSxBX),  255,         RM_MEM, T_SSE2,    EAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19884
     19885        { BS3_INSTR4_C64(cvttsd2si_R8D_XMM8),   255,         RM_REG, T_SSE2,    R8D, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19886        { BS3_INSTR4_C64(cvttsd2si_R8D_FSxBX),  255,         RM_MEM, T_SSE2,    R8D, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19887
     19888        { BS3_INSTR4_ALL(vcvttsd2si_EAX_XMM1),  255,         RM_REG, T_AVX_128, EAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19889        { BS3_INSTR4_ALL(vcvttsd2si_EAX_FSxBX), 255,         RM_MEM, T_AVX_128, EAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19890
     19891        { BS3_INSTR4_C64(vcvttsd2si_R8D_XMM8),  255,         RM_REG, T_AVX_128, R8D, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19892        { BS3_INSTR4_C64(vcvttsd2si_R8D_FSxBX), 255,         RM_MEM, T_AVX_128, R8D, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues32) },
     19893
     19894        { BS3_INSTR4_C64(cvttsd2si_RAX_XMM1),   255,         RM_REG, T_SSE2,    RAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19895        { BS3_INSTR4_C64(cvttsd2si_RAX_FSxBX),  255,         RM_MEM, T_SSE2,    RAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19896
     19897        { BS3_INSTR4_C64(cvttsd2si_R8_XMM8),    255,         RM_REG, T_SSE2,    R8,  XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19898        { BS3_INSTR4_C64(cvttsd2si_R8_FSxBX),   255,         RM_MEM, T_SSE2,    R8,  FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19899
     19900        { BS3_INSTR4_386(vcvttsd2si_RAX_XMM1),  BS3_XCPT_UD, RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19901        { BS3_INSTR4_C64(vcvttsd2si_RAX_XMM1),  255,         RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19902        { BS3_INSTR4_386(vcvttsd2si_RAX_FSxBX), BS3_XCPT_UD, RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19903        { BS3_INSTR4_C64(vcvttsd2si_RAX_FSxBX), 255,         RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19904
     19905        { BS3_INSTR4_C64(vcvttsd2si_R8_XMM8),   255,         RM_REG, T_AVX_128, R8,  XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues64) },
     19906        { BS3_INSTR4_C64(vcvttsd2si_R8_FSxBX),  255,         RM_MEM, T_AVX_128, R8,  FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues64) },
    2151319907    };
    2151419908
    21515     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    21516     {
    21517         { bs3CpuInstr4_cvttsd2si_EAX_XMM1_icebp_c32,   255,         RM_REG, T_SSE2,    EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    21518         { bs3CpuInstr4_cvttsd2si_EAX_FSxBX_icebp_c32,  255,         RM_MEM, T_SSE2,    EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    21519 
    21520         { bs3CpuInstr4_vcvttsd2si_EAX_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, EAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues32) },
    21521         { bs3CpuInstr4_vcvttsd2si_EAX_FSxBX_icebp_c32, 255,         RM_MEM, T_AVX_128, EAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues32) },
    21522 
    21523         { bs3CpuInstr4_vcvttsd2si_RAX_XMM1_icebp_c32,  BS3_XCPT_UD, RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    21524         { bs3CpuInstr4_vcvttsd2si_RAX_FSxBX_icebp_c32, BS3_XCPT_UD, RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    21525     };
    21526     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    21527     {
    21528         { bs3CpuInstr4_cvttsd2si_EAX_XMM1_icebp_c64,   255,         RM_REG, T_SSE2,    EAX, XMM1,  RAX,   PASS_ELEMENTS(s_aValues32) },
    21529         { bs3CpuInstr4_cvttsd2si_EAX_FSxBX_icebp_c64,  255,         RM_MEM, T_SSE2,    EAX, FSxBX, RAX,   PASS_ELEMENTS(s_aValues32) },
    21530 
    21531         { bs3CpuInstr4_cvttsd2si_R8D_XMM8_icebp_c64,   255,         RM_REG, T_SSE2,    R8D, XMM8,  R8,    PASS_ELEMENTS(s_aValues32) },
    21532         { bs3CpuInstr4_cvttsd2si_R8D_FSxBX_icebp_c64,  255,         RM_MEM, T_SSE2,    R8D, FSxBX, R8,    PASS_ELEMENTS(s_aValues32) },
    21533 
    21534         { bs3CpuInstr4_vcvttsd2si_EAX_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, EAX, XMM1,  RAX,   PASS_ELEMENTS(s_aValues32) },
    21535         { bs3CpuInstr4_vcvttsd2si_EAX_FSxBX_icebp_c64, 255,         RM_MEM, T_AVX_128, EAX, FSxBX, RAX,   PASS_ELEMENTS(s_aValues32) },
    21536 
    21537         { bs3CpuInstr4_vcvttsd2si_R8D_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, R8D, XMM8,  R8,    PASS_ELEMENTS(s_aValues32) },
    21538         { bs3CpuInstr4_vcvttsd2si_R8D_FSxBX_icebp_c64, 255,         RM_MEM, T_AVX_128, R8D, FSxBX, R8,    PASS_ELEMENTS(s_aValues32) },
    21539 
    21540         { bs3CpuInstr4_cvttsd2si_RAX_XMM1_icebp_c64,   255,         RM_REG, T_SSE2,    RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    21541         { bs3CpuInstr4_cvttsd2si_RAX_FSxBX_icebp_c64,  255,         RM_MEM, T_SSE2,    RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    21542 
    21543         { bs3CpuInstr4_cvttsd2si_R8_XMM8_icebp_c64,    255,         RM_REG, T_SSE2,    R8,  XMM8,  NOREG, PASS_ELEMENTS(s_aValues64) },
    21544         { bs3CpuInstr4_cvttsd2si_R8_FSxBX_icebp_c64,   255,         RM_MEM, T_SSE2,    R8,  FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    21545 
    21546         { bs3CpuInstr4_vcvttsd2si_RAX_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, RAX, XMM1,  NOREG, PASS_ELEMENTS(s_aValues64) },
    21547         { bs3CpuInstr4_vcvttsd2si_RAX_FSxBX_icebp_c64, 255,         RM_MEM, T_AVX_128, RAX, FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    21548 
    21549         { bs3CpuInstr4_vcvttsd2si_R8_XMM8_icebp_c64,   255,         RM_REG, T_AVX_128, R8,  XMM8,  NOREG, PASS_ELEMENTS(s_aValues64) },
    21550         { bs3CpuInstr4_vcvttsd2si_R8_FSxBX_icebp_c64,  255,         RM_MEM, T_AVX_128, R8,  FSxBX, NOREG, PASS_ELEMENTS(s_aValues64) },
    21551     };
    21552 
    21553     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    21554     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    21555     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    21556                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     19909    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    2155719910}
    2155819911
    … …  
    2163019983    };
    2163119984
    21632     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     19985
     19986    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2163319987    {
    21634         { bs3CpuInstr4_cvtdq2ps_XMM1_XMM2_icebp_c16,   255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21635         { bs3CpuInstr4_cvtdq2ps_XMM1_FSxBX_icebp_c16,  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21636 
    21637         { bs3CpuInstr4_vcvtdq2ps_XMM1_XMM2_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21638         { bs3CpuInstr4_vcvtdq2ps_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21639 
    21640         { bs3CpuInstr4_vcvtdq2ps_YMM1_YMM2_icebp_c16,  255,         RM_REG, T_AVX_256, YMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21641         { bs3CpuInstr4_vcvtdq2ps_YMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21642 
    21643         { bs3CpuInstr4_cvtdq2ps_XMM1_XMM1_icebp_c16,   255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21644         { bs3CpuInstr4_vcvtdq2ps_XMM1_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21645         { bs3CpuInstr4_vcvtdq2ps_YMM1_YMM1_icebp_c16,  255,         RM_REG, T_AVX_256, YMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
     19988        { BS3_INSTR4_ALL(cvtdq2ps_XMM1_XMM2),   255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     19989        { BS3_INSTR4_ALL(cvtdq2ps_XMM1_FSxBX),  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     19990
     19991        { BS3_INSTR4_ALL(vcvtdq2ps_XMM1_XMM2),  255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     19992        { BS3_INSTR4_ALL(vcvtdq2ps_XMM1_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     19993
     19994        { BS3_INSTR4_ALL(vcvtdq2ps_YMM1_YMM2),  255,         RM_REG, T_AVX_256, YMM1, YMM2,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     19995        { BS3_INSTR4_ALL(vcvtdq2ps_YMM1_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_256, YMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     19996
     19997        { BS3_INSTR4_ALL(cvtdq2ps_XMM1_XMM1),   255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     19998        { BS3_INSTR4_ALL(vcvtdq2ps_XMM1_XMM1),  255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     19999        { BS3_INSTR4_ALL(vcvtdq2ps_YMM1_YMM1),  255,         RM_REG, T_AVX_256, YMM1, YMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20000
     20001        { BS3_INSTR4_C64(cvtdq2ps_XMM8_XMM9),   255,         RM_REG, T_SSE2,    XMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20002        { BS3_INSTR4_C64(cvtdq2ps_XMM8_FSxBX),  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20003
     20004        { BS3_INSTR4_C64(vcvtdq2ps_XMM8_XMM9),  255,         RM_REG, T_AVX_128, XMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20005        { BS3_INSTR4_C64(vcvtdq2ps_XMM8_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20006
     20007        { BS3_INSTR4_C64(vcvtdq2ps_YMM8_YMM9),  255,         RM_REG, T_AVX_256, YMM8, YMM9,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20008        { BS3_INSTR4_C64(vcvtdq2ps_YMM8_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_256, YMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20009
     20010        { BS3_INSTR4_C64(cvtdq2ps_XMM8_XMM8),   255,         RM_REG, T_SSE2,    XMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20011        { BS3_INSTR4_C64(vcvtdq2ps_XMM8_XMM8),  255,         RM_REG, T_AVX_128, XMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20012        { BS3_INSTR4_C64(vcvtdq2ps_YMM8_YMM8),  255,         RM_REG, T_AVX_256, YMM8, YMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
    2164620013    };
    2164720014
    21648     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    21649     {
    21650         { bs3CpuInstr4_cvtdq2ps_XMM1_XMM2_icebp_c32,   255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21651         { bs3CpuInstr4_cvtdq2ps_XMM1_FSxBX_icebp_c32,  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21652 
    21653         { bs3CpuInstr4_vcvtdq2ps_XMM1_XMM2_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21654         { bs3CpuInstr4_vcvtdq2ps_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21655 
    21656         { bs3CpuInstr4_vcvtdq2ps_YMM1_YMM2_icebp_c32,  255,         RM_REG, T_AVX_256, YMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21657         { bs3CpuInstr4_vcvtdq2ps_YMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21658 
    21659         { bs3CpuInstr4_cvtdq2ps_XMM1_XMM1_icebp_c32,   255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21660         { bs3CpuInstr4_vcvtdq2ps_XMM1_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21661         { bs3CpuInstr4_vcvtdq2ps_YMM1_YMM1_icebp_c32,  255,         RM_REG, T_AVX_256, YMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21662     };
    21663     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    21664     {
    21665         { bs3CpuInstr4_cvtdq2ps_XMM1_XMM2_icebp_c64,   255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21666         { bs3CpuInstr4_cvtdq2ps_XMM1_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21667 
    21668         { bs3CpuInstr4_vcvtdq2ps_XMM1_XMM2_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21669         { bs3CpuInstr4_vcvtdq2ps_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21670 
    21671         { bs3CpuInstr4_vcvtdq2ps_YMM1_YMM2_icebp_c64,  255,         RM_REG, T_AVX_256, YMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21672         { bs3CpuInstr4_vcvtdq2ps_YMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21673 
    21674         { bs3CpuInstr4_cvtdq2ps_XMM1_XMM1_icebp_c64,   255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21675         { bs3CpuInstr4_vcvtdq2ps_XMM1_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21676         { bs3CpuInstr4_vcvtdq2ps_YMM1_YMM1_icebp_c64,  255,         RM_REG, T_AVX_256, YMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21677 
    21678         { bs3CpuInstr4_cvtdq2ps_XMM8_XMM9_icebp_c64,   255,         RM_REG, T_SSE2,    XMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValues) },
    21679         { bs3CpuInstr4_cvtdq2ps_XMM8_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21680 
    21681         { bs3CpuInstr4_vcvtdq2ps_XMM8_XMM9_icebp_c64,  255,         RM_REG, T_AVX_128, XMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValues) },
    21682         { bs3CpuInstr4_vcvtdq2ps_XMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21683 
    21684         { bs3CpuInstr4_vcvtdq2ps_YMM8_YMM9_icebp_c64,  255,         RM_REG, T_AVX_256, YMM8, YMM9,  NOREG, PASS_ELEMENTS(s_aValues) },
    21685         { bs3CpuInstr4_vcvtdq2ps_YMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_256, YMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21686 
    21687         { bs3CpuInstr4_cvtdq2ps_XMM8_XMM8_icebp_c64,   255,         RM_REG, T_SSE2,    XMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    21688         { bs3CpuInstr4_vcvtdq2ps_XMM8_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, XMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    21689         { bs3CpuInstr4_vcvtdq2ps_YMM8_YMM8_icebp_c64,  255,         RM_REG, T_AVX_256, YMM8, YMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    21690     };
    21691 
    21692     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    21693     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    21694     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    21695                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     20015    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    2169620016}
    2169720017
    … …  
    2179620116    };
    2179720117
    21798     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     20118
     20119    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2179920120    {
    21800         { bs3CpuInstr4_cvtps2dq_XMM1_XMM2_icebp_c16,   255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21801         { bs3CpuInstr4_cvtps2dq_XMM1_FSxBX_icebp_c16,  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21802 
    21803         { bs3CpuInstr4_vcvtps2dq_XMM1_XMM2_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21804         { bs3CpuInstr4_vcvtps2dq_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21805 
    21806         { bs3CpuInstr4_vcvtps2dq_YMM1_YMM2_icebp_c16,  255,         RM_REG, T_AVX_256, YMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21807         { bs3CpuInstr4_vcvtps2dq_YMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21808 
    21809         { bs3CpuInstr4_cvtps2dq_XMM1_XMM1_icebp_c16,   255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21810         { bs3CpuInstr4_vcvtps2dq_XMM1_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21811         { bs3CpuInstr4_vcvtps2dq_YMM1_YMM1_icebp_c16,  255,         RM_REG, T_AVX_256, YMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
     20121        { BS3_INSTR4_ALL(cvtps2dq_XMM1_XMM2),   255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20122        { BS3_INSTR4_ALL(cvtps2dq_XMM1_FSxBX),  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20123
     20124        { BS3_INSTR4_ALL(vcvtps2dq_XMM1_XMM2),  255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20125        { BS3_INSTR4_ALL(vcvtps2dq_XMM1_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20126
     20127        { BS3_INSTR4_ALL(vcvtps2dq_YMM1_YMM2),  255,         RM_REG, T_AVX_256, YMM1, YMM2,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20128        { BS3_INSTR4_ALL(vcvtps2dq_YMM1_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_256, YMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20129
     20130        { BS3_INSTR4_ALL(cvtps2dq_XMM1_XMM1),   255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20131        { BS3_INSTR4_ALL(vcvtps2dq_XMM1_XMM1),  255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20132        { BS3_INSTR4_ALL(vcvtps2dq_YMM1_YMM1),  255,         RM_REG, T_AVX_256, YMM1, YMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20133
     20134        { BS3_INSTR4_C64(cvtps2dq_XMM8_XMM9),   255,         RM_REG, T_SSE2,    XMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20135        { BS3_INSTR4_C64(cvtps2dq_XMM8_FSxBX),  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20136
     20137        { BS3_INSTR4_C64(vcvtps2dq_XMM8_XMM9),  255,         RM_REG, T_AVX_128, XMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20138        { BS3_INSTR4_C64(vcvtps2dq_XMM8_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20139
     20140        { BS3_INSTR4_C64(vcvtps2dq_YMM8_YMM9),  255,         RM_REG, T_AVX_256, YMM8, YMM9,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20141        { BS3_INSTR4_C64(vcvtps2dq_YMM8_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_256, YMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20142
     20143        { BS3_INSTR4_C64(cvtps2dq_XMM8_XMM8),   255,         RM_REG, T_SSE2,    XMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20144        { BS3_INSTR4_C64(vcvtps2dq_XMM8_XMM8),  255,         RM_REG, T_AVX_128, XMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20145        { BS3_INSTR4_C64(vcvtps2dq_YMM8_YMM8),  255,         RM_REG, T_AVX_256, YMM8, YMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
    2181220146    };
    2181320147
    21814     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    21815     {
    21816         { bs3CpuInstr4_cvtps2dq_XMM1_XMM2_icebp_c32,   255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21817         { bs3CpuInstr4_cvtps2dq_XMM1_FSxBX_icebp_c32,  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21818 
    21819         { bs3CpuInstr4_vcvtps2dq_XMM1_XMM2_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21820         { bs3CpuInstr4_vcvtps2dq_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21821 
    21822         { bs3CpuInstr4_vcvtps2dq_YMM1_YMM2_icebp_c32,  255,         RM_REG, T_AVX_256, YMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21823         { bs3CpuInstr4_vcvtps2dq_YMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21824 
    21825         { bs3CpuInstr4_cvtps2dq_XMM1_XMM1_icebp_c32,   255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21826         { bs3CpuInstr4_vcvtps2dq_XMM1_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21827         { bs3CpuInstr4_vcvtps2dq_YMM1_YMM1_icebp_c32,  255,         RM_REG, T_AVX_256, YMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21828     };
    21829     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    21830     {
    21831         { bs3CpuInstr4_cvtps2dq_XMM1_XMM2_icebp_c64,   255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21832         { bs3CpuInstr4_cvtps2dq_XMM1_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21833 
    21834         { bs3CpuInstr4_vcvtps2dq_XMM1_XMM2_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21835         { bs3CpuInstr4_vcvtps2dq_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21836 
    21837         { bs3CpuInstr4_vcvtps2dq_YMM1_YMM2_icebp_c64,  255,         RM_REG, T_AVX_256, YMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21838         { bs3CpuInstr4_vcvtps2dq_YMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21839 
    21840         { bs3CpuInstr4_cvtps2dq_XMM1_XMM1_icebp_c64,   255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21841         { bs3CpuInstr4_vcvtps2dq_XMM1_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21842         { bs3CpuInstr4_vcvtps2dq_YMM1_YMM1_icebp_c64,  255,         RM_REG, T_AVX_256, YMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21843 
    21844         { bs3CpuInstr4_cvtps2dq_XMM8_XMM9_icebp_c64,   255,         RM_REG, T_SSE2,    XMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValues) },
    21845         { bs3CpuInstr4_cvtps2dq_XMM8_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21846 
    21847         { bs3CpuInstr4_vcvtps2dq_XMM8_XMM9_icebp_c64,  255,         RM_REG, T_AVX_128, XMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValues) },
    21848         { bs3CpuInstr4_vcvtps2dq_XMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21849 
    21850         { bs3CpuInstr4_vcvtps2dq_YMM8_YMM9_icebp_c64,  255,         RM_REG, T_AVX_256, YMM8, YMM9,  NOREG, PASS_ELEMENTS(s_aValues) },
    21851         { bs3CpuInstr4_vcvtps2dq_YMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_256, YMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21852 
    21853         { bs3CpuInstr4_cvtps2dq_XMM8_XMM8_icebp_c64,   255,         RM_REG, T_SSE2,    XMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    21854         { bs3CpuInstr4_vcvtps2dq_XMM8_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, XMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    21855         { bs3CpuInstr4_vcvtps2dq_YMM8_YMM8_icebp_c64,  255,         RM_REG, T_AVX_256, YMM8, YMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    21856     };
    21857 
    21858     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    21859     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    21860     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    21861                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     20148    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    2186220149}
    2186320150
    … …  
    2196220249    };
    2196320250
    21964     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     20251
     20252    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2196520253    {
    21966         { bs3CpuInstr4_cvttps2dq_XMM1_XMM2_icebp_c16,   255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21967         { bs3CpuInstr4_cvttps2dq_XMM1_FSxBX_icebp_c16,  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21968 
    21969         { bs3CpuInstr4_vcvttps2dq_XMM1_XMM2_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21970         { bs3CpuInstr4_vcvttps2dq_XMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21971 
    21972         { bs3CpuInstr4_vcvttps2dq_YMM1_YMM2_icebp_c16,  255,         RM_REG, T_AVX_256, YMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21973         { bs3CpuInstr4_vcvttps2dq_YMM1_FSxBX_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21974 
    21975         { bs3CpuInstr4_cvttps2dq_XMM1_XMM1_icebp_c16,   255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21976         { bs3CpuInstr4_vcvttps2dq_XMM1_XMM1_icebp_c16,  255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21977         { bs3CpuInstr4_vcvttps2dq_YMM1_YMM1_icebp_c16,  255,         RM_REG, T_AVX_256, YMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
     20254        { BS3_INSTR4_ALL(cvttps2dq_XMM1_XMM2),   255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20255        { BS3_INSTR4_ALL(cvttps2dq_XMM1_FSxBX),  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20256
     20257        { BS3_INSTR4_ALL(vcvttps2dq_XMM1_XMM2),  255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20258        { BS3_INSTR4_ALL(vcvttps2dq_XMM1_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20259
     20260        { BS3_INSTR4_ALL(vcvttps2dq_YMM1_YMM2),  255,         RM_REG, T_AVX_256, YMM1, YMM2,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20261        { BS3_INSTR4_ALL(vcvttps2dq_YMM1_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_256, YMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20262
     20263        { BS3_INSTR4_ALL(cvttps2dq_XMM1_XMM1),   255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20264        { BS3_INSTR4_ALL(vcvttps2dq_XMM1_XMM1),  255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20265        { BS3_INSTR4_ALL(vcvttps2dq_YMM1_YMM1),  255,         RM_REG, T_AVX_256, YMM1, YMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20266
     20267        { BS3_INSTR4_C64(cvttps2dq_XMM8_XMM9),   255,         RM_REG, T_SSE2,    XMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20268        { BS3_INSTR4_C64(cvttps2dq_XMM8_FSxBX),  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20269
     20270        { BS3_INSTR4_C64(vcvttps2dq_XMM8_XMM9),  255,         RM_REG, T_AVX_128, XMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20271        { BS3_INSTR4_C64(vcvttps2dq_XMM8_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20272
     20273        { BS3_INSTR4_C64(vcvttps2dq_YMM8_YMM9),  255,         RM_REG, T_AVX_256, YMM8, YMM9,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20274        { BS3_INSTR4_C64(vcvttps2dq_YMM8_FSxBX), X86_XCPT_AC, RM_MEM, T_AVX_256, YMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20275
     20276        { BS3_INSTR4_C64(cvttps2dq_XMM8_XMM8),   255,         RM_REG, T_SSE2,    XMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20277        { BS3_INSTR4_C64(vcvttps2dq_XMM8_XMM8),  255,         RM_REG, T_AVX_128, XMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20278        { BS3_INSTR4_C64(vcvttps2dq_YMM8_YMM8),  255,         RM_REG, T_AVX_256, YMM8, YMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
    2197820279    };
    2197920280
    21980     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    21981     {
    21982         { bs3CpuInstr4_cvttps2dq_XMM1_XMM2_icebp_c32,   255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21983         { bs3CpuInstr4_cvttps2dq_XMM1_FSxBX_icebp_c32,  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21984 
    21985         { bs3CpuInstr4_vcvttps2dq_XMM1_XMM2_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21986         { bs3CpuInstr4_vcvttps2dq_XMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21987 
    21988         { bs3CpuInstr4_vcvttps2dq_YMM1_YMM2_icebp_c32,  255,         RM_REG, T_AVX_256, YMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21989         { bs3CpuInstr4_vcvttps2dq_YMM1_FSxBX_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21990 
    21991         { bs3CpuInstr4_cvttps2dq_XMM1_XMM1_icebp_c32,   255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21992         { bs3CpuInstr4_vcvttps2dq_XMM1_XMM1_icebp_c32,  255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21993         { bs3CpuInstr4_vcvttps2dq_YMM1_YMM1_icebp_c32,  255,         RM_REG, T_AVX_256, YMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    21994     };
    21995     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    21996     {
    21997         { bs3CpuInstr4_cvttps2dq_XMM1_XMM2_icebp_c64,   255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    21998         { bs3CpuInstr4_cvttps2dq_XMM1_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    21999 
    22000         { bs3CpuInstr4_vcvttps2dq_XMM1_XMM2_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    22001         { bs3CpuInstr4_vcvttps2dq_XMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22002 
    22003         { bs3CpuInstr4_vcvttps2dq_YMM1_YMM2_icebp_c64,  255,         RM_REG, T_AVX_256, YMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    22004         { bs3CpuInstr4_vcvttps2dq_YMM1_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22005 
    22006         { bs3CpuInstr4_cvttps2dq_XMM1_XMM1_icebp_c64,   255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    22007         { bs3CpuInstr4_vcvttps2dq_XMM1_XMM1_icebp_c64,  255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    22008         { bs3CpuInstr4_vcvttps2dq_YMM1_YMM1_icebp_c64,  255,         RM_REG, T_AVX_256, YMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    22009 
    22010         { bs3CpuInstr4_cvttps2dq_XMM8_XMM9_icebp_c64,   255,         RM_REG, T_SSE2,    XMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValues) },
    22011         { bs3CpuInstr4_cvttps2dq_XMM8_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22012 
    22013         { bs3CpuInstr4_vcvttps2dq_XMM8_XMM9_icebp_c64,  255,         RM_REG, T_AVX_128, XMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValues) },
    22014         { bs3CpuInstr4_vcvttps2dq_XMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22015 
    22016         { bs3CpuInstr4_vcvttps2dq_YMM8_YMM9_icebp_c64,  255,         RM_REG, T_AVX_256, YMM8, YMM9,  NOREG, PASS_ELEMENTS(s_aValues) },
    22017         { bs3CpuInstr4_vcvttps2dq_YMM8_FSxBX_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_256, YMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22018 
    22019         { bs3CpuInstr4_cvttps2dq_XMM8_XMM8_icebp_c64,   255,         RM_REG, T_SSE2,    XMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    22020         { bs3CpuInstr4_vcvttps2dq_XMM8_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128, XMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    22021         { bs3CpuInstr4_vcvttps2dq_YMM8_YMM8_icebp_c64,  255,         RM_REG, T_AVX_256, YMM8, YMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    22022     };
    22023 
    22024     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    22025     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    22026     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    22027                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     20281    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    2202820282}
    2202920283
    … …  
    2209720351    };
    2209820352
    22099     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     20353    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2210020354    {
    22101         { bs3CpuInstr4_cvtdq2pd_XMM1_XMM2_icebp_c16,   255,             RM_REG,    T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
     20355        { BS3_INSTR4_ALL(cvtdq2pd_XMM1_XMM2),   255,             RM_REG,    T_SSE2,    XMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValues) },
    2210220356#ifdef TODO_CVTDQ2PD_M64_IEM /** @todo THIS FAILS ON IEM: unexpected #GP */
    22103         { bs3CpuInstr4_cvtdq2pd_XMM1_FSxBX_icebp_c16,  X86_XCPT_AC,     RM_MEM,    T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
     20357        { BS3_INSTR4_ALL(cvtdq2pd_XMM1_FSxBX),  X86_XCPT_AC,     RM_MEM,    T_SSE2,    XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
    2210420358#endif /* TODO_CVTDQ2PD_M64_IEM */
    2210520359
    22106         { bs3CpuInstr4_vcvtdq2pd_XMM1_XMM2_icebp_c16,  255,             RM_REG,    T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    22107         { bs3CpuInstr4_vcvtdq2pd_XMM1_FSxBX_icebp_c16, X86_XCPT_AC,     RM_MEM,    T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22108 
    22109         { bs3CpuInstr4_vcvtdq2pd_YMM1_XMM2_icebp_c16,  255,             RM_REG,    T_AVX_256, YMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    22110         { bs3CpuInstr4_vcvtdq2pd_YMM1_FSxBX_icebp_c16, BS3_XCPT_NOT_AC, RM_MEM128, T_AVX_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22111 
    22112         { bs3CpuInstr4_cvtdq2pd_XMM1_XMM1_icebp_c16,   255,             RM_REG,    T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    22113         { bs3CpuInstr4_vcvtdq2pd_XMM1_XMM1_icebp_c16,  255,             RM_REG,    T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    22114         { bs3CpuInstr4_vcvtdq2pd_YMM1_XMM1_icebp_c16,  255,             RM_REG,    T_AVX_256, YMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
     20360        { BS3_INSTR4_ALL(vcvtdq2pd_XMM1_XMM2),  255,             RM_REG,    T_AVX_128, XMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20361        { BS3_INSTR4_ALL(vcvtdq2pd_XMM1_FSxBX), X86_XCPT_AC,     RM_MEM,    T_AVX_128, XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20362
     20363        { BS3_INSTR4_ALL(vcvtdq2pd_YMM1_XMM2),  255,             RM_REG,    T_AVX_256, YMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20364        { BS3_INSTR4_ALL(vcvtdq2pd_YMM1_FSxBX), BS3_XCPT_NOT_AC, RM_MEM128, T_AVX_256, YMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20365
     20366        { BS3_INSTR4_ALL(cvtdq2pd_XMM1_XMM1),   255,             RM_REG,    T_SSE2,    XMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20367        { BS3_INSTR4_ALL(vcvtdq2pd_XMM1_XMM1),  255,             RM_REG,    T_AVX_128, XMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20368        { BS3_INSTR4_ALL(vcvtdq2pd_YMM1_XMM1),  255,             RM_REG,    T_AVX_256, YMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20369
     20370        { BS3_INSTR4_C64(cvtdq2pd_XMM8_XMM9),   255,             RM_REG,    T_SSE2,    XMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20371#ifdef TODO_CVTDQ2PD_M64_IEM /** @todo THIS FAILS ON IEM: unexpected #GP */
     20372        { BS3_INSTR4_C64(cvtdq2pd_XMM8_FSxBX),  X86_XCPT_AC,     RM_MEM,    T_SSE2,    XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20373#endif /* TODO_CVTDQ2PD_M64_IEM */
     20374
     20375        { BS3_INSTR4_C64(vcvtdq2pd_XMM8_XMM9),  255,             RM_REG,    T_AVX_128, XMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20376        { BS3_INSTR4_C64(vcvtdq2pd_XMM8_FSxBX), X86_XCPT_AC,     RM_MEM,    T_AVX_128, XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20377
     20378        { BS3_INSTR4_C64(vcvtdq2pd_YMM8_XMM9),  255,             RM_REG,    T_AVX_256, YMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20379        { BS3_INSTR4_C64(vcvtdq2pd_YMM8_FSxBX), BS3_XCPT_NOT_AC, RM_MEM128, T_AVX_128, YMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValues) },
     20380
     20381        { BS3_INSTR4_C64(cvtdq2pd_XMM8_XMM8),   255,             RM_REG,    T_SSE2,    XMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20382        { BS3_INSTR4_C64(vcvtdq2pd_XMM8_XMM8),  255,             RM_REG,    T_AVX_128, XMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
     20383        { BS3_INSTR4_C64(vcvtdq2pd_YMM8_XMM8),  255,             RM_REG,    T_AVX_256, YMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValues) },
    2211520384    };
    22116     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    22117     {
    22118         { bs3CpuInstr4_cvtdq2pd_XMM1_XMM2_icebp_c32,   255,             RM_REG,    T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    22119 #ifdef TODO_CVTDQ2PD_M64_IEM /** @todo THIS FAILS ON IEM: unexpected #GP */
    22120         { bs3CpuInstr4_cvtdq2pd_XMM1_FSxBX_icebp_c32,  X86_XCPT_AC,     RM_MEM,    T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22121 #endif /* TODO_CVTDQ2PD_M64_IEM */
    22122 
    22123         { bs3CpuInstr4_vcvtdq2pd_XMM1_XMM2_icebp_c32,  255,             RM_REG,    T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    22124         { bs3CpuInstr4_vcvtdq2pd_XMM1_FSxBX_icebp_c32, X86_XCPT_AC,     RM_MEM,    T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22125 
    22126         { bs3CpuInstr4_vcvtdq2pd_YMM1_XMM2_icebp_c32,  255,             RM_REG,    T_AVX_256, YMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    22127         { bs3CpuInstr4_vcvtdq2pd_YMM1_FSxBX_icebp_c32, BS3_XCPT_NOT_AC, RM_MEM128, T_AVX_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22128 
    22129         { bs3CpuInstr4_cvtdq2pd_XMM1_XMM1_icebp_c32,   255,             RM_REG,    T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    22130         { bs3CpuInstr4_vcvtdq2pd_XMM1_XMM1_icebp_c32,  255,             RM_REG,    T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    22131         { bs3CpuInstr4_vcvtdq2pd_YMM1_XMM1_icebp_c32,  255,             RM_REG,    T_AVX_256, YMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    22132     };
    22133     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    22134     {
    22135         { bs3CpuInstr4_cvtdq2pd_XMM1_XMM2_icebp_c64,   255,             RM_REG,    T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    22136 #ifdef TODO_CVTDQ2PD_M64_IEM /** @todo THIS FAILS ON IEM: unexpected #GP */
    22137         { bs3CpuInstr4_cvtdq2pd_XMM1_FSxBX_icebp_c64,  X86_XCPT_AC,     RM_MEM,    T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22138 #endif /* TODO_CVTDQ2PD_M64_IEM */
    22139 
    22140         { bs3CpuInstr4_vcvtdq2pd_XMM1_XMM2_icebp_c64,  255,             RM_REG,    T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    22141         { bs3CpuInstr4_vcvtdq2pd_XMM1_FSxBX_icebp_c64, X86_XCPT_AC,     RM_MEM,    T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22142 
    22143         { bs3CpuInstr4_vcvtdq2pd_YMM1_XMM2_icebp_c64,  255,             RM_REG,    T_AVX_256, YMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValues) },
    22144         { bs3CpuInstr4_vcvtdq2pd_YMM1_FSxBX_icebp_c64, BS3_XCPT_NOT_AC, RM_MEM128, T_AVX_256, YMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22145 
    22146         { bs3CpuInstr4_cvtdq2pd_XMM1_XMM1_icebp_c64,   255,             RM_REG,    T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    22147         { bs3CpuInstr4_vcvtdq2pd_XMM1_XMM1_icebp_c64,  255,             RM_REG,    T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    22148         { bs3CpuInstr4_vcvtdq2pd_YMM1_XMM1_icebp_c64,  255,             RM_REG,    T_AVX_256, YMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValues) },
    22149 
    22150         { bs3CpuInstr4_cvtdq2pd_XMM8_XMM9_icebp_c64,   255,             RM_REG,    T_SSE2,    XMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValues) },
    22151 #ifdef TODO_CVTDQ2PD_M64_IEM /** @todo THIS FAILS ON IEM: unexpected #GP */
    22152         { bs3CpuInstr4_cvtdq2pd_XMM8_FSxBX_icebp_c64,  X86_XCPT_AC,     RM_MEM,    T_SSE2,    XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22153 #endif /* TODO_CVTDQ2PD_M64_IEM */
    22154 
    22155         { bs3CpuInstr4_vcvtdq2pd_XMM8_XMM9_icebp_c64,  255,             RM_REG,    T_AVX_128, XMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValues) },
    22156         { bs3CpuInstr4_vcvtdq2pd_XMM8_FSxBX_icebp_c64, X86_XCPT_AC,     RM_MEM,    T_AVX_128, XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22157 
    22158         { bs3CpuInstr4_vcvtdq2pd_YMM8_XMM9_icebp_c64,  255,             RM_REG,    T_AVX_256, YMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValues) },
    22159         { bs3CpuInstr4_vcvtdq2pd_YMM8_FSxBX_icebp_c64, BS3_XCPT_NOT_AC, RM_MEM128, T_AVX_128, YMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValues) },
    22160 
    22161         { bs3CpuInstr4_cvtdq2pd_XMM8_XMM8_icebp_c64,   255,             RM_REG,    T_SSE2,    XMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    22162         { bs3CpuInstr4_vcvtdq2pd_XMM8_XMM8_icebp_c64,  255,             RM_REG,    T_AVX_128, XMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    22163         { bs3CpuInstr4_vcvtdq2pd_YMM8_XMM8_icebp_c64,  255,             RM_REG,    T_AVX_256, YMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValues) },
    22164     };
    22165 
    22166     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    22167     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    22168     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    22169                                         g_aXcptConfig5, RT_ELEMENTS(g_aXcptConfig5));
     20385
     20386    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig5));
    2217020387}
    2217120388
    … …  
    2238120598    };
    2238220599
    22383     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     20600    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2238420601    {
    22385         { bs3CpuInstr4_cvtpd2dq_XMM1_XMM2_icebp_c16,     255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22386         { bs3CpuInstr4_cvtpd2dq_XMM1_FSxBX_icebp_c16,    X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) },
    22387 
    22388         { bs3CpuInstr4_vcvtpd2dq_XMM1_XMM2_icebp_c16,    255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22389         { bs3CpuInstr4_vcvtpd2dq_XMM1_FSxBX_icebp_c16,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) },
    22390 
    22391         { bs3CpuInstr4_vcvtpd2dq_XMM1_YMM2_icebp_c16,    255,         RM_REG, T_AVX_256, XMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22392         { bs3CpuInstr4_vcvtpd2dq_XMM1_FSxBX_Y_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_256, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesY) },
    22393 
    22394         { bs3CpuInstr4_cvtpd2dq_XMM1_XMM1_icebp_c16,     255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22395         { bs3CpuInstr4_vcvtpd2dq_XMM1_XMM1_icebp_c16,    255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22396         { bs3CpuInstr4_vcvtpd2dq_XMM1_YMM1_icebp_c16,    255,         RM_REG, T_AVX_256, XMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValuesY) },
     20602        { BS3_INSTR4_ALL(cvtpd2dq_XMM1_XMM2),     255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20603        { BS3_INSTR4_ALL(cvtpd2dq_XMM1_FSxBX),    X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20604
     20605        { BS3_INSTR4_ALL(vcvtpd2dq_XMM1_XMM2),    255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20606        { BS3_INSTR4_ALL(vcvtpd2dq_XMM1_FSxBX),   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20607
     20608        { BS3_INSTR4_ALL(vcvtpd2dq_XMM1_YMM2),    255,         RM_REG, T_AVX_256, XMM1, YMM2,  NOREG, PASS_TEST_ARRAY(s_aValuesY) },
     20609        { BS3_INSTR4_ALL(vcvtpd2dq_XMM1_FSxBX_Y), X86_XCPT_AC, RM_MEM, T_AVX_256, XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValuesY) },
     20610
     20611        { BS3_INSTR4_ALL(cvtpd2dq_XMM1_XMM1),     255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20612        { BS3_INSTR4_ALL(vcvtpd2dq_XMM1_XMM1),    255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20613        { BS3_INSTR4_ALL(vcvtpd2dq_XMM1_YMM1),    255,         RM_REG, T_AVX_256, XMM1, YMM1,  NOREG, PASS_TEST_ARRAY(s_aValuesY) },
     20614
     20615        { BS3_INSTR4_C64(cvtpd2dq_XMM8_XMM9),     255,         RM_REG, T_SSE2,    XMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20616        { BS3_INSTR4_C64(cvtpd2dq_XMM8_FSxBX),    X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20617
     20618        { BS3_INSTR4_C64(vcvtpd2dq_XMM8_XMM9),    255,         RM_REG, T_AVX_128, XMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20619        { BS3_INSTR4_C64(vcvtpd2dq_XMM8_FSxBX),   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20620
     20621        { BS3_INSTR4_C64(vcvtpd2dq_XMM8_YMM9),    255,         RM_REG, T_AVX_256, XMM8, YMM9,  NOREG, PASS_TEST_ARRAY(s_aValuesY) },
     20622        { BS3_INSTR4_C64(vcvtpd2dq_XMM8_FSxBX_Y), X86_XCPT_AC, RM_MEM, T_AVX_256, XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValuesY) },
     20623
     20624        { BS3_INSTR4_C64(cvtpd2dq_XMM8_XMM8),     255,         RM_REG, T_SSE2,    XMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20625        { BS3_INSTR4_C64(vcvtpd2dq_XMM8_XMM8),    255,         RM_REG, T_AVX_128, XMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20626        { BS3_INSTR4_C64(vcvtpd2dq_XMM8_YMM8),    255,         RM_REG, T_AVX_256, XMM8, YMM8,  NOREG, PASS_TEST_ARRAY(s_aValuesY) },
    2239720627    };
    22398     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    22399     {
    22400         { bs3CpuInstr4_cvtpd2dq_XMM1_XMM2_icebp_c32,     255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22401         { bs3CpuInstr4_cvtpd2dq_XMM1_FSxBX_icebp_c32,    X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) },
    22402 
    22403         { bs3CpuInstr4_vcvtpd2dq_XMM1_XMM2_icebp_c32,    255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22404         { bs3CpuInstr4_vcvtpd2dq_XMM1_FSxBX_icebp_c32,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) },
    22405 
    22406         { bs3CpuInstr4_vcvtpd2dq_XMM1_YMM2_icebp_c32,    255,         RM_REG, T_AVX_256, XMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22407         { bs3CpuInstr4_vcvtpd2dq_XMM1_FSxBX_Y_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_256, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesY) },
    22408 
    22409         { bs3CpuInstr4_cvtpd2dq_XMM1_XMM1_icebp_c32,     255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22410         { bs3CpuInstr4_vcvtpd2dq_XMM1_XMM1_icebp_c32,    255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22411         { bs3CpuInstr4_vcvtpd2dq_XMM1_YMM1_icebp_c32,    255,         RM_REG, T_AVX_256, XMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22412     };
    22413     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    22414     {
    22415         { bs3CpuInstr4_cvtpd2dq_XMM1_XMM2_icebp_c64,     255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22416         { bs3CpuInstr4_cvtpd2dq_XMM1_FSxBX_icebp_c64,    X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) },
    22417 
    22418         { bs3CpuInstr4_vcvtpd2dq_XMM1_XMM2_icebp_c64,    255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22419         { bs3CpuInstr4_vcvtpd2dq_XMM1_FSxBX_icebp_c64,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) },
    22420 
    22421         { bs3CpuInstr4_vcvtpd2dq_XMM1_YMM2_icebp_c64,    255,         RM_REG, T_AVX_256, XMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22422         { bs3CpuInstr4_vcvtpd2dq_XMM1_FSxBX_Y_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_256, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesY) },
    22423 
    22424         { bs3CpuInstr4_cvtpd2dq_XMM1_XMM1_icebp_c64,     255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22425         { bs3CpuInstr4_vcvtpd2dq_XMM1_XMM1_icebp_c64,    255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22426         { bs3CpuInstr4_vcvtpd2dq_XMM1_YMM1_icebp_c64,    255,         RM_REG, T_AVX_256, XMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22427 
    22428         { bs3CpuInstr4_cvtpd2dq_XMM8_XMM9_icebp_c64,     255,         RM_REG, T_SSE2,    XMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22429         { bs3CpuInstr4_cvtpd2dq_XMM8_FSxBX_icebp_c64,    X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) },
    22430 
    22431         { bs3CpuInstr4_vcvtpd2dq_XMM8_XMM9_icebp_c64,    255,         RM_REG, T_AVX_128, XMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22432         { bs3CpuInstr4_vcvtpd2dq_XMM8_FSxBX_icebp_c64,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) },
    22433 
    22434         { bs3CpuInstr4_vcvtpd2dq_XMM8_YMM9_icebp_c64,    255,         RM_REG, T_AVX_256, XMM8, YMM9,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22435         { bs3CpuInstr4_vcvtpd2dq_XMM8_FSxBX_Y_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_256, XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesY) },
    22436 
    22437         { bs3CpuInstr4_cvtpd2dq_XMM8_XMM8_icebp_c64,     255,         RM_REG, T_SSE2,    XMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22438         { bs3CpuInstr4_vcvtpd2dq_XMM8_XMM8_icebp_c64,    255,         RM_REG, T_AVX_128, XMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22439         { bs3CpuInstr4_vcvtpd2dq_XMM8_YMM8_icebp_c64,    255,         RM_REG, T_AVX_256, XMM8, YMM8,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22440     };
    22441 
    22442     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    22443     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    22444     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    22445                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     20628
     20629    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    2244620630}
    2244720631
    … …  
    2265720841    };
    2265820842
    22659     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     20843    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2266020844    {
    22661         { bs3CpuInstr4_cvttpd2dq_XMM1_XMM2_icebp_c16,     255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22662         { bs3CpuInstr4_cvttpd2dq_XMM1_FSxBX_icebp_c16,    X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) },
    22663 
    22664         { bs3CpuInstr4_vcvttpd2dq_XMM1_XMM2_icebp_c16,    255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22665         { bs3CpuInstr4_vcvttpd2dq_XMM1_FSxBX_icebp_c16,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) }, // need to tag with RM_MEM_16?
    22666 
    22667         { bs3CpuInstr4_vcvttpd2dq_XMM1_YMM2_icebp_c16,    255,         RM_REG, T_AVX_256, XMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22668         { bs3CpuInstr4_vcvttpd2dq_XMM1_FSxBX_Y_icebp_c16, X86_XCPT_AC, RM_MEM, T_AVX_256, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesY) }, // need to tag with RM_MEM_32?
    22669 
    22670         { bs3CpuInstr4_cvttpd2dq_XMM1_XMM1_icebp_c16,     255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22671         { bs3CpuInstr4_vcvttpd2dq_XMM1_XMM1_icebp_c16,    255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22672         { bs3CpuInstr4_vcvttpd2dq_XMM1_YMM1_icebp_c16,    255,         RM_REG, T_AVX_256, XMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValuesY) },
     20845        { BS3_INSTR4_ALL(cvttpd2dq_XMM1_XMM2),     255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20846        { BS3_INSTR4_ALL(cvttpd2dq_XMM1_FSxBX),    X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20847
     20848        { BS3_INSTR4_ALL(vcvttpd2dq_XMM1_XMM2),    255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20849        { BS3_INSTR4_ALL(vcvttpd2dq_XMM1_FSxBX),   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20850
     20851        { BS3_INSTR4_ALL(vcvttpd2dq_XMM1_YMM2),    255,         RM_REG, T_AVX_256, XMM1, YMM2,  NOREG, PASS_TEST_ARRAY(s_aValuesY) },
     20852        { BS3_INSTR4_ALL(vcvttpd2dq_XMM1_FSxBX_Y), X86_XCPT_AC, RM_MEM, T_AVX_256, XMM1, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValuesY) },
     20853
     20854        { BS3_INSTR4_ALL(cvttpd2dq_XMM1_XMM1),     255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20855        { BS3_INSTR4_ALL(vcvttpd2dq_XMM1_XMM1),    255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20856        { BS3_INSTR4_ALL(vcvttpd2dq_XMM1_YMM1),    255,         RM_REG, T_AVX_256, XMM1, YMM1,  NOREG, PASS_TEST_ARRAY(s_aValuesY) },
     20857
     20858        { BS3_INSTR4_C64(cvttpd2dq_XMM8_XMM9),     255,         RM_REG, T_SSE2,    XMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20859        { BS3_INSTR4_C64(cvttpd2dq_XMM8_FSxBX),    X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20860
     20861        { BS3_INSTR4_C64(vcvttpd2dq_XMM8_XMM9),    255,         RM_REG, T_AVX_128, XMM8, XMM9,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20862        { BS3_INSTR4_C64(vcvttpd2dq_XMM8_FSxBX),   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20863
     20864        { BS3_INSTR4_C64(vcvttpd2dq_XMM8_YMM9),    255,         RM_REG, T_AVX_256, XMM8, YMM9,  NOREG, PASS_TEST_ARRAY(s_aValuesY) },
     20865        { BS3_INSTR4_C64(vcvttpd2dq_XMM8_FSxBX_Y), X86_XCPT_AC, RM_MEM, T_AVX_256, XMM8, FSxBX, NOREG, PASS_TEST_ARRAY(s_aValuesY) },
     20866
     20867        { BS3_INSTR4_C64(cvttpd2dq_XMM8_XMM8),     255,         RM_REG, T_SSE2,    XMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20868        { BS3_INSTR4_C64(vcvttpd2dq_XMM8_XMM8),    255,         RM_REG, T_AVX_128, XMM8, XMM8,  NOREG, PASS_TEST_ARRAY(s_aValuesX) },
     20869        { BS3_INSTR4_C64(vcvttpd2dq_XMM8_YMM8),    255,         RM_REG, T_AVX_256, YMM8, YMM8,  NOREG, PASS_TEST_ARRAY(s_aValuesY) },
    2267320870    };
    22674     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    22675     {
    22676         { bs3CpuInstr4_cvttpd2dq_XMM1_XMM2_icebp_c32,     255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22677         { bs3CpuInstr4_cvttpd2dq_XMM1_FSxBX_icebp_c32,    X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) },
    22678 
    22679         { bs3CpuInstr4_vcvttpd2dq_XMM1_XMM2_icebp_c32,    255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22680         { bs3CpuInstr4_vcvttpd2dq_XMM1_FSxBX_icebp_c32,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) }, // need to tag with RM_MEM_16?
    22681 
    22682         { bs3CpuInstr4_vcvttpd2dq_XMM1_YMM2_icebp_c32,    255,         RM_REG, T_AVX_256, XMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22683         { bs3CpuInstr4_vcvttpd2dq_XMM1_FSxBX_Y_icebp_c32, X86_XCPT_AC, RM_MEM, T_AVX_256, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesY) }, // need to tag with RM_MEM_32?
    22684 
    22685         { bs3CpuInstr4_cvttpd2dq_XMM1_XMM1_icebp_c32,     255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22686         { bs3CpuInstr4_vcvttpd2dq_XMM1_XMM1_icebp_c32,    255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22687         { bs3CpuInstr4_vcvttpd2dq_XMM1_YMM1_icebp_c32,    255,         RM_REG, T_AVX_256, XMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22688     };
    22689     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    22690     {
    22691         { bs3CpuInstr4_cvttpd2dq_XMM1_XMM2_icebp_c64,     255,         RM_REG, T_SSE2,    XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22692         { bs3CpuInstr4_cvttpd2dq_XMM1_FSxBX_icebp_c64,    X86_XCPT_AC, RM_MEM, T_SSE2,    XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) },
    22693 
    22694         { bs3CpuInstr4_vcvttpd2dq_XMM1_XMM2_icebp_c64,    255,         RM_REG, T_AVX_128, XMM1, XMM2,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22695         { bs3CpuInstr4_vcvttpd2dq_XMM1_FSxBX_icebp_c64,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) }, // need to tag with RM_MEM_16?
    22696 
    22697         { bs3CpuInstr4_vcvttpd2dq_XMM1_YMM2_icebp_c64,    255,         RM_REG, T_AVX_256, XMM1, YMM2,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22698         { bs3CpuInstr4_vcvttpd2dq_XMM1_FSxBX_Y_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_256, XMM1, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesY) }, // need to tag with RM_MEM_32?
    22699 
    22700         { bs3CpuInstr4_cvttpd2dq_XMM1_XMM1_icebp_c64,     255,         RM_REG, T_SSE2,    XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22701         { bs3CpuInstr4_vcvttpd2dq_XMM1_XMM1_icebp_c64,    255,         RM_REG, T_AVX_128, XMM1, XMM1,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22702         { bs3CpuInstr4_vcvttpd2dq_XMM1_YMM1_icebp_c64,    255,         RM_REG, T_AVX_256, XMM1, YMM1,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22703 
    22704         { bs3CpuInstr4_cvttpd2dq_XMM8_XMM9_icebp_c64,     255,         RM_REG, T_SSE2,    XMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22705         { bs3CpuInstr4_cvttpd2dq_XMM8_FSxBX_icebp_c64,    X86_XCPT_AC, RM_MEM, T_SSE2,    XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) },
    22706 
    22707         { bs3CpuInstr4_vcvttpd2dq_XMM8_XMM9_icebp_c64,    255,         RM_REG, T_AVX_128, XMM8, XMM9,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22708         { bs3CpuInstr4_vcvttpd2dq_XMM8_FSxBX_icebp_c64,   X86_XCPT_AC, RM_MEM, T_AVX_128, XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesX) }, // need to tag with RM_MEM_16?
    22709 
    22710         { bs3CpuInstr4_vcvttpd2dq_XMM8_YMM9_icebp_c64,    255,         RM_REG, T_AVX_256, XMM8, YMM9,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22711         { bs3CpuInstr4_vcvttpd2dq_XMM8_FSxBX_Y_icebp_c64, X86_XCPT_AC, RM_MEM, T_AVX_256, XMM8, FSxBX, NOREG, PASS_ELEMENTS(s_aValuesY) }, // need to tag with RM_MEM_32?
    22712 
    22713         { bs3CpuInstr4_cvttpd2dq_XMM8_XMM8_icebp_c64,     255,         RM_REG, T_SSE2,    XMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22714         { bs3CpuInstr4_vcvttpd2dq_XMM8_XMM8_icebp_c64,    255,         RM_REG, T_AVX_128, XMM8, XMM8,  NOREG, PASS_ELEMENTS(s_aValuesX) },
    22715         { bs3CpuInstr4_vcvttpd2dq_XMM8_YMM8_icebp_c64,    255,         RM_REG, T_AVX_256, YMM8, YMM8,  NOREG, PASS_ELEMENTS(s_aValuesY) },
    22716     };
    22717 
    22718     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    22719     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    22720     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    22721                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     20871
     20872    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    2272220873}
    2272320874
    … …  
    2296521116    };
    2296621117
    22967     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     21118    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2296821119    {
    22969         { bs3CpuInstr4_cvtpd2ps_XMM1_XMM2_icebp_c16,     255, RM_REG, T_SSE2,    XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValuesX) },
    22970         { bs3CpuInstr4_cvtpd2ps_XMM1_FSxBX_icebp_c16,    255, RM_MEM, T_SSE2,    XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesX) },
    22971 
    22972         { bs3CpuInstr4_vcvtpd2ps_XMM1_XMM2_icebp_c16,    255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesX) },
    22973         { bs3CpuInstr4_vcvtpd2ps_XMM1_FSxBX_O_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesX) },
    22974 
    22975         { bs3CpuInstr4_vcvtpd2ps_XMM1_YMM2_icebp_c16,    255, RM_REG, T_AVX_256, XMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesY) },
    22976         { bs3CpuInstr4_vcvtpd2ps_XMM1_FSxBX_Y_icebp_c16, 255, RM_MEM, T_AVX_256, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesY) },
    22977 
    22978         { bs3CpuInstr4_cvtpd2ps_XMM1_XMM1_icebp_c16,     255, RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesX) },
    22979         { bs3CpuInstr4_vcvtpd2ps_XMM1_XMM1_icebp_c16,    255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesX) },
    22980         { bs3CpuInstr4_vcvtpd2ps_XMM1_YMM1_icebp_c16,    255, RM_REG, T_AVX_256, XMM1, NOREG, YMM1,  PASS_ELEMENTS(s_aValuesY) },
     21120        { BS3_INSTR4_ALL(cvtpd2ps_XMM1_XMM2),     255, RM_REG, T_SSE2,    XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesX) },
     21121        { BS3_INSTR4_ALL(cvtpd2ps_XMM1_FSxBX),    255, RM_MEM, T_SSE2,    XMM1, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesX) },
     21122
     21123        { BS3_INSTR4_ALL(vcvtpd2ps_XMM1_XMM2),    255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesX) },
     21124        { BS3_INSTR4_ALL(vcvtpd2ps_XMM1_FSxBX_O), 255, RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesX) },
     21125
     21126        { BS3_INSTR4_ALL(vcvtpd2ps_XMM1_YMM2),    255, RM_REG, T_AVX_256, XMM1, NOREG, YMM2,  PASS_TEST_ARRAY(s_aValuesY) },
     21127        { BS3_INSTR4_ALL(vcvtpd2ps_XMM1_FSxBX_Y), 255, RM_MEM, T_AVX_256, XMM1, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesY) },
     21128
     21129        { BS3_INSTR4_ALL(cvtpd2ps_XMM1_XMM1),     255, RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValuesX) },
     21130        { BS3_INSTR4_ALL(vcvtpd2ps_XMM1_XMM1),    255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValuesX) },
     21131        { BS3_INSTR4_ALL(vcvtpd2ps_XMM1_YMM1),    255, RM_REG, T_AVX_256, XMM1, NOREG, YMM1,  PASS_TEST_ARRAY(s_aValuesY) },
     21132
     21133        { BS3_INSTR4_C64(cvtpd2ps_XMM8_XMM9),     255, RM_REG, T_SSE2,    XMM8, NOREG, XMM9,  PASS_TEST_ARRAY(s_aValuesX) },
     21134        { BS3_INSTR4_C64(cvtpd2ps_XMM8_FSxBX),    255, RM_MEM, T_SSE2,    XMM8, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesX) },
     21135
     21136        { BS3_INSTR4_C64(vcvtpd2ps_XMM8_XMM9),    255, RM_REG, T_AVX_128, XMM8, NOREG, XMM9,  PASS_TEST_ARRAY(s_aValuesX) },
     21137        { BS3_INSTR4_C64(vcvtpd2ps_XMM8_FSxBX_O), 255, RM_MEM, T_AVX_128, XMM8, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesX) },
     21138
     21139        { BS3_INSTR4_C64(vcvtpd2ps_XMM8_YMM9),    255, RM_REG, T_AVX_256, XMM8, NOREG, YMM9,  PASS_TEST_ARRAY(s_aValuesY) },
     21140        { BS3_INSTR4_C64(vcvtpd2ps_XMM8_FSxBX_Y), 255, RM_MEM, T_AVX_256, XMM8, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValuesY) },
     21141
     21142        { BS3_INSTR4_C64(cvtpd2ps_XMM8_XMM8),     255, RM_REG, T_SSE2,    XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValuesX) },
     21143        { BS3_INSTR4_C64(vcvtpd2ps_XMM8_XMM8),    255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValuesX) },
     21144        { BS3_INSTR4_C64(vcvtpd2ps_XMM8_YMM8),    255, RM_REG, T_AVX_256, XMM8, NOREG, YMM8,  PASS_TEST_ARRAY(s_aValuesY) },
    2298121145    };
    22982     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    22983     {
    22984         { bs3CpuInstr4_cvtpd2ps_XMM1_XMM2_icebp_c32,     255, RM_REG, T_SSE2,    XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesX) },
    22985         { bs3CpuInstr4_cvtpd2ps_XMM1_FSxBX_icebp_c32,    255, RM_MEM, T_SSE2,    XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesX) },
    22986 
    22987         { bs3CpuInstr4_vcvtpd2ps_XMM1_XMM2_icebp_c32,    255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesX) },
    22988         { bs3CpuInstr4_vcvtpd2ps_XMM1_FSxBX_O_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesX) },
    22989 
    22990         { bs3CpuInstr4_vcvtpd2ps_XMM1_YMM2_icebp_c32,    255, RM_REG, T_AVX_256, XMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesY) },
    22991         { bs3CpuInstr4_vcvtpd2ps_XMM1_FSxBX_Y_icebp_c32, 255, RM_MEM, T_AVX_256, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesY) },
    22992 
    22993         { bs3CpuInstr4_cvtpd2ps_XMM1_XMM1_icebp_c32,     255, RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesX) },
    22994         { bs3CpuInstr4_vcvtpd2ps_XMM1_XMM1_icebp_c32,    255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesX) },
    22995         { bs3CpuInstr4_vcvtpd2ps_XMM1_YMM1_icebp_c32,    255, RM_REG, T_AVX_256, XMM1, NOREG, YMM1,  PASS_ELEMENTS(s_aValuesY) },
    22996     };
    22997     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    22998     {
    22999         { bs3CpuInstr4_cvtpd2ps_XMM1_XMM2_icebp_c64,     255, RM_REG, T_SSE2,    XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesX) },
    23000         { bs3CpuInstr4_cvtpd2ps_XMM1_FSxBX_icebp_c64,    255, RM_MEM, T_SSE2,    XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesX) },
    23001 
    23002         { bs3CpuInstr4_vcvtpd2ps_XMM1_XMM2_icebp_c64,    255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesX) },
    23003         { bs3CpuInstr4_vcvtpd2ps_XMM1_FSxBX_O_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesX) },
    23004 
    23005         { bs3CpuInstr4_vcvtpd2ps_XMM1_YMM2_icebp_c64,    255, RM_REG, T_AVX_256, XMM1, NOREG, YMM2,  PASS_ELEMENTS(s_aValuesY) },
    23006         { bs3CpuInstr4_vcvtpd2ps_XMM1_FSxBX_Y_icebp_c64, 255, RM_MEM, T_AVX_256, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesY) },
    23007 
    23008         { bs3CpuInstr4_cvtpd2ps_XMM1_XMM1_icebp_c64,     255, RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesX) },
    23009         { bs3CpuInstr4_vcvtpd2ps_XMM1_XMM1_icebp_c64,    255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesX) },
    23010         { bs3CpuInstr4_vcvtpd2ps_XMM1_YMM1_icebp_c64,    255, RM_REG, T_AVX_256, XMM1, NOREG, YMM1,  PASS_ELEMENTS(s_aValuesY) },
    23011 
    23012         { bs3CpuInstr4_cvtpd2ps_XMM8_XMM9_icebp_c64,     255, RM_REG, T_SSE2,    XMM8, NOREG, XMM9,  PASS_ELEMENTS(s_aValuesX) },
    23013         { bs3CpuInstr4_cvtpd2ps_XMM8_FSxBX_icebp_c64,    255, RM_MEM, T_SSE2,    XMM8, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesX) },
    23014 
    23015         { bs3CpuInstr4_vcvtpd2ps_XMM8_XMM9_icebp_c64,    255, RM_REG, T_AVX_128, XMM8, NOREG, XMM9,  PASS_ELEMENTS(s_aValuesX) },
    23016         { bs3CpuInstr4_vcvtpd2ps_XMM8_FSxBX_O_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesX) },
    23017 
    23018         { bs3CpuInstr4_vcvtpd2ps_XMM8_YMM9_icebp_c64,    255, RM_REG, T_AVX_256, XMM8, NOREG, YMM9,  PASS_ELEMENTS(s_aValuesY) },
    23019         { bs3CpuInstr4_vcvtpd2ps_XMM8_FSxBX_Y_icebp_c64, 255, RM_MEM, T_AVX_256, XMM8, NOREG, FSxBX, PASS_ELEMENTS(s_aValuesY) },
    23020 
    23021         { bs3CpuInstr4_cvtpd2ps_XMM8_XMM8_icebp_c64,     255, RM_REG, T_SSE2,    XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValuesX) },
    23022         { bs3CpuInstr4_vcvtpd2ps_XMM8_XMM8_icebp_c64,    255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValuesX) },
    23023         { bs3CpuInstr4_vcvtpd2ps_XMM8_YMM8_icebp_c64,    255, RM_REG, T_AVX_256, XMM8, NOREG, YMM8,  PASS_ELEMENTS(s_aValuesY) },
    23024     };
    23025 
    23026     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    23027     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    23028     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    23029                                         g_aXcptConfig2, RT_ELEMENTS(g_aXcptConfig2));
     21146
     21147    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig2));
    2303021148}
    2303121149
    … …  
    2313721255    };
    2313821256
    23139     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     21257
     21258    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2314021259    {
    23141         { bs3CpuInstr4_cvtps2pd_XMM1_XMM2_icebp_c16,   255,             RM_REG, T_SSE2,    XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValues) },
    23142         { bs3CpuInstr4_cvtps2pd_XMM1_FSxBX_icebp_c16,  255,             RM_MEM, T_SSE2,    XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValues) },
    23143 
    23144         { bs3CpuInstr4_vcvtps2pd_XMM1_XMM2_icebp_c16,  255,             RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValues) },
    23145         { bs3CpuInstr4_vcvtps2pd_XMM1_FSxBX_icebp_c16, 255,             RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValues) },
    23146 
    23147         { bs3CpuInstr4_vcvtps2pd_YMM1_XMM2_icebp_c16,  255,             RM_REG, T_AVX_256, YMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValues) },
    23148         { bs3CpuInstr4_vcvtps2pd_YMM1_FSxBX_icebp_c16, BS3_XCPT_NOT_AC, RM_MEM, T_AVX_256, YMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValues) },
    23149 
    23150         { bs3CpuInstr4_cvtps2pd_XMM1_XMM1_icebp_c16,   255,             RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23151         { bs3CpuInstr4_vcvtps2pd_XMM1_XMM1_icebp_c16,  255,             RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23152         { bs3CpuInstr4_vcvtps2pd_YMM1_XMM1_icebp_c16,  255,             RM_REG, T_AVX_256, YMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
     21260        { BS3_INSTR4_ALL(cvtps2pd_XMM1_XMM2),   255,             RM_REG, T_SSE2,    XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     21261        { BS3_INSTR4_ALL(cvtps2pd_XMM1_FSxBX),  255,             RM_MEM, T_SSE2,    XMM1, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     21262
     21263        { BS3_INSTR4_C64(cvtps2pd_XMM8_XMM9),   255,             RM_REG, T_SSE2,    XMM8, NOREG, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     21264        { BS3_INSTR4_C64(cvtps2pd_XMM8_FSxBX),  255,             RM_MEM, T_SSE2,    XMM8, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     21265
     21266        { BS3_INSTR4_ALL(vcvtps2pd_XMM1_XMM2),  255,             RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     21267        { BS3_INSTR4_ALL(vcvtps2pd_XMM1_FSxBX), 255,             RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     21268
     21269        { BS3_INSTR4_C64(vcvtps2pd_XMM8_XMM9),  255,             RM_REG, T_AVX_128, XMM8, NOREG, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     21270        { BS3_INSTR4_C64(vcvtps2pd_XMM8_FSxBX), 255,             RM_MEM, T_AVX_128, XMM8, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     21271
     21272        { BS3_INSTR4_ALL(vcvtps2pd_YMM1_XMM2),  255,             RM_REG, T_AVX_256, YMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     21273        { BS3_INSTR4_ALL(vcvtps2pd_YMM1_FSxBX), BS3_XCPT_NOT_AC, RM_MEM, T_AVX_256, YMM1, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     21274
     21275        { BS3_INSTR4_C64(vcvtps2pd_YMM8_XMM9),  255,             RM_REG, T_AVX_256, YMM8, NOREG, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     21276        { BS3_INSTR4_C64(vcvtps2pd_YMM8_FSxBX), BS3_XCPT_NOT_AC, RM_MEM, T_AVX_256, YMM8, NOREG, FSxBX, PASS_TEST_ARRAY(s_aValues) },
     21277
     21278        { BS3_INSTR4_ALL(cvtps2pd_XMM1_XMM1),   255,             RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValues) },
     21279        { BS3_INSTR4_C64(cvtps2pd_XMM8_XMM8),   255,             RM_REG, T_SSE2,    XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValues) },
     21280        { BS3_INSTR4_ALL(vcvtps2pd_XMM1_XMM1),  255,             RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValues) },
     21281        { BS3_INSTR4_C64(vcvtps2pd_XMM8_XMM8),  255,             RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValues) },
     21282        { BS3_INSTR4_ALL(vcvtps2pd_YMM1_XMM1),  255,             RM_REG, T_AVX_256, YMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValues) },
     21283        { BS3_INSTR4_C64(vcvtps2pd_YMM8_XMM8),  255,             RM_REG, T_AVX_256, YMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValues) },
    2315321284    };
    2315421285
    23155     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    23156     {
    23157         { bs3CpuInstr4_cvtps2pd_XMM1_XMM2_icebp_c32,   255,             RM_REG, T_SSE2,    XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValues) },
    23158         { bs3CpuInstr4_cvtps2pd_XMM1_FSxBX_icebp_c32,  255,             RM_MEM, T_SSE2,    XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValues) },
    23159 
    23160         { bs3CpuInstr4_vcvtps2pd_XMM1_XMM2_icebp_c32,  255,             RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValues) },
    23161         { bs3CpuInstr4_vcvtps2pd_XMM1_FSxBX_icebp_c32, 255,             RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValues) },
    23162 
    23163         { bs3CpuInstr4_vcvtps2pd_YMM1_XMM2_icebp_c32,  255,             RM_REG, T_AVX_256, YMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValues) },
    23164         { bs3CpuInstr4_vcvtps2pd_YMM1_FSxBX_icebp_c32, BS3_XCPT_NOT_AC, RM_MEM, T_AVX_256, YMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValues) },
    23165 
    23166         { bs3CpuInstr4_cvtps2pd_XMM1_XMM1_icebp_c32,   255,             RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23167         { bs3CpuInstr4_vcvtps2pd_XMM1_XMM1_icebp_c32,  255,             RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23168         { bs3CpuInstr4_vcvtps2pd_YMM1_XMM1_icebp_c32,  255,             RM_REG, T_AVX_256, YMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23169     };
    23170     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    23171     {
    23172         { bs3CpuInstr4_cvtps2pd_XMM1_XMM2_icebp_c64,   255,             RM_REG, T_SSE2,    XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValues) },
    23173         { bs3CpuInstr4_cvtps2pd_XMM1_FSxBX_icebp_c64,  255,             RM_MEM, T_SSE2,    XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValues) },
    23174 
    23175         { bs3CpuInstr4_cvtps2pd_XMM8_XMM9_icebp_c64,   255,             RM_REG, T_SSE2,    XMM8, NOREG, XMM9,  PASS_ELEMENTS(s_aValues) },
    23176         { bs3CpuInstr4_cvtps2pd_XMM8_FSxBX_icebp_c64,  255,             RM_MEM, T_SSE2,    XMM8, NOREG, FSxBX, PASS_ELEMENTS(s_aValues) },
    23177 
    23178         { bs3CpuInstr4_vcvtps2pd_XMM1_XMM2_icebp_c64,  255,             RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValues) },
    23179         { bs3CpuInstr4_vcvtps2pd_XMM1_FSxBX_icebp_c64, 255,             RM_MEM, T_AVX_128, XMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValues) },
    23180 
    23181         { bs3CpuInstr4_vcvtps2pd_XMM8_XMM9_icebp_c64,  255,             RM_REG, T_AVX_128, XMM8, NOREG, XMM9,  PASS_ELEMENTS(s_aValues) },
    23182         { bs3CpuInstr4_vcvtps2pd_XMM8_FSxBX_icebp_c64, 255,             RM_MEM, T_AVX_128, XMM8, NOREG, FSxBX, PASS_ELEMENTS(s_aValues) },
    23183 
    23184         { bs3CpuInstr4_vcvtps2pd_YMM1_XMM2_icebp_c64,  255,             RM_REG, T_AVX_256, YMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValues) },
    23185         { bs3CpuInstr4_vcvtps2pd_YMM1_FSxBX_icebp_c64, BS3_XCPT_NOT_AC, RM_MEM, T_AVX_256, YMM1, NOREG, FSxBX, PASS_ELEMENTS(s_aValues) },
    23186 
    23187         { bs3CpuInstr4_vcvtps2pd_YMM8_XMM9_icebp_c64,  255,             RM_REG, T_AVX_256, YMM8, NOREG, XMM9,  PASS_ELEMENTS(s_aValues) },
    23188         { bs3CpuInstr4_vcvtps2pd_YMM8_FSxBX_icebp_c64, BS3_XCPT_NOT_AC, RM_MEM, T_AVX_256, YMM8, NOREG, FSxBX, PASS_ELEMENTS(s_aValues) },
    23189 
    23190         { bs3CpuInstr4_cvtps2pd_XMM1_XMM1_icebp_c64,   255,             RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23191         { bs3CpuInstr4_cvtps2pd_XMM8_XMM8_icebp_c64,   255,             RM_REG, T_SSE2,    XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValues) },
    23192         { bs3CpuInstr4_vcvtps2pd_XMM1_XMM1_icebp_c64,  255,             RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23193         { bs3CpuInstr4_vcvtps2pd_XMM8_XMM8_icebp_c64,  255,             RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValues) },
    23194         { bs3CpuInstr4_vcvtps2pd_YMM1_XMM1_icebp_c64,  255,             RM_REG, T_AVX_256, YMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23195         { bs3CpuInstr4_vcvtps2pd_YMM8_XMM8_icebp_c64,  255,             RM_REG, T_AVX_256, YMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValues) },
    23196     };
    23197 
    23198     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    23199     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    23200     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    23201                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     21286    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    2320221287}
    2320321288
    … …  
    2340621491    };
    2340721492
    23408     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     21493    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2340921494    {
    23410         { bs3CpuInstr4_cvtsd2ss_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE2,    XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValues)   },
    23411         { bs3CpuInstr4_cvtsd2ss_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    23412 
    23413         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValues)   },
    23414         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    23415 
    23416         { bs3CpuInstr4_cvtsd2ss_XMM1_XMM1_icebp_c16,        255, RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    23417         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM1_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    23418         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValues)   },
    23419         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM2_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_ELEMENTS(s_aValues)   },
    23420         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM2_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    23421         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues)   },
     21495        { BS3_INSTR4_ALL(cvtsd2ss_XMM1_XMM2),        255, RM_REG, T_SSE2,    XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     21496        { BS3_INSTR4_ALL(cvtsd2ss_XMM1_FSxBX),       255, RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     21497
     21498        { BS3_INSTR4_C64(cvtsd2ss_XMM8_XMM9),        255, RM_REG, T_SSE2,    XMM8, XMM8,  XMM9,  PASS_TEST_ARRAY(s_aValues)   },
     21499        { BS3_INSTR4_C64(cvtsd2ss_XMM8_FSxBX),       255, RM_MEM, T_SSE2,    XMM8, XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     21500
     21501        { BS3_INSTR4_ALL(vcvtsd2ss_XMM1_XMM2_XMM3),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValues)   },
     21502        { BS3_INSTR4_ALL(vcvtsd2ss_XMM1_XMM2_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     21503
     21504        { BS3_INSTR4_C64(vcvtsd2ss_XMM8_XMM9_XMM10), 255, RM_REG, T_AVX_128, XMM8, XMM9,  XMM10, PASS_TEST_ARRAY(s_aValues)   },
     21505        { BS3_INSTR4_C64(vcvtsd2ss_XMM8_XMM9_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM9,  FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     21506
     21507        { BS3_INSTR4_ALL(cvtsd2ss_XMM1_XMM1),        255, RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     21508        { BS3_INSTR4_C64(cvtsd2ss_XMM8_XMM8),        255, RM_REG, T_SSE2,    XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     21509        { BS3_INSTR4_ALL(vcvtsd2ss_XMM1_XMM1_XMM1),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValuesSR) },
     21510        { BS3_INSTR4_ALL(vcvtsd2ss_XMM1_XMM1_XMM2),  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValues)   },
     21511        { BS3_INSTR4_ALL(vcvtsd2ss_XMM1_XMM2_XMM1),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_TEST_ARRAY(s_aValues)   },
     21512        { BS3_INSTR4_ALL(vcvtsd2ss_XMM1_XMM2_XMM2),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValuesSR) },
     21513        { BS3_INSTR4_ALL(vcvtsd2ss_XMM1_XMM1_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues)   },
     21514        { BS3_INSTR4_C64(vcvtsd2ss_XMM8_XMM8_XMM8),  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValuesSR) },
     21515        { BS3_INSTR4_C64(vcvtsd2ss_XMM8_XMM8_XMM9),  255, RM_REG, T_AVX_128, XMM8, XMM8,  XMM9,  PASS_TEST_ARRAY(s_aValues)   },
     21516        { BS3_INSTR4_C64(vcvtsd2ss_XMM8_XMM9_XMM8),  255, RM_REG, T_AVX_128, XMM8, XMM9,  XMM8,  PASS_TEST_ARRAY(s_aValues)   },
     21517        { BS3_INSTR4_C64(vcvtsd2ss_XMM8_XMM9_XMM9),  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM9,  PASS_TEST_ARRAY(s_aValuesSR) },
     21518        { BS3_INSTR4_C64(vcvtsd2ss_XMM8_XMM8_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValues)   },
    2342221519    };
    23423     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    23424     {
    23425         { bs3CpuInstr4_cvtsd2ss_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE2,    XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValues)   },
    23426         { bs3CpuInstr4_cvtsd2ss_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    23427 
    23428         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValues)   },
    23429         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    23430 
    23431         { bs3CpuInstr4_cvtsd2ss_XMM1_XMM1_icebp_c32,        255, RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    23432         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM1_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    23433         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValues)   },
    23434         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM2_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_ELEMENTS(s_aValues)   },
    23435         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM2_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    23436         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    23437     };
    23438     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    23439     {
    23440         { bs3CpuInstr4_cvtsd2ss_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE2,    XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValues)   },
    23441         { bs3CpuInstr4_cvtsd2ss_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    23442 
    23443         { bs3CpuInstr4_cvtsd2ss_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE2,    XMM8, XMM8,  XMM9,  PASS_ELEMENTS(s_aValues)   },
    23444         { bs3CpuInstr4_cvtsd2ss_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE2,    XMM8, XMM8,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    23445 
    23446         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValues)   },
    23447         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    23448 
    23449         { bs3CpuInstr4_vcvtsd2ss_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9,  XMM10, PASS_ELEMENTS(s_aValues)   },
    23450         { bs3CpuInstr4_vcvtsd2ss_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    23451 
    23452         { bs3CpuInstr4_cvtsd2ss_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    23453         { bs3CpuInstr4_cvtsd2ss_XMM8_XMM8_icebp_c64,        255, RM_REG, T_SSE2,    XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    23454         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM1_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValuesSR) },
    23455         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValues)   },
    23456         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM2_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_ELEMENTS(s_aValues)   },
    23457         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM2_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValuesSR) },
    23458         { bs3CpuInstr4_vcvtsd2ss_XMM1_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    23459         { bs3CpuInstr4_vcvtsd2ss_XMM8_XMM8_XMM8_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValuesSR) },
    23460         { bs3CpuInstr4_vcvtsd2ss_XMM8_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM8,  XMM9,  PASS_ELEMENTS(s_aValues)   },
    23461         { bs3CpuInstr4_vcvtsd2ss_XMM8_XMM9_XMM8_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM9,  XMM8,  PASS_ELEMENTS(s_aValues)   },
    23462         { bs3CpuInstr4_vcvtsd2ss_XMM8_XMM9_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM9,  PASS_ELEMENTS(s_aValuesSR) },
    23463         { bs3CpuInstr4_vcvtsd2ss_XMM8_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8,  FSxBX, PASS_ELEMENTS(s_aValues)   },
    23464     };
    23465 
    23466     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    23467     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    23468     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    23469                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     21520
     21521    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    2347021522}
    2347121523
    … …  
    2362821680    };
    2362921681
    23630     static BS3CPUINSTR4_TEST1_T const s_aTests16[] =
     21682    static BS3CPUINSTR4_TEST1_T const s_aTests[] =
    2363121683    {
    23632         { bs3CpuInstr4_cvtss2sd_XMM1_XMM2_icebp_c16,        255, RM_REG, T_SSE2,    XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValues) },
    23633         { bs3CpuInstr4_cvtss2sd_XMM1_FSxBX_icebp_c16,       255, RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues) },
    23634 
    23635         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM2_XMM3_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValues) },
    23636         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM2_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    23637 
    23638         { bs3CpuInstr4_cvtss2sd_XMM1_XMM1_icebp_c16,        255, RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23639         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM1_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23640         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM1_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValues) },
    23641         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM2_XMM1_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_ELEMENTS(s_aValues) },
    23642         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM2_XMM2_icebp_c16,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValues) },
    23643         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues) },
     21684        { BS3_INSTR4_ALL(cvtss2sd_XMM1_XMM2),        255, RM_REG, T_SSE2,    XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValues) },
     21685        { BS3_INSTR4_ALL(cvtss2sd_XMM1_FSxBX),       255, RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     21686
     21687        { BS3_INSTR4_C64(cvtss2sd_XMM8_XMM9),        255, RM_REG, T_SSE2,    XMM8, XMM8,  XMM9,  PASS_TEST_ARRAY(s_aValues) },
     21688        { BS3_INSTR4_C64(cvtss2sd_XMM8_FSxBX),       255, RM_MEM, T_SSE2,    XMM8, XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     21689
     21690        { BS3_INSTR4_ALL(vcvtss2sd_XMM1_XMM2_XMM3),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_TEST_ARRAY(s_aValues) },
     21691        { BS3_INSTR4_ALL(vcvtss2sd_XMM1_XMM2_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     21692
     21693        { BS3_INSTR4_C64(vcvtss2sd_XMM8_XMM9_XMM10), 255, RM_REG, T_AVX_128, XMM8, XMM9,  XMM10, PASS_TEST_ARRAY(s_aValues) },
     21694        { BS3_INSTR4_C64(vcvtss2sd_XMM8_XMM9_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM9,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     21695
     21696        { BS3_INSTR4_ALL(cvtss2sd_XMM1_XMM1),        255, RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValues) },
     21697        { BS3_INSTR4_C64(cvtss2sd_XMM8_XMM8),        255, RM_REG, T_SSE2,    XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValues) },
     21698        { BS3_INSTR4_ALL(vcvtss2sd_XMM1_XMM1_XMM1),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_TEST_ARRAY(s_aValues) },
     21699        { BS3_INSTR4_ALL(vcvtss2sd_XMM1_XMM1_XMM2),  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_TEST_ARRAY(s_aValues) },
     21700        { BS3_INSTR4_ALL(vcvtss2sd_XMM1_XMM2_XMM1),  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_TEST_ARRAY(s_aValues) },
     21701        { BS3_INSTR4_ALL(vcvtss2sd_XMM1_XMM2_XMM2),  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_TEST_ARRAY(s_aValues) },
     21702        { BS3_INSTR4_ALL(vcvtss2sd_XMM1_XMM1_FSxBX), 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
     21703        { BS3_INSTR4_C64(vcvtss2sd_XMM8_XMM8_XMM8),  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_TEST_ARRAY(s_aValues) },
     21704        { BS3_INSTR4_C64(vcvtss2sd_XMM8_XMM8_XMM9),  255, RM_REG, T_AVX_128, XMM8, XMM8,  XMM9,  PASS_TEST_ARRAY(s_aValues) },
     21705        { BS3_INSTR4_C64(vcvtss2sd_XMM8_XMM9_XMM8),  255, RM_REG, T_AVX_128, XMM8, XMM9,  XMM8,  PASS_TEST_ARRAY(s_aValues) },
     21706        { BS3_INSTR4_C64(vcvtss2sd_XMM8_XMM9_XMM9),  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM9,  PASS_TEST_ARRAY(s_aValues) },
     21707        { BS3_INSTR4_C64(vcvtss2sd_XMM8_XMM8_FSxBX), 255, RM_MEM, T_AVX_128, XMM8, XMM8,  FSxBX, PASS_TEST_ARRAY(s_aValues) },
    2364421708    };
    23645     static BS3CPUINSTR4_TEST1_T const s_aTests32[] =
    23646     {
    23647         { bs3CpuInstr4_cvtss2sd_XMM1_XMM2_icebp_c32,        255, RM_REG, T_SSE2,    XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValues) },
    23648         { bs3CpuInstr4_cvtss2sd_XMM1_FSxBX_icebp_c32,       255, RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues) },
    23649 
    23650         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM2_XMM3_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValues) },
    23651         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM2_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    23652 
    23653         { bs3CpuInstr4_cvtss2sd_XMM1_XMM1_icebp_c32,        255, RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23654         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM1_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23655         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM1_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValues) },
    23656         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM2_XMM1_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_ELEMENTS(s_aValues) },
    23657         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM2_XMM2_icebp_c32,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValues) },
    23658         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues) },
    23659     };
    23660     static BS3CPUINSTR4_TEST1_T const s_aTests64[] =
    23661     {
    23662         { bs3CpuInstr4_cvtss2sd_XMM1_XMM2_icebp_c64,        255, RM_REG, T_SSE2,    XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValues) },
    23663         { bs3CpuInstr4_cvtss2sd_XMM1_FSxBX_icebp_c64,       255, RM_MEM, T_SSE2,    XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues) },
    23664 
    23665         { bs3CpuInstr4_cvtss2sd_XMM8_XMM9_icebp_c64,        255, RM_REG, T_SSE2,    XMM8, XMM8,  XMM9,  PASS_ELEMENTS(s_aValues) },
    23666         { bs3CpuInstr4_cvtss2sd_XMM8_FSxBX_icebp_c64,       255, RM_MEM, T_SSE2,    XMM8, XMM8,  FSxBX, PASS_ELEMENTS(s_aValues) },
    23667 
    23668         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM2_XMM3_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM3,  PASS_ELEMENTS(s_aValues) },
    23669         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM2_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM2,  FSxBX, PASS_ELEMENTS(s_aValues) },
    23670 
    23671         { bs3CpuInstr4_vcvtss2sd_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, XMM8, XMM9,  XMM10, PASS_ELEMENTS(s_aValues) },
    23672         { bs3CpuInstr4_vcvtss2sd_XMM8_XMM9_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM9,  FSxBX, PASS_ELEMENTS(s_aValues) },
    23673 
    23674         { bs3CpuInstr4_cvtss2sd_XMM1_XMM1_icebp_c64,        255, RM_REG, T_SSE2,    XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23675         { bs3CpuInstr4_cvtss2sd_XMM8_XMM8_icebp_c64,        255, RM_REG, T_SSE2,    XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValues) },
    23676         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM1_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM1,  PASS_ELEMENTS(s_aValues) },
    23677         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM1_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM1,  XMM2,  PASS_ELEMENTS(s_aValues) },
    23678         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM2_XMM1_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, XMM2,  XMM1,  PASS_ELEMENTS(s_aValues) },
    23679         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM2_XMM2_icebp_c64,  255, RM_REG, T_AVX_128, XMM1, NOREG, XMM2,  PASS_ELEMENTS(s_aValues) },
    23680         { bs3CpuInstr4_vcvtss2sd_XMM1_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM1, XMM1,  FSxBX, PASS_ELEMENTS(s_aValues) },
    23681         { bs3CpuInstr4_vcvtss2sd_XMM8_XMM8_XMM8_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM8,  PASS_ELEMENTS(s_aValues) },
    23682         { bs3CpuInstr4_vcvtss2sd_XMM8_XMM8_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM8,  XMM9,  PASS_ELEMENTS(s_aValues) },
    23683         { bs3CpuInstr4_vcvtss2sd_XMM8_XMM9_XMM8_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, XMM9,  XMM8,  PASS_ELEMENTS(s_aValues) },
    23684         { bs3CpuInstr4_vcvtss2sd_XMM8_XMM9_XMM9_icebp_c64,  255, RM_REG, T_AVX_128, XMM8, NOREG, XMM9,  PASS_ELEMENTS(s_aValues) },
    23685         { bs3CpuInstr4_vcvtss2sd_XMM8_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_AVX_128, XMM8, XMM8,  FSxBX, PASS_ELEMENTS(s_aValues) },
    23686     };
    23687 
    23688     static BS3CPUINSTR4_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR4_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    23689     unsigned const                         iTest       = BS3CPUINSTR4_TEST_MODES_INDEX(bMode);
    23690     return bs3CpuInstr4_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
    23691                                         g_aXcptConfig3, RT_ELEMENTS(g_aXcptConfig3));
     21709
     21710    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    2369221711}
    2369321712
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