Changeset 107027 in vbox for trunk/src/VBox/Devices
- Timestamp:
- Nov 18, 2024 2:43:59 PM (3 months ago)
- svn:sync-xref-src-repo-rev:
- 165971
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Security/DevTpm.cpp
r106271 r107027 427 427 #define TPM_CRB_LOCALITY_REG_CTRL_RSP_SZ 0x64 428 428 /** Locality response buffer address register. */ 429 #define TPM_CRB_LOCALITY_REG_CTRL_RSP_ADDR 0x68 429 #define TPM_CRB_LOCALITY_REG_CTRL_RSP_ADDR_LOW 0x68 430 /** Locality response buffer address register. */ 431 #define TPM_CRB_LOCALITY_REG_CTRL_RSP_ADDR_HIGH 0x6c 430 432 /** Locality data buffer. */ 431 433 #define TPM_CRB_LOCALITY_REG_DATA_BUFFER 0x80 … … 1016 1018 * @param bLoc The locality index. 1017 1019 * @param uReg The register offset being accessed. 1018 * @param pu64 Where to store the read data. 1019 * @param cb Size of the read in bytes. 1020 * @param pu32 Where to store the read data. 1020 1021 */ 1021 1022 static VBOXSTRICTRC tpmMmioCrbRead(PPDMDEVINS pDevIns, PDEVTPM pThis, PDEVTPMLOCALITY pLoc, 1022 uint8_t bLoc, uint32_t uReg, uint 64_t *pu64, size_t cb)1023 uint8_t bLoc, uint32_t uReg, uint32_t *pu32) 1023 1024 { 1024 1025 RT_NOREF(pDevIns); 1025 1026 1026 /* Special path for the data buffer. */1027 if ( uReg >= TPM_CRB_LOCALITY_REG_DATA_BUFFER1028 && uReg < TPM_CRB_LOCALITY_REG_DATA_BUFFER + pThis->cbCmdResp1029 && bLoc == pThis->bLoc1030 && pThis->enmState == DEVTPMSTATE_CMD_COMPLETION)1031 {1032 memcpy(pu64, &pThis->abCmdResp[uReg - TPM_CRB_LOCALITY_REG_DATA_BUFFER], cb);1033 return VINF_SUCCESS;1034 }1035 1036 1027 VBOXSTRICTRC rc = VINF_SUCCESS; 1037 uint 64_t u64 = UINT64_MAX;1028 uint32_t u32 = UINT32_MAX; 1038 1029 switch (uReg) 1039 1030 { 1040 1031 case TPM_CRB_LOCALITY_REG_STATE: 1041 u 64= TPM_CRB_LOCALITY_REG_STATE_VALID1032 u32 = TPM_CRB_LOCALITY_REG_STATE_VALID 1042 1033 | ( pThis->bLoc != TPM_NO_LOCALITY_SELECTED 1043 1034 ? TPM_CRB_LOCALITY_REG_STATE_ACTIVE_LOC_SET(pThis->bLoc) | TPM_CRB_LOCALITY_REG_STATE_LOC_ASSIGNED 1044 1035 : TPM_CRB_LOCALITY_REG_STATE_ACTIVE_LOC_SET(0)); 1045 1036 if (pThis->fEstablishmentSet) 1046 u 64|= TPM_CRB_LOCALITY_REG_ESTABLISHMENT;1037 u32 |= TPM_CRB_LOCALITY_REG_ESTABLISHMENT; 1047 1038 break; 1048 1039 case TPM_CRB_LOCALITY_REG_STS: 1049 u 64= pThis->bLoc == bLoc1040 u32 = pThis->bLoc == bLoc 1050 1041 ? TPM_CRB_LOCALITY_REG_STS_GRANTED 1051 1042 : 0; 1052 u 64|= pThis->bmLocSeizedAcc & RT_BIT_32(bLoc)1043 u32 |= pThis->bmLocSeizedAcc & RT_BIT_32(bLoc) 1053 1044 ? TPM_CRB_LOCALITY_REG_STS_SEIZED 1054 1045 : 0; 1055 1046 break; 1056 1047 case TPM_CRB_LOCALITY_REG_INTF_ID: 1057 u 64= TPM_CRB_LOCALITY_REG_INTF_ID_IF_TYPE_SET(TPM_CRB_LOCALITY_REG_INTF_ID_IF_TYPE_CRB)1048 u32 = TPM_CRB_LOCALITY_REG_INTF_ID_IF_TYPE_SET(TPM_CRB_LOCALITY_REG_INTF_ID_IF_TYPE_CRB) 1058 1049 | TPM_CRB_LOCALITY_REG_INTF_ID_IF_VERS_SET(TPM_CRB_LOCALITY_REG_INTF_ID_IF_VERS_CRB) 1059 1050 | TPM_CRB_LOCALITY_REG_INTF_ID_CAP_DATA_XFER_SZ_SET(TPM_CRB_LOCALITY_REG_INTF_ID_CAP_DATA_XFER_SZ_64B) … … 1061 1052 | TPM_CRB_LOCALITY_REG_INTF_ID_IF_SEL_GET(TPM_CRB_LOCALITY_REG_INTF_ID_IF_SEL_CRB) 1062 1053 | TPM_CRB_LOCALITY_REG_INTF_ID_IF_SEL_LOCK 1063 | TPM_CRB_LOCALITY_REG_INTF_ID_RID_SET(pThis->bRevId) 1064 | TPM_CRB_LOCALITY_REG_INTF_ID_VID_SET(pThis->uVenId) 1065 | TPM_CRB_LOCALITY_REG_INTF_ID_DID_SET(pThis->uDevId); 1054 | TPM_CRB_LOCALITY_REG_INTF_ID_RID_SET(pThis->bRevId); 1066 1055 1067 1056 if (pThis->fLocChangeSup) /* Only advertise the locality capability if the driver below supports it. */ 1068 u64 |= TPM_CRB_LOCALITY_REG_INTF_ID_CAP_LOCALITY; 1069 1057 u32 |= TPM_CRB_LOCALITY_REG_INTF_ID_CAP_LOCALITY; 1058 1059 break; 1060 case TPM_CRB_LOCALITY_REG_INTF_ID + 4: 1061 u32 = (uint32_t)pThis->uVenId | ((uint32_t)pThis->uDevId) << 16; 1070 1062 break; 1071 1063 case TPM_CRB_LOCALITY_REG_CTRL_REQ: … … 1077 1069 * when written by the guest. 1078 1070 */ 1079 u 64= 0;1071 u32 = 0; 1080 1072 break; 1081 1073 case TPM_CRB_LOCALITY_REG_CTRL_STS: … … 1083 1075 break; 1084 1076 if (pThis->enmState == DEVTPMSTATE_FATAL_ERROR) 1085 u 64= TPM_CRB_LOCALITY_REG_CTRL_STS_TPM_FATAL_ERR;1077 u32 = TPM_CRB_LOCALITY_REG_CTRL_STS_TPM_FATAL_ERR; 1086 1078 else if (pThis->enmState == DEVTPMSTATE_IDLE) 1087 u 64= TPM_CRB_LOCALITY_REG_CTRL_STS_TPM_IDLE;1079 u32 = TPM_CRB_LOCALITY_REG_CTRL_STS_TPM_IDLE; 1088 1080 else 1089 u 64= 0;1081 u32 = 0; 1090 1082 break; 1091 1083 case TPM_CRB_LOCALITY_REG_CTRL_CANCEL: … … 1093 1085 break; 1094 1086 if (pThis->enmState == DEVTPMSTATE_CMD_CANCEL) 1095 u 64= 0x1;1087 u32 = 0x1; 1096 1088 else 1097 u 64= 0;1089 u32 = 0; 1098 1090 break; 1099 1091 case TPM_CRB_LOCALITY_REG_CTRL_START: … … 1101 1093 break; 1102 1094 if (pThis->enmState == DEVTPMSTATE_CMD_EXEC) 1103 u 64= 0x1;1095 u32 = 0x1; 1104 1096 else 1105 u 64= 0;1097 u32 = 0; 1106 1098 break; 1107 1099 case TPM_CRB_LOCALITY_REG_INT_ENABLE: 1108 u 64= pLoc->uRegIntEn;1100 u32 = pLoc->uRegIntEn; 1109 1101 break; 1110 1102 case TPM_CRB_LOCALITY_REG_INT_STS: 1111 u 64= pLoc->uRegIntSts;1103 u32 = pLoc->uRegIntSts; 1112 1104 break; 1113 1105 case TPM_CRB_LOCALITY_REG_CTRL_CMD_LADDR: 1114 u 64= pThis->GCPhysMmio + (bLoc * TPM_LOCALITY_MMIO_SIZE) + TPM_CRB_LOCALITY_REG_DATA_BUFFER;1106 u32 = pThis->GCPhysMmio + (bLoc * TPM_LOCALITY_MMIO_SIZE) + TPM_CRB_LOCALITY_REG_DATA_BUFFER; 1115 1107 break; 1116 1108 case TPM_CRB_LOCALITY_REG_CTRL_CMD_HADDR: 1117 u 64= (pThis->GCPhysMmio + (bLoc * TPM_LOCALITY_MMIO_SIZE) + TPM_CRB_LOCALITY_REG_DATA_BUFFER) >> 32;1109 u32 = (pThis->GCPhysMmio + (bLoc * TPM_LOCALITY_MMIO_SIZE) + TPM_CRB_LOCALITY_REG_DATA_BUFFER) >> 32; 1118 1110 break; 1119 1111 case TPM_CRB_LOCALITY_REG_CTRL_CMD_SZ: 1120 1112 case TPM_CRB_LOCALITY_REG_CTRL_RSP_SZ: 1121 u64 = pThis->cbCmdResp; 1122 break; 1123 case TPM_CRB_LOCALITY_REG_CTRL_RSP_ADDR: 1124 u64 = pThis->GCPhysMmio + (bLoc * TPM_LOCALITY_MMIO_SIZE) + TPM_CRB_LOCALITY_REG_DATA_BUFFER; 1113 u32 = pThis->cbCmdResp; 1114 break; 1115 case TPM_CRB_LOCALITY_REG_CTRL_RSP_ADDR_LOW: 1116 u32 = pThis->GCPhysMmio + (bLoc * TPM_LOCALITY_MMIO_SIZE) + TPM_CRB_LOCALITY_REG_DATA_BUFFER; 1117 break; 1118 case TPM_CRB_LOCALITY_REG_CTRL_RSP_ADDR_HIGH: 1119 u32 = (pThis->GCPhysMmio + (bLoc * TPM_LOCALITY_MMIO_SIZE) + TPM_CRB_LOCALITY_REG_DATA_BUFFER) >> 32; 1125 1120 break; 1126 1121 case TPM_CRB_LOCALITY_REG_CTRL: /* Writeonly */ 1127 u 64= 0;1122 u32 = 0; 1128 1123 break; 1129 1124 case TPM_CRB_LOCALITY_REG_CTRL_EXT: … … 1132 1127 } 1133 1128 1134 *pu 64 = u64;1129 *pu32 = u32; 1135 1130 return rc; 1136 1131 } … … 1138 1133 1139 1134 /** 1140 * Readto a CRB interface register.1135 * Write to a CRB interface register. 1141 1136 * 1142 1137 * @returns VBox strict status code. … … 1146 1141 * @param bLoc The locality index. 1147 1142 * @param uReg The register offset being accessed. 1148 * @param u64 The value to write. 1149 * @param cb Size of the write in bytes. 1143 * @param u32 The value to write. 1150 1144 */ 1151 1145 static VBOXSTRICTRC tpmMmioCrbWrite(PPDMDEVINS pDevIns, PDEVTPM pThis, PDEVTPMLOCALITY pLoc, 1152 uint8_t bLoc, uint32_t uReg, uint 64_t u64, size_t cb)1146 uint8_t bLoc, uint32_t uReg, uint32_t u32) 1153 1147 { 1154 1148 #ifdef IN_RING3 … … 1157 1151 1158 1152 VBOXSTRICTRC rc = VINF_SUCCESS; 1159 uint32_t u32 = (uint32_t)u64;1160 1161 /* Special path for the data buffer. */1162 if ( uReg >= TPM_CRB_LOCALITY_REG_DATA_BUFFER1163 && uReg < TPM_CRB_LOCALITY_REG_DATA_BUFFER + pThis->cbCmdResp1164 && bLoc == pThis->bLoc1165 && ( pThis->enmState == DEVTPMSTATE_READY1166 || pThis->enmState == DEVTPMSTATE_CMD_RECEPTION))1167 {1168 pThis->enmState = DEVTPMSTATE_CMD_RECEPTION;1169 memcpy(&pThis->abCmdResp[uReg - TPM_CRB_LOCALITY_REG_DATA_BUFFER], &u64, cb);1170 return VINF_SUCCESS;1171 }1172 1173 1153 switch (uReg) 1174 1154 { … … 1176 1156 { 1177 1157 /* See chapter 6.5.3.2.2.1. */ 1178 if ( (u 64& TPM_CRB_LOCALITY_REG_CTRL_RST_ESTABLISHMENT)1158 if ( (u32 & TPM_CRB_LOCALITY_REG_CTRL_RST_ESTABLISHMENT) 1179 1159 && pThis->bLoc >= 3 1180 1160 && ( pThis->enmState == DEVTPMSTATE_IDLE … … 1203 1183 */ 1204 1184 /* Seize access only if this locality has a higher priority than the currently selected one. */ 1205 if ( (u 64& TPM_CRB_LOCALITY_REG_CTRL_SEIZE)1185 if ( (u32 & TPM_CRB_LOCALITY_REG_CTRL_SEIZE) 1206 1186 && pThis->bLoc != TPM_NO_LOCALITY_SELECTED 1207 1187 && bLoc > pThis->bLoc) … … 1232 1212 } 1233 1213 1234 if ( (u 64& TPM_CRB_LOCALITY_REG_CTRL_REQ_ACCESS)1214 if ( (u32 & TPM_CRB_LOCALITY_REG_CTRL_REQ_ACCESS) 1235 1215 && !(pThis->bmLocReqAcc & RT_BIT_32(bLoc))) 1236 1216 { … … 1243 1223 } 1244 1224 1245 if ( (u 64& TPM_CRB_LOCALITY_REG_CTRL_RELINQUISH)1225 if ( (u32 & TPM_CRB_LOCALITY_REG_CTRL_RELINQUISH) 1246 1226 && (pThis->bmLocReqAcc & RT_BIT_32(bLoc))) 1247 1227 { … … 1327 1307 case TPM_CRB_LOCALITY_REG_CTRL_CMD_SZ: 1328 1308 case TPM_CRB_LOCALITY_REG_CTRL_RSP_SZ: 1329 case TPM_CRB_LOCALITY_REG_CTRL_RSP_ADDR: 1309 case TPM_CRB_LOCALITY_REG_CTRL_RSP_ADDR_LOW: 1310 case TPM_CRB_LOCALITY_REG_CTRL_RSP_ADDR_HIGH: 1330 1311 default: /* Ignore. */ 1331 1312 break; … … 1347 1328 1348 1329 AssertReturn(cb <= sizeof(uint64_t), VERR_INTERNAL_ERROR); 1349 1350 RTGCPHYS offAligned = off & ~UINT64_C(0x3); 1351 uint8_t cBitsShift = (off & 0x3) * 8; 1330 Assert(!(off & (cb - 1))); 1352 1331 1353 1332 VBOXSTRICTRC rc = VINF_SUCCESS; 1354 uint32_t uReg = tpmGetRegisterFromOffset(offAligned); 1355 uint8_t bLoc = tpmGetLocalityFromOffset(offAligned); 1356 PDEVTPMLOCALITY pLoc = &pThis->aLoc[bLoc]; 1357 1358 uint64_t u64; 1333 1359 1334 if (pThis->fCrb) 1360 rc = tpmMmioCrbRead(pDevIns, pThis, pLoc, bLoc, uReg, &u64, cb);1361 else1362 rc = tpmMmioFifoRead(pDevIns, pThis, pLoc, bLoc, uReg, &u64, cb);1363 1364 LogFlowFunc((": %RGp %#x %#llx\n", off, cb, u64));1365 1366 if (rc == VINF_SUCCESS)1367 1335 { 1368 switch (cb) 1336 uint32_t uReg = tpmGetRegisterFromOffset(off); 1337 uint8_t bLoc = tpmGetLocalityFromOffset(off); 1338 PDEVTPMLOCALITY pLoc = &pThis->aLoc[bLoc]; 1339 1340 /* Special path for the data buffer. */ 1341 if ( uReg >= TPM_CRB_LOCALITY_REG_DATA_BUFFER 1342 && uReg < TPM_CRB_LOCALITY_REG_DATA_BUFFER + pThis->cbCmdResp 1343 && bLoc == pThis->bLoc 1344 && pThis->enmState == DEVTPMSTATE_CMD_COMPLETION) 1369 1345 { 1370 case 1: *(uint8_t *)pv = (uint8_t)(u64 >> cBitsShift); break; 1371 case 2: *(uint16_t *)pv = (uint16_t)(u64 >> cBitsShift); break; 1372 case 4: *(uint32_t *)pv = (uint32_t)(u64 >> cBitsShift); break; 1373 case 8: *(uint64_t *)pv = u64; break; 1374 default: AssertFailedBreakStmt(rc = VERR_INTERNAL_ERROR); 1346 memcpy(pv, &pThis->abCmdResp[uReg - TPM_CRB_LOCALITY_REG_DATA_BUFFER], cb); 1347 return VINF_SUCCESS; 1348 } 1349 1350 /* The register space is divided into 32-bit parts. */ 1351 Assert(cb <= sizeof(uint64_t)); 1352 uint32_t uRegAligned = uReg & ~UINT32_C(0x3); 1353 uint32_t cBitsShift = uReg & UINT32_C(0x3); 1354 uint32_t u32; 1355 rc = tpmMmioCrbRead(pDevIns, pThis, pLoc, bLoc, uRegAligned, &u32); 1356 if (rc == VINF_SUCCESS) 1357 { 1358 switch (cb) 1359 { 1360 case 1: *(uint8_t *)pv = (uint8_t)(u32 >> cBitsShift); break; 1361 case 2: *(uint16_t *)pv = (uint16_t)(u32 >> cBitsShift); break; 1362 case 4: 1363 case 8: *(uint32_t *)pv = u32; break; 1364 default: AssertFailedBreakStmt(rc = VERR_INTERNAL_ERROR); 1365 } 1366 1367 LogFlowFunc((": %RGp %#x %.*Rhxs (uRegAligned=%#x cBitsShift=%#x u32=%#RX32)\n", off, cb, cb, pv, uRegAligned, cBitsShift, u32)); 1368 1369 if (cb == sizeof(uint64_t)) 1370 { 1371 rc = tpmMmioCrbRead(pDevIns, pThis, pLoc, bLoc, uRegAligned + 4, &((uint32_t *)pv)[1]); 1372 LogFlowFunc((": %RGp %#x %.*Rhxs (uRegAligned=%#x u32=%#RX32)\n", 1373 off, cb, cb, pv, uRegAligned + 4, *((const uint32_t *)pv + 1))); 1374 } 1375 1375 } 1376 1376 } 1377 else 1378 { 1379 uint64_t u64; 1380 1381 RTGCPHYS offAligned = off & ~UINT64_C(0x3); 1382 uint8_t cBitsShift = (off & 0x3) * 8; 1383 1384 uint32_t uReg = tpmGetRegisterFromOffset(offAligned); 1385 uint8_t bLoc = tpmGetLocalityFromOffset(offAligned); 1386 PDEVTPMLOCALITY pLoc = &pThis->aLoc[bLoc]; 1387 1388 rc = tpmMmioFifoRead(pDevIns, pThis, pLoc, bLoc, uReg, &u64, cb); 1389 LogFlowFunc((": %RGp %#x %#llx\n", off, cb, u64)); 1390 1391 if (rc == VINF_SUCCESS) 1392 { 1393 switch (cb) 1394 { 1395 case 1: *(uint8_t *)pv = (uint8_t)(u64 >> cBitsShift); break; 1396 case 2: *(uint16_t *)pv = (uint16_t)(u64 >> cBitsShift); break; 1397 case 4: *(uint32_t *)pv = (uint32_t)(u64 >> cBitsShift); break; 1398 case 8: *(uint64_t *)pv = u64; break; 1399 default: AssertFailedBreakStmt(rc = VERR_INTERNAL_ERROR); 1400 } 1401 } 1402 } 1377 1403 1378 1404 return rc; … … 1389 1415 1390 1416 Assert(!(off & (cb - 1))); 1391 1392 uint64_t u64;1393 switch (cb)1394 {1395 case 1: u64 = *(const uint8_t *)pv; break;1396 case 2: u64 = *(const uint16_t *)pv; break;1397 case 4: u64 = *(const uint32_t *)pv; break;1398 case 8: u64 = *(const uint64_t *)pv; break;1399 default: AssertFailedReturn(VERR_INTERNAL_ERROR);1400 }1401 1402 LogFlowFunc((": %RGp %#llx\n", off, u64));1403 1417 1404 1418 VBOXSTRICTRC rc = VINF_SUCCESS; … … 1408 1422 1409 1423 if (pThis->fCrb) 1410 rc = tpmMmioCrbWrite(pDevIns, pThis, pLoc, bLoc, uReg, u64, cb); 1424 { 1425 /* Special path for the data buffer. */ 1426 if ( uReg >= TPM_CRB_LOCALITY_REG_DATA_BUFFER 1427 && uReg < TPM_CRB_LOCALITY_REG_DATA_BUFFER + pThis->cbCmdResp 1428 && bLoc == pThis->bLoc 1429 && ( pThis->enmState == DEVTPMSTATE_READY 1430 || pThis->enmState == DEVTPMSTATE_CMD_RECEPTION)) 1431 { 1432 pThis->enmState = DEVTPMSTATE_CMD_RECEPTION; 1433 memcpy(&pThis->abCmdResp[uReg - TPM_CRB_LOCALITY_REG_DATA_BUFFER], pv, cb); 1434 return VINF_SUCCESS; 1435 } 1436 1437 /* The register space is divided into 32-bit parts. */ 1438 Assert(cb <= sizeof(uint64_t)); 1439 uint32_t uRegAligned = uReg & ~UINT32_C(0x3); 1440 uint32_t cBitsShift = uReg & UINT32_C(0x3); 1441 uint32_t u32; 1442 1443 LogFlowFunc((": %RGp %#x %.*Rhxs (uRegAligned=%#x cBitsShift=%#x)\n", off, cb, cb, pv, uRegAligned, cBitsShift)); 1444 1445 switch (cb) 1446 { 1447 case 1: 1448 { 1449 /* Read current content and merge with the written data. */ 1450 uint32_t u32Read; 1451 rc = tpmMmioCrbRead(pDevIns, pThis, pLoc, bLoc, uRegAligned, &u32Read); 1452 if (rc != VINF_SUCCESS) 1453 return rc; 1454 u32 = u32Read & ~((uint32_t)UINT8_MAX << cBitsShift); 1455 u32 |= ((uint32_t)*(const uint8_t *)pv) << cBitsShift; 1456 break; 1457 } 1458 case 2: 1459 { 1460 /* Read current content and merge with the written data. */ 1461 uint32_t u32Read; 1462 rc = tpmMmioCrbRead(pDevIns, pThis, pLoc, bLoc, uRegAligned, &u32Read); 1463 if (rc != VINF_SUCCESS) 1464 return rc; 1465 u32 = u32Read & ~((uint32_t)UINT16_MAX << cBitsShift); 1466 u32 |= ((uint32_t)*(const uint16_t *)pv) << cBitsShift; 1467 break; 1468 } 1469 case 4: 1470 case 8: 1471 u32 = *(const uint32_t *)pv; 1472 break; 1473 default: AssertFailedReturn(VERR_INTERNAL_ERROR); 1474 } 1475 1476 rc = tpmMmioCrbWrite(pDevIns, pThis, pLoc, bLoc, uRegAligned, u32); 1477 if ( rc == VINF_SUCCESS 1478 && cb == sizeof(uint64_t)) 1479 rc = tpmMmioCrbWrite(pDevIns, pThis, pLoc, bLoc, uRegAligned + 4, *((uint32_t *)pv + 1)); 1480 } 1411 1481 else 1482 { 1483 uint64_t u64; 1484 switch (cb) 1485 { 1486 case 1: u64 = *(const uint8_t *)pv; break; 1487 case 2: u64 = *(const uint16_t *)pv; break; 1488 case 4: u64 = *(const uint32_t *)pv; break; 1489 case 8: u64 = *(const uint64_t *)pv; break; 1490 default: AssertFailedReturn(VERR_INTERNAL_ERROR); 1491 } 1492 1493 LogFlowFunc((": %RGp %#llx\n", off, u64)); 1412 1494 rc = tpmMmioFifoWrite(pDevIns, pThis, pLoc, bLoc, uReg, u64, cb); 1495 } 1413 1496 1414 1497 return rc; … … 1733 1816 N_("Configuration error: Failed to get the \"MmioBase\" value")); 1734 1817 1735 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "VendorId", &pThis->u DevId, TPM_VID_DEFAULT);1818 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "VendorId", &pThis->uVenId, TPM_VID_DEFAULT); 1736 1819 if (RT_FAILURE(rc)) 1737 1820 return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to get the \"VendorId\" value"));
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