Changeset 107113 in vbox for trunk/src/VBox/VMM/include

Timestamp:

Nov 22, 2024 10:48:00 AM (6 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

166080

Message:

VMM: bugref:10759 Restructure the APIC to allow different backends to be used.

Location:

trunk/src/VBox/VMM/include

Files:

• APICInternal.h (modified) (3 diffs)
• PDMInternal.h (modified) (6 diffs)

trunk/src/VBox/VMM/include/APICInternal.h

@@ -34 +34 @@
 #include <VBox/apic.h>
 #include <VBox/sup.h>
-#include <VBox/vmm/pdmdev.h>
+#include <VBox/vmm/pdmapic.h>
+#include <VBox/vmm/stam.h>
 
 /** @defgroup grp_apic_int       Internal
@@ -41 +42 @@
  * @{
  */
+
+#ifdef VBOX_INCLUDED_vmm_pdmapic_h
+/** The VirtualBox APIC backend table. */
+extern const PDMAPICBACKEND g_ApicBackend;
+#endif
 
 /** The APIC hardware version we are emulating. */
@@ -1156 +1162 @@
 DECLCALLBACK(VBOXSTRICTRC)    apicReadMmio(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void *pv, unsigned cb);
 DECLCALLBACK(VBOXSTRICTRC)    apicWriteMmio(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void const *pv, unsigned cb);
-
-bool                          apicPostInterrupt(PVMCPUCC pVCpu, uint8_t uVector, XAPICTRIGGERMODE enmTriggerMode, uint32_t uSrcTag);
+DECLCALLBACK(bool)            apicPostInterrupt(PVMCPUCC pVCpu, uint8_t uVector, XAPICTRIGGERMODE enmTriggerMode, bool fAutoEoi,
+                                                uint32_t uSrcTag);
+#ifdef IN_RING3
+DECLCALLBACK(int)             apicR3HvSetCompatMode(PVM pVM, bool fHyperVCompatMode);
+#endif
 void                          apicStartTimer(PVMCPUCC pVCpu, uint32_t uInitialCount);
 void                          apicClearInterruptFF(PVMCPUCC pVCpu, PDMAPICIRQ enmType);
-void                          apicInitIpi(PVMCPUCC pVCpu);
 void                          apicResetCpu(PVMCPUCC pVCpu, bool fResetApicBaseMsr);
 

trunk/src/VBox/VMM/include/PDMInternal.h

@@ -48 +48 @@
 #include <VBox/vmm/pdmcommon.h>
 #include <VBox/vmm/pdmtask.h>
+#include <VBox/vmm/pdmapic.h>
 #include <VBox/sup.h>
 #include <VBox/msi.h>
@@ -795 +796 @@
 
 /**
- * PDM registered APIC device.
- */
-typedef struct PDMAPIC
-{
-    /** Pointer to the APIC device instance - R3 Ptr. */
+ * PDM IC (Interrupt Controller), shared ring-3.
+ */
+typedef struct PDMICR3
+{
+    /** Pointer to the interrupt controller instance - R3 Ptr. */
     PPDMDEVINSR3                       pDevInsR3;
-    /** Pointer to the APIC device instance - R0 Ptr. */
+#ifndef VBOX_VMM_TARGET_ARMV8
+    /** The type of APIC backend. */
+    PDMAPICBACKENDTYPE                 enmKind;
+    uint32_t                           uPadding;
+    /** The APIC backend. */
+    PDMAPICBACKENDR3                   ApicBackend;
+#else
+    /** @todo The GIC backend. Currently the padding helps keep alignment common
+     *        between x86 and arm. */
+    uint8_t                            auPadding[4+4+232];
+#endif
+} PDMICR3;
+AssertCompileSizeAlignment(PDMICR3, 8);
+
+/**
+ * PDM IC (Interrupt Controller), ring-0.
+ */
+typedef struct PDMICR0
+{
+    /** Pointer to the interrupt controller instance - R0 Ptr. */
     PPDMDEVINSR0                       pDevInsR0;
-    /** Pointer to the APIC device instance - RC Ptr. */
-    PPDMDEVINSRC                       pDevInsRC;
-    uint8_t                            Alignment[4];
-} PDMAPIC;
-
+#ifndef VBOX_VMM_TARGET_ARMV8
+    /** The APIC backend. */
+    PDMAPICBACKENDR0                   ApicBackend;
+#else
+    /** @todo The GIC backend. Currently the padding helps keep alignment common
+     *        between x86 and arm. */
+    uint8_t                            auPadding[232];
+#endif
+} PDMICR0;
+AssertCompileSizeAlignment(PDMICR0, 8);
+
+/**
+ * PDM IC (Interrupt Controller), raw-mode context.
+ */
+typedef struct PDMICRC
+{
+    /** Pointer to the interrupt controller instance - R0 Ptr. */
+    PPDMDEVINSRC                       pDevInsR0;
+    RTRCPTR                            avPadding;
+#ifndef VBOX_VMM_TARGET_ARMV8
+    /** The APIC backend. */
+    PDMAPICBACKENDRC                   ApicBackend;
+#else
+    /** @todo The GIC backend. Currently the padding helps keep alignment common
+     *        between x86 and arm. */
+    uint8_t                            auPadding[232];
+#endif
+} PDMICRC;
+AssertCompileSizeAlignment(PDMICRC, 8);
 
 /**
@@ -1485 +1529 @@
     /** The register PIC device. */
     PDMPIC                          Pic;
-    /** The registered APIC device. */
-    PDMAPIC                         Apic;
+    /** The registered IC device. */
+    PDMICR3                         Ic;
     /** The registered I/O APIC device. */
     PDMIOAPIC                       IoApic;
@@ -1590 +1634 @@
     bool volatile                   fNsUnchokeTimerArmed;
     /** Align aNsGroups on a cacheline.   */
-    bool                            afPadding2[19+16];
+    bool                            afPadding2[19+16+25];
     /** Number of network shaper groups.
      * @note Marked volatile to prevent re-reading after validation. */
@@ -1653 +1697 @@
     /** Array of ring-0 queues. */
     PDMQUEUER0                      aQueues[16];
+    /** The interrupt-controller, ring-0 data. */
+    PDMICR0                         Ic;
 } PDMR0PERVM;
 
@@ -1745 +1791 @@
 #endif
 
+#ifndef VBOX_VMM_TARGET_ARMV8
+/** @def PDM_TO_APICBACKEND
+ * Gets the APIC backend given the VM cross-context structure.
+ */
+/** @def PDMCPU_TO_APICBACKEND
+ * Gets the APIC backend given VMCPU cross-context structure.
+ */
+# ifdef IN_RING3
+#  define PDM_TO_APICBACKEND(a_pVM)          (&((a_pVM)->pdm.s.Ic.ApicBackend))
+#  define PDMCPU_TO_APICBACKEND(a_pVCpu)     (&((a_pVCpu)->CTX_SUFF(pVM)->pdm.s.Ic.ApicBackend))
+#else
+#  define PDM_TO_APICBACKEND(a_pVM)          (&((a_pVM)->pdmr0.s.Ic.ApicBackend))
+#  define PDMCPU_TO_APICBACKEND(a_pVCpu)     (&((a_pVCpu)->CTX_SUFF(pVM)->pdmr0.s.Ic.ApicBackend))
+#endif
+#else
+/** @todo GIC backend. */
+#endif
 
 /*******************************************************************************