VirtualBox

Changeset 107117 in vbox


Ignore:
Timestamp:
Nov 22, 2024 11:17:47 AM (8 weeks ago)
Author:
vboxsync
Message:

VMM: bugref:10759 APIC restructure [doxygen fixes]

Location:
trunk
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/vmm/pdmapic.h

    r107115 r107117  
    215215     * @param   pVCpu                   The cross context virtual CPU structure.
    216216     * @param   u8Tpr                   The TPR value to set.
    217      * @param   fForceX2ApicBehavior    Pretend the APIC is in x2APIC mode during
    218      *                                  this write.
     217     * @param   fForceX2ApicBehaviour   Pretend the APIC is in x2APIC mode during this
     218     *                                  write.
    219219     */
    220220    DECLR3CALLBACKMEMBER(int, pfnSetTpr, (PVMCPUCC pVCpu, uint8_t u8Tpr, bool fForceX2ApicBehaviour));
     
    277277     * @param   puSrcTag    Where to store the interrupt source tag (debugging).
    278278     */
    279     DECLR3CALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc));
     279    DECLR3CALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puSrcTag));
    280280
    281281    /**
     
    321321     */
    322322    DECLR3CALLBACKMEMBER(int, pfnBusDeliver, (PVMCC pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector,
    323                                               uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc));
     323                                              uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uSrcTag));
    324324
    325325    /**
     
    463463     * @param   pVCpu                   The cross context virtual CPU structure.
    464464     * @param   u8Tpr                   The TPR value to set.
    465      * @param   fForceX2ApicBehavior    Pretend the APIC is in x2APIC mode during
    466      *                                  this write.
     465     * @param   fForceX2ApicBehaviour   Pretend the APIC is in x2APIC mode during this
     466     *                                  write.
    467467     */
    468468    DECLR0CALLBACKMEMBER(int, pfnSetTpr, (PVMCPUCC pVCpu, uint8_t u8Tpr, bool fForceX2ApicBehaviour));
     
    525525     * @param   puSrcTag    Where to store the interrupt source tag (debugging).
    526526     */
    527     DECLR0CALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc));
     527    DECLR0CALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puTagSrc));
    528528
    529529    /**
     
    569569     */
    570570    DECLR0CALLBACKMEMBER(int, pfnBusDeliver, (PVMCC pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector,
    571                                               uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc));
     571                                              uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uSrcTag));
    572572
    573573    /**
     
    712712     * @param   pVCpu                   The cross context virtual CPU structure.
    713713     * @param   u8Tpr                   The TPR value to set.
    714      * @param   fForceX2ApicBehavior    Pretend the APIC is in x2APIC mode during
    715      *                                  this write.
     714     * @param   fForceX2ApicBehaviour   Pretend the APIC is in x2APIC mode during this
     715     *                                  write.
    716716     */
    717717    DECLRGCALLBACKMEMBER(int, pfnSetTpr, (PVMCPUCC pVCpu, uint8_t u8Tpr, bool fForceX2ApicBehaviour));
     
    774774     * @param   puSrcTag    Where to store the interrupt source tag (debugging).
    775775     */
    776     DECLRGCALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc));
     776    DECLRGCALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puTagSrc));
    777777
    778778    /**
     
    818818     */
    819819    DECLRGCALLBACKMEMBER(int, pfnBusDeliver, (PVMCC pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector,
    820                                               uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc));
     820                                              uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uSrcTag));
    821821
    822822    /**
     
    889889VMM_INT_DECL(VBOXSTRICTRC)  PDMApicGetBaseMsr(PVMCPUCC pVCpu, uint64_t *pu64Value);
    890890VMM_INT_DECL(int)           PDMApicSetBaseMsr(PVMCPUCC pVCpu, uint64_t u64BaseMsr);
    891 VMM_INT_DECL(int)           PDMApicGetInterrupt(PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc);
     891VMM_INT_DECL(int)           PDMApicGetInterrupt(PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puSrcTag);
    892892VMM_INT_DECL(int)           PDMApicBusDeliver(PVMCC pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector,
    893893                                              uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc);
  • trunk/src/VBox/VMM/VMMAll/APICAll.cpp

    r107113 r107117  
    417417
    418418/**
    419  * @interface_method_impl{PDMAPICBACKEND,pfnisEnabled}
     419 * @interface_method_impl{PDMAPICBACKEND,pfnIsEnabled}
    420420 */
    421421static DECLCALLBACK(bool) apicIsEnabled(PCVMCPUCC pVCpu)
     
    457457 *
    458458 * @returns The value at the specified offset.
    459  * @param   pXApicPage      The xAPIC page.
     459 * @param   pVCpu           The cross context virtual CPU structure.
    460460 * @param   offReg          The offset of the register being read.
    461461 */
     
    33373337#ifdef IN_RING0
    33383338/**
    3339  * @interface_method_impl{PDMAPICBACKEND,pfnGetApicPageForCpu}
     3339 * @interface_method_impl{PDMAPICBACKENDR0,pfnGetApicPageForCpu}
    33403340 */
    33413341static DECLCALLBACK(int) apicR0VBoxGetApicPageForCpu(PCVMCPUCC pVCpu, PRTHCPHYS pHCPhys, PRTR0PTR pR0Ptr, PRTR3PTR pR3Ptr)
  • trunk/src/VBox/VMM/VMMAll/PDMAllApic.cpp

    r107113 r107117  
    9898 * @retval  VERR_INVALID_POINTER
    9999 *
    100  * @param   pVCpu                   The cross context virtual CPU structure.
    101  * @param   u8Tpr                   The TPR value to set.
    102  * @param   fForceX2ApicBehaviour   Pretend the APIC is in x2APIC mode during
    103  *                                  this write.
     100 * @param   pVCpu   The cross context virtual CPU structure.
     101 * @param   u8Tpr   The TPR value to set.
    104102 */
    105103VMM_INT_DECL(int) PDMApicSetTpr(PVMCPUCC pVCpu, uint8_t u8Tpr)
     
    242240 * @param   puSrcTag    Where to store the interrupt source tag (debugging).
    243241 */
    244 VMM_INT_DECL(int) PDMApicGetInterrupt(PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc)
     242VMM_INT_DECL(int) PDMApicGetInterrupt(PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puSrcTag)
    245243{
    246244    AssertReturn(PDMCPU_TO_APICBACKEND(pVCpu)->pfnGetInterrupt, VERR_INVALID_POINTER);
    247     return PDMCPU_TO_APICBACKEND(pVCpu)->pfnGetInterrupt(pVCpu, pu8Vector, pu32TagSrc);
     245    return PDMCPU_TO_APICBACKEND(pVCpu)->pfnGetInterrupt(pVCpu, pu8Vector, puSrcTag);
    248246}
    249247
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