Changeset 107117 in vbox
- Timestamp:
- Nov 22, 2024 11:17:47 AM (8 weeks ago)
- Location:
- trunk
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/pdmapic.h
r107115 r107117 215 215 * @param pVCpu The cross context virtual CPU structure. 216 216 * @param u8Tpr The TPR value to set. 217 * @param fForceX2ApicBehavio r Pretend the APIC is in x2APIC mode during218 * thiswrite.217 * @param fForceX2ApicBehaviour Pretend the APIC is in x2APIC mode during this 218 * write. 219 219 */ 220 220 DECLR3CALLBACKMEMBER(int, pfnSetTpr, (PVMCPUCC pVCpu, uint8_t u8Tpr, bool fForceX2ApicBehaviour)); … … 277 277 * @param puSrcTag Where to store the interrupt source tag (debugging). 278 278 */ 279 DECLR3CALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu 32TagSrc));279 DECLR3CALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puSrcTag)); 280 280 281 281 /** … … 321 321 */ 322 322 DECLR3CALLBACKMEMBER(int, pfnBusDeliver, (PVMCC pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector, 323 uint8_t uPolarity, uint8_t uTriggerMode, uint32_t u TagSrc));323 uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uSrcTag)); 324 324 325 325 /** … … 463 463 * @param pVCpu The cross context virtual CPU structure. 464 464 * @param u8Tpr The TPR value to set. 465 * @param fForceX2ApicBehavio r Pretend the APIC is in x2APIC mode during466 * thiswrite.465 * @param fForceX2ApicBehaviour Pretend the APIC is in x2APIC mode during this 466 * write. 467 467 */ 468 468 DECLR0CALLBACKMEMBER(int, pfnSetTpr, (PVMCPUCC pVCpu, uint8_t u8Tpr, bool fForceX2ApicBehaviour)); … … 525 525 * @param puSrcTag Where to store the interrupt source tag (debugging). 526 526 */ 527 DECLR0CALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu 32TagSrc));527 DECLR0CALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puTagSrc)); 528 528 529 529 /** … … 569 569 */ 570 570 DECLR0CALLBACKMEMBER(int, pfnBusDeliver, (PVMCC pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector, 571 uint8_t uPolarity, uint8_t uTriggerMode, uint32_t u TagSrc));571 uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uSrcTag)); 572 572 573 573 /** … … 712 712 * @param pVCpu The cross context virtual CPU structure. 713 713 * @param u8Tpr The TPR value to set. 714 * @param fForceX2ApicBehavio r Pretend the APIC is in x2APIC mode during715 * thiswrite.714 * @param fForceX2ApicBehaviour Pretend the APIC is in x2APIC mode during this 715 * write. 716 716 */ 717 717 DECLRGCALLBACKMEMBER(int, pfnSetTpr, (PVMCPUCC pVCpu, uint8_t u8Tpr, bool fForceX2ApicBehaviour)); … … 774 774 * @param puSrcTag Where to store the interrupt source tag (debugging). 775 775 */ 776 DECLRGCALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu 32TagSrc));776 DECLRGCALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puTagSrc)); 777 777 778 778 /** … … 818 818 */ 819 819 DECLRGCALLBACKMEMBER(int, pfnBusDeliver, (PVMCC pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector, 820 uint8_t uPolarity, uint8_t uTriggerMode, uint32_t u TagSrc));820 uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uSrcTag)); 821 821 822 822 /** … … 889 889 VMM_INT_DECL(VBOXSTRICTRC) PDMApicGetBaseMsr(PVMCPUCC pVCpu, uint64_t *pu64Value); 890 890 VMM_INT_DECL(int) PDMApicSetBaseMsr(PVMCPUCC pVCpu, uint64_t u64BaseMsr); 891 VMM_INT_DECL(int) PDMApicGetInterrupt(PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu 32TagSrc);891 VMM_INT_DECL(int) PDMApicGetInterrupt(PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puSrcTag); 892 892 VMM_INT_DECL(int) PDMApicBusDeliver(PVMCC pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector, 893 893 uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc); -
trunk/src/VBox/VMM/VMMAll/APICAll.cpp
r107113 r107117 417 417 418 418 /** 419 * @interface_method_impl{PDMAPICBACKEND,pfn isEnabled}419 * @interface_method_impl{PDMAPICBACKEND,pfnIsEnabled} 420 420 */ 421 421 static DECLCALLBACK(bool) apicIsEnabled(PCVMCPUCC pVCpu) … … 457 457 * 458 458 * @returns The value at the specified offset. 459 * @param p XApicPage The xAPIC page.459 * @param pVCpu The cross context virtual CPU structure. 460 460 * @param offReg The offset of the register being read. 461 461 */ … … 3337 3337 #ifdef IN_RING0 3338 3338 /** 3339 * @interface_method_impl{PDMAPICBACKEND ,pfnGetApicPageForCpu}3339 * @interface_method_impl{PDMAPICBACKENDR0,pfnGetApicPageForCpu} 3340 3340 */ 3341 3341 static DECLCALLBACK(int) apicR0VBoxGetApicPageForCpu(PCVMCPUCC pVCpu, PRTHCPHYS pHCPhys, PRTR0PTR pR0Ptr, PRTR3PTR pR3Ptr) -
trunk/src/VBox/VMM/VMMAll/PDMAllApic.cpp
r107113 r107117 98 98 * @retval VERR_INVALID_POINTER 99 99 * 100 * @param pVCpu The cross context virtual CPU structure. 101 * @param u8Tpr The TPR value to set. 102 * @param fForceX2ApicBehaviour Pretend the APIC is in x2APIC mode during 103 * this write. 100 * @param pVCpu The cross context virtual CPU structure. 101 * @param u8Tpr The TPR value to set. 104 102 */ 105 103 VMM_INT_DECL(int) PDMApicSetTpr(PVMCPUCC pVCpu, uint8_t u8Tpr) … … 242 240 * @param puSrcTag Where to store the interrupt source tag (debugging). 243 241 */ 244 VMM_INT_DECL(int) PDMApicGetInterrupt(PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu 32TagSrc)242 VMM_INT_DECL(int) PDMApicGetInterrupt(PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puSrcTag) 245 243 { 246 244 AssertReturn(PDMCPU_TO_APICBACKEND(pVCpu)->pfnGetInterrupt, VERR_INVALID_POINTER); 247 return PDMCPU_TO_APICBACKEND(pVCpu)->pfnGetInterrupt(pVCpu, pu8Vector, pu 32TagSrc);245 return PDMCPU_TO_APICBACKEND(pVCpu)->pfnGetInterrupt(pVCpu, pu8Vector, puSrcTag); 248 246 } 249 247
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