Changeset 107207 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Dec 2, 2024 8:02:10 AM (4 months ago)
- svn:sync-xref-src-repo-rev:
- 166211
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp
r107204 r107207 9232 9232 } 9233 9233 9234 9235 /** 9236 * Appends annotations to the disassembled instructions. 9237 */ 9238 static void 9239 iemNativeDisasmAppendAnnotation(char *pszDisBuf, size_t cbDisBuf, PCDISSTATE pDis) 9240 { 9241 const char *pszAnnotation = NULL; 9242 # if defined(RT_ARCH_AMD64) 9243 if (pDis->pCurInstr->uOpcode == OP_NOP && pDis->cbInstr == 7) /* iemNativeEmitMarker */ 9244 { 9245 static const char * const s_apszMarkers[] = 9246 { 9247 /*[0]=*/ "unknown0", "CheckCsLim", "ConsiderLimChecking", "CheckOpcodes", 9248 /*[4]=*/ "PcAfterBranch", "LoadTlbForNewPage", "LoadTlbAfterBranch" 9249 }; 9250 9251 uint32_t const uInfo = *(uint32_t const *)&pDis->Instr.ab[3]; 9252 if (RT_HIWORD(uInfo) < kIemThreadedFunc_End) 9253 RTStrPrintf(pszDisBuf, cbDisBuf, "nop ; marker: call #%u to %s (%u args) - %s\n", 9254 uInfo & 0x7fff, g_apszIemThreadedFunctions[RT_HIWORD(uInfo)], 9255 g_acIemThreadedFunctionUsedArgs[RT_HIWORD(uInfo)], 9256 uInfo & 0x8000 ? "recompiled" : "todo"); 9257 else if ((uInfo & ~RT_BIT_32(31)) < RT_ELEMENTS(s_apszMarkers)) 9258 RTStrPrintf(pszDisBuf, cbDisBuf, "nop ; marker: %s\n", s_apszMarkers[uInfo & ~RT_BIT_32(31)]); 9259 else 9260 RTStrPrintf(pszDisBuf, cbDisBuf, "nop ; unknown marker: %#x (%d)\n", uInfo, uInfo); 9261 return; 9262 } 9263 9264 PCDISOPPARAM pMemOp; 9265 if (DISUSE_IS_EFFECTIVE_ADDR(pDis->aParams[0].fUse)) 9266 pMemOp = &pDis->aParams[0]; 9267 else if (DISUSE_IS_EFFECTIVE_ADDR(pDis->aParams[1].fUse)) 9268 pMemOp = &pDis->aParams[1]; 9269 else if (DISUSE_IS_EFFECTIVE_ADDR(pDis->aParams[2].fUse)) 9270 pMemOp = &pDis->aParams[2]; 9271 else 9272 return; 9273 if ( pMemOp->x86.Base.idxGenReg == IEMNATIVE_REG_FIXED_PVMCPU 9274 && (pMemOp->fUse & (DISUSE_BASE | DISUSE_REG_GEN64)) == (DISUSE_BASE | DISUSE_REG_GEN64)) 9275 pszAnnotation = iemNativeDbgVCpuOffsetToName(pMemOp->fUse & DISUSE_DISPLACEMENT32 9276 ? pMemOp->x86.uDisp.u32 : pMemOp->x86.uDisp.u8); 9277 else 9278 return; 9279 9280 # elif defined(RT_ARCH_ARM64) 9281 /* The memory operand is always number two on arm. */ 9282 if ( pDis->aParams[1].armv8.enmType == kDisArmv8OpParmAddrInGpr 9283 && !(pDis->aParams[1].fUse & (DISUSE_INDEX | DISUSE_PRE_INDEXED | DISUSE_POST_INDEXED)) 9284 /* @todo DISUSE_REG_GEN64 is not set: && (pDis->aParams[1].fUse & DISUSE_REG_GEN64) */ 9285 && pDis->aParams[1].armv8.Op.Reg.enmRegType == kDisOpParamArmV8RegType_Gpr_64Bit) 9286 { 9287 if (pDis->aParams[1].armv8.Op.Reg.idReg == IEMNATIVE_REG_FIXED_PVMCPU) 9288 pszAnnotation = iemNativeDbgVCpuOffsetToName(pDis->aParams[1].armv8.u.offBase); 9289 else if (pDis->aParams[1].armv8.Op.Reg.idReg == IEMNATIVE_REG_FIXED_PCPUMCTX) 9290 pszAnnotation = iemNativeDbgVCpuOffsetToName(pDis->aParams[1].armv8.u.offBase + RT_UOFFSETOF(VMCPU, cpum.GstCtx)); 9291 } 9292 else 9293 return; 9294 9295 # else 9296 # error "Port me" 9297 # endif 9298 if (pszAnnotation) 9299 { 9300 static unsigned const s_offAnnotation = 55; 9301 size_t const cchAnnotation = strlen(pszAnnotation); 9302 size_t cchDis = strlen(pszDisBuf); 9303 if (RT_MAX(cchDis, s_offAnnotation) + sizeof(" ; ") + cchAnnotation <= cbDisBuf) 9304 { 9305 if (cchDis < s_offAnnotation) 9306 { 9307 memset(&pszDisBuf[cchDis], ' ', s_offAnnotation - cchDis); 9308 cchDis = s_offAnnotation; 9309 } 9310 pszDisBuf[cchDis++] = ' '; 9311 pszDisBuf[cchDis++] = ';'; 9312 pszDisBuf[cchDis++] = ' '; 9313 memcpy(&pszDisBuf[cchDis], pszAnnotation, cchAnnotation + 1); 9314 } 9315 } 9316 } 9317 9234 9318 #else /* VBOX_WITH_IEM_USING_CAPSTONE_DISASSEMBLER */ 9235 9319 … … 9285 9369 { 9286 9370 AssertReturnVoid((pTb->fFlags & IEMTB_F_TYPE_MASK) == IEMTB_F_TYPE_NATIVE); 9287 #if defined(RT_ARCH_AMD64)9288 static const char * const a_apszMarkers[] =9289 {9290 /*[0]=*/ "unknown0", "CheckCsLim", "ConsiderLimChecking", "CheckOpcodes",9291 /*[4]=*/ "PcAfterBranch", "LoadTlbForNewPage", "LoadTlbAfterBranch"9292 };9293 #endif9294 9295 9371 char szDisBuf[512]; 9296 9372 DISSTATE Dis; … … 9588 9664 if (RT_SUCCESS(rc)) 9589 9665 { 9590 # if defined(RT_ARCH_AMD64)9591 if (Dis.pCurInstr->uOpcode == OP_NOP && cbInstr == 7) /* iemNativeEmitMarker */9592 {9593 uint32_t const uInfo = *(uint32_t const *)&Dis.Instr.ab[3];9594 if (RT_HIWORD(uInfo) < kIemThreadedFunc_End)9595 pHlp->pfnPrintf(pHlp, " %p: nop ; marker: call #%u to %s (%u args) - %s\n",9596 pNativeCur, uInfo & 0x7fff, g_apszIemThreadedFunctions[RT_HIWORD(uInfo)],9597 g_acIemThreadedFunctionUsedArgs[RT_HIWORD(uInfo)],9598 uInfo & 0x8000 ? "recompiled" : "todo");9599 else if ((uInfo & ~RT_BIT_32(31)) < RT_ELEMENTS(a_apszMarkers))9600 pHlp->pfnPrintf(pHlp, " %p: nop ; marker: %s\n", pNativeCur, a_apszMarkers[uInfo & ~RT_BIT_32(31)]);9601 else9602 pHlp->pfnPrintf(pHlp, " %p: nop ; unknown marker: %#x (%d)\n", pNativeCur, uInfo, uInfo);9603 }9604 else9605 # endif9606 {9607 const char *pszAnnotation = NULL;9608 9666 # ifdef RT_ARCH_AMD64 9609 DISFormatYasmEx(&Dis, szDisBuf, sizeof(szDisBuf), 9610 DIS_FMT_FLAGS_BYTES_WIDTH_MAKE(10) | DIS_FMT_FLAGS_BYTES_LEFT 9611 | DIS_FMT_FLAGS_RELATIVE_BRANCH | DIS_FMT_FLAGS_C_HEX, 9612 iemNativeDisasmGetSymbolCb, &SymCtx); 9613 PCDISOPPARAM pMemOp; 9614 if (DISUSE_IS_EFFECTIVE_ADDR(Dis.aParams[0].fUse)) 9615 pMemOp = &Dis.aParams[0]; 9616 else if (DISUSE_IS_EFFECTIVE_ADDR(Dis.aParams[1].fUse)) 9617 pMemOp = &Dis.aParams[1]; 9618 else if (DISUSE_IS_EFFECTIVE_ADDR(Dis.aParams[2].fUse)) 9619 pMemOp = &Dis.aParams[2]; 9620 else 9621 pMemOp = NULL; 9622 if ( pMemOp 9623 && pMemOp->x86.Base.idxGenReg == IEMNATIVE_REG_FIXED_PVMCPU 9624 && (pMemOp->fUse & (DISUSE_BASE | DISUSE_REG_GEN64)) == (DISUSE_BASE | DISUSE_REG_GEN64)) 9625 pszAnnotation = iemNativeDbgVCpuOffsetToName(pMemOp->fUse & DISUSE_DISPLACEMENT32 9626 ? pMemOp->x86.uDisp.u32 : pMemOp->x86.uDisp.u8); 9627 9667 DISFormatYasmEx(&Dis, szDisBuf, sizeof(szDisBuf), 9668 DIS_FMT_FLAGS_BYTES_WIDTH_MAKE(10) | DIS_FMT_FLAGS_BYTES_LEFT 9669 | DIS_FMT_FLAGS_RELATIVE_BRANCH | DIS_FMT_FLAGS_C_HEX, 9670 iemNativeDisasmGetSymbolCb, &SymCtx); 9628 9671 # elif defined(RT_ARCH_ARM64) 9629 DISFormatArmV8Ex(&Dis, szDisBuf, sizeof(szDisBuf), 9630 DIS_FMT_FLAGS_BYTES_LEFT | DIS_FMT_FLAGS_RELATIVE_BRANCH | DIS_FMT_FLAGS_C_HEX, 9631 iemNativeDisasmGetSymbolCb, &SymCtx); 9632 if ( Dis.aParams[1].armv8.enmType == kDisArmv8OpParmAddrInGpr 9633 && !(Dis.aParams[1].fUse & (DISUSE_INDEX | DISUSE_PRE_INDEXED | DISUSE_POST_INDEXED)) 9634 /** @todo DISUSE_REG_GEN64 is not set: && (Dis.aParams[1].fUse & DISUSE_REG_GEN64) */ 9635 && Dis.aParams[1].armv8.Op.Reg.enmRegType == kDisOpParamArmV8RegType_Gpr_64Bit) 9636 { 9637 if (Dis.aParams[1].armv8.Op.Reg.idReg == IEMNATIVE_REG_FIXED_PVMCPU) 9638 pszAnnotation = iemNativeDbgVCpuOffsetToName(Dis.aParams[1].armv8.u.offBase); 9639 else if (Dis.aParams[1].armv8.Op.Reg.idReg == IEMNATIVE_REG_FIXED_PCPUMCTX) 9640 pszAnnotation = iemNativeDbgVCpuOffsetToName( Dis.aParams[1].armv8.u.offBase 9641 + RT_UOFFSETOF(VMCPU, cpum.GstCtx)); 9642 } 9672 DISFormatArmV8Ex(&Dis, szDisBuf, sizeof(szDisBuf), 9673 DIS_FMT_FLAGS_BYTES_LEFT | DIS_FMT_FLAGS_RELATIVE_BRANCH | DIS_FMT_FLAGS_C_HEX, 9674 iemNativeDisasmGetSymbolCb, &SymCtx); 9643 9675 # else 9644 9676 # error "Port me" 9645 9677 # endif 9646 if (pszAnnotation) 9647 { 9648 static unsigned const s_offAnnotation = 55; 9649 size_t const cchAnnotation = strlen(pszAnnotation); 9650 size_t cchDis = strlen(szDisBuf); 9651 if (RT_MAX(cchDis, s_offAnnotation) + sizeof(" ; ") + cchAnnotation <= sizeof(szDisBuf)) 9652 { 9653 if (cchDis < s_offAnnotation) 9654 { 9655 memset(&szDisBuf[cchDis], ' ', s_offAnnotation - cchDis); 9656 cchDis = s_offAnnotation; 9657 } 9658 szDisBuf[cchDis++] = ' '; 9659 szDisBuf[cchDis++] = ';'; 9660 szDisBuf[cchDis++] = ' '; 9661 memcpy(&szDisBuf[cchDis], pszAnnotation, cchAnnotation + 1); 9662 } 9663 } 9664 pHlp->pfnPrintf(pHlp, " %p: %s\n", pNativeCur, szDisBuf); 9665 } 9678 iemNativeDisasmAppendAnnotation(szDisBuf, sizeof(szDisBuf), &Dis); 9679 pHlp->pfnPrintf(pHlp, " %p: %s\n", pNativeCur, szDisBuf); 9666 9680 } 9667 9681 else … … 9778 9792 if (RT_SUCCESS(rc)) 9779 9793 { 9780 # if defined(RT_ARCH_AMD64)9781 if (Dis.pCurInstr->uOpcode == OP_NOP && cbInstr == 7) /* iemNativeEmitMarker */9782 {9783 uint32_t const uInfo = *(uint32_t const *)&Dis.Instr.ab[3];9784 if (RT_HIWORD(uInfo) < kIemThreadedFunc_End)9785 pHlp->pfnPrintf(pHlp, "\n %p: nop ; marker: call #%u to %s (%u args) - %s\n",9786 pNativeCur, uInfo & 0x7fff, g_apszIemThreadedFunctions[RT_HIWORD(uInfo)],9787 g_acIemThreadedFunctionUsedArgs[RT_HIWORD(uInfo)],9788 uInfo & 0x8000 ? "recompiled" : "todo");9789 else if ((uInfo & ~RT_BIT_32(31)) < RT_ELEMENTS(a_apszMarkers))9790 pHlp->pfnPrintf(pHlp, " %p: nop ; marker: %s\n", pNativeCur, a_apszMarkers[uInfo & ~RT_BIT_32(31)]);9791 else9792 pHlp->pfnPrintf(pHlp, " %p: nop ; unknown marker: %#x (%d)\n", pNativeCur, uInfo, uInfo);9793 }9794 else9795 # endif9796 {9797 9794 # ifdef RT_ARCH_AMD64 9798 9799 9800 9801 9795 DISFormatYasmEx(&Dis, szDisBuf, sizeof(szDisBuf), 9796 DIS_FMT_FLAGS_BYTES_WIDTH_MAKE(10) | DIS_FMT_FLAGS_BYTES_LEFT 9797 | DIS_FMT_FLAGS_RELATIVE_BRANCH | DIS_FMT_FLAGS_C_HEX, 9798 iemNativeDisasmGetSymbolCb, &SymCtx); 9802 9799 # elif defined(RT_ARCH_ARM64) 9803 9804 9805 9800 DISFormatArmV8Ex(&Dis, szDisBuf, sizeof(szDisBuf), 9801 DIS_FMT_FLAGS_BYTES_LEFT | DIS_FMT_FLAGS_RELATIVE_BRANCH | DIS_FMT_FLAGS_C_HEX, 9802 iemNativeDisasmGetSymbolCb, &SymCtx); 9806 9803 # else 9807 9804 # error "Port me" 9808 9805 # endif 9809 pHlp->pfnPrintf(pHlp, " %p: %s\n", pNativeCur, szDisBuf);9810 }9806 iemNativeDisasmAppendAnnotation(szDisBuf, sizeof(szDisBuf), &Dis); 9807 pHlp->pfnPrintf(pHlp, " %p: %s\n", pNativeCur, szDisBuf); 9811 9808 } 9812 9809 else
Note:
See TracChangeset
for help on using the changeset viewer.