VirtualBox

Changeset 107231 in vbox for trunk


Ignore:
Timestamp:
Dec 5, 2024 7:27:26 AM (2 months ago)
Author:
vboxsync
Message:

ValidationKit/bootsectors: split bs3-cpu-instr-4 in two; bugref:10658; jiraref:VBP-1209

Adding the cmp[ps][sd] series of instructions makes bs3-cpu-instr-4
too big to fit in a single floppy image; so split it into two images.

  • add bs3-cpu-instr-5 boot image
  • put about half the Stuff in it
  • cleanups noticed along the way
  • noted, but not doing anything about it: bs3-cpu-instr-4 (nor 5, obviously) not mentioned in tdCpuIemInstr1.py
Location:
trunk/src/VBox/ValidationKit/bootsectors
Files:
1 added
4 edited
1 copied

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/ValidationKit/bootsectors/Makefile.kmk

    r106061 r107231  
    453453 bs3-cpu-instr-4_TEMPLATE = VBoxBS3KitImg
    454454 bs3-cpu-instr-4_INCS = . $(bs3-cpu-instr-4_0_OUTDIR)
     455 bs3-cpu-instr-4_DEFS = BS3_CPU_INSTR_4
    455456 bs3-cpu-instr-4_SOURCES = \
    456457        bs3kit/bs3-first-init-all-pe32.asm \
    … …  
    466467 bs3-cpu-instr-4-template.o:: \
    467468                $$(bs3-cpu-instr-4_0_OUTDIR)/bs3-cpu-instr-4-asm.o16
     469
     470 #
     471 # CPU instructions #5 - SSE, AVX, ++ FPU instructions (continued).
     472 #
     473 MISCBINS += bs3-cpu-instr-5
     474 bs3-cpu-instr-5_TEMPLATE = VBoxBS3KitImg
     475 bs3-cpu-instr-5_INCS = . $(bs3-cpu-instr-5_0_OUTDIR)
     476 bs3-cpu-instr-5_DEFS = BS3_CPU_INSTR_5
     477 bs3-cpu-instr-5_SOURCES = \
     478        bs3kit/bs3-first-init-all-pe32.asm \
     479        bs3-cpu-instr-5.c32 \
     480        bs3-cpu-instr-5-asm.asm
     481 bs3-cpu-instr-5.c32_DEPS = $(bs3-cpu-instr-5_0_OUTDIR)/bs3-cpu-instr-5-asm-auto.h
     482 bs3-cpu-instr-5_CLEANS = $(bs3-cpu-instr-5_0_OUTDIR)/bs3-cpu-instr-5-asm-auto.h
     483
     484 $$(bs3-cpu-instr-5_0_OUTDIR)/bs3-cpu-instr-5-asm-auto.h: \
     485                $$(VBoxBs3Obj2Hdr_1_TARGET) $$(bs3-cpu-instr-5_0_OUTDIR)/bs3-cpu-instr-5-asm.o16
     486        $(VBoxBs3Obj2Hdr_1_TARGET) --output "$@" "$(bs3-cpu-instr-5_0_OUTDIR)/bs3-cpu-instr-5-asm.o16"
     487
     488 bs3-cpu-instr-5-template.o:: \
     489                $$(bs3-cpu-instr-5_0_OUTDIR)/bs3-cpu-instr-5-asm.o16
    468490
    469491 #

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4-asm.asm

    r106061 r107231  
    11; $Id$
    22;; @file
    3 ; BS3Kit - bs3-cpu-instr-4 - SSE, AVX FPU instructions.
     3; BS3Kit - bs3-cpu-instr-4 & bs3-cpu-instr-5 - SSE, AVX FPU instructions.
    44;
    55

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4-template.mac

    r107230 r107231  
    11; $Id$
    22;; @file
    3 ; BS3Kit - bs3-cpu-instr-4 - SSE, AVX FPU instructions, assembly template.
     3; BS3Kit - bs3-cpu-instr-4 & bs3-cpu-instr-5 - SSE, AVX FPU instructions, assembly template.
    44;
    55
    … …  
    175175 %endif ; !EMIT_INSTR_PLUS_ICEBP_DEFINED
    176176
     177 %ifdef BS3_CPU_INSTR_4
     178
    177179;
    178180;; [v]addps
    … …  
    696698EMIT_INSTR_PLUS_ICEBP_C64   vminsd, XMM8, XMM9, XMM10
    697699EMIT_INSTR_PLUS_ICEBP_C64   vminsd, XMM8, XMM9, FSxBX
     700
     701 %endif ; BS3_CPU_INSTR_4
     702
     703 %ifdef BS3_CPU_INSTR_5
    698704
    699705;
    … …  
    872878
    873879;
    874 ;; dpps
     880;; [v]dpps
    875881;
    876882EMIT_INSTR_PLUS_ICEBP       dpps,  XMM1, XMM2,  000h
    … …  
    921927
    922928;
    923 ;; dppd
     929;; [v]dppd
    924930;
    925931EMIT_INSTR_PLUS_ICEBP       dppd,  XMM1, XMM2,  000h
    … …  
    953959
    954960;
    955 ;; roundpd
     961;; [v]roundps
     962;
     963EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM1,  008h
     964EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  000h
     965EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  008h
     966EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  009h
     967EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  00ah
     968EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  00bh
     969EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  00ch
     970EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  00dh
     971EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  00eh
     972EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  00fh
     973EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  0ffh
     974EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, FSxBX, 008h
     975EMIT_INSTR_PLUS_ICEBP_C64 roundps,  XMM8, XMM8,  008h
     976EMIT_INSTR_PLUS_ICEBP_C64 roundps,  XMM8, XMM9,  008h
     977EMIT_INSTR_PLUS_ICEBP_C64 roundps,  XMM8, FSxBX, 008h
     978
     979EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM1,  008h
     980EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  000h
     981EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  008h
     982EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  009h
     983EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  00ah
     984EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  00bh
     985EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  00ch
     986EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  00dh
     987EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  00eh
     988EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  00fh
     989EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  0ffh
     990EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, FSxBX, 008h
     991EMIT_INSTR_PLUS_ICEBP_C64 vroundps, XMM8, XMM8,  008h
     992EMIT_INSTR_PLUS_ICEBP_C64 vroundps, XMM8, XMM9,  008h
     993EMIT_INSTR_PLUS_ICEBP_C64 vroundps, XMM8, FSxBX, 008h
     994
     995EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM1,  008h
     996EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  000h
     997EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  008h
     998EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  009h
     999EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  00ah
     1000EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  00bh
     1001EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  00ch
     1002EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  00dh
     1003EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  00eh
     1004EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  00fh
     1005EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  0ffh
     1006EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, FSxBX, 008h
     1007EMIT_INSTR_PLUS_ICEBP_C64 vroundps, YMM8, YMM8,  008h
     1008EMIT_INSTR_PLUS_ICEBP_C64 vroundps, YMM8, YMM9,  008h
     1009EMIT_INSTR_PLUS_ICEBP_C64 vroundps, YMM8, FSxBX, 008h
     1010
     1011;
     1012;; [v]roundpd
    9561013;
    9571014EMIT_INSTR_PLUS_ICEBP     roundpd,  XMM1, XMM1,  008h
    … …  
    10041061
    10051062;
    1006 ;; roundps
    1007 ;
    1008 EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM1,  008h
    1009 EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  000h
    1010 EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  008h
    1011 EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  009h
    1012 EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  00ah
    1013 EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  00bh
    1014 EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  00ch
    1015 EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  00dh
    1016 EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  00eh
    1017 EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  00fh
    1018 EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, XMM2,  0ffh
    1019 EMIT_INSTR_PLUS_ICEBP     roundps,  XMM1, FSxBX, 008h
    1020 EMIT_INSTR_PLUS_ICEBP_C64 roundps,  XMM8, XMM8,  008h
    1021 EMIT_INSTR_PLUS_ICEBP_C64 roundps,  XMM8, XMM9,  008h
    1022 EMIT_INSTR_PLUS_ICEBP_C64 roundps,  XMM8, FSxBX, 008h
    1023 
    1024 EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM1,  008h
    1025 EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  000h
    1026 EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  008h
    1027 EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  009h
    1028 EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  00ah
    1029 EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  00bh
    1030 EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  00ch
    1031 EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  00dh
    1032 EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  00eh
    1033 EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  00fh
    1034 EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, XMM2,  0ffh
    1035 EMIT_INSTR_PLUS_ICEBP     vroundps, XMM1, FSxBX, 008h
    1036 EMIT_INSTR_PLUS_ICEBP_C64 vroundps, XMM8, XMM8,  008h
    1037 EMIT_INSTR_PLUS_ICEBP_C64 vroundps, XMM8, XMM9,  008h
    1038 EMIT_INSTR_PLUS_ICEBP_C64 vroundps, XMM8, FSxBX, 008h
    1039 
    1040 EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM1,  008h
    1041 EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  000h
    1042 EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  008h
    1043 EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  009h
    1044 EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  00ah
    1045 EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  00bh
    1046 EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  00ch
    1047 EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  00dh
    1048 EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  00eh
    1049 EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  00fh
    1050 EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, YMM2,  0ffh
    1051 EMIT_INSTR_PLUS_ICEBP     vroundps, YMM1, FSxBX, 008h
    1052 EMIT_INSTR_PLUS_ICEBP_C64 vroundps, YMM8, YMM8,  008h
    1053 EMIT_INSTR_PLUS_ICEBP_C64 vroundps, YMM8, YMM9,  008h
    1054 EMIT_INSTR_PLUS_ICEBP_C64 vroundps, YMM8, FSxBX, 008h
    1055 
    1056 ;
    1057 ;; roundsd
     1063;; [v]roundss
     1064;
     1065EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  000h
     1066EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  008h
     1067EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  009h
     1068EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  00ah
     1069EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  00bh
     1070EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  00ch
     1071EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  00dh
     1072EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  00eh
     1073EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  00fh
     1074EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  0ffh
     1075EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, FSxBX, 008h
     1076EMIT_INSTR_PLUS_ICEBP_C64 roundss,  XMM8, XMM9,  008h
     1077EMIT_INSTR_PLUS_ICEBP_C64 roundss,  XMM8, FSxBX, 008h
     1078
     1079EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM1,  XMM2,  008h
     1080EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM1,  FSxBX, 008h
     1081EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM1,  008h
     1082EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  000h
     1083EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  008h
     1084EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  009h
     1085EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  00ah
     1086EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  00bh
     1087EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  00ch
     1088EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  00dh
     1089EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  00eh
     1090EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  00fh
     1091EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  0ffh
     1092EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  FSxBX, 008h
     1093EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM8,  FSxBX, 008h
     1094EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM9,  XMM10, 008h
     1095EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM9,  FSxBX, 008h
     1096
     1097EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM1,  008h
     1098EMIT_INSTR_PLUS_ICEBP_C64 roundss,  XMM8, XMM8,  008h
     1099EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM1,  XMM1,  008h
     1100EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM2,  008h
     1101EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM8,  XMM8,  008h
     1102
     1103;
     1104;; [v]roundsd
    10581105;
    10591106EMIT_INSTR_PLUS_ICEBP     roundsd,  XMM1, XMM2,  000h
    … …  
    10961143
    10971144;
    1098 ;; roundss
    1099 ;
    1100 EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  000h
    1101 EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  008h
    1102 EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  009h
    1103 EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  00ah
    1104 EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  00bh
    1105 EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  00ch
    1106 EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  00dh
    1107 EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  00eh
    1108 EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  00fh
    1109 EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM2,  0ffh
    1110 EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, FSxBX, 008h
    1111 EMIT_INSTR_PLUS_ICEBP_C64 roundss,  XMM8, XMM9,  008h
    1112 EMIT_INSTR_PLUS_ICEBP_C64 roundss,  XMM8, FSxBX, 008h
    1113 
    1114 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM1,  XMM2,  008h
    1115 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM1,  FSxBX, 008h
    1116 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM1,  008h
    1117 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  000h
    1118 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  008h
    1119 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  009h
    1120 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  00ah
    1121 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  00bh
    1122 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  00ch
    1123 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  00dh
    1124 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  00eh
    1125 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  00fh
    1126 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM3,  0ffh
    1127 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  FSxBX, 008h
    1128 EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM8,  FSxBX, 008h
    1129 EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM9,  XMM10, 008h
    1130 EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM9,  FSxBX, 008h
    1131 
    1132 EMIT_INSTR_PLUS_ICEBP     roundss,  XMM1, XMM1,  008h
    1133 EMIT_INSTR_PLUS_ICEBP_C64 roundss,  XMM8, XMM8,  008h
    1134 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM1,  XMM1,  008h
    1135 EMIT_INSTR_PLUS_ICEBP     vroundss, XMM1, XMM2,  XMM2,  008h
    1136 EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM8,  XMM8,  008h
    1137 
    1138 ;
    1139 ;; comiss
     1145;; [v]comiss
    11401146;
    11411147EMIT_INSTR_PLUS_ICEBP     comiss,  XMM1, XMM2
    … …  
    11541160
    11551161;
    1156 ;; ucomiss
     1162;; [v]ucomiss
    11571163;
    11581164EMIT_INSTR_PLUS_ICEBP     ucomiss,  XMM1, XMM2
    … …  
    11711177
    11721178;
    1173 ;; comisd
     1179;; [v]comisd
    11741180;
    11751181EMIT_INSTR_PLUS_ICEBP     comisd,  XMM1, XMM2
    … …  
    11881194
    11891195;
    1190 ;; ucomisd
     1196;; [v]ucomisd
    11911197;
    11921198EMIT_INSTR_PLUS_ICEBP     ucomisd,  XMM1, XMM2
    … …  
    12051211
    12061212;
    1207 ;; cmpps
     1213;; [v]cmpps
    12081214;
    12091215EMIT_INSTR_PLUS_ICEBP     cmpps,  XMM1, XMM2,  000h
    … …  
    13301336
    13311337;
    1332 ;; cmppd
     1338;; [v]cmppd
    13331339;
    13341340EMIT_INSTR_PLUS_ICEBP     cmppd,  XMM1, XMM2,  000h
    … …  
    14801486
    14811487;
    1482 ;; cvtsi2ss
     1488;; [v]cvtsi2ss
    14831489;
    14841490; SSE-128, fp32 <- int32 (single)
    … …  
    15161522
    15171523;
    1518 ;; cvtss2si
     1524;; [v]cvtss2si
    15191525;
    15201526; SSE-128, int32 <- fp32
    … …  
    15421548
    15431549;
    1544 ;; cvttss2si
     1550;; [v]cvttss2si
    15451551;
    15461552; SSE-128, int32 <- fp32 (single; truncated)
    … …  
    15961602
    15971603;
    1598 ;; cvtsi2sd
     1604;; [v]cvtsi2sd
    15991605;
    16001606; SSE-128, fp64 <- int32 (single)
    … …  
    16321638
    16331639;
    1634 ;; cvtsd2si
     1640;; [v]cvtsd2si
    16351641;
    16361642; SSE-128, int32 <- fp64 (single)
    … …  
    16581664
    16591665;
    1660 ;; cvttsd2si
     1666;; [v]cvttsd2si
    16611667;
    16621668; SSE-128, int32 <- fp64 (single; truncated)
    … …  
    16841690
    16851691;
    1686 ;; cvtdq2ps
     1692;; [v]cvtdq2ps
    16871693;
    16881694; SSE-128, fp32 <- int32 (packed:4)
    … …  
    17121718
    17131719;
    1714 ;; cvtps2dq
     1720;; [v]cvtps2dq
    17151721;
    17161722; SSE-128, int32 <- fp32 (packed:4)
    … …  
    17401746
    17411747;
    1742 ;; cvttps2dq
     1748;; [v]cvttps2dq
    17431749;
    17441750; SSE-128, int32 <- fp32 (packed:4; truncated)
    … …  
    17681774
    17691775;
    1770 ;; cvtdq2pd
     1776;; [v]cvtdq2pd
    17711777;
    17721778; SSE-128, fp64 <- int32 (packed:2)
    … …  
    17961802
    17971803;
    1798 ;; cvtpd2dq
     1804;; [v]cvtpd2dq
    17991805;
    18001806; SSE-128, int32 <- fp64 (packed:2)
    … …  
    18241830
    18251831;
    1826 ;; cvttpd2dq
     1832;; [v]cvttpd2dq
    18271833;
    18281834; SSE-128, int32 <- fp64 (packed:2; truncated)
    … …  
    18521858
    18531859;
    1854 ;; cvtpd2ps
     1860;; [v]cvtpd2ps
    18551861;
    18561862; SSE-128, fp32 <- fp64 (packed:2)
    … …  
    18801886
    18811887;
    1882 ;; cvtps2pd
     1888;; [v]cvtps2pd
    18831889;
    18841890; SSE-128, fp64 <- fp32 (packed:2)
    … …  
    19081914
    19091915;
    1910 ;; cvtsd2ss
     1916;; [v]cvtsd2ss
    19111917;
    19121918; SSE-128, fp32 <- fp64 (single)
    … …  
    19371943
    19381944;
    1939 ;; cvtss2sd
     1945;; [v]cvtss2sd
    19401946;
    19411947; SSE-128, fp64 <- fp32 (single)
    … …  
    19651971; @todo test with VEX.L=1 (as if asking for YMM)?  SDM says 'unpredictable behavior'...
    19661972
     1973 %endif ; BS3_CPU_INSTR_4
     1974
    19671975%endif ; BS3_INSTANTIATING_CMN
    19681976

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4.c32

    r107230 r107231  
    11/* $Id$ */
    22/** @file
    3  * BS3Kit - bs3-cpu-instr-4 - SSE, AVX FPU instructions, C code template.
     3 * BS3Kit - bs3-cpu-instr-4 & bs3-cpu-instr-5 - SSE, AVX FPU instructions, C code template.
    44 */
    55
    … …  
    4040*********************************************************************************************************************************/
    4141#include <bs3kit.h>
    42 #include "bs3-cpu-instr-4-asm-auto.h"
     42#if !defined(BS3_CPU_INSTR_4) && !defined(BS3_CPU_INSTR_5)
     43  /** @todo both won't actually fit in a single floppy boot image, but future code changes could improve that */
     44# error "Must define either or both of 'BS3_CPU_INSTR_4' or 'BS3_CPU_INSTR_5'"
     45#endif
     46#if defined(BS3_CPU_INSTR_4)
     47# include "bs3-cpu-instr-4-asm-auto.h"
     48#endif
     49#if defined(BS3_CPU_INSTR_5)
     50# include "bs3-cpu-instr-5-asm-auto.h"
     51#endif
    4352#include "bs3-cpu-instr-x-regs.c32"
    4453
    … …  
    688697};
    689698
     699#if defined(BS3_CPU_INSTR_5)
    690700/** Exceptions type 4 (>=16 Byte Memory Reference, not explicitly aligned, No Floating-point Exceptions) test configurations. */
    691701/** Intel 64 & IA-32 Architecture SDM Vol 2A Table 2-21, "Type 4 Class Exception Conditions." */
    … …  
    815825    { 0, 0,  0,  1,      1,       1,         1,   1,   0,       0,        1,      1,      X86_XCPT_AC, X86_XCPT_GP, "AMDmm+AC" }, /* #10 */
    816826};
     827#endif /* BS3_CPU_INSTR_5 */
    817828
    818829/**
    … …  
    32603271
    32613272
     3273#if defined(BS3_CPU_INSTR_4)
    32623274/*
    32633275 * [V]ADDPS.
    … …  
    1252712539    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    1252812540}
    12529 
    12530 
     12541#endif /* BS3_CPU_INSTR_4 */
     12542
     12543
     12544#if defined(BS3_CPU_INSTR_5)
    1253112545/*
    1253212546 * [V]RCPPS.
    … …  
    2442324437    return bs3CpuInstr4_WorkerTestType1(bMode, PASS_ARRAY(s_aTests), PASS_ARRAY(g_aXcptConfig3));
    2442424438}
     24439#endif /* BS3_CPU_INSTR_5 */
    2442524440
    2442624441
    … …  
    2444424459#endif
    2444524460#if defined(ALL_TESTS)
     24461# if defined(BS3_CPU_INSTR_4)
    2444624462        { "[v]addps",       bs3CpuInstr4_v_addps,     0 },
    2444724463        { "[v]addpd",       bs3CpuInstr4_v_addpd,     0 },
    … …  
    2447424490        { "[v]minss",       bs3CpuInstr4_v_minss,     0 },
    2447524491        { "[v]minsd",       bs3CpuInstr4_v_minsd,     0 },
     24492# endif /* BS3_CPU_INSTR_4 */
     24493# if defined(BS3_CPU_INSTR_5)
    2447624494        { "[v]rcpps",       bs3CpuInstr4_v_rcpps,     0 },
    2447724495        { "[v]rcpss",       bs3CpuInstr4_v_rcpss,     0 },
    … …  
    2451624534        { "[v]cvtsd2ss",    bs3CpuInstr4_v_cvtsd2ss,  0 },
    2451724535        { "[v]cvtss2sd",    bs3CpuInstr4_v_cvtss2sd,  0 },
     24536# endif /* BS3_CPU_INSTR_5 */
    2451824537#endif
    2451924538    };
     24539#if defined(BS3_CPU_INSTR_4) && defined(BS3_CPU_INSTR_5)
     24540    Bs3TestInit("bs3-cpu-instr-4+5");
     24541#elif defined(BS3_CPU_INSTR_4)
    2452024542    Bs3TestInit("bs3-cpu-instr-4");
     24543#elif defined(BS3_CPU_INSTR_5)
     24544    Bs3TestInit("bs3-cpu-instr-5");
     24545#endif
    2452124546
    2452224547    /*

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-5-asm.asm

    r107230 r107231  
    11; $Id$
    22;; @file
    3 ; BS3Kit - bs3-cpu-instr-4 - SSE, AVX FPU instructions.
     3; BS3Kit - bs3-cpu-instr-5 - SSE, AVX FPU instructions (continued).
    44;
    55
    … …  
    3636
    3737
    38 ;*********************************************************************************************************************************
    39 ;*  Header Files                                                                                                                 *
    40 ;*********************************************************************************************************************************
    41 %include "bs3kit.mac"
    42 
    43 ;
    44 ; Instantiate code templates.
    45 ;
    46 BS3_INSTANTIATE_COMMON_TEMPLATE          "bs3-cpu-instr-4-template.mac"
    47 BS3_INSTANTIATE_TEMPLATE_WITH_WEIRD_ONES "bs3-cpu-instr-4-template.mac"
    48 
     38%include "bs3-cpu-instr-4-asm.asm"
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