Changeset 107308 in vbox for trunk/src/VBox/VMM/include
- Timestamp:
- Dec 13, 2024 8:09:39 AM (2 months ago)
- svn:sync-xref-src-repo-rev:
- 166339
- Location:
- trunk/src/VBox/VMM/include
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/include/GICInternal.h
r106419 r107308 34 34 #include <VBox/gic.h> 35 35 #include <VBox/vmm/pdmdev.h> 36 #include <VBox/vmm/pdmgic.h> 37 #include <VBox/vmm/stam.h> 36 38 37 39 … … 41 43 * @{ 42 44 */ 45 46 #ifdef VBOX_INCLUDED_vmm_pdmgic_h 47 /** The VirtualBox GIC backend. */ 48 extern const PDMGICBACKEND g_GicBackend; 49 # ifdef RT_OS_DARWIN 50 /** The Hypervisor.Framework GIC backend. */ 51 extern const PDMGICBACKEND g_GicHvfBackend; 52 # endif 53 #endif 43 54 44 55 #define VMCPU_TO_GICCPU(a_pVCpu) (&(a_pVCpu)->gic.s) … … 103 114 /** The ring-3 device instance. */ 104 115 PPDMDEVINSR3 pDevInsR3; 105 /** Flag whether the in-kernel (KVM/Hyper-V) GIC of the NEM backend is used. */106 bool fNemGic;107 116 } GIC; 108 117 /** Pointer to GIC VM instance data. */ -
trunk/src/VBox/VMM/include/NEMInternal.h
r107227 r107308 710 710 bool nemR3NativeSetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable); 711 711 712 /** GIC API is currently implemented in NEM rather than in GIC. */ 713 VMM_INT_DECL(int) NEMR3GicSetSpi(PVMCC pVM, uint32_t uIntId, bool fAsserted); 714 VMM_INT_DECL(int) NEMR3GicSetPpi(PVMCPUCC pVCpu, uint32_t uIntId, bool fAsserted); 715 VMM_INT_DECL(VBOXSTRICTRC) NEMR3GicReadSysReg(PVMCPUCC pVCpu, uint32_t u32Reg, uint64_t *pu64Value); 716 VMM_INT_DECL(VBOXSTRICTRC) NEMR3GicWriteSysReg(PVMCPUCC pVCpu, uint32_t u32Reg, uint64_t u64Value); 717 712 718 /** 713 719 * Forced flag notification call from VMEmt.h. -
trunk/src/VBox/VMM/include/PDMInternal.h
r107115 r107308 48 48 #include <VBox/vmm/pdmcommon.h> 49 49 #include <VBox/vmm/pdmtask.h> 50 #include <VBox/vmm/pdmapic.h> 50 #ifdef VBOX_VMM_TARGET_ARMV8 51 # include <VBox/vmm/pdmgic.h> 52 #else 53 # include <VBox/vmm/pdmapic.h> 54 #endif 51 55 #include <VBox/sup.h> 52 56 #include <VBox/msi.h> … … 802 806 /** Pointer to the interrupt controller instance - R3 Ptr. */ 803 807 PPDMDEVINSR3 pDevInsR3; 804 #ifndef VBOX_VMM_TARGET_ARMV8 805 /** The type of APIC backend. */ 806 PDMAPICBACKENDTYPE enmKind; 807 uint32_t uPadding; 808 /** The APIC backend. */ 809 PDMAPICBACKENDR3 ApicBackend; 810 #else 811 /** @todo The GIC backend. Currently the padding helps keep alignment common 812 * between x86 and arm. */ 813 uint8_t auPadding[4+4+240]; 814 #endif 808 union 809 { 810 #if defined(VBOX_VMM_TARGET_X86) || defined(VBOX_VMM_TARGET_AGNOSTIC) 811 struct 812 { 813 /** The type of APIC backend. */ 814 PDMAPICBACKENDTYPE enmKind; 815 uint32_t uPadding; 816 /** The APIC backend. */ 817 PDMAPICBACKENDR3 ApicBackend; 818 } x86; 819 #endif 820 #ifdef VBOX_VMM_TARGET_ARMV8 821 struct 822 { 823 /** The type of GIC backend. */ 824 PDMGICBACKENDTYPE enmKind; 825 uint32_t uPadding; 826 /** The APIC backend. */ 827 PDMGICBACKENDR3 GicBackend; 828 } armv8; 829 #endif 830 uint8_t abPadding[256-8]; 831 } u; 815 832 } PDMICR3; 816 833 AssertCompileSizeAlignment(PDMICR3, 8); … … 823 840 /** Pointer to the interrupt controller instance - R0 Ptr. */ 824 841 PPDMDEVINSR0 pDevInsR0; 825 #ifndef VBOX_VMM_TARGET_ARMV8 826 /** The APIC backend. */ 827 PDMAPICBACKENDR0 ApicBackend; 828 #else 829 /** @todo The GIC backend. Currently the padding helps keep alignment common 830 * between x86 and arm. */ 831 uint8_t auPadding[240]; 832 #endif 842 union 843 { 844 #if defined(VBOX_VMM_TARGET_X86) || defined(VBOX_VMM_TARGET_AGNOSTIC) 845 struct 846 { 847 /** The APIC backend. */ 848 PDMAPICBACKENDR0 ApicBackend; 849 } x86; 850 #endif 851 /** Padding to keep alignment common between x86 and arm (there's no ring-0 852 * armv8 code. */ 853 uint8_t abPadding[256-8]; 854 } u; 833 855 } PDMICR0; 834 856 AssertCompileSizeAlignment(PDMICR0, 8); … … 839 861 typedef struct PDMICRC 840 862 { 841 /** Pointer to the interrupt controller instance - R 0Ptr. */863 /** Pointer to the interrupt controller instance - RC Ptr. */ 842 864 PPDMDEVINSRC pDevInsR0; 843 865 RTRCPTR avPadding; 844 #ifndef VBOX_VMM_TARGET_ARMV8 845 /** The APIC backend. */ 846 PDMAPICBACKENDRC ApicBackend; 847 #else 848 /** @todo The GIC backend. Currently the padding helps keep alignment common 849 * between x86 and arm. */ 850 uint8_t auPadding[232]; 851 #endif 866 union 867 { 868 #if defined(VBOX_VMM_TARGET_X86) || defined(VBOX_VMM_TARGET_AGNOSTIC) 869 struct 870 { 871 /** The APIC backend. */ 872 PDMAPICBACKENDRC ApicBackend; 873 } x86; 874 #endif 875 /** Padding to keep alignment common between x86 and arm (there's no ring-context 876 * armv8 code. */ 877 uint8_t abPadding[256-4-4]; 878 } u; 852 879 } PDMICRC; 853 880 AssertCompileSizeAlignment(PDMICRC, 8); … … 1799 1826 */ 1800 1827 # ifdef IN_RING3 1801 # define PDM_TO_APICBACKEND(a_pVM) (&((a_pVM)->pdm.s.Ic. ApicBackend))1802 # define PDMCPU_TO_APICBACKEND(a_pVCpu) (&((a_pVCpu)->CTX_SUFF(pVM)->pdm.s.Ic. ApicBackend))1828 # define PDM_TO_APICBACKEND(a_pVM) (&((a_pVM)->pdm.s.Ic.u.x86.ApicBackend)) 1829 # define PDMCPU_TO_APICBACKEND(a_pVCpu) (&((a_pVCpu)->CTX_SUFF(pVM)->pdm.s.Ic.u.x86.ApicBackend)) 1803 1830 #else 1804 # define PDM_TO_APICBACKEND(a_pVM) (&((a_pVM)->pdmr0.s.Ic. ApicBackend))1805 # define PDMCPU_TO_APICBACKEND(a_pVCpu) (&((a_pVCpu)->CTX_SUFF(pVM)->pdmr0.s.Ic. ApicBackend))1831 # define PDM_TO_APICBACKEND(a_pVM) (&((a_pVM)->pdmr0.s.Ic.u.x86.ApicBackend)) 1832 # define PDMCPU_TO_APICBACKEND(a_pVCpu) (&((a_pVCpu)->CTX_SUFF(pVM)->pdmr0.s.Ic.u.x86.ApicBackend)) 1806 1833 #endif 1807 1834 #else 1808 /** @todo GIC backend. */ 1835 # ifdef IN_RING3 1836 # define PDM_TO_GICBACKEND(a_pVM) (&((a_pVM)->pdm.s.Ic.u.armv8.GicBackend)) 1837 # define PDMCPU_TO_GICBACKEND(a_pVCpu) (&((a_pVCpu)->CTX_SUFF(pVM)->pdm.s.Ic.u.armv8.GicBackend)) 1838 #else 1839 # error "Implement me" 1840 #endif 1809 1841 #endif 1810 1842
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