Index: trunk/src/VBox/VMM/include/GICInternal.h
===================================================================
--- trunk/src/VBox/VMM/include/GICInternal.h	(revision 107227)
+++ trunk/src/VBox/VMM/include/GICInternal.h	(revision 107308)
@@ -34,4 +34,6 @@
 #include <VBox/gic.h>
 #include <VBox/vmm/pdmdev.h>
+#include <VBox/vmm/pdmgic.h>
+#include <VBox/vmm/stam.h>
 
 
@@ -41,4 +43,13 @@
  * @{
  */
+
+#ifdef VBOX_INCLUDED_vmm_pdmgic_h
+/** The VirtualBox GIC backend. */
+extern const PDMGICBACKEND g_GicBackend;
+# ifdef RT_OS_DARWIN
+/** The Hypervisor.Framework GIC backend. */
+extern const PDMGICBACKEND g_GicHvfBackend;
+# endif
+#endif
 
 #define VMCPU_TO_GICCPU(a_pVCpu)             (&(a_pVCpu)->gic.s)
@@ -103,6 +114,4 @@
     /** The ring-3 device instance. */
     PPDMDEVINSR3                pDevInsR3;
-    /** Flag whether the in-kernel (KVM/Hyper-V) GIC of the NEM backend is used. */
-    bool                        fNemGic;
 } GIC;
 /** Pointer to GIC VM instance data. */
Index: trunk/src/VBox/VMM/include/NEMInternal.h
===================================================================
--- trunk/src/VBox/VMM/include/NEMInternal.h	(revision 107227)
+++ trunk/src/VBox/VMM/include/NEMInternal.h	(revision 107308)
@@ -710,4 +710,10 @@
 bool            nemR3NativeSetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable);
 
+/** GIC API is currently implemented in NEM rather than in GIC. */
+VMM_INT_DECL(int)          NEMR3GicSetSpi(PVMCC pVM, uint32_t uIntId, bool fAsserted);
+VMM_INT_DECL(int)          NEMR3GicSetPpi(PVMCPUCC pVCpu, uint32_t uIntId, bool fAsserted);
+VMM_INT_DECL(VBOXSTRICTRC) NEMR3GicReadSysReg(PVMCPUCC pVCpu, uint32_t u32Reg, uint64_t *pu64Value);
+VMM_INT_DECL(VBOXSTRICTRC) NEMR3GicWriteSysReg(PVMCPUCC pVCpu, uint32_t u32Reg, uint64_t u64Value);
+
 /**
  * Forced flag notification call from VMEmt.h.
Index: trunk/src/VBox/VMM/include/PDMInternal.h
===================================================================
--- trunk/src/VBox/VMM/include/PDMInternal.h	(revision 107227)
+++ trunk/src/VBox/VMM/include/PDMInternal.h	(revision 107308)
@@ -48,5 +48,9 @@
 #include <VBox/vmm/pdmcommon.h>
 #include <VBox/vmm/pdmtask.h>
-#include <VBox/vmm/pdmapic.h>
+#ifdef VBOX_VMM_TARGET_ARMV8
+# include <VBox/vmm/pdmgic.h>
+#else
+# include <VBox/vmm/pdmapic.h>
+#endif
 #include <VBox/sup.h>
 #include <VBox/msi.h>
@@ -802,15 +806,28 @@
     /** Pointer to the interrupt controller instance - R3 Ptr. */
     PPDMDEVINSR3                       pDevInsR3;
-#ifndef VBOX_VMM_TARGET_ARMV8
-    /** The type of APIC backend. */
-    PDMAPICBACKENDTYPE                 enmKind;
-    uint32_t                           uPadding;
-    /** The APIC backend. */
-    PDMAPICBACKENDR3                   ApicBackend;
-#else
-    /** @todo The GIC backend. Currently the padding helps keep alignment common
-     *        between x86 and arm. */
-    uint8_t                            auPadding[4+4+240];
-#endif
+    union
+    {
+#if defined(VBOX_VMM_TARGET_X86) || defined(VBOX_VMM_TARGET_AGNOSTIC)
+        struct
+        {
+            /** The type of APIC backend. */
+            PDMAPICBACKENDTYPE         enmKind;
+            uint32_t                   uPadding;
+            /** The APIC backend. */
+            PDMAPICBACKENDR3           ApicBackend;
+        } x86;
+#endif
+#ifdef VBOX_VMM_TARGET_ARMV8
+        struct
+        {
+            /** The type of GIC backend. */
+            PDMGICBACKENDTYPE          enmKind;
+            uint32_t                   uPadding;
+            /** The APIC backend. */
+            PDMGICBACKENDR3            GicBackend;
+        } armv8;
+#endif
+        uint8_t                        abPadding[256-8];
+    } u;
 } PDMICR3;
 AssertCompileSizeAlignment(PDMICR3, 8);
@@ -823,12 +840,17 @@
     /** Pointer to the interrupt controller instance - R0 Ptr. */
     PPDMDEVINSR0                       pDevInsR0;
-#ifndef VBOX_VMM_TARGET_ARMV8
-    /** The APIC backend. */
-    PDMAPICBACKENDR0                   ApicBackend;
-#else
-    /** @todo The GIC backend. Currently the padding helps keep alignment common
-     *        between x86 and arm. */
-    uint8_t                            auPadding[240];
-#endif
+    union
+    {
+#if defined(VBOX_VMM_TARGET_X86) || defined(VBOX_VMM_TARGET_AGNOSTIC)
+        struct
+        {
+            /** The APIC backend. */
+            PDMAPICBACKENDR0           ApicBackend;
+        } x86;
+#endif
+        /** Padding to keep alignment common between x86 and arm (there's no ring-0
+         *  armv8 code. */
+        uint8_t                        abPadding[256-8];
+    } u;
 } PDMICR0;
 AssertCompileSizeAlignment(PDMICR0, 8);
@@ -839,15 +861,20 @@
 typedef struct PDMICRC
 {
-    /** Pointer to the interrupt controller instance - R0 Ptr. */
+    /** Pointer to the interrupt controller instance - RC Ptr. */
     PPDMDEVINSRC                       pDevInsR0;
     RTRCPTR                            avPadding;
-#ifndef VBOX_VMM_TARGET_ARMV8
-    /** The APIC backend. */
-    PDMAPICBACKENDRC                   ApicBackend;
-#else
-    /** @todo The GIC backend. Currently the padding helps keep alignment common
-     *        between x86 and arm. */
-    uint8_t                            auPadding[232];
-#endif
+    union
+    {
+#if defined(VBOX_VMM_TARGET_X86) || defined(VBOX_VMM_TARGET_AGNOSTIC)
+        struct
+        {
+            /** The APIC backend. */
+            PDMAPICBACKENDRC           ApicBackend;
+        } x86;
+#endif
+        /** Padding to keep alignment common between x86 and arm (there's no ring-context
+         *  armv8 code. */
+        uint8_t                        abPadding[256-4-4];
+    } u;
 } PDMICRC;
 AssertCompileSizeAlignment(PDMICRC, 8);
@@ -1799,12 +1826,17 @@
  */
 # ifdef IN_RING3
-#  define PDM_TO_APICBACKEND(a_pVM)          (&((a_pVM)->pdm.s.Ic.ApicBackend))
-#  define PDMCPU_TO_APICBACKEND(a_pVCpu)     (&((a_pVCpu)->CTX_SUFF(pVM)->pdm.s.Ic.ApicBackend))
+#  define PDM_TO_APICBACKEND(a_pVM)          (&((a_pVM)->pdm.s.Ic.u.x86.ApicBackend))
+#  define PDMCPU_TO_APICBACKEND(a_pVCpu)     (&((a_pVCpu)->CTX_SUFF(pVM)->pdm.s.Ic.u.x86.ApicBackend))
 #else
-#  define PDM_TO_APICBACKEND(a_pVM)          (&((a_pVM)->pdmr0.s.Ic.ApicBackend))
-#  define PDMCPU_TO_APICBACKEND(a_pVCpu)     (&((a_pVCpu)->CTX_SUFF(pVM)->pdmr0.s.Ic.ApicBackend))
+#  define PDM_TO_APICBACKEND(a_pVM)          (&((a_pVM)->pdmr0.s.Ic.u.x86.ApicBackend))
+#  define PDMCPU_TO_APICBACKEND(a_pVCpu)     (&((a_pVCpu)->CTX_SUFF(pVM)->pdmr0.s.Ic.u.x86.ApicBackend))
 #endif
 #else
-/** @todo GIC backend. */
+# ifdef IN_RING3
+#  define PDM_TO_GICBACKEND(a_pVM)           (&((a_pVM)->pdm.s.Ic.u.armv8.GicBackend))
+#  define PDMCPU_TO_GICBACKEND(a_pVCpu)      (&((a_pVCpu)->CTX_SUFF(pVM)->pdm.s.Ic.u.armv8.GicBackend))
+#else
+# error "Implement me"
+#endif
 #endif
 
