VirtualBox

Changeset 107853 in vbox for trunk/src/VBox/Devices


Ignore:
Timestamp:
Jan 18, 2025 4:36:25 PM (8 weeks ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
167052
Message:

DevDP8390: Reduced Parfait warnings.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Network/DevDP8390.cpp

    r107841 r107853  
    23782378
    23792379
    2380 static int dp8390CoreWriteCR(PPDMDEVINS pDevIns, PDPNICSTATE pThis, uint32_t val)
     2380static int dp8390CoreWriteCR(PPDMDEVINS pDevIns, PDPNICSTATE pThis, uint8_t val)
    23812381{
    23822382    union {
    … …  
    24692469}
    24702470
    2471 static int dp8390CoreWrite(PPDMDEVINS pDevIns, PDPNICSTATE pThis, int ofs, uint32_t val)
     2471static int dp8390CoreWrite(PPDMDEVINS pDevIns, PDPNICSTATE pThis, int ofs, uint8_t val)
    24722472{
    24732473    int     rc = VINF_SUCCESS;
    … …  
    28262826
    28272827
    2828 static int dpNeIoWrite(PPDMDEVINS pDevIns, PDPNICSTATE pThis, uint32_t addr, uint32_t val)
     2828static int dpNeIoWrite(PPDMDEVINS pDevIns, PDPNICSTATE pThis, int addr, uint16_t val)
    28292829{
    28302830    int     reg = addr & 0x0f;
    28312831    int     rc = VINF_SUCCESS;
    28322832
    2833     Log2Func(("#%d: addr=%#06x val=%#04x\n", pThis->iInstance, addr, val & 0xff));
     2833    Log2Func(("#%d: addr=%#06x val=%#04x\n", pThis->iInstance, addr, val));
    28342834
    28352835    /* The NE2000 has 8 bytes of data port followed by 8 bytes of reset port.
    … …  
    28482848
    28492849
    2850 static uint32_t neIoRead(PPDMDEVINS pDevIns, PDPNICSTATE pThis, uint32_t addr)
    2851 {
    2852     uint32_t    val = UINT32_MAX;
     2850static uint16_t neIoRead(PPDMDEVINS pDevIns, PDPNICSTATE pThis, int addr)
     2851{
     2852    uint16_t    val = UINT16_MAX;
    28532853    int         reg = addr & 0x0f;
    28542854
    … …  
    28642864        val = neDataPortRead(pDevIns, pThis);
    28652865
    2866     Log2Func(("#%d: addr=%#06x val=%#04x\n", pThis->iInstance, addr, val & 0xff));
     2866    Log2Func(("#%d: addr=%#06x val=%#04x\n", pThis->iInstance, addr, val));
    28672867    return val;
    28682868}
    28692869
    28702870
    2871 static int wdIoWrite(PPDMDEVINS pDevIns, PDPNICSTATE pThis, uint32_t addr, uint32_t val)
     2871static int wdIoWrite(PPDMDEVINS pDevIns, PDPNICSTATE pThis, int addr, uint8_t val)
    28722872{
    28732873    int             reg = addr & 0xf;
    … …  
    28822882    };
    28832883
    2884     Log2Func(("#%d: addr=%#06x val=%#04x\n", pThis->iInstance, addr, val & 0xff));
     2884    Log2Func(("#%d: addr=%#06x val=%#02x\n", pThis->iInstance, addr, val));
    28852885
    28862886    switch (reg)
    … …  
    29172917
    29182918
    2919 static uint32_t wdIoRead(PDPNICSTATE pThis, uint32_t addr)
    2920 {
    2921     uint32_t    val = UINT32_MAX;
     2919static uint8_t wdIoRead(PDPNICSTATE pThis, int addr)
     2920{
     2921    uint8_t     val = UINT8_MAX;
    29222922    int         reg = addr & 0x0f;
    29232923
    … …  
    29732973    }
    29742974
    2975     Log2Func(("#%d: addr=%#06x val=%#04x\n", pThis->iInstance, addr, val & 0xff));
     2975    Log2Func(("#%d: addr=%#04x val=%#04x\n", pThis->iInstance, addr, val));
    29762976    return val;
    29772977}
    … …  
    31783178}
    31793179
    3180 
    3181 static int elGaDataWrite(PDPNICSTATE pThis, PEL_GA pGa, uint16_t val)
     3180/* The Register File LSB (GAR_RFLSB) port supports 16-bit I/O access, but
     3181 * we internally split everything up into 8-bit access anyway.
     3182 * That goes for both reading and writing.
     3183 */
     3184static void elGaDataWrite(PDPNICSTATE pThis, PEL_GA pGa, uint8_t val)
    31823185{
    31833186    /* Data write; ignored if not started and in "download" mode. */
    … …  
    32023205        }
    32033206    }
    3204     return VINF_SUCCESS;
    32053207}
    32063208
    … …  
    32343236
    32353237
    3236 static int elGaIoWrite(PPDMDEVINS pDevIns, PDPNICSTATE pThis, uint32_t addr, uint32_t val)
     3238static int elGaIoWrite(PPDMDEVINS pDevIns, PDPNICSTATE pThis, int addr, uint8_t val)
    32373239{
    32383240    int         reg = addr & 0xf;
    … …  
    32403242    PEL_GA      pGa = &pThis->ga;
    32413243
    3242     Log2Func(("#%d: addr=%#06x val=%#04x\n", pThis->iInstance, addr, val & 0xff));
     3244    Log2Func(("#%d: addr=%#04x val=%#02x\n", pThis->iInstance, addr, val));
    32433245
    32443246    switch (reg)
    … …  
    33003302
    33013303
    3302 static uint32_t elGaIoRead(PDPNICSTATE pThis, uint32_t addr)
    3303 {
    3304     uint32_t    val = UINT32_MAX;
     3304static uint8_t elGaIoRead(PDPNICSTATE pThis, int addr)
     3305{
     3306    uint8_t     val = UINT8_MAX;
    33053307    int         reg = addr & 0x0f;
    33063308    PEL_GA      pGa = &pThis->ga;
    … …  
    33593361    }
    33603362
    3361     Log2Func(("#%d: addr=%#06x val=%#04x\n", pThis->iInstance, addr, val & 0xff));
     3363    Log2Func(("#%d: addr=%#06x val=%#04x\n", pThis->iInstance, addr, val));
    33623364    return val;
    33633365}
    … …  
    33723374    PDPNICSTATE     pThis = PDMDEVINS_2_DATA(pDevIns, PDPNICSTATE);
    33733375    int             rc    = VINF_SUCCESS;
    3374     int             reg   = Port & 0xf;
     3376    RTIOPORT        reg   = Port & 0xf;
    33753377    uint8_t         u8Lo, u8Hi = 0;
    33763378    STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatIORead), a);
    … …  
    33813383    {
    33823384        case 1:
    3383             *pu32 = neIoRead(pDevIns, pThis, reg);
     3385            *pu32 = neIoRead(pDevIns, pThis, Port);
    33843386            break;
    33853387        case 2:
    … …  
    34623464    {
    34633465        case 1:
    3464             *pu32 = elGaIoRead(pThis, reg);
     3466            *pu32 = elGaIoRead(pThis, Port);
    34653467            break;
    34663468        case 2:
    … …  
    35503552            else
    35513553            {
    3552                 rc = dpNeIoWrite(pDevIns, pThis, reg + 0, RT_LOBYTE(u32));
     3554                rc = dpNeIoWrite(pDevIns, pThis, reg + 0, RT_LOBYTE(RT_LOWORD(u32)));
    35533555                if (RT_SUCCESS(rc) && (reg < 0xf))
    3554                     rc = dpNeIoWrite(pDevIns, pThis, reg + 1, RT_HIBYTE(u32));
     3556                    rc = dpNeIoWrite(pDevIns, pThis, reg + 1, RT_HIBYTE(RT_LOWORD(u32)));
    35553557            }
    35563558            break;
    … …  
    35873589        case 2:
    35883590            /* Manually split word access. */
    3589             rc = wdIoWrite(pDevIns, pThis, reg + 0, RT_LOBYTE(u32));
     3591            rc = wdIoWrite(pDevIns, pThis, reg + 0, RT_LOBYTE(RT_LOWORD(u32)));
    35903592            if (RT_SUCCESS(rc) && (reg < 0xf))
    3591                 rc = wdIoWrite(pDevIns, pThis, reg + 1, RT_HIBYTE(u32));
     3593                rc = wdIoWrite(pDevIns, pThis, reg + 1, RT_HIBYTE(RT_LOWORD(u32)));
    35923594            break;
    35933595        default:
    … …  
    36233625        case 2:
    36243626            /* Manually split word access. */
    3625             rc = elGaIoWrite(pDevIns, pThis, reg + 0, RT_LOBYTE(u32));
     3627            rc = elGaIoWrite(pDevIns, pThis, reg + 0, RT_LOBYTE(RT_LOWORD(u32)));
    36263628            if (RT_SUCCESS(rc) && (reg < 0xf))
    3627                 rc = elGaIoWrite(pDevIns, pThis, reg + 1, RT_HIBYTE(u32));
     3629                rc = elGaIoWrite(pDevIns, pThis, reg + 1, RT_HIBYTE(RT_LOWORD(u32)));
    36283630            break;
    36293631        default:
    … …  
    36593661        case 2:
    36603662            /* Manually split word access. */
    3661             rc = dp8390CoreWrite(pDevIns, pThis, reg + 0, RT_LOBYTE(u32));
     3663            rc = dp8390CoreWrite(pDevIns, pThis, reg + 0, RT_LOBYTE(RT_LOWORD(u32)));
    36623664            if (!RT_SUCCESS(rc))
    36633665                break;
    3664             rc = dp8390CoreWrite(pDevIns, pThis, reg + 1, RT_HIBYTE(u32));
     3666            rc = dp8390CoreWrite(pDevIns, pThis, reg + 1, RT_HIBYTE(RT_LOWORD(u32)));
    36653667            break;
    36663668        default:
    … …  
    50745076     * Default resource assignments depend on the device type.
    50755077     */
    5076     unsigned uDefIoPort  = 0;   /* To be overridden. */
    5077     unsigned uDefIrq     = 0;
    5078     unsigned uDefDma     = 0;   /* Default to no DMA. */
     5078    RTIOPORT uDefIoPort  = 0;   /* To be overridden. */
     5079    uint8_t uDefIrq     = 0;
     5080    uint8_t uDefDma     = 0;   /* Default to no DMA. */
    50795081    unsigned uDefMemBase = 0;   /* Default to no shared memory. */
    50805082
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