Changeset 107929 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Jan 24, 2025 9:43:16 AM (4 months ago)
- svn:sync-xref-src-repo-rev:
- 167164
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/CPUMAllSysRegs-armv8.cpp
r107308 r107929 169 169 170 170 /** @callback_method_impl{FNCPUMRDSYSREG} */ 171 static DECLCALLBACK(VBOXSTRICTRC) cpumSysRegRd_Gic V3Icc(PVMCPUCC pVCpu, uint32_t idSysReg, PCCPUMSYSREGRANGE pRange, uint64_t *puValue)171 static DECLCALLBACK(VBOXSTRICTRC) cpumSysRegRd_GicIcc(PVMCPUCC pVCpu, uint32_t idSysReg, PCCPUMSYSREGRANGE pRange, uint64_t *puValue) 172 172 { 173 173 RT_NOREF_PV(pRange); … … 177 177 178 178 /** @callback_method_impl{FNCPUMWRSYSREG} */ 179 static DECLCALLBACK(VBOXSTRICTRC) cpumSysRegWr_Gic V3Icc(PVMCPUCC pVCpu, uint32_t idSysReg, PCCPUMSYSREGRANGE pRange, uint64_t uValue, uint64_t uRawValue)179 static DECLCALLBACK(VBOXSTRICTRC) cpumSysRegWr_GicIcc(PVMCPUCC pVCpu, uint32_t idSysReg, PCCPUMSYSREGRANGE pRange, uint64_t uValue, uint64_t uRawValue) 180 180 { 181 181 RT_NOREF_PV(pRange); RT_NOREF_PV(uRawValue); … … 231 231 { cpumSysRegRd_WriteOnly }, 232 232 { cpumSysRegRd_ReadCpumOff }, 233 { cpumSysRegRd_Gic V3Icc },233 { cpumSysRegRd_GicIcc }, 234 234 { cpumSysRegRd_OslsrEl1 }, 235 235 { cpumSysRegRd_Pmu } … … 247 247 { NULL }, /* Alias */ 248 248 { cpumSysRegWr_WriteCpumOff }, 249 { cpumSysRegWr_Gic V3Icc },249 { cpumSysRegWr_GicIcc }, 250 250 { cpumSysRegWr_OslarEl1 }, 251 251 { cpumSysRegWr_Pmu } … … 492 492 CPUM_ASSERT_RD_SYSREG_FN(WriteOnly); 493 493 CPUM_ASSERT_RD_SYSREG_FN(ReadCpumOff); 494 CPUM_ASSERT_RD_SYSREG_FN(Gic V3Icc);494 CPUM_ASSERT_RD_SYSREG_FN(GicIcc); 495 495 CPUM_ASSERT_RD_SYSREG_FN(OslsrEl1); 496 496 CPUM_ASSERT_RD_SYSREG_FN(Pmu); … … 500 500 CPUM_ASSERT_WR_SYSREG_FN(ReadOnly); 501 501 CPUM_ASSERT_WR_SYSREG_FN(WriteCpumOff); 502 CPUM_ASSERT_WR_SYSREG_FN(Gic V3Icc);502 CPUM_ASSERT_WR_SYSREG_FN(GicIcc); 503 503 CPUM_ASSERT_WR_SYSREG_FN(OslarEl1); 504 504 CPUM_ASSERT_WR_SYSREG_FN(Pmu); -
trunk/src/VBox/VMM/VMMAll/GICAll.cpp
r107308 r107929 1 1 /* $Id$ */ 2 2 /** @file 3 * GIC - Generic Interrupt Controller Architecture (GIC v3) - All Contexts.3 * GIC - Generic Interrupt Controller Architecture (GIC) - All Contexts. 4 4 */ 5 5 … … 406 406 break; 407 407 case GIC_DIST_REG_TYPER_OFF: 408 *puValue = GIC_DIST_REG_TYPER_NUM_ITLINES_SET( 1) /** @todo 32 SPIs for now. */409 | GIC_DIST_REG_TYPER_NUM_PES_SET(0) /* 1 PE */ 408 *puValue = GIC_DIST_REG_TYPER_NUM_ITLINES_SET(pThis->uItLinesNumber) 409 | GIC_DIST_REG_TYPER_NUM_PES_SET(0) /* 1 PE */ /** @todo r=ramshankar: Should this be pVCpu->cCpus? Currently it means 'ARE' must always be used? */ 410 410 /*| GIC_DIST_REG_TYPER_ESPI*/ /** @todo */ 411 411 /*| GIC_DIST_REG_TYPER_NMI*/ /** @todo Non-maskable interrupts */ … … 1148 1148 } 1149 1149 case ARMV8_AARCH64_SYSREG_ICC_BPR1_EL1: 1150 *pu64Value = pThis->bBinaryPointGrp1 & 0x7;1150 *pu64Value = ARMV8_ICC_BPR1_EL1_AARCH64_BINARYPOINT_SET(pThis->bBinaryPointGrp1); 1151 1151 break; 1152 1152 case ARMV8_AARCH64_SYSREG_ICC_CTLR_EL1: … … 1211 1211 break; 1212 1212 case ARMV8_AARCH64_SYSREG_ICC_BPR0_EL1: 1213 pThis->bBinaryPointGrp0 = (uint8_t) (u64Value & 0x7);1213 pThis->bBinaryPointGrp0 = (uint8_t)ARMV8_ICC_BPR0_EL1_AARCH64_BINARYPOINT_GET(u64Value); 1214 1214 break; 1215 1215 case ARMV8_AARCH64_SYSREG_ICC_AP0R0_EL1: … … 1321 1321 break; 1322 1322 case ARMV8_AARCH64_SYSREG_ICC_BPR1_EL1: 1323 pThis->bBinaryPointGrp 0 = (uint8_t)(u64Value & 0x7);1323 pThis->bBinaryPointGrp1 = (uint8_t)ARMV8_ICC_BPR1_EL1_AARCH64_BINARYPOINT_GET(u64Value); 1324 1324 break; 1325 1325 case ARMV8_AARCH64_SYSREG_ICC_CTLR_EL1: -
trunk/src/VBox/VMM/VMMAll/PDMAllGic.cpp
r107308 r107929 1 1 /* $Id$ */ 2 2 /** @file 3 * PDM - G ICv3 (Generic Interrupt Controller) Interface.3 * PDM - Generic Interrupt Controller (GIC) Interface. 4 4 */ 5 5
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