Changeset 107929 in vbox for trunk/src/VBox/VMM/VMMR3

Timestamp:

Jan 24, 2025 9:43:16 AM (3 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

167164

Message:

VMM: GIC: bugref:10404 Renamed some places where GICv3 to GIC, a doxygen fix plus some minor updates. No functional changes.

Location:

trunk/src/VBox/VMM/VMMR3

Files:

• GICR3.cpp (modified) (11 diffs)
• GICR3Nem-darwin.cpp (modified) (1 diff)
• GICR3Nem-linux.cpp (modified) (2 diffs)
• GICR3Nem-win.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/VMMR3/GICR3.cpp

@@ -1 +1 @@
 /* $Id$ */
 /** @file
- * GIC - Generic Interrupt Controller Architecture (GICv3).
+ * GIC - Generic Interrupt Controller Architecture (GIC).
  */
 
@@ -54 +54 @@
 
 # define GIC_SYSREGRANGE(a_uFirst, a_uLast, a_szName) \
-    { (a_uFirst), (a_uLast), kCpumSysRegRdFn_GicV3Icc, kCpumSysRegWrFn_GicV3Icc, 0, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
+    { (a_uFirst), (a_uLast), kCpumSysRegRdFn_GicIcc, kCpumSysRegWrFn_GicIcc, 0, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
 
 
@@ -61 +61 @@
 *********************************************************************************************************************************/
 /**
- * System register ranges for the GICv3.
- */
-static CPUMSYSREGRANGE const g_aSysRegRanges_GICv3[] =
+ * System register ranges for the GIC.
+ */
+static CPUMSYSREGRANGE const g_aSysRegRanges_GIC[] =
 {
     GIC_SYSREGRANGE(ARMV8_AARCH64_SYSREG_ICC_PMR_EL1,   ARMV8_AARCH64_SYSREG_ICC_PMR_EL1,     "ICC_PMR_EL1"),
@@ -70 +70 @@
     GIC_SYSREGRANGE(ARMV8_AARCH64_SYSREG_ICC_DIR_EL1,   ARMV8_AARCH64_SYSREG_ICC_SGI0R_EL1,   "ICC_DIR_EL1 - ICC_SGI0R_EL1"),
     GIC_SYSREGRANGE(ARMV8_AARCH64_SYSREG_ICC_IAR1_EL1,  ARMV8_AARCH64_SYSREG_ICC_IGRPEN1_EL1, "ICC_IAR1_EL1 - ICC_IGRPEN1_EL1"),
-    GIC_SYSREGRANGE(ARMV8_AARCH64_SYSREG_ICC_SRE_EL2,   ARMV8_AARCH64_SYSREG_ICC_SRE_EL2,     "ICC_SRE_EL2")
+    GIC_SYSREGRANGE(ARMV8_AARCH64_SYSREG_ICC_SRE_EL2,   ARMV8_AARCH64_SYSREG_ICC_SRE_EL2,     "ICC_SRE_EL2"),
+    GIC_SYSREGRANGE(ARMV8_AARCH64_SYSREG_ICC_SRE_EL3,   ARMV8_AARCH64_SYSREG_ICC_SRE_EL3,     "ICC_SRE_EL3")
 };
 
@@ -102 +103 @@
     PGICDEV    pGicDev = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
 
-    pHlp->pfnPrintf(pHlp, "GICv3 Distributor:\n");
+    pHlp->pfnPrintf(pHlp, "GIC Distributor:\n");
     pHlp->pfnPrintf(pHlp, "  IGRP0            = %#RX32\n", pGicDev->u32RegIGrp0);
     pHlp->pfnPrintf(pHlp, "  ICFG0            = %#RX32\n", pGicDev->u32RegICfg0);
@@ -364 +365 @@
 
 /**
- * Initializes the GIC state.
- *
- * @returns VBox status code.
- * @param   pVM     The cross context VM structure.
- */
-static int gicR3InitState(PVM pVM)
-{
-    LogFlowFunc(("pVM=%p\n", pVM));
-
-    RT_NOREF(pVM);
-    return VINF_SUCCESS;
-}
-
-
-/**
  * @interface_method_impl{PDMDEVREG,pfnDestruct}
  */
@@ -410 +396 @@
      * Validate GIC settings.
      */
-    PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "DistributorMmioBase|RedistributorMmioBase|ItsMmioBase", "");
+    PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "DistributorMmioBase|RedistributorMmioBase|ItsMmioBase|ItLinesNumber", "");
 
 #if 0
@@ -422 +408 @@
 #endif
 
+    /** @devcfgm{gic, ItLinesNumber, uint16_t, 1}
+     * Configures GICD_TYPER.ItLinesNumber, bits [4:0].
+     *
+     * For the INTID range 32-1023, configures the maximum SPI supported. Valid values
+     * are [1, 31] which equates to interrupt IDs [63, 1023]. A value of 0 indicates no
+     * SPIs are supported, we do not allow configuring this value as it's expected most
+     * guests would assume support for SPIs. */
+    rc = pHlp->pfnCFGMQueryU16Def(pCfg, "ItLinesNumber", &pGicDev->uItLinesNumber, 1 /* 63 interrupt IDs */);
+    AssertLogRelRCReturn(rc, rc);
+    if (   pGicDev->uItLinesNumber
+        && !(pGicDev->uItLinesNumber & ~GIC_DIST_REG_TYPER_NUM_ITLINES))
+    { /* likely */ }
+    else
+        return PDMDevHlpVMSetError(pDevIns, VERR_INVALID_PARAMETER, RT_SRC_POS,
+                                   N_("Configuration error: \"ItLinesNumber\" must be in the range [1,%u]"),
+                                   GIC_DIST_REG_TYPER_NUM_ITLINES);
+
     /*
      * Register the GIC with PDM.
@@ -432 +435 @@
 
     /*
-     * Initialize the GIC state.
-     */
-    for (uint32_t i = 0; i < RT_ELEMENTS(g_aSysRegRanges_GICv3); i++)
+     * Insert the GIC system registers.
+     */
+    for (uint32_t i = 0; i < RT_ELEMENTS(g_aSysRegRanges_GIC); i++)
     {
-        rc = CPUMR3SysRegRangesInsert(pVM, &g_aSysRegRanges_GICv3[i]);
+        rc = CPUMR3SysRegRangesInsert(pVM, &g_aSysRegRanges_GIC[i]);
         AssertLogRelRCReturn(rc, rc);
     }
-
-    /* Finally, initialize the state. */
-    rc = gicR3InitState(pVM);
-    AssertRCReturn(rc, rc);
 
     /*
@@ -454 +453 @@
 
     rc = PDMDevHlpMmioCreateAndMap(pDevIns, GCPhysMmioBase, GIC_DIST_REG_FRAME_SIZE, gicDistMmioWrite, gicDistMmioRead,
-                                   IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_DWORD_ZEROED, "GICv3_Dist", &pGicDev->hMmioDist);
+                                   IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_DWORD_ZEROED, "GIC_Dist", &pGicDev->hMmioDist);
     AssertRCReturn(rc, rc);
 
@@ -464 +463 @@
     RTGCPHYS cbRegion = (RTGCPHYS)pVM->cCpus * (GIC_REDIST_REG_FRAME_SIZE + GIC_REDIST_SGI_PPI_REG_FRAME_SIZE); /* Adjacent and per vCPU. */
     rc = PDMDevHlpMmioCreateAndMap(pDevIns, GCPhysMmioBase, cbRegion, gicReDistMmioWrite, gicReDistMmioRead,
-                                   IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_DWORD_ZEROED, "GICv3_ReDist", &pGicDev->hMmioReDist);
+                                   IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_DWORD_ZEROED, "GIC_ReDist", &pGicDev->hMmioReDist);
     AssertRCReturn(rc, rc);
 

trunk/src/VBox/VMM/VMMR3/GICR3Nem-darwin.cpp

@@ -1 +1 @@
 /* $Id$ */
 /** @file
- * GIC - Generic Interrupt Controller Architecture (GICv3) - Hypervisor.framework in kernel interface.
+ * GIC - Generic Interrupt Controller Architecture (GIC) - Hypervisor.framework in kernel interface.
  */
 

trunk/src/VBox/VMM/VMMR3/GICR3Nem-linux.cpp

@@ -1 +1 @@
 /* $Id$ */
 /** @file
- * GIC - Generic Interrupt Controller Architecture (GICv3) - KVM in kernel interface.
+ * GIC - Generic Interrupt Controller Architecture (GIC) - KVM in kernel interface.
  */
 
@@ -87 +87 @@
 #if 0
 /**
- * System register ranges for the GICv3.
- */
-static CPUMSYSREGRANGE const g_aSysRegRanges_GICv3[] =
+ * System register ranges for the GIC.
+ */
+static CPUMSYSREGRANGE const g_aSysRegRanges_GIC[] =
 {
     GIC_SYSREGRANGE(ARMV8_AARCH64_SYSREG_ICC_PMR_EL1,   ARMV8_AARCH64_SYSREG_ICC_PMR_EL1,     "ICC_PMR_EL1"),

trunk/src/VBox/VMM/VMMR3/GICR3Nem-win.cpp

@@ -1 +1 @@
 /* $Id$ */
 /** @file
- * GIC - Generic Interrupt Controller Architecture (GICv3) - Hyper-V interface.
+ * GIC - Generic Interrupt Controller Architecture (GIC) - Hyper-V interface.
  */
 
@@ -77 +77 @@
 
 /*
- * The following definitions appeared in build 27744 allow interacting with the GICv3 controller,
+ * The following definitions appeared in build 27744 allow interacting with the GIC controller,
  * (there is no official SDK for this yet).
  */