Index: trunk/src/VBox/VMM/VMMAll/GICAll.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMAll/GICAll.cpp	(revision 107929)
+++ trunk/src/VBox/VMM/VMMAll/GICAll.cpp	(revision 107957)
@@ -300,5 +300,6 @@
 
 /**
- * Updates the internal IRQ state and sets or clears the appropirate force action flags.
+ * Updates the internal IRQ state and sets or clears the appropriate force action
+ * flags.
  *
  * @returns Strict VBox status code.
@@ -385,5 +386,5 @@
 {
     VMCPU_ASSERT_EMT(pVCpu);
-    PGICDEV pThis  = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
+    PGICDEV pThis = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
 
     if (offReg >= GIC_DIST_REG_IROUTERn_OFF_START && offReg <= GIC_DIST_REG_IROUTERn_OFF_LAST)
@@ -437,11 +438,11 @@
             AssertReleaseFailed();
             break;
-        case GIC_DIST_REG_IPRIORITYn_OFF_START:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 4: /* These are banked for the PEs and access the redistributor. */
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 4: /* These are banked for the PEs and access the redistributor. */
         {
             PGICCPU pGicVCpu = VMCPU_TO_GICCPU(pVCpu);
 
             /* Figure out the register which is written. */
-            uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYn_OFF_START;
+            uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYRn_OFF_START;
             Assert(idxPrio <= RT_ELEMENTS(pThis->abIntPriority) - sizeof(uint32_t));
 
@@ -453,8 +454,8 @@
             break;
         }
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 32: /* Only 32 lines for now. */
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 32: /* Only 32 lines for now. */
         {
             /* Figure out the register which is written. */
-            uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYn_OFF_START - 32;
+            uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYRn_OFF_START - 32;
             Assert(idxPrio <= RT_ELEMENTS(pThis->abIntPriority) - sizeof(uint32_t));
 
@@ -491,5 +492,6 @@
             break;
         case GIC_DIST_REG_PIDR2_OFF:
-            *puValue = GIC_REDIST_REG_PIDR2_ARCH_REV_SET(GIC_REDIST_REG_PIDR2_ARCH_REV_GICV3);
+            Assert(pThis->uArchRev <= GIC_DIST_REG_PIDR2_ARCH_REV_GICV4);
+            *puValue = GIC_DIST_REG_PIDR2_ARCH_REV_SET(pThis->uArchRev);
             break;
         case GIC_DIST_REG_IIDR_OFF:
@@ -519,6 +521,6 @@
 {
     VMCPU_ASSERT_EMT(pVCpu); RT_NOREF(pVCpu);
-    PGICDEV pThis  = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
-    PVMCC    pVM   = PDMDevHlpGetVM(pDevIns);
+    PGICDEV pThis = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
+    PVMCC   pVM   = PDMDevHlpGetVM(pDevIns);
 
     if (offReg >= GIC_DIST_REG_IROUTERn_OFF_START && offReg <= GIC_DIST_REG_IROUTERn_OFF_LAST)
@@ -586,17 +588,17 @@
             rcStrict = gicDistUpdateIrqState(pVM, pThis);
             break;
-        case GIC_DIST_REG_IPRIORITYn_OFF_START: /* These are banked for the PEs and access the redistributor. */
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 4:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 8:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 12:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 16:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 20:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 24:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 28:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START: /* These are banked for the PEs and access the redistributor. */
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 4:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 8:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 12:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 16:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 20:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 24:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 28:
         {
             PGICCPU pGicVCpu = VMCPU_TO_GICCPU(pVCpu);
 
             /* Figure out the register which is written. */
-            uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYn_OFF_START;
+            uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYRn_OFF_START;
             Assert(idxPrio <= RT_ELEMENTS(pGicVCpu->abIntPriority) - sizeof(uint32_t));
             for (uint32_t i = idxPrio; i < idxPrio + sizeof(uint32_t); i++)
@@ -607,15 +609,15 @@
             break;
         }
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 32: /* Only 32 lines for now. */
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 36:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 40:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 44:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 48:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 52:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 56:
-        case GIC_DIST_REG_IPRIORITYn_OFF_START + 60:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 32: /* Only 32 lines for now. */
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 36:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 40:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 44:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 48:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 52:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 56:
+        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 60:
         {
             /* Figure out the register which is written. */
-            uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYn_OFF_START - 32;
+            uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYRn_OFF_START - 32;
             Assert(idxPrio <= RT_ELEMENTS(pThis->abIntPriority) - sizeof(uint32_t));
             for (uint32_t i = idxPrio; i < idxPrio + sizeof(uint32_t); i++)
@@ -686,5 +688,5 @@
 DECLINLINE(VBOXSTRICTRC) gicReDistRegisterRead(PPDMDEVINS pDevIns, PVMCPUCC pVCpu, uint32_t idRedist, uint16_t offReg, uint32_t *puValue)
 {
-    RT_NOREF(pDevIns);
+    PGICDEV pThis = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
 
     switch (offReg)
@@ -702,5 +704,6 @@
             break;
         case GIC_REDIST_REG_PIDR2_OFF:
-            *puValue = GIC_REDIST_REG_PIDR2_ARCH_REV_SET(GIC_REDIST_REG_PIDR2_ARCH_REV_GICV3);
+            Assert(pThis->uArchRev <= GIC_DIST_REG_PIDR2_ARCH_REV_GICV4);
+            *puValue = GIC_REDIST_REG_PIDR2_ARCH_REV_SET(pThis->uArchRev);
             break;
         default:
@@ -741,15 +744,15 @@
             *puValue = ASMAtomicReadU32(&pThis->bmIntActive);
             break;
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START +  4:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START +  8:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 12:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 16:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 20:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 24:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 28:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START +  4:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START +  8:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 12:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 16:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 20:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 24:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 28:
         {
             /* Figure out the register which is written. */
-            uint8_t idxPrio = offReg - GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START;
+            uint8_t idxPrio = offReg - GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START;
             Assert(idxPrio <= RT_ELEMENTS(pThis->abIntPriority) - sizeof(uint32_t));
 
@@ -875,15 +878,15 @@
             rcStrict = gicReDistUpdateIrqState(pThis, pVCpu);
             break;
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START +  4:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START +  8:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 12:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 16:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 20:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 24:
-        case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 28:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START +  4:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START +  8:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 12:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 16:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 20:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 24:
+        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 28:
         {
-            /* Figure out the register whch is written. */
-            uint8_t idxPrio = offReg - GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START;
+            /* Figure out the register which is written. */
+            uint8_t idxPrio = offReg - GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START;
             Assert(idxPrio <= RT_ELEMENTS(pThis->abIntPriority) - sizeof(uint32_t));
             for (uint32_t i = idxPrio; i < idxPrio + sizeof(uint32_t); i++)
@@ -1416,5 +1419,6 @@
 
     /*
-     * Determine the redistributor being targeted. Each redistributor takes GIC_REDIST_REG_FRAME_SIZE + GIC_REDIST_SGI_PPI_REG_FRAME_SIZE bytes
+     * Determine the redistributor being targeted. Each redistributor takes
+     * GIC_REDIST_REG_FRAME_SIZE + GIC_REDIST_SGI_PPI_REG_FRAME_SIZE bytes
      * and the redistributors are adjacent.
      */
@@ -1456,5 +1460,6 @@
 
     /*
-     * Determine the redistributor being targeted. Each redistributor takes GIC_REDIST_REG_FRAME_SIZE + GIC_REDIST_SGI_PPI_REG_FRAME_SIZE bytes
+     * Determine the redistributor being targeted. Each redistributor takes
+     * GIC_REDIST_REG_FRAME_SIZE + GIC_REDIST_SGI_PPI_REG_FRAME_SIZE bytes
      * and the redistributors are adjacent.
      */
