Index: /trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/PGMAll.cpp	(revision 108155)
+++ /trunk/src/VBox/VMM/VMMAll/PGMAll.cpp	(revision 108156)
@@ -1955,4 +1955,45 @@
 # endif /* !VBOX_WITH_ONLY_PGM_NEM_MODE */
 
+/**
+ * Maps the guest CR3.
+ *
+ * @returns VBox status code.
+ * @param   pVCpu           The cross context virtual CPU structure.
+ * @param   GCPhysCr3       The guest CR3 value.
+ * @param   pHCPtrGuestCr3  Where to store the mapped memory.
+ */
+DECLINLINE(int) pgmGstMapCr3(PVMCPUCC pVCpu, RTGCPHYS GCPhysCr3, PRTHCPTR pHCPtrGuestCr3)
+{
+    /** @todo this needs some reworking wrt. locking?  */
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
+    PGM_LOCK_VOID(pVM);
+    PPGMPAGE pPageCr3 = pgmPhysGetPage(pVM, GCPhysCr3);
+    AssertReturnStmt(pPageCr3, PGM_UNLOCK(pVM), VERR_PGM_INVALID_CR3_ADDR);
+
+    RTHCPTR HCPtrGuestCr3;
+    int rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPageCr3, GCPhysCr3, (void **)&HCPtrGuestCr3);
+    PGM_UNLOCK(pVM);
+
+    *pHCPtrGuestCr3 = HCPtrGuestCr3;
+    return rc;
+}
+
+
+# ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
+/**
+ * Unmaps the guest CR3.
+ *
+ * @returns VBox status code.
+ * @param   pVCpu   The cross context virtual CPU structure.
+ */
+DECLINLINE(int) pgmGstUnmapCr3(PVMCPUCC pVCpu)
+{
+    uintptr_t const idxBth = pVCpu->pgm.s.idxBothModeData;
+    AssertReturn(idxBth < RT_ELEMENTS(g_aPgmBothModeData), VERR_PGM_MODE_IPE);
+    AssertReturn(g_aPgmBothModeData[idxBth].pfnUnmapCR3, VERR_PGM_MODE_IPE);
+    return g_aPgmBothModeData[idxBth].pfnUnmapCR3(pVCpu);
+}
+# endif
+
 #endif /* VBOX_VMM_TARGET_X86 */
 
@@ -1979,4 +2020,5 @@
 #elif defined(VBOX_VMM_TARGET_ARMV8)
     return pgmGstGetPageArmv8Hack(pVCpu, GCPtr, pWalk);
+
 #else
 # error "port me"
@@ -1984,6 +2026,6 @@
 }
 
-#ifdef VBOX_VMM_TARGET_X86
-
+
+#ifdef VBOX_VMM_TARGET_X86 /** @todo Implement PGMGstQueryPageFast for ARMv8! */
 /**
  * Gets effective Guest OS page information.
@@ -2008,47 +2050,4 @@
     return g_aPgmGuestModeData[idx].pfnQueryPageFast(pVCpu, GCPtr, fFlags, pWalk);
 }
-
-
-/**
- * Maps the guest CR3.
- *
- * @returns VBox status code.
- * @param   pVCpu           The cross context virtual CPU structure.
- * @param   GCPhysCr3       The guest CR3 value.
- * @param   pHCPtrGuestCr3  Where to store the mapped memory.
- */
-DECLINLINE(int) pgmGstMapCr3(PVMCPUCC pVCpu, RTGCPHYS GCPhysCr3, PRTHCPTR pHCPtrGuestCr3)
-{
-    /** @todo this needs some reworking wrt. locking?  */
-    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
-    PGM_LOCK_VOID(pVM);
-    PPGMPAGE pPageCr3 = pgmPhysGetPage(pVM, GCPhysCr3);
-    AssertReturnStmt(pPageCr3, PGM_UNLOCK(pVM), VERR_PGM_INVALID_CR3_ADDR);
-
-    RTHCPTR HCPtrGuestCr3;
-    int rc = pgmPhysGCPhys2CCPtrInternalDepr(pVM, pPageCr3, GCPhysCr3, (void **)&HCPtrGuestCr3);
-    PGM_UNLOCK(pVM);
-
-    *pHCPtrGuestCr3 = HCPtrGuestCr3;
-    return rc;
-}
-
-
-# ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
-/**
- * Unmaps the guest CR3.
- *
- * @returns VBox status code.
- * @param   pVCpu   The cross context virtual CPU structure.
- */
-DECLINLINE(int) pgmGstUnmapCr3(PVMCPUCC pVCpu)
-{
-    uintptr_t const idxBth = pVCpu->pgm.s.idxBothModeData;
-    AssertReturn(idxBth < RT_ELEMENTS(g_aPgmBothModeData), VERR_PGM_MODE_IPE);
-    AssertReturn(g_aPgmBothModeData[idxBth].pfnUnmapCR3, VERR_PGM_MODE_IPE);
-    return g_aPgmBothModeData[idxBth].pfnUnmapCR3(pVCpu);
-}
-# endif
-
 #endif /* VBOX_VMM_TARGET_X86 */
 
@@ -2116,49 +2115,4 @@
 #endif
 }
-
-
-#ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
-/**
- * Performs a guest second-level address translation (SLAT).
- *
- * @returns VBox status code.
- * @retval  VINF_SUCCESS on success.
- * @retval  VERR_PAGE_TABLE_NOT_PRESENT on failure.  Check pWalk for details.
- * @retval  VERR_PGM_NOT_USED_IN_MODE if not paging isn't enabled. @a pWalk is
- *          not valid, except enmType is PGMPTWALKGSTTYPE_INVALID.
- *
- * @param   pVCpu               The cross context virtual CPU structure of the calling EMT.
- * @param   GCPhysNested        The nested-guest physical address being translated.
- * @param   fIsLinearAddrValid  Whether the linear address in @a GCPtrNested is the
- *                              cause for this translation.
- * @param   GCPtrNested         The nested-guest virtual address that initiated the
- *                              SLAT. If none, pass 0 (and not NIL_RTGCPTR).
- * @param   pWalk               Where to return the walk result. This is updated for
- *                              all error codes other than
- *                              VERR_PGM_NOT_USED_IN_MODE.
- * @param   pGstWalk            Where to store the second-level paging-mode specific
- *                              walk info.
- */
-static int pgmGstSlatWalk(PVMCPUCC pVCpu, RTGCPHYS GCPhysNested, bool fIsLinearAddrValid, RTGCPTR GCPtrNested,
-                          PPGMPTWALK pWalk, PPGMPTWALKGST pGstWalk)
-{
-    /* SLAT mode must be valid at this point as this should only be used -after- we have determined SLAT mode. */
-    Assert(   pVCpu->pgm.s.enmGuestSlatMode != PGMSLAT_DIRECT
-           && pVCpu->pgm.s.enmGuestSlatMode != PGMSLAT_INVALID);
-    AssertPtr(pWalk);
-    AssertPtr(pGstWalk);
-    switch (pVCpu->pgm.s.enmGuestSlatMode)
-    {
-        case PGMSLAT_EPT:
-            pGstWalk->enmType = PGMPTWALKGSTTYPE_EPT;
-            return PGM_GST_SLAT_NAME_EPT(Walk)(pVCpu, GCPhysNested, fIsLinearAddrValid, GCPtrNested, pWalk, &pGstWalk->u.Ept);
-
-        default:
-            AssertFailed();
-            pGstWalk->enmType = PGMPTWALKGSTTYPE_INVALID;
-            return VERR_PGM_NOT_USED_IN_MODE;
-    }
-}
-#endif /* VBOX_WITH_NESTED_HWVIRT_VMX_EPT */
 
 
@@ -2613,4 +2567,48 @@
 
 # ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
+
+/**
+ * Performs a guest second-level address translation (SLAT).
+ *
+ * @returns VBox status code.
+ * @retval  VINF_SUCCESS on success.
+ * @retval  VERR_PAGE_TABLE_NOT_PRESENT on failure.  Check pWalk for details.
+ * @retval  VERR_PGM_NOT_USED_IN_MODE if not paging isn't enabled. @a pWalk is
+ *          not valid, except enmType is PGMPTWALKGSTTYPE_INVALID.
+ *
+ * @param   pVCpu               The cross context virtual CPU structure of the calling EMT.
+ * @param   GCPhysNested        The nested-guest physical address being translated.
+ * @param   fIsLinearAddrValid  Whether the linear address in @a GCPtrNested is the
+ *                              cause for this translation.
+ * @param   GCPtrNested         The nested-guest virtual address that initiated the
+ *                              SLAT. If none, pass 0 (and not NIL_RTGCPTR).
+ * @param   pWalk               Where to return the walk result. This is updated for
+ *                              all error codes other than
+ *                              VERR_PGM_NOT_USED_IN_MODE.
+ * @param   pGstWalk            Where to store the second-level paging-mode specific
+ *                              walk info.
+ */
+static int pgmGstSlatWalk(PVMCPUCC pVCpu, RTGCPHYS GCPhysNested, bool fIsLinearAddrValid, RTGCPTR GCPtrNested,
+                          PPGMPTWALK pWalk, PPGMPTWALKGST pGstWalk)
+{
+    /* SLAT mode must be valid at this point as this should only be used -after- we have determined SLAT mode. */
+    Assert(   pVCpu->pgm.s.enmGuestSlatMode != PGMSLAT_DIRECT
+           && pVCpu->pgm.s.enmGuestSlatMode != PGMSLAT_INVALID);
+    AssertPtr(pWalk);
+    AssertPtr(pGstWalk);
+    switch (pVCpu->pgm.s.enmGuestSlatMode)
+    {
+        case PGMSLAT_EPT:
+            pGstWalk->enmType = PGMPTWALKGSTTYPE_EPT;
+            return PGM_GST_SLAT_NAME_EPT(Walk)(pVCpu, GCPhysNested, fIsLinearAddrValid, GCPtrNested, pWalk, &pGstWalk->u.Ept);
+
+        default:
+            AssertFailed();
+            pGstWalk->enmType = PGMPTWALKGSTTYPE_INVALID;
+            return VERR_PGM_NOT_USED_IN_MODE;
+    }
+}
+
+
 /**
  * Performs second-level address translation for the given CR3 and updates the
@@ -2655,6 +2653,6 @@
     return VINF_SUCCESS;
 }
-# endif
-
+
+# endif /* VBOX_WITH_NESTED_HWVIRT_VMX_EPT */
 
 /**
@@ -2990,4 +2988,85 @@
         PGM_INVL_VCPU_TLBS(pVCpu);
     return rcSync;
+}
+
+
+# ifdef VBOX_STRICT
+/**
+ * Asserts that everything related to the guest CR3 is correctly shadowed.
+ *
+ * This will call PGMAssertNoMappingConflicts() and PGMAssertHandlerAndFlagsInSync(),
+ * and assert the correctness of the guest CR3 mapping before asserting that the
+ * shadow page tables is in sync with the guest page tables.
+ *
+ * @returns Number of conflicts.
+ * @param   pVM     The cross context VM structure.
+ * @param   pVCpu   The cross context virtual CPU structure.
+ * @param   cr3     The current guest CR3 register value.
+ * @param   cr4     The current guest CR4 register value.
+ */
+VMMDECL(unsigned) PGMAssertCR3(PVMCC pVM, PVMCPUCC pVCpu, uint64_t cr3, uint64_t cr4)
+{
+    AssertReturn(pVM->enmTarget == VMTARGET_X86, 0);
+    STAM_PROFILE_START(&pVCpu->pgm.s.Stats.CTX_MID_Z(Stat,SyncCR3), a);
+
+    uintptr_t const idxBth = pVCpu->pgm.s.idxBothModeData;
+    AssertReturn(idxBth < RT_ELEMENTS(g_aPgmBothModeData), -VERR_PGM_MODE_IPE);
+    AssertReturn(g_aPgmBothModeData[idxBth].pfnAssertCR3, -VERR_PGM_MODE_IPE);
+
+    PGM_LOCK_VOID(pVM);
+    unsigned cErrors = g_aPgmBothModeData[idxBth].pfnAssertCR3(pVCpu, cr3, cr4, 0, ~(RTGCPTR)0);
+    PGM_UNLOCK(pVM);
+
+    STAM_PROFILE_STOP(&pVCpu->pgm.s.Stats.CTX_MID_Z(Stat,SyncCR3), a);
+    return cErrors;
+}
+# endif /* VBOX_STRICT */
+
+
+/**
+ * Called by CPUM or REM when CR0.WP changes to 1.
+ *
+ * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
+ * @thread  EMT
+ */
+VMMDECL(void) PGMCr0WpEnabled(PVMCPUCC pVCpu)
+{
+    /*
+     * Netware WP0+RO+US hack cleanup when WP0 -> WP1.
+     *
+     * Use the counter to judge whether there might be pool pages with active
+     * hacks in them.  If there are, we will be running the risk of messing up
+     * the guest by allowing it to write to read-only pages.  Thus, we have to
+     * clear the page pool ASAP if there is the slightest chance.
+     */
+    if (pVCpu->pgm.s.cNetwareWp0Hacks > 0)
+    {
+        Assert(pVCpu->CTX_SUFF(pVM)->cCpus == 1);
+
+        Log(("PGMCr0WpEnabled: %llu WP0 hacks active - clearing page pool\n", pVCpu->pgm.s.cNetwareWp0Hacks));
+        pVCpu->pgm.s.cNetwareWp0Hacks = 0;
+        pVCpu->pgm.s.fSyncFlags |= PGM_SYNC_CLEAR_PGM_POOL;
+        VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
+    }
+}
+
+
+/**
+ * Updates PGM's copy of the guest's EPT pointer.
+ *
+ * @param   pVCpu       The cross context virtual CPU structure.
+ * @param   uEptPtr     The EPT pointer.
+ *
+ * @remarks This can be called as part of VM-entry so we might be in the midst of
+ *          switching to VMX non-root mode.
+ */
+VMM_INT_DECL(void) PGMSetGuestEptPtr(PVMCPUCC pVCpu, uint64_t uEptPtr)
+{
+    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
+    PGM_LOCK_VOID(pVM);
+    pVCpu->pgm.s.uEptPtr = uEptPtr;
+    pVCpu->pgm.s.pGstEptPml4R3 = 0;
+    pVCpu->pgm.s.pGstEptPml4R0 = 0;
+    PGM_UNLOCK(pVM);
 }
 
@@ -3700,104 +3779,4 @@
 
 
-#ifdef VBOX_VMM_TARGET_X86
-/**
- * Called by CPUM or REM when CR0.WP changes to 1.
- *
- * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
- * @thread  EMT
- */
-VMMDECL(void) PGMCr0WpEnabled(PVMCPUCC pVCpu)
-{
-    /*
-     * Netware WP0+RO+US hack cleanup when WP0 -> WP1.
-     *
-     * Use the counter to judge whether there might be pool pages with active
-     * hacks in them.  If there are, we will be running the risk of messing up
-     * the guest by allowing it to write to read-only pages.  Thus, we have to
-     * clear the page pool ASAP if there is the slightest chance.
-     */
-    if (pVCpu->pgm.s.cNetwareWp0Hacks > 0)
-    {
-        Assert(pVCpu->CTX_SUFF(pVM)->cCpus == 1);
-
-        Log(("PGMCr0WpEnabled: %llu WP0 hacks active - clearing page pool\n", pVCpu->pgm.s.cNetwareWp0Hacks));
-        pVCpu->pgm.s.cNetwareWp0Hacks = 0;
-        pVCpu->pgm.s.fSyncFlags |= PGM_SYNC_CLEAR_PGM_POOL;
-        VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
-    }
-}
-#endif /* VBOX_VMM_TARGET_X86 */
-
-
-/**
- * Gets the current guest paging mode.
- *
- * If you just need the CPU mode (real/protected/long), use CPUMGetGuestMode().
- *
- * @returns The current paging mode.
- * @param   pVCpu       The cross context virtual CPU structure.
- */
-VMMDECL(PGMMODE) PGMGetGuestMode(PVMCPU pVCpu)
-{
-    return pVCpu->pgm.s.enmGuestMode;
-}
-
-
-/**
- * Gets the current shadow paging mode.
- *
- * @returns The current paging mode.
- * @param   pVCpu       The cross context virtual CPU structure.
- */
-VMMDECL(PGMMODE) PGMGetShadowMode(PVMCPU pVCpu)
-{
-#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
-    return pVCpu->pgm.s.enmShadowMode;
-#else
-    RT_NOREF(pVCpu);
-    return PGMMODE_NONE;
-#endif
-}
-
-
-#ifdef VBOX_VMM_TARGET_X86
-/**
- * Gets the current host paging mode.
- *
- * @returns The current paging mode.
- * @param   pVM             The cross context VM structure.
- */
-VMMDECL(PGMMODE) PGMGetHostMode(PVM pVM)
-{
-    switch (pVM->pgm.s.enmHostMode)
-    {
-        case SUPPAGINGMODE_32_BIT:
-        case SUPPAGINGMODE_32_BIT_GLOBAL:
-            return PGMMODE_32_BIT;
-
-        case SUPPAGINGMODE_PAE:
-        case SUPPAGINGMODE_PAE_GLOBAL:
-            return PGMMODE_PAE;
-
-        case SUPPAGINGMODE_PAE_NX:
-        case SUPPAGINGMODE_PAE_GLOBAL_NX:
-            return PGMMODE_PAE_NX;
-
-        case SUPPAGINGMODE_AMD64:
-        case SUPPAGINGMODE_AMD64_GLOBAL:
-            return PGMMODE_AMD64;
-
-        case SUPPAGINGMODE_AMD64_NX:
-        case SUPPAGINGMODE_AMD64_GLOBAL_NX:
-            return PGMMODE_AMD64_NX;
-
-        default: AssertMsgFailed(("enmHostMode=%d\n", pVM->pgm.s.enmHostMode)); break;
-    }
-
-    return PGMMODE_INVALID;
-}
-#endif /* VBOX_VMM_TARGET_X86 */
-
-
 /**
  * Get mode name.
@@ -3824,10 +3803,84 @@
         case PGMMODE_VMSA_V8_32:    return "VMSAv8-32";
         case PGMMODE_VMSA_V8_64:    return "VMSAv8-64";
-        default:                    return "unknown mode value";
-    }
-}
-
-
-#ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
+
+        case PGMMODE_INVALID:
+        case PGMMODE_MAX:
+        case PGMMODE_32BIT_HACK:
+            break;
+    }
+    return "unknown mode value";
+}
+
+
+/**
+ * Gets the current guest paging mode.
+ *
+ * If you just need the CPU mode (real/protected/long), use CPUMGetGuestMode().
+ *
+ * @returns The current paging mode.
+ * @param   pVCpu       The cross context virtual CPU structure.
+ */
+VMMDECL(PGMMODE) PGMGetGuestMode(PVMCPU pVCpu)
+{
+    return pVCpu->pgm.s.enmGuestMode;
+}
+
+
+/**
+ * Gets the current shadow paging mode.
+ *
+ * @returns The current paging mode.
+ * @param   pVCpu       The cross context virtual CPU structure.
+ */
+VMMDECL(PGMMODE) PGMGetShadowMode(PVMCPU pVCpu)
+{
+#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
+    return pVCpu->pgm.s.enmShadowMode;
+#else
+    RT_NOREF(pVCpu);
+    return PGMMODE_NONE;
+#endif
+}
+
+#ifdef VBOX_VMM_TARGET_X86
+
+/**
+ * Gets the current host paging mode.
+ *
+ * @returns The current paging mode.
+ * @param   pVM             The cross context VM structure.
+ */
+VMMDECL(PGMMODE) PGMGetHostMode(PVM pVM)
+{
+    switch (pVM->pgm.s.enmHostMode)
+    {
+        case SUPPAGINGMODE_32_BIT:
+        case SUPPAGINGMODE_32_BIT_GLOBAL:
+            return PGMMODE_32_BIT;
+
+        case SUPPAGINGMODE_PAE:
+        case SUPPAGINGMODE_PAE_GLOBAL:
+            return PGMMODE_PAE;
+
+        case SUPPAGINGMODE_PAE_NX:
+        case SUPPAGINGMODE_PAE_GLOBAL_NX:
+            return PGMMODE_PAE_NX;
+
+        case SUPPAGINGMODE_AMD64:
+        case SUPPAGINGMODE_AMD64_GLOBAL:
+            return PGMMODE_AMD64;
+
+        case SUPPAGINGMODE_AMD64_NX:
+        case SUPPAGINGMODE_AMD64_GLOBAL_NX:
+            return PGMMODE_AMD64_NX;
+
+        default: AssertMsgFailed(("enmHostMode=%d\n", pVM->pgm.s.enmHostMode)); break;
+    }
+
+    return PGMMODE_INVALID;
+}
+
+
+# ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
 /**
  * Gets the SLAT mode name.
@@ -3848,8 +3901,7 @@
     }
 }
-#endif  /* VBOX_WITH_NESTED_HWVIRT_VMX_EPT */
-
-
-#ifdef VBOX_VMM_TARGET_X86
+# endif  /* VBOX_WITH_NESTED_HWVIRT_VMX_EPT */
+
+
 /**
  * Notification from CPUM that the EFER.NXE bit has changed.
@@ -3908,6 +3960,6 @@
     }
 }
+
 #endif /* VBOX_VMM_TARGET_X86 */
-
 
 /**
@@ -4164,59 +4216,4 @@
 }
 
-#ifdef VBOX_VMM_TARGET_X86
-
-# ifdef VBOX_STRICT
-/**
- * Asserts that everything related to the guest CR3 is correctly shadowed.
- *
- * This will call PGMAssertNoMappingConflicts() and PGMAssertHandlerAndFlagsInSync(),
- * and assert the correctness of the guest CR3 mapping before asserting that the
- * shadow page tables is in sync with the guest page tables.
- *
- * @returns Number of conflicts.
- * @param   pVM     The cross context VM structure.
- * @param   pVCpu   The cross context virtual CPU structure.
- * @param   cr3     The current guest CR3 register value.
- * @param   cr4     The current guest CR4 register value.
- */
-VMMDECL(unsigned) PGMAssertCR3(PVMCC pVM, PVMCPUCC pVCpu, uint64_t cr3, uint64_t cr4)
-{
-    AssertReturn(pVM->enmTarget == VMTARGET_X86, 0);
-    STAM_PROFILE_START(&pVCpu->pgm.s.Stats.CTX_MID_Z(Stat,SyncCR3), a);
-
-    uintptr_t const idxBth = pVCpu->pgm.s.idxBothModeData;
-    AssertReturn(idxBth < RT_ELEMENTS(g_aPgmBothModeData), -VERR_PGM_MODE_IPE);
-    AssertReturn(g_aPgmBothModeData[idxBth].pfnAssertCR3, -VERR_PGM_MODE_IPE);
-
-    PGM_LOCK_VOID(pVM);
-    unsigned cErrors = g_aPgmBothModeData[idxBth].pfnAssertCR3(pVCpu, cr3, cr4, 0, ~(RTGCPTR)0);
-    PGM_UNLOCK(pVM);
-
-    STAM_PROFILE_STOP(&pVCpu->pgm.s.Stats.CTX_MID_Z(Stat,SyncCR3), a);
-    return cErrors;
-}
-# endif /* VBOX_STRICT */
-
-
-/**
- * Updates PGM's copy of the guest's EPT pointer.
- *
- * @param   pVCpu       The cross context virtual CPU structure.
- * @param   uEptPtr     The EPT pointer.
- *
- * @remarks This can be called as part of VM-entry so we might be in the midst of
- *          switching to VMX non-root mode.
- */
-VMM_INT_DECL(void) PGMSetGuestEptPtr(PVMCPUCC pVCpu, uint64_t uEptPtr)
-{
-    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
-    PGM_LOCK_VOID(pVM);
-    pVCpu->pgm.s.uEptPtr = uEptPtr;
-    pVCpu->pgm.s.pGstEptPml4R3 = 0;
-    pVCpu->pgm.s.pGstEptPml4R0 = 0;
-    PGM_UNLOCK(pVM);
-}
-
-#endif /* VBOX_VMM_TARGET_X86 */
 #ifdef PGM_WITH_PAGE_ZEROING_DETECTION
 # ifndef VBOX_VMM_TARGET_X86
