Changeset 108186 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Feb 12, 2025 3:35:15 PM (3 months ago)
- svn:sync-xref-src-repo-rev:
- 167502
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r106061 r108186 981 981 #endif 982 982 983 VBOXSTRICTRC rc = IEMExecOneBypass Ex(pVCpu, NULL /*pcbWritten*/);983 VBOXSTRICTRC rc = IEMExecOneBypass(pVCpu); 984 984 if (RT_UNLIKELY( rc == VERR_IEM_ASPECT_NOT_IMPLEMENTED 985 985 || rc == VERR_IEM_INSTR_NOT_IMPLEMENTED)) -
trunk/src/VBox/VMM/VMMAll/IEMAll-armv8.cpp
r106061 r108186 49 49 *********************************************************************************************************************************/ 50 50 51 VMMDECL(VBOXSTRICTRC) IEMExecForExits(PVMCPUCC pVCpu, uint32_t fWillExit, uint32_t cMinInstructions, uint32_t cMaxInstructions, 52 uint32_t cMaxInstructionsWithoutExits, PIEMEXECFOREXITSTATS pStats) 51 VMM_INT_DECL(VBOXSTRICTRC) 52 IEMExecForExits(PVMCPUCC pVCpu, uint32_t fWillExit, uint32_t cMinInstructions, uint32_t cMaxInstructions, 53 uint32_t cMaxInstructionsWithoutExits, PIEMEXECFOREXITSTATS pStats) 53 54 { 54 55 AssertReleaseFailed(); … … 59 60 60 61 61 VMM DECL(VBOXSTRICTRC) IEMExecLots(PVMCPUCC pVCpu, uint32_t cMaxInstructions, uint32_t cPollRate, uint32_t *pcInstructions)62 VMM_INT_DECL(VBOXSTRICTRC) IEMExecLots(PVMCPUCC pVCpu, uint32_t cMaxInstructions, uint32_t cPollRate, uint32_t *pcInstructions) 62 63 { 63 64 AssertReleaseFailed(); … … 67 68 68 69 69 VMM DECL(VBOXSTRICTRC) IEMExecOne(PVMCPUCC pVCpu)70 VMM_INT_DECL(VBOXSTRICTRC) IEMExecOne(PVMCPUCC pVCpu) 70 71 { 71 72 AssertReleaseFailed(); … … 75 76 76 77 77 VMM DECL(VBOXSTRICTRC) IEMExecOneWithPrefetchedByPC(PVMCPUCC pVCpu, uint64_t OpcodeBytesPC,78 const void *pvOpcodeBytes, size_t cbOpcodeBytes)78 VMM_INT_DECL(VBOXSTRICTRC) IEMExecOneWithPrefetchedByPC(PVMCPUCC pVCpu, uint64_t OpcodeBytesPC, 79 const void *pvOpcodeBytes, size_t cbOpcodeBytes) 79 80 { 80 81 AssertReleaseFailed(); … … 84 85 85 86 86 VMM DECL(VBOXSTRICTRC) IEMExecOneBypassEx(PVMCPUCC pVCpu, uint32_t *pcbWritten)87 VMM_INT_DECL(VBOXSTRICTRC) IEMExecOneBypass(PVMCPUCC pVCpu) 87 88 { 88 89 AssertReleaseFailed(); 89 RT_NOREF(pVCpu , pcbWritten);90 RT_NOREF(pVCpu); 90 91 return VERR_NOT_IMPLEMENTED; 91 92 } 92 93 93 94 94 VMM DECL(VBOXSTRICTRC) IEMExecOneBypassWithPrefetchedByPC(PVMCPUCC pVCpu, uint64_t OpcodeBytesPC,95 const void *pvOpcodeBytes, size_t cbOpcodeBytes)95 VMM_INT_DECL(VBOXSTRICTRC) IEMExecOneBypassWithPrefetchedByPC(PVMCPUCC pVCpu, uint64_t OpcodeBytesPC, 96 const void *pvOpcodeBytes, size_t cbOpcodeBytes) 96 97 { 97 98 AssertReleaseFailed(); … … 101 102 102 103 103 VMM DECL(VBOXSTRICTRC) IEMInjectTrpmEvent(PVMCPUCC pVCpu)104 VMM_INT_DECL(VBOXSTRICTRC) IEMInjectTrpmEvent(PVMCPUCC pVCpu) 104 105 { 105 106 AssertReleaseFailed(); -
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r107113 r108186 6121 6121 #undef LOG_GROUP 6122 6122 #define LOG_GROUP LOG_GROUP_IEM_MEM 6123 6124 /**6125 * Updates the IEMCPU::cbWritten counter if applicable.6126 *6127 * @param pVCpu The cross context virtual CPU structure of the calling thread.6128 * @param fAccess The access being accounted for.6129 * @param cbMem The access size.6130 */6131 DECL_FORCE_INLINE(void) iemMemUpdateWrittenCounter(PVMCPUCC pVCpu, uint32_t fAccess, size_t cbMem)6132 {6133 if ( (fAccess & (IEM_ACCESS_WHAT_MASK | IEM_ACCESS_TYPE_WRITE)) == (IEM_ACCESS_WHAT_STACK | IEM_ACCESS_TYPE_WRITE)6134 || (fAccess & (IEM_ACCESS_WHAT_MASK | IEM_ACCESS_TYPE_WRITE)) == (IEM_ACCESS_WHAT_DATA | IEM_ACCESS_TYPE_WRITE) )6135 pVCpu->iem.s.cbWritten += (uint32_t)cbMem;6136 }6137 6138 6123 6139 6124 /** … … 6750 6735 pVCpu->iem.s.cActiveMappings++; 6751 6736 6752 iemMemUpdateWrittenCounter(pVCpu, fAccess, cbMem);6753 6737 *ppvMem = pbBuf; 6754 6738 *pbUnmapInfo = iMemMap | 0x08 | ((fAccess & IEM_ACCESS_TYPE_MASK) << 4); … … 6839 6823 pVCpu->iem.s.cActiveMappings++; 6840 6824 6841 iemMemUpdateWrittenCounter(pVCpu, fAccess, cbMem);6842 6825 *ppvMem = pbBuf; 6843 6826 *pbUnmapInfo = iMemMap | 0x08 | ((fAccess & IEM_ACCESS_TYPE_MASK) << 4); … … 7214 7197 pVCpu->iem.s.cActiveMappings += 1; 7215 7198 7216 iemMemUpdateWrittenCounter(pVCpu, fAccess, cbMem);7217 7199 *ppvMem = pvMem; 7218 7200 *pbUnmapInfo = iMemMap | 0x08 | ((fAccess & IEM_ACCESS_TYPE_MASK) << 4); … … 7710 7692 pVCpu->iem.s.iNextMapping = iMemMap + 1; 7711 7693 pVCpu->iem.s.cActiveMappings++; 7712 7713 iemMemUpdateWrittenCounter(pVCpu, fAccess, cbMem);7714 7694 7715 7695 *pbUnmapInfo = iMemMap | 0x08 | ((fAccess & IEM_ACCESS_TYPE_MASK) << 4); … … 9709 9689 9710 9690 /** 9711 * The actual code execution bits of IEMExecOne, IEMExecOne Ex, and9712 * IEMExecOne WithPrefetchedByPC.9691 * The actual code execution bits of IEMExecOne, IEMExecOneWithPrefetchedByPC, 9692 * IEMExecOneBypass and friends. 9713 9693 * 9714 9694 * Similar code is found in IEMExecLots. … … 9846 9826 * @param pVCpu The cross context virtual CPU structure of the calling EMT. 9847 9827 */ 9848 VMM DECL(VBOXSTRICTRC) IEMExecOne(PVMCPUCC pVCpu)9828 VMM_INT_DECL(VBOXSTRICTRC) IEMExecOne(PVMCPUCC pVCpu) 9849 9829 { 9850 9830 AssertCompile(sizeof(pVCpu->iem.s) <= sizeof(pVCpu->iem.padding)); /* (tstVMStruct can't do it's job w/o instruction stats) */ … … 9869 9849 9870 9850 9871 VMMDECL(VBOXSTRICTRC) IEMExecOneEx(PVMCPUCC pVCpu, uint32_t *pcbWritten) 9872 { 9873 uint32_t const cbOldWritten = pVCpu->iem.s.cbWritten; 9874 VBOXSTRICTRC rcStrict = iemInitDecoderAndPrefetchOpcodes(pVCpu, 0 /*fExecOpts*/); 9875 if (rcStrict == VINF_SUCCESS) 9876 { 9877 rcStrict = iemExecOneInner(pVCpu, true, "IEMExecOneEx"); 9878 if (pcbWritten) 9879 *pcbWritten = pVCpu->iem.s.cbWritten - cbOldWritten; 9880 } 9881 else if (pVCpu->iem.s.cActiveMappings > 0) 9882 iemMemRollback(pVCpu); 9883 9884 return rcStrict; 9885 } 9886 9887 9888 VMMDECL(VBOXSTRICTRC) IEMExecOneWithPrefetchedByPC(PVMCPUCC pVCpu, uint64_t OpcodeBytesPC, 9889 const void *pvOpcodeBytes, size_t cbOpcodeBytes) 9851 VMM_INT_DECL(VBOXSTRICTRC) IEMExecOneWithPrefetchedByPC(PVMCPUCC pVCpu, uint64_t OpcodeBytesPC, 9852 const void *pvOpcodeBytes, size_t cbOpcodeBytes) 9890 9853 { 9891 9854 VBOXSTRICTRC rcStrict; … … 9918 9881 9919 9882 9920 VMMDECL(VBOXSTRICTRC) IEMExecOneBypassEx(PVMCPUCC pVCpu, uint32_t *pcbWritten) 9921 { 9922 uint32_t const cbOldWritten = pVCpu->iem.s.cbWritten; 9883 VMM_INT_DECL(VBOXSTRICTRC) IEMExecOneBypass(PVMCPUCC pVCpu) 9884 { 9923 9885 VBOXSTRICTRC rcStrict = iemInitDecoderAndPrefetchOpcodes(pVCpu, IEM_F_BYPASS_HANDLERS); 9924 9886 if (rcStrict == VINF_SUCCESS) 9925 { 9926 rcStrict = iemExecOneInner(pVCpu, false, "IEMExecOneBypassEx"); 9927 if (pcbWritten) 9928 *pcbWritten = pVCpu->iem.s.cbWritten - cbOldWritten; 9929 } 9887 rcStrict = iemExecOneInner(pVCpu, false, "IEMExecOneBypass"); 9930 9888 else if (pVCpu->iem.s.cActiveMappings > 0) 9931 9889 iemMemRollback(pVCpu); … … 9935 9893 9936 9894 9937 VMM DECL(VBOXSTRICTRC) IEMExecOneBypassWithPrefetchedByPC(PVMCPUCC pVCpu, uint64_t OpcodeBytesPC,9938 const void *pvOpcodeBytes, size_t cbOpcodeBytes)9895 VMM_INT_DECL(VBOXSTRICTRC) IEMExecOneBypassWithPrefetchedByPC(PVMCPUCC pVCpu, uint64_t OpcodeBytesPC, 9896 const void *pvOpcodeBytes, size_t cbOpcodeBytes) 9939 9897 { 9940 9898 VBOXSTRICTRC rcStrict; … … 9977 9935 * @param pVCpu The cross context virtual CPU structure of the calling EMT. 9978 9936 */ 9979 VMM DECL(VBOXSTRICTRC) IEMExecOneIgnoreLock(PVMCPUCC pVCpu)9937 VMM_INT_DECL(VBOXSTRICTRC) IEMExecOneIgnoreLock(PVMCPUCC pVCpu) 9980 9938 { 9981 9939 /* … … 10052 10010 10053 10011 10054 VMM DECL(VBOXSTRICTRC) IEMExecLots(PVMCPUCC pVCpu, uint32_t cMaxInstructions, uint32_t cPollRate, uint32_t *pcInstructions)10012 VMM_INT_DECL(VBOXSTRICTRC) IEMExecLots(PVMCPUCC pVCpu, uint32_t cMaxInstructions, uint32_t cPollRate, uint32_t *pcInstructions) 10055 10013 { 10056 10014 uint32_t const cInstructionsAtStart = pVCpu->iem.s.cInstructions; … … 10223 10181 * @param pStats Where to return statistics. 10224 10182 */ 10225 VMMDECL(VBOXSTRICTRC) IEMExecForExits(PVMCPUCC pVCpu, uint32_t fWillExit, uint32_t cMinInstructions, uint32_t cMaxInstructions, 10226 uint32_t cMaxInstructionsWithoutExits, PIEMEXECFOREXITSTATS pStats) 10183 VMM_INT_DECL(VBOXSTRICTRC) 10184 IEMExecForExits(PVMCPUCC pVCpu, uint32_t fWillExit, uint32_t cMinInstructions, uint32_t cMaxInstructions, 10185 uint32_t cMaxInstructionsWithoutExits, PIEMEXECFOREXITSTATS pStats) 10227 10186 { 10228 10187 NOREF(fWillExit); /** @todo define flexible exit crits */ … … 10470 10429 * @param pVCpu The cross context virtual CPU structure. 10471 10430 */ 10472 VMM DECL(VBOXSTRICTRC) IEMInjectTrpmEvent(PVMCPUCC pVCpu)10431 VMM_INT_DECL(VBOXSTRICTRC) IEMInjectTrpmEvent(PVMCPUCC pVCpu) 10473 10432 { 10474 10433 #ifndef IEM_IMPLEMENTS_TASKSWITCH -
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r107854 r108186 9117 9117 else 9118 9118 { 9119 /* We use IEMExecOneBypass Ex() here as it suppresses attempt to continue emulating any9119 /* We use IEMExecOneBypass() here as it suppresses attempt to continue emulating any 9120 9120 instruction(s) when interrupt inhibition is set as part of emulating the VMRUN 9121 9121 instruction itself, see @bugref{7243#c126} */ 9122 rcStrict = IEMExecOneBypass Ex(pVCpu, NULL /* pcbWritten */);9122 rcStrict = IEMExecOneBypass(pVCpu); 9123 9123 } 9124 9124 STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatExitVmentry, z); -
trunk/src/VBox/VMM/VMMR3/IEMR3.cpp
r108178 r108186 116 116 * @param pVM The cross context VM structure. 117 117 */ 118 VMMR3 DECL(int)IEMR3Init(PVM pVM)118 VMMR3_INT_DECL(int) IEMR3Init(PVM pVM) 119 119 { 120 120 /* … … 375 375 STAMR3RegisterF(pVM, &pVCpu->iem.s.cRetErrStatuses, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT, 376 376 "Error statuses returned", "/IEM/CPU%u/cRetErrStatuses", idCpu); 377 STAMR3RegisterF(pVM, &pVCpu->iem.s.cbWritten, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES,378 "Approx bytes written", "/IEM/CPU%u/cbWritten", idCpu);379 377 STAMR3RegisterF(pVM, &pVCpu->iem.s.cPendingCommit, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, 380 378 "Times RC/R0 had to postpone instruction committing to ring-3", "/IEM/CPU%u/cPendingCommit", idCpu); … … 1103 1101 1104 1102 1105 VMMR3 DECL(int)IEMR3Term(PVM pVM)1103 VMMR3_INT_DECL(int) IEMR3Term(PVM pVM) 1106 1104 { 1107 1105 NOREF(pVM); … … 1122 1120 1123 1121 1124 VMMR3 DECL(void)IEMR3Relocate(PVM pVM)1122 VMMR3_INT_DECL(void) IEMR3Relocate(PVM pVM) 1125 1123 { 1126 1124 RT_NOREF(pVM); … … 1134 1132 * @param uExit The IEM exit to name. 1135 1133 */ 1136 VMMR3 DECL(const char *) IEMR3GetExitName(uint32_t uExit)1134 VMMR3_INT_DECL(const char *) IEMR3GetExitName(uint32_t uExit) 1137 1135 { 1138 1136 static const char * const s_apszNames[] = -
trunk/src/VBox/VMM/include/IEMInternal-armv8.h
r106061 r108186 526 526 /** The number of potential exits. */ 527 527 uint32_t cPotentialExits; 528 /** The number of bytes data or stack written (mostly for IEMExecOneEx).529 * This may contain uncommitted writes. */530 uint32_t cbWritten;531 528 /** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */ 532 529 uint32_t cRetInstrNotImplemented; … … 563 560 uint8_t aidxTargetCpuEflFlavour[2]; 564 561 565 uint8_t bPadding ;562 uint8_t bPadding[5]; 566 563 567 564 /** The CPU vendor. */ -
trunk/src/VBox/VMM/include/IEMInternal.h
r108178 r108186 1938 1938 /** The number of potential exits. */ 1939 1939 uint32_t cPotentialExits; 1940 /** The number of bytes data or stack written (mostly for IEMExecOneEx).1941 * This may contain uncommitted writes. */1942 uint32_t cbWritten;1943 1940 /** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */ 1944 1941 uint32_t cRetInstrNotImplemented; … … 1986 1983 uint8_t cLogRelWrMsr; 1987 1984 /** Alignment padding. */ 1988 uint8_t abAlignment9[ 46];1985 uint8_t abAlignment9[50]; 1989 1986 1990 1987
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