Changeset 10822 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Jul 23, 2008 9:02:58 AM (17 years ago)
- svn:sync-xref-src-repo-rev:
- 33607
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/PGM.cpp
r10507 r10822 983 983 #undef PGM_SHW_NAME_R0_STR 984 984 985 986 #ifdef PGM_WITH_EPT 987 /* 988 * Shadow - EPT 989 */ 990 #define PGM_SHW_TYPE PGM_TYPE_EPT 991 #define PGM_SHW_NAME(name) PGM_SHW_NAME_EPT(name) 992 #define PGM_SHW_NAME_GC_STR(name) PGM_SHW_NAME_GC_EPT_STR(name) 993 #define PGM_SHW_NAME_R0_STR(name) PGM_SHW_NAME_R0_EPT_STR(name) 994 #include "PGMShw.h" 995 996 /* Guest - real mode */ 997 #define PGM_GST_TYPE PGM_TYPE_REAL 998 #define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 999 #define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_REAL_STR(name) 1000 #define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_REAL_STR(name) 1001 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_REAL(name) 1002 #define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_EPT_REAL_STR(name) 1003 #define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_EPT_REAL_STR(name) 1004 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS 1005 #include "PGMBth.h" 1006 #undef BTH_PGMPOOLKIND_PT_FOR_PT 1007 #undef PGM_BTH_NAME 1008 #undef PGM_BTH_NAME_GC_STR 1009 #undef PGM_BTH_NAME_R0_STR 1010 #undef PGM_GST_TYPE 1011 #undef PGM_GST_NAME 1012 #undef PGM_GST_NAME_GC_STR 1013 #undef PGM_GST_NAME_R0_STR 1014 1015 /* Guest - protected mode */ 1016 #define PGM_GST_TYPE PGM_TYPE_PROT 1017 #define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 1018 #define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_PROT_STR(name) 1019 #define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_PROT_STR(name) 1020 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_PROT(name) 1021 #define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_EPT_PROT_STR(name) 1022 #define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_EPT_PROT_STR(name) 1023 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS 1024 #include "PGMBth.h" 1025 #undef BTH_PGMPOOLKIND_PT_FOR_PT 1026 #undef PGM_BTH_NAME 1027 #undef PGM_BTH_NAME_GC_STR 1028 #undef PGM_BTH_NAME_R0_STR 1029 #undef PGM_GST_TYPE 1030 #undef PGM_GST_NAME 1031 #undef PGM_GST_NAME_GC_STR 1032 #undef PGM_GST_NAME_R0_STR 1033 1034 /* Guest - 32-bit mode */ 1035 #define PGM_GST_TYPE PGM_TYPE_32BIT 1036 #define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 1037 #define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_32BIT_STR(name) 1038 #define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_32BIT_STR(name) 1039 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_32BIT(name) 1040 #define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_EPT_32BIT_STR(name) 1041 #define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_EPT_32BIT_STR(name) 1042 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_32BIT_PT 1043 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB 1044 #include "PGMBth.h" 1045 #undef BTH_PGMPOOLKIND_PT_FOR_BIG 1046 #undef BTH_PGMPOOLKIND_PT_FOR_PT 1047 #undef PGM_BTH_NAME 1048 #undef PGM_BTH_NAME_GC_STR 1049 #undef PGM_BTH_NAME_R0_STR 1050 #undef PGM_GST_TYPE 1051 #undef PGM_GST_NAME 1052 #undef PGM_GST_NAME_GC_STR 1053 #undef PGM_GST_NAME_R0_STR 1054 1055 /* Guest - PAE mode */ 1056 #define PGM_GST_TYPE PGM_TYPE_PAE 1057 #define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 1058 #define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_PAE_STR(name) 1059 #define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_PAE_STR(name) 1060 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_PAE(name) 1061 #define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_EPT_PAE_STR(name) 1062 #define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_EPT_PAE_STR(name) 1063 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT 1064 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 1065 #include "PGMBth.h" 1066 #undef BTH_PGMPOOLKIND_PT_FOR_BIG 1067 #undef BTH_PGMPOOLKIND_PT_FOR_PT 1068 #undef PGM_BTH_NAME 1069 #undef PGM_BTH_NAME_GC_STR 1070 #undef PGM_BTH_NAME_R0_STR 1071 #undef PGM_GST_TYPE 1072 #undef PGM_GST_NAME 1073 #undef PGM_GST_NAME_GC_STR 1074 #undef PGM_GST_NAME_R0_STR 1075 1076 /* Guest - AMD64 mode */ 1077 #define PGM_GST_TYPE PGM_TYPE_AMD64 1078 #define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 1079 #define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_AMD64_STR(name) 1080 #define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_AMD64_STR(name) 1081 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_AMD64(name) 1082 #define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_EPT_AMD64_STR(name) 1083 #define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_EPT_AMD64_STR(name) 1084 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT 1085 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 1086 #include "PGMBth.h" 1087 #undef BTH_PGMPOOLKIND_PT_FOR_BIG 1088 #undef BTH_PGMPOOLKIND_PT_FOR_PT 1089 #undef PGM_BTH_NAME 1090 #undef PGM_BTH_NAME_GC_STR 1091 #undef PGM_BTH_NAME_R0_STR 1092 #undef PGM_GST_TYPE 1093 #undef PGM_GST_NAME 1094 #undef PGM_GST_NAME_GC_STR 1095 #undef PGM_GST_NAME_R0_STR 1096 1097 #undef PGM_SHW_TYPE 1098 #undef PGM_SHW_NAME 1099 #undef PGM_SHW_NAME_GC_STR 1100 #undef PGM_SHW_NAME_R0_STR 1101 #endif /* PGM_WITH_EPT */ 985 1102 986 1103 /** … … 1346 1463 LogFlow(("pgmR3InitPaging: returns successfully\n")); 1347 1464 #if HC_ARCH_BITS == 64 1348 LogRel(("Debug: HCPhys32BitPD=%VHp aHCPhysPaePDs={%VHp,%VHp,%VHp,%VHp} HCPhysPaePDPT=%VHp HCPhysPaePML4=%VHp\n",1349 pVM->pgm.s.HCPhys32BitPD, pVM->pgm.s.aHCPhysPaePDs[0], pVM->pgm.s.aHCPhysPaePDs[1], pVM->pgm.s.aHCPhysPaePDs[2], pVM->pgm.s.aHCPhysPaePDs[3],1350 pVM->pgm.s.HCPhysPaePDPT, pVM->pgm.s.HCPhysPaePML4));1351 LogRel(("Debug: HCPhysInterPD=%VHp HCPhysInterPaePDPT=%VHp HCPhysInterPaePML4=%VHp\n",1352 pVM->pgm.s.HCPhysInterPD, pVM->pgm.s.HCPhysInterPaePDPT, pVM->pgm.s.HCPhysInterPaePML4));1353 LogRel(("Debug: apInterPTs={%VHp,%VHp} apInterPaePTs={%VHp,%VHp} apInterPaePDs={%VHp,%VHp,%VHp,%VHp} pInterPaePDPT64=%VHp\n",1354 MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[1]),1355 MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[1]),1356 MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[1]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[2]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[3]),1357 MMPage2Phys(pVM, pVM->pgm.s.pInterPaePDPT64)));1465 LogRel(("Debug: HCPhys32BitPD=%VHp aHCPhysPaePDs={%VHp,%VHp,%VHp,%VHp} HCPhysPaePDPT=%VHp HCPhysPaePML4=%VHp\n", 1466 pVM->pgm.s.HCPhys32BitPD, pVM->pgm.s.aHCPhysPaePDs[0], pVM->pgm.s.aHCPhysPaePDs[1], pVM->pgm.s.aHCPhysPaePDs[2], pVM->pgm.s.aHCPhysPaePDs[3], 1467 pVM->pgm.s.HCPhysPaePDPT, pVM->pgm.s.HCPhysPaePML4)); 1468 LogRel(("Debug: HCPhysInterPD=%VHp HCPhysInterPaePDPT=%VHp HCPhysInterPaePML4=%VHp\n", 1469 pVM->pgm.s.HCPhysInterPD, pVM->pgm.s.HCPhysInterPaePDPT, pVM->pgm.s.HCPhysInterPaePML4)); 1470 LogRel(("Debug: apInterPTs={%VHp,%VHp} apInterPaePTs={%VHp,%VHp} apInterPaePDs={%VHp,%VHp,%VHp,%VHp} pInterPaePDPT64=%VHp\n", 1471 MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[1]), 1472 MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[1]), 1473 MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[1]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[2]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[3]), 1474 MMPage2Phys(pVM, pVM->pgm.s.pInterPaePDPT64))); 1358 1475 #endif 1359 1476 … … 2478 2595 case PGMMODE_AMD64_NX: return PGM_TYPE_AMD64; 2479 2596 case PGMMODE_NESTED: return PGM_TYPE_NESTED; 2597 case PGMMODE_EPT: return PGM_TYPE_EPT; 2480 2598 default: 2481 2599 AssertFatalMsgFailed(("pgmMode=%d\n", pgmMode)); … … 2674 2792 break; 2675 2793 } 2794 2795 #ifdef PGM_WITH_EPT 2796 /* Extended paging (EPT) / Intel VT-x */ 2797 pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_EPT, PGM_TYPE_REAL)]; 2798 pModeData->uShwType = PGM_TYPE_EPT; 2799 pModeData->uGstType = PGM_TYPE_REAL; 2800 rc = PGM_SHW_NAME_EPT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2801 rc = PGM_GST_NAME_REAL(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2802 rc = PGM_BTH_NAME_EPT_REAL(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2803 2804 pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_EPT, PGM_TYPE_PROT)]; 2805 pModeData->uShwType = PGM_TYPE_EPT; 2806 pModeData->uGstType = PGM_TYPE_PROT; 2807 rc = PGM_SHW_NAME_EPT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2808 rc = PGM_GST_NAME_PROT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2809 rc = PGM_BTH_NAME_EPT_PROT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2810 2811 pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_EPT, PGM_TYPE_32BIT)]; 2812 pModeData->uShwType = PGM_TYPE_EPT; 2813 pModeData->uGstType = PGM_TYPE_32BIT; 2814 rc = PGM_SHW_NAME_EPT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2815 rc = PGM_GST_NAME_32BIT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2816 rc = PGM_BTH_NAME_EPT_32BIT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2817 2818 pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_EPT, PGM_TYPE_PAE)]; 2819 pModeData->uShwType = PGM_TYPE_EPT; 2820 pModeData->uGstType = PGM_TYPE_PAE; 2821 rc = PGM_SHW_NAME_EPT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2822 rc = PGM_GST_NAME_PAE(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2823 rc = PGM_BTH_NAME_EPT_PAE(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2824 2825 pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_EPT, PGM_TYPE_AMD64)]; 2826 pModeData->uShwType = PGM_TYPE_EPT; 2827 pModeData->uGstType = PGM_TYPE_AMD64; 2828 rc = PGM_SHW_NAME_EPT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2829 rc = PGM_GST_NAME_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2830 rc = PGM_BTH_NAME_EPT_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc); 2831 #endif /* PGM_WITH_EPT */ 2676 2832 return VINF_SUCCESS; 2677 2833 } … … 2950 3106 /* Override the shadow mode is nested paging is active. */ 2951 3107 if (HWACCMIsNestedPagingActive(pVM)) 2952 enmShadowMode = PGMMODE_NESTED;3108 enmShadowMode = HWACCMGetPagingMode(pVM); 2953 3109 2954 3110 *penmSwitcher = enmSwitcher; … … 2990 3146 case PGMMODE_NESTED: 2991 3147 return "Nested"; 3148 3149 case PGMMODE_EPT: 3150 return "EPT"; 2992 3151 2993 3152 default: … … 3087 3246 rc = PGM_SHW_NAME_NESTED(Enter)(pVM); 3088 3247 break; 3248 #ifdef PGM_WITH_EPT 3249 case PGMMODE_EPT: 3250 rc = PGM_SHW_NAME_EPT(Enter)(pVM); 3251 break; 3252 #endif 3089 3253 case PGMMODE_REAL: 3090 3254 case PGMMODE_PROTECTED: … … 3124 3288 rc2 = PGM_BTH_NAME_NESTED_REAL(Enter)(pVM, NIL_RTGCPHYS); 3125 3289 break; 3290 #ifdef PGM_WITH_EPT 3291 case PGMMODE_EPT: 3292 rc2 = PGM_BTH_NAME_EPT_REAL(Enter)(pVM, NIL_RTGCPHYS); 3293 break; 3294 #endif 3126 3295 case PGMMODE_AMD64: 3127 3296 case PGMMODE_AMD64_NX: … … 3145 3314 rc2 = PGM_BTH_NAME_NESTED_PROT(Enter)(pVM, NIL_RTGCPHYS); 3146 3315 break; 3316 #ifdef PGM_WITH_EPT 3317 case PGMMODE_EPT: 3318 rc2 = PGM_BTH_NAME_EPT_PROT(Enter)(pVM, NIL_RTGCPHYS); 3319 break; 3320 #endif 3147 3321 case PGMMODE_AMD64: 3148 3322 case PGMMODE_AMD64_NX: … … 3167 3341 rc2 = PGM_BTH_NAME_NESTED_32BIT(Enter)(pVM, GCPhysCR3); 3168 3342 break; 3343 #ifdef PGM_WITH_EPT 3344 case PGMMODE_EPT: 3345 rc2 = PGM_BTH_NAME_EPT_32BIT(Enter)(pVM, GCPhysCR3); 3346 break; 3347 #endif 3169 3348 case PGMMODE_AMD64: 3170 3349 case PGMMODE_AMD64_NX: … … 3205 3384 rc2 = PGM_BTH_NAME_NESTED_PAE(Enter)(pVM, GCPhysCR3); 3206 3385 break; 3386 #ifdef PGM_WITH_EPT 3387 case PGMMODE_EPT: 3388 rc2 = PGM_BTH_NAME_EPT_PAE(Enter)(pVM, GCPhysCR3); 3389 break; 3390 #endif 3207 3391 case PGMMODE_32_BIT: 3208 3392 case PGMMODE_AMD64: … … 3227 3411 rc2 = PGM_BTH_NAME_NESTED_AMD64(Enter)(pVM, GCPhysCR3); 3228 3412 break; 3413 #ifdef PGM_WITH_EPT 3414 case PGMMODE_EPT: 3415 rc2 = PGM_BTH_NAME_EPT_AMD64(Enter)(pVM, GCPhysCR3); 3416 break; 3417 #endif 3229 3418 case PGMMODE_32_BIT: 3230 3419 case PGMMODE_PAE: -
trunk/src/VBox/VMM/PGMBth.h
r10494 r10822 68 68 int rc; 69 69 70 #if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */70 #if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */ 71 71 /* GC */ 72 72 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_BTH_NAME_GC_STR(Trap0eHandler), &pModeData->pfnGCBthTrap0eHandler); -
trunk/src/VBox/VMM/PGMInternal.h
r10320 r10822 192 192 #define PGM_TYPE_AMD64 5 193 193 #define PGM_TYPE_NESTED 6 194 #define PGM_TYPE_EPT 7 194 195 /** @} */ 195 196 … … 198 199 * @remark ASSUMES certain order of the PGM_TYPE_* values. 199 200 */ 200 #define PGM_WITH_PAGING(uType) ((uType) >= PGM_TYPE_32BIT && (uType) != PGM_TYPE_NESTED )201 #define PGM_WITH_PAGING(uType) ((uType) >= PGM_TYPE_32BIT && (uType) != PGM_TYPE_NESTED && (uType) != PGM_TYPE_EPT) 201 202 202 203 /** Macro for checking if the guest supports the NX bit. … … 204 205 * @remark ASSUMES certain order of the PGM_TYPE_* values. 205 206 */ 206 #define PGM_WITH_NX(uType) ((uType) >= PGM_TYPE_PAE && (uType) != PGM_TYPE_NESTED )207 #define PGM_WITH_NX(uType) ((uType) >= PGM_TYPE_PAE && (uType) != PGM_TYPE_NESTED && (uType) != PGM_TYPE_EPT) 207 208 208 209 … … 1731 1732 #define PGM_SHW_NAME_GC_NESTED_STR(name) "pgmGCShwNested" #name 1732 1733 #define PGM_SHW_NAME_R0_NESTED_STR(name) "pgmR0ShwNested" #name 1734 #define PGM_SHW_NAME_EPT(name) PGM_CTX(pgm,ShwEPT##name) 1735 #define PGM_SHW_NAME_GC_EPT_STR(name) "pgmGCShwEPT" #name 1736 #define PGM_SHW_NAME_R0_EPT_STR(name) "pgmR0ShwEPT" #name 1733 1737 #define PGM_SHW_DECL(type, name) PGM_CTX_DECL(type) PGM_SHW_NAME(name) 1734 1738 #define PGM_SHW_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Shw##name)) … … 1749 1753 #define PGM_BTH_NAME_NESTED_PAE(name) PGM_CTX(pgm,BthNestedPAE##name) 1750 1754 #define PGM_BTH_NAME_NESTED_AMD64(name) PGM_CTX(pgm,BthNestedAMD64##name) 1751 1752 #define PGM_BTH_NAME_GC_32BIT_REAL_STR(name) "pgmGCBth32BitReal" #name 1753 #define PGM_BTH_NAME_GC_32BIT_PROT_STR(name) "pgmGCBth32BitProt" #name 1754 #define PGM_BTH_NAME_GC_32BIT_32BIT_STR(name) "pgmGCBth32Bit32Bit" #name 1755 #define PGM_BTH_NAME_GC_PAE_REAL_STR(name) "pgmGCBthPAEReal" #name 1756 #define PGM_BTH_NAME_GC_PAE_PROT_STR(name) "pgmGCBthPAEProt" #name 1757 #define PGM_BTH_NAME_GC_PAE_32BIT_STR(name) "pgmGCBthPAE32Bit" #name 1758 #define PGM_BTH_NAME_GC_PAE_PAE_STR(name) "pgmGCBthPAEPAE" #name 1759 #define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name) "pgmGCBthAMD64AMD64" #name 1760 #define PGM_BTH_NAME_GC_NESTED_REAL_STR(name) "pgmGCBthNestedReal" #name 1761 #define PGM_BTH_NAME_GC_NESTED_PROT_STR(name) "pgmGCBthNestedProt" #name 1762 #define PGM_BTH_NAME_GC_NESTED_32BIT_STR(name) "pgmGCBthNested32Bit" #name 1763 #define PGM_BTH_NAME_GC_NESTED_PAE_STR(name) "pgmGCBthNestedPAE" #name 1764 #define PGM_BTH_NAME_GC_NESTED_AMD64_STR(name) "pgmGCBthNestedAMD64" #name 1765 #define PGM_BTH_NAME_R0_32BIT_REAL_STR(name) "pgmR0Bth32BitReal" #name 1766 #define PGM_BTH_NAME_R0_32BIT_PROT_STR(name) "pgmR0Bth32BitProt" #name 1767 #define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name) "pgmR0Bth32Bit32Bit" #name 1768 #define PGM_BTH_NAME_R0_PAE_REAL_STR(name) "pgmR0BthPAEReal" #name 1769 #define PGM_BTH_NAME_R0_PAE_PROT_STR(name) "pgmR0BthPAEProt" #name 1770 #define PGM_BTH_NAME_R0_PAE_32BIT_STR(name) "pgmR0BthPAE32Bit" #name 1771 #define PGM_BTH_NAME_R0_PAE_PAE_STR(name) "pgmR0BthPAEPAE" #name 1772 #define PGM_BTH_NAME_R0_AMD64_PROT_STR(name) "pgmR0BthAMD64Prot" #name 1773 #define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name) "pgmR0BthAMD64AMD64" #name 1774 #define PGM_BTH_NAME_R0_NESTED_REAL_STR(name) "pgmR0BthNestedReal" #name 1775 #define PGM_BTH_NAME_R0_NESTED_PROT_STR(name) "pgmR0BthNestedProt" #name 1776 #define PGM_BTH_NAME_R0_NESTED_32BIT_STR(name) "pgmR0BthNested32Bit" #name 1777 #define PGM_BTH_NAME_R0_NESTED_PAE_STR(name) "pgmR0BthNestedPAE" #name 1778 #define PGM_BTH_NAME_R0_NESTED_AMD64_STR(name) "pgmR0BthNestedAMD64" #name 1755 #define PGM_BTH_NAME_EPT_REAL(name) PGM_CTX(pgm,BthEPTReal##name) 1756 #define PGM_BTH_NAME_EPT_PROT(name) PGM_CTX(pgm,BthEPTProt##name) 1757 #define PGM_BTH_NAME_EPT_32BIT(name) PGM_CTX(pgm,BthEPT32Bit##name) 1758 #define PGM_BTH_NAME_EPT_PAE(name) PGM_CTX(pgm,BthEPTPAE##name) 1759 #define PGM_BTH_NAME_EPT_AMD64(name) PGM_CTX(pgm,BthEPTAMD64##name) 1760 1761 #define PGM_BTH_NAME_GC_32BIT_REAL_STR(name) "pgmGCBth32BitReal" #name 1762 #define PGM_BTH_NAME_GC_32BIT_PROT_STR(name) "pgmGCBth32BitProt" #name 1763 #define PGM_BTH_NAME_GC_32BIT_32BIT_STR(name) "pgmGCBth32Bit32Bit" #name 1764 #define PGM_BTH_NAME_GC_PAE_REAL_STR(name) "pgmGCBthPAEReal" #name 1765 #define PGM_BTH_NAME_GC_PAE_PROT_STR(name) "pgmGCBthPAEProt" #name 1766 #define PGM_BTH_NAME_GC_PAE_32BIT_STR(name) "pgmGCBthPAE32Bit" #name 1767 #define PGM_BTH_NAME_GC_PAE_PAE_STR(name) "pgmGCBthPAEPAE" #name 1768 #define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name) "pgmGCBthAMD64AMD64" #name 1769 #define PGM_BTH_NAME_GC_NESTED_REAL_STR(name) "pgmGCBthNestedReal" #name 1770 #define PGM_BTH_NAME_GC_NESTED_PROT_STR(name) "pgmGCBthNestedProt" #name 1771 #define PGM_BTH_NAME_GC_NESTED_32BIT_STR(name) "pgmGCBthNested32Bit" #name 1772 #define PGM_BTH_NAME_GC_NESTED_PAE_STR(name) "pgmGCBthNestedPAE" #name 1773 #define PGM_BTH_NAME_GC_NESTED_AMD64_STR(name) "pgmGCBthNestedAMD64" #name 1774 #define PGM_BTH_NAME_GC_EPT_REAL_STR(name) "pgmGCBthEPTReal" #name 1775 #define PGM_BTH_NAME_GC_EPT_PROT_STR(name) "pgmGCBthEPTProt" #name 1776 #define PGM_BTH_NAME_GC_EPT_32BIT_STR(name) "pgmGCBthEPT32Bit" #name 1777 #define PGM_BTH_NAME_GC_EPT_PAE_STR(name) "pgmGCBthEPTPAE" #name 1778 #define PGM_BTH_NAME_GC_EPT_AMD64_STR(name) "pgmGCBthEPTAMD64" #name 1779 #define PGM_BTH_NAME_R0_32BIT_REAL_STR(name) "pgmR0Bth32BitReal" #name 1780 #define PGM_BTH_NAME_R0_32BIT_PROT_STR(name) "pgmR0Bth32BitProt" #name 1781 #define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name) "pgmR0Bth32Bit32Bit" #name 1782 #define PGM_BTH_NAME_R0_PAE_REAL_STR(name) "pgmR0BthPAEReal" #name 1783 #define PGM_BTH_NAME_R0_PAE_PROT_STR(name) "pgmR0BthPAEProt" #name 1784 #define PGM_BTH_NAME_R0_PAE_32BIT_STR(name) "pgmR0BthPAE32Bit" #name 1785 #define PGM_BTH_NAME_R0_PAE_PAE_STR(name) "pgmR0BthPAEPAE" #name 1786 #define PGM_BTH_NAME_R0_AMD64_PROT_STR(name) "pgmR0BthAMD64Prot" #name 1787 #define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name) "pgmR0BthAMD64AMD64" #name 1788 #define PGM_BTH_NAME_R0_NESTED_REAL_STR(name) "pgmR0BthNestedReal" #name 1789 #define PGM_BTH_NAME_R0_NESTED_PROT_STR(name) "pgmR0BthNestedProt" #name 1790 #define PGM_BTH_NAME_R0_NESTED_32BIT_STR(name) "pgmR0BthNested32Bit" #name 1791 #define PGM_BTH_NAME_R0_NESTED_PAE_STR(name) "pgmR0BthNestedPAE" #name 1792 #define PGM_BTH_NAME_R0_NESTED_AMD64_STR(name) "pgmR0BthNestedAMD64" #name 1793 #define PGM_BTH_NAME_R0_EPT_REAL_STR(name) "pgmR0BthEPTReal" #name 1794 #define PGM_BTH_NAME_R0_EPT_PROT_STR(name) "pgmR0BthEPTProt" #name 1795 #define PGM_BTH_NAME_R0_EPT_32BIT_STR(name) "pgmR0BthEPT32Bit" #name 1796 #define PGM_BTH_NAME_R0_EPT_PAE_STR(name) "pgmR0BthEPTPAE" #name 1797 #define PGM_BTH_NAME_R0_EPT_AMD64_STR(name) "pgmR0BthEPTAMD64" #name 1779 1798 1780 1799 #define PGM_BTH_DECL(type, name) PGM_CTX_DECL(type) PGM_BTH_NAME(name) -
trunk/src/VBox/VMM/PGMShw.h
r10065 r10822 113 113 int rc; 114 114 115 #if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */115 #if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */ 116 116 /* GC */ 117 117 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_SHW_NAME_GC_STR(GetPage), &pModeData->pfnGCShwGetPage); -
trunk/src/VBox/VMM/VMMAll/HWACCMAll.cpp
r9115 r10822 90 90 } 91 91 92 /** 93 * Return the shadow paging mode for nested paging/ept 94 * 95 * @returns shadow paging mode 96 * @param pVM The VM to operate on. 97 */ 98 HWACCMDECL(PGMMODE) HWACCMGetPagingMode(PVM pVM) 99 { 100 Assert(HWACCMIsNestedPagingActive(pVM)); 101 if (pVM->hwaccm.s.svm.fSupported) 102 return PGMMODE_NESTED; 103 Assert(pVM->hwaccm.s.vmx.fSupported); 104 return PGMMODE_EPT; 105 } 92 106 93 107 /** -
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r10705 r10822 286 286 #undef PGM_SHW_TYPE 287 287 #undef PGM_SHW_NAME 288 289 290 #ifdef PGM_WITH_EPT 291 /* 292 * Shadow - EPT 293 */ 294 #define PGM_SHW_TYPE PGM_TYPE_EPT 295 #define PGM_SHW_NAME(name) PGM_SHW_NAME_EPT(name) 296 #include "PGMAllShw.h" 297 298 /* Guest - real mode */ 299 #define PGM_GST_TYPE PGM_TYPE_REAL 300 #define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name) 301 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_REAL(name) 302 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS 303 #include "PGMAllBth.h" 304 #undef BTH_PGMPOOLKIND_PT_FOR_PT 305 #undef PGM_BTH_NAME 306 #undef PGM_GST_TYPE 307 #undef PGM_GST_NAME 308 309 /* Guest - protected mode */ 310 #define PGM_GST_TYPE PGM_TYPE_PROT 311 #define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name) 312 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_PROT(name) 313 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS 314 #include "PGMAllBth.h" 315 #undef BTH_PGMPOOLKIND_PT_FOR_PT 316 #undef PGM_BTH_NAME 317 #undef PGM_GST_TYPE 318 #undef PGM_GST_NAME 319 320 /* Guest - 32-bit mode */ 321 #define PGM_GST_TYPE PGM_TYPE_32BIT 322 #define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name) 323 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_32BIT(name) 324 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_32BIT_PT 325 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB 326 #include "PGMAllBth.h" 327 #undef BTH_PGMPOOLKIND_PT_FOR_BIG 328 #undef BTH_PGMPOOLKIND_PT_FOR_PT 329 #undef PGM_BTH_NAME 330 #undef PGM_GST_TYPE 331 #undef PGM_GST_NAME 332 333 /* Guest - PAE mode */ 334 #define PGM_GST_TYPE PGM_TYPE_PAE 335 #define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name) 336 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_PAE(name) 337 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT 338 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 339 #include "PGMAllBth.h" 340 #undef BTH_PGMPOOLKIND_PT_FOR_BIG 341 #undef BTH_PGMPOOLKIND_PT_FOR_PT 342 #undef PGM_BTH_NAME 343 #undef PGM_GST_TYPE 344 #undef PGM_GST_NAME 345 346 /* Guest - AMD64 mode */ 347 #define PGM_GST_TYPE PGM_TYPE_AMD64 348 #define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name) 349 #define PGM_BTH_NAME(name) PGM_BTH_NAME_EPT_AMD64(name) 350 #define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT 351 #define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB 352 #include "PGMAllBth.h" 353 #undef BTH_PGMPOOLKIND_PT_FOR_BIG 354 #undef BTH_PGMPOOLKIND_PT_FOR_PT 355 #undef PGM_BTH_NAME 356 #undef PGM_GST_TYPE 357 #undef PGM_GST_NAME 358 359 #undef PGM_SHW_TYPE 360 #undef PGM_SHW_NAME 361 #endif /* PGM_WITH_EPT */ 362 288 363 #endif 289 364 … … 1078 1153 return pVM->pgm.s.HCPhysPaePML4; 1079 1154 1155 case PGMMODE_EPT: 1156 return pVM->pgm.s.HCPhysNestedRoot; 1157 1080 1158 case PGMMODE_NESTED: 1081 1159 return PGMGetNestedCR3(pVM, PGMGetHostMode(pVM)); … … 1199 1277 return pVM->pgm.s.HCPhysInterPaePML4; 1200 1278 1279 case PGMMODE_EPT: 1201 1280 case PGMMODE_NESTED: 1202 1281 return 0; /* not relevant */ … … 1332 1411 Assert(pVM->pgm.s.fMappingsFixed); 1333 1412 Assert(!(pVM->pgm.s.fSyncFlags & PGM_SYNC_MONITOR_CR3)); 1334 Assert(pVM->pgm.s.enmShadowMode == PGMMODE_NESTED );1413 Assert(pVM->pgm.s.enmShadowMode == PGMMODE_NESTED || pVM->pgm.s.enmShadowMode == PGMMODE_EPT); 1335 1414 1336 1415 /* … … 1567 1646 case PGMMODE_AMD64_NX: return "AMD64+NX"; 1568 1647 case PGMMODE_NESTED: return "Nested"; 1648 case PGMMODE_EPT: return "EPT"; 1569 1649 default: return "unknown mode value"; 1570 1650 } -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r10496 r10822 49 49 50 50 #if (PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT) \ 51 && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_AMD64 || PGM_SHW_TYPE == PGM_TYPE_NESTED )51 && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_AMD64 || PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT) 52 52 # error "Invalid combination; real or protected mode without paging implies 32 bits or PAE shadow paging." 53 53 #endif 54 54 55 55 #if (PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE) \ 56 && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_NESTED )56 && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT) 57 57 # error "Invalid combination; 32 bits guest paging or PAE implies 32 bits or PAE shadow paging." 58 58 #endif 59 59 60 #if (PGM_GST_TYPE == PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED ) \60 #if (PGM_GST_TYPE == PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT) \ 61 61 || (PGM_SHW_TYPE == PGM_TYPE_AMD64 && PGM_GST_TYPE != PGM_TYPE_AMD64 && PGM_GST_TYPE != PGM_TYPE_PROT) 62 62 # error "Invalid combination; AMD64 guest implies AMD64 shadow and vice versa" … … 167 167 } 168 168 Assert(pPDDst); 169 # elif PGM_SHW_TYPE == PGM_TYPE_EPT 170 const unsigned iPDDst = (((RTGCUINTPTR)pvFault >> SHW_PD_SHIFT) & SHW_PD_MASK); 171 PX86PDPAE pPDDst; 172 173 AssertFailed(); 169 174 # endif 170 175
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