Changeset 108288 in vbox
- Timestamp:
- Feb 19, 2025 12:02:33 PM (3 weeks ago)
- svn:sync-xref-src-repo-rev:
- 167631
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 15 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py
r108287 r108288 3124 3124 'IEM_MC_FETCH_GREG_PAIR_U32': (McBlock.parseMcGeneric, False, False, False, ), 3125 3125 'IEM_MC_FETCH_GREG_PAIR_U64': (McBlock.parseMcGeneric, False, False, g_fNativeSimd), 3126 'IEM_MC_FETCH_MEM_ D80':(McBlock.parseMcGeneric, True, True, False, ),3127 'IEM_MC_FETCH_MEM_ I16':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3128 'IEM_MC_FETCH_MEM_ I16_DISP':(McBlock.parseMcGeneric, True, True, True, ),3129 'IEM_MC_FETCH_MEM_ I32':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3130 'IEM_MC_FETCH_MEM_ I32_DISP':(McBlock.parseMcGeneric, True, True, True, ),3131 'IEM_MC_FETCH_MEM_ I64':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3132 'IEM_MC_FETCH_MEM_ R32':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3133 'IEM_MC_FETCH_MEM_ R64':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3134 'IEM_MC_FETCH_MEM_ R80':(McBlock.parseMcGeneric, True, True, False, ),3135 'IEM_MC_FETCH_MEM_ U128':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3136 'IEM_MC_FETCH_MEM_ U128_ALIGN_SSE':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3137 'IEM_MC_FETCH_MEM_ U128_NO_AC':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3138 'IEM_MC_FETCH_MEM_ U128_AND_XREG_U128':(McBlock.parseMcGeneric, True, True, False, ),3139 'IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_RAX_RDX_U64':(McBlock.parseMcGeneric, True, True, False, ),3140 'IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64':(McBlock.parseMcGeneric,True, True, False, ),3141 'IEM_MC_FETCH_MEM_ U16':(McBlock.parseMcGeneric, True, True, True, ),3142 'IEM_MC_FETCH_MEM_ U16_DISP':(McBlock.parseMcGeneric, True, True, True, ),3143 'IEM_MC_FETCH_MEM_ U16_SX_U32':(McBlock.parseMcGeneric, True, True, True, ), # movsx3144 'IEM_MC_FETCH_MEM_ U16_SX_U64':(McBlock.parseMcGeneric, True, True, True, ), # movsx3145 'IEM_MC_FETCH_MEM_ U16_ZX_U32':(McBlock.parseMcGeneric, True, True, True, ), # movzx3146 'IEM_MC_FETCH_MEM_ U16_ZX_U64':(McBlock.parseMcGeneric, True, True, True, ), # movzx3147 'IEM_MC_FETCH_MEM_ U256':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3148 'IEM_MC_FETCH_MEM_ U256_ALIGN_AVX':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3149 'IEM_MC_FETCH_MEM_ U256_NO_AC':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3150 'IEM_MC_FETCH_MEM_ U32':(McBlock.parseMcGeneric, True, True, True, ),3151 'IEM_MC_FETCH_MEM_ U32_DISP':(McBlock.parseMcGeneric, True, True, True, ), #bounds only3152 'IEM_MC_FETCH_MEM_ U32_SX_U64':(McBlock.parseMcGeneric, True, True, True, ), # movsx3153 'IEM_MC_FETCH_MEM_ U32_ZX_U64':(McBlock.parseMcGeneric, True, True, True, ), # movzx3154 'IEM_MC_FETCH_MEM_ U64':(McBlock.parseMcGeneric, True, True, True, ),3155 'IEM_MC_FETCH_MEM_ U64_ALIGN_U128':(McBlock.parseMcGeneric, True, True, False, ),3156 'IEM_MC_FETCH_MEM_ U8':(McBlock.parseMcGeneric, True, True, True, ),3157 'IEM_MC_FETCH_MEM_ U8_SX_U16':(McBlock.parseMcGeneric, True, True, True, ), # movsx3158 'IEM_MC_FETCH_MEM_ U8_SX_U32':(McBlock.parseMcGeneric, True, True, True, ), # movsx3159 'IEM_MC_FETCH_MEM_ U8_SX_U64':(McBlock.parseMcGeneric, True, True, True, ), # movsx3160 'IEM_MC_FETCH_MEM_ U8_ZX_U16':(McBlock.parseMcGeneric, True, True, True, ), # movzx3161 'IEM_MC_FETCH_MEM_ U8_ZX_U32':(McBlock.parseMcGeneric, True, True, True, ), # movzx3162 'IEM_MC_FETCH_MEM_ U8_ZX_U64':(McBlock.parseMcGeneric, True, True, True, ), # movzx3163 'IEM_MC_FETCH_MEM_ XMM':(McBlock.parseMcGeneric, True, True, False, ),3164 'IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3165 'IEM_MC_FETCH_MEM_ XMM_NO_AC':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3166 'IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE_AND_XREG_XMM':(McBlock.parseMcGeneric, True, True, False, ),3167 'IEM_MC_FETCH_MEM_ XMM_NO_AC_AND_XREG_XMM':(McBlock.parseMcGeneric, True, True, False, ),3168 'IEM_MC_FETCH_MEM_ XMM_U32_AND_XREG_XMM':(McBlock.parseMcGeneric, True, True, False, ),3169 'IEM_MC_FETCH_MEM_ XMM_U64_AND_XREG_XMM':(McBlock.parseMcGeneric, True, True, False, ),3170 'IEM_MC_FETCH_MEM_ YMM':(McBlock.parseMcGeneric, True, True, False, ),3171 'IEM_MC_FETCH_MEM_ YMM_ALIGN_AVX':(McBlock.parseMcGeneric, True, True, False, ),3172 'IEM_MC_FETCH_MEM_ YMM_NO_AC':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3173 'IEM_MC_FETCH_MEM_ YMM_NO_AC_AND_YREG_YMM':(McBlock.parseMcGeneric, True, True, False, ),3174 'IEM_MC_FETCH_MEM16_ U8':(McBlock.parseMcGeneric, True, True, False, ),3175 'IEM_MC_FETCH_MEM32_ U8':(McBlock.parseMcGeneric, True, True, False, ),3126 'IEM_MC_FETCH_MEM_SEG_D80': (McBlock.parseMcGeneric, True, True, False, ), 3127 'IEM_MC_FETCH_MEM_SEG_I16': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3128 'IEM_MC_FETCH_MEM_SEG_I16_DISP': (McBlock.parseMcGeneric, True, True, True, ), 3129 'IEM_MC_FETCH_MEM_SEG_I32': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3130 'IEM_MC_FETCH_MEM_SEG_I32_DISP': (McBlock.parseMcGeneric, True, True, True, ), 3131 'IEM_MC_FETCH_MEM_SEG_I64': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3132 'IEM_MC_FETCH_MEM_SEG_R32': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3133 'IEM_MC_FETCH_MEM_SEG_R64': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3134 'IEM_MC_FETCH_MEM_SEG_R80': (McBlock.parseMcGeneric, True, True, False, ), 3135 'IEM_MC_FETCH_MEM_SEG_U128': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3136 'IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3137 'IEM_MC_FETCH_MEM_SEG_U128_NO_AC': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3138 'IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128': (McBlock.parseMcGeneric, True, True, False, ), 3139 'IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_RAX_RDX_U64': (McBlock.parseMcGeneric, True, True, False, ), 3140 'IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64':(McBlock.parseMcGeneric, True, True, False, ), 3141 'IEM_MC_FETCH_MEM_SEG_U16': (McBlock.parseMcGeneric, True, True, True, ), 3142 'IEM_MC_FETCH_MEM_SEG_U16_DISP': (McBlock.parseMcGeneric, True, True, True, ), 3143 'IEM_MC_FETCH_MEM_SEG_U16_SX_U32': (McBlock.parseMcGeneric, True, True, True, ), # movsx 3144 'IEM_MC_FETCH_MEM_SEG_U16_SX_U64': (McBlock.parseMcGeneric, True, True, True, ), # movsx 3145 'IEM_MC_FETCH_MEM_SEG_U16_ZX_U32': (McBlock.parseMcGeneric, True, True, True, ), # movzx 3146 'IEM_MC_FETCH_MEM_SEG_U16_ZX_U64': (McBlock.parseMcGeneric, True, True, True, ), # movzx 3147 'IEM_MC_FETCH_MEM_SEG_U256': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3148 'IEM_MC_FETCH_MEM_SEG_U256_ALIGN_AVX': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3149 'IEM_MC_FETCH_MEM_SEG_U256_NO_AC': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3150 'IEM_MC_FETCH_MEM_SEG_U32': (McBlock.parseMcGeneric, True, True, True, ), 3151 'IEM_MC_FETCH_MEM_SEG_U32_DISP': (McBlock.parseMcGeneric, True, True, True, ), #bounds only 3152 'IEM_MC_FETCH_MEM_SEG_U32_SX_U64': (McBlock.parseMcGeneric, True, True, True, ), # movsx 3153 'IEM_MC_FETCH_MEM_SEG_U32_ZX_U64': (McBlock.parseMcGeneric, True, True, True, ), # movzx 3154 'IEM_MC_FETCH_MEM_SEG_U64': (McBlock.parseMcGeneric, True, True, True, ), 3155 'IEM_MC_FETCH_MEM_SEG_U64_ALIGN_U128': (McBlock.parseMcGeneric, True, True, False, ), 3156 'IEM_MC_FETCH_MEM_SEG_U8': (McBlock.parseMcGeneric, True, True, True, ), 3157 'IEM_MC_FETCH_MEM_SEG_U8_SX_U16': (McBlock.parseMcGeneric, True, True, True, ), # movsx 3158 'IEM_MC_FETCH_MEM_SEG_U8_SX_U32': (McBlock.parseMcGeneric, True, True, True, ), # movsx 3159 'IEM_MC_FETCH_MEM_SEG_U8_SX_U64': (McBlock.parseMcGeneric, True, True, True, ), # movsx 3160 'IEM_MC_FETCH_MEM_SEG_U8_ZX_U16': (McBlock.parseMcGeneric, True, True, True, ), # movzx 3161 'IEM_MC_FETCH_MEM_SEG_U8_ZX_U32': (McBlock.parseMcGeneric, True, True, True, ), # movzx 3162 'IEM_MC_FETCH_MEM_SEG_U8_ZX_U64': (McBlock.parseMcGeneric, True, True, True, ), # movzx 3163 'IEM_MC_FETCH_MEM_SEG_XMM': (McBlock.parseMcGeneric, True, True, False, ), 3164 'IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3165 'IEM_MC_FETCH_MEM_SEG_XMM_NO_AC': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3166 'IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE_AND_XREG_XMM': (McBlock.parseMcGeneric, True, True, False, ), 3167 'IEM_MC_FETCH_MEM_SEG_XMM_NO_AC_AND_XREG_XMM': (McBlock.parseMcGeneric, True, True, False, ), 3168 'IEM_MC_FETCH_MEM_SEG_XMM_U32_AND_XREG_XMM': (McBlock.parseMcGeneric, True, True, False, ), 3169 'IEM_MC_FETCH_MEM_SEG_XMM_U64_AND_XREG_XMM': (McBlock.parseMcGeneric, True, True, False, ), 3170 'IEM_MC_FETCH_MEM_SEG_YMM': (McBlock.parseMcGeneric, True, True, False, ), 3171 'IEM_MC_FETCH_MEM_SEG_YMM_ALIGN_AVX': (McBlock.parseMcGeneric, True, True, False, ), 3172 'IEM_MC_FETCH_MEM_SEG_YMM_NO_AC': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3173 'IEM_MC_FETCH_MEM_SEG_YMM_NO_AC_AND_YREG_YMM': (McBlock.parseMcGeneric, True, True, False, ), 3174 'IEM_MC_FETCH_MEM16_SEG_U8': (McBlock.parseMcGeneric, True, True, False, ), 3175 'IEM_MC_FETCH_MEM32_SEG_U8': (McBlock.parseMcGeneric, True, True, False, ), 3176 3176 'IEM_MC_FETCH_MREG_U8': (McBlock.parseMcGeneric, False, False, False, ), 3177 3177 'IEM_MC_FETCH_MREG_U16': (McBlock.parseMcGeneric, False, False, False, ), -
trunk/src/VBox/VMM/VMMAll/IEMAllThrdPython.py
r108287 r108288 902 902 ## it, but only in 64-bit mode could we safely write via it, IIRC). 903 903 kdMemMcToFlatInfo = { 904 'IEM_MC_FETCH_MEM_ U8':( 1, 'IEM_MC_FETCH_MEM_FLAT_U8' ),905 'IEM_MC_FETCH_MEM16_ U8':( 1, 'IEM_MC_FETCH_MEM16_FLAT_U8' ),906 'IEM_MC_FETCH_MEM32_ U8':( 1, 'IEM_MC_FETCH_MEM32_FLAT_U8' ),907 'IEM_MC_FETCH_MEM_ U16':( 1, 'IEM_MC_FETCH_MEM_FLAT_U16' ),908 'IEM_MC_FETCH_MEM_ U16_DISP':( 1, 'IEM_MC_FETCH_MEM_FLAT_U16_DISP' ),909 'IEM_MC_FETCH_MEM_ I16':( 1, 'IEM_MC_FETCH_MEM_FLAT_I16' ),910 'IEM_MC_FETCH_MEM_ I16_DISP':( 1, 'IEM_MC_FETCH_MEM_FLAT_I16_DISP' ),911 'IEM_MC_FETCH_MEM_ U32':( 1, 'IEM_MC_FETCH_MEM_FLAT_U32' ),912 'IEM_MC_FETCH_MEM_ U32_DISP':( 1, 'IEM_MC_FETCH_MEM_FLAT_U32_DISP' ),913 'IEM_MC_FETCH_MEM_ I32':( 1, 'IEM_MC_FETCH_MEM_FLAT_I32' ),914 'IEM_MC_FETCH_MEM_ I32_DISP':( 1, 'IEM_MC_FETCH_MEM_FLAT_I32_DISP' ),915 'IEM_MC_FETCH_MEM_ U64':( 1, 'IEM_MC_FETCH_MEM_FLAT_U64' ),916 'IEM_MC_FETCH_MEM_ U64_DISP':( 1, 'IEM_MC_FETCH_MEM_FLAT_U64_DISP' ),917 'IEM_MC_FETCH_MEM_ U64_ALIGN_U128':( 1, 'IEM_MC_FETCH_MEM_FLAT_U64_ALIGN_U128' ),918 'IEM_MC_FETCH_MEM_ I64':( 1, 'IEM_MC_FETCH_MEM_FLAT_I64' ),919 'IEM_MC_FETCH_MEM_ R32':( 1, 'IEM_MC_FETCH_MEM_FLAT_R32' ),920 'IEM_MC_FETCH_MEM_ R64':( 1, 'IEM_MC_FETCH_MEM_FLAT_R64' ),921 'IEM_MC_FETCH_MEM_ R80':( 1, 'IEM_MC_FETCH_MEM_FLAT_R80' ),922 'IEM_MC_FETCH_MEM_ D80':( 1, 'IEM_MC_FETCH_MEM_FLAT_D80' ),923 'IEM_MC_FETCH_MEM_ U128':( 1, 'IEM_MC_FETCH_MEM_FLAT_U128' ),924 'IEM_MC_FETCH_MEM_ U128_NO_AC':( 1, 'IEM_MC_FETCH_MEM_FLAT_U128_NO_AC' ),925 'IEM_MC_FETCH_MEM_ U128_ALIGN_SSE':( 1, 'IEM_MC_FETCH_MEM_FLAT_U128_ALIGN_SSE' ),926 'IEM_MC_FETCH_MEM_ XMM':( 1, 'IEM_MC_FETCH_MEM_FLAT_XMM' ),927 'IEM_MC_FETCH_MEM_ XMM_NO_AC':( 1, 'IEM_MC_FETCH_MEM_FLAT_XMM_NO_AC' ),928 'IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE':( 1, 'IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE' ),929 'IEM_MC_FETCH_MEM_ XMM_U32':( 2, 'IEM_MC_FETCH_MEM_FLAT_XMM_U32' ),930 'IEM_MC_FETCH_MEM_ XMM_U64':( 2, 'IEM_MC_FETCH_MEM_FLAT_XMM_U64' ),931 'IEM_MC_FETCH_MEM_ U256':( 1, 'IEM_MC_FETCH_MEM_FLAT_U256' ),932 'IEM_MC_FETCH_MEM_ U256_NO_AC':( 1, 'IEM_MC_FETCH_MEM_FLAT_U256_NO_AC' ),933 'IEM_MC_FETCH_MEM_ U256_ALIGN_AVX':( 1, 'IEM_MC_FETCH_MEM_FLAT_U256_ALIGN_AVX' ),934 'IEM_MC_FETCH_MEM_ YMM':( 1, 'IEM_MC_FETCH_MEM_FLAT_YMM' ),935 'IEM_MC_FETCH_MEM_ YMM_NO_AC':( 1, 'IEM_MC_FETCH_MEM_FLAT_YMM_NO_AC' ),936 'IEM_MC_FETCH_MEM_ YMM_ALIGN_AVX':( 1, 'IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX' ),937 'IEM_MC_FETCH_MEM_ U8_ZX_U16':( 1, 'IEM_MC_FETCH_MEM_FLAT_U8_ZX_U16' ),938 'IEM_MC_FETCH_MEM_ U8_ZX_U32':( 1, 'IEM_MC_FETCH_MEM_FLAT_U8_ZX_U32' ),939 'IEM_MC_FETCH_MEM_ U8_ZX_U64':( 1, 'IEM_MC_FETCH_MEM_FLAT_U8_ZX_U64' ),940 'IEM_MC_FETCH_MEM_ U16_ZX_U32':( 1, 'IEM_MC_FETCH_MEM_FLAT_U16_ZX_U32' ),941 'IEM_MC_FETCH_MEM_ U16_ZX_U64':( 1, 'IEM_MC_FETCH_MEM_FLAT_U16_ZX_U64' ),942 'IEM_MC_FETCH_MEM_ U32_ZX_U64':( 1, 'IEM_MC_FETCH_MEM_FLAT_U32_ZX_U64' ),943 'IEM_MC_FETCH_MEM_ U8_SX_U16':( 1, 'IEM_MC_FETCH_MEM_FLAT_U8_SX_U16' ),944 'IEM_MC_FETCH_MEM_ U8_SX_U32':( 1, 'IEM_MC_FETCH_MEM_FLAT_U8_SX_U32' ),945 'IEM_MC_FETCH_MEM_ U8_SX_U64':( 1, 'IEM_MC_FETCH_MEM_FLAT_U8_SX_U64' ),946 'IEM_MC_FETCH_MEM_ U16_SX_U32':( 1, 'IEM_MC_FETCH_MEM_FLAT_U16_SX_U32' ),947 'IEM_MC_FETCH_MEM_ U16_SX_U64':( 1, 'IEM_MC_FETCH_MEM_FLAT_U16_SX_U64' ),948 'IEM_MC_FETCH_MEM_ U32_SX_U64':( 1, 'IEM_MC_FETCH_MEM_FLAT_U32_SX_U64' ),949 'IEM_MC_FETCH_MEM_ U128_AND_XREG_U128': ( 2, 'IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128' ),950 'IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE_AND_XREG_XMM': ( 2, 'IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE_AND_XREG_XMM' ),951 'IEM_MC_FETCH_MEM_ XMM_NO_AC_AND_XREG_XMM': ( 2, 'IEM_MC_FETCH_MEM_FLAT_XMM_NO_AC_AND_XREG_XMM' ),952 'IEM_MC_FETCH_MEM_ XMM_U32_AND_XREG_XMM': ( 3, 'IEM_MC_FETCH_MEM_FLAT_XMM_U32_AND_XREG_XMM' ),953 'IEM_MC_FETCH_MEM_ XMM_U64_AND_XREG_XMM': ( 3, 'IEM_MC_FETCH_MEM_FLAT_XMM_U64_AND_XREG_XMM' ),954 'IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_RAX_RDX_U64':904 'IEM_MC_FETCH_MEM_SEG_U8': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U8' ), 905 'IEM_MC_FETCH_MEM16_SEG_U8': ( 1, 'IEM_MC_FETCH_MEM16_FLAT_U8' ), 906 'IEM_MC_FETCH_MEM32_SEG_U8': ( 1, 'IEM_MC_FETCH_MEM32_FLAT_U8' ), 907 'IEM_MC_FETCH_MEM_SEG_U16': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U16' ), 908 'IEM_MC_FETCH_MEM_SEG_U16_DISP': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U16_DISP' ), 909 'IEM_MC_FETCH_MEM_SEG_I16': ( 1, 'IEM_MC_FETCH_MEM_FLAT_I16' ), 910 'IEM_MC_FETCH_MEM_SEG_I16_DISP': ( 1, 'IEM_MC_FETCH_MEM_FLAT_I16_DISP' ), 911 'IEM_MC_FETCH_MEM_SEG_U32': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U32' ), 912 'IEM_MC_FETCH_MEM_SEG_U32_DISP': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U32_DISP' ), 913 'IEM_MC_FETCH_MEM_SEG_I32': ( 1, 'IEM_MC_FETCH_MEM_FLAT_I32' ), 914 'IEM_MC_FETCH_MEM_SEG_I32_DISP': ( 1, 'IEM_MC_FETCH_MEM_FLAT_I32_DISP' ), 915 'IEM_MC_FETCH_MEM_SEG_U64': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U64' ), 916 'IEM_MC_FETCH_MEM_SEG_U64_DISP': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U64_DISP' ), 917 'IEM_MC_FETCH_MEM_SEG_U64_ALIGN_U128': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U64_ALIGN_U128' ), 918 'IEM_MC_FETCH_MEM_SEG_I64': ( 1, 'IEM_MC_FETCH_MEM_FLAT_I64' ), 919 'IEM_MC_FETCH_MEM_SEG_R32': ( 1, 'IEM_MC_FETCH_MEM_FLAT_R32' ), 920 'IEM_MC_FETCH_MEM_SEG_R64': ( 1, 'IEM_MC_FETCH_MEM_FLAT_R64' ), 921 'IEM_MC_FETCH_MEM_SEG_R80': ( 1, 'IEM_MC_FETCH_MEM_FLAT_R80' ), 922 'IEM_MC_FETCH_MEM_SEG_D80': ( 1, 'IEM_MC_FETCH_MEM_FLAT_D80' ), 923 'IEM_MC_FETCH_MEM_SEG_U128': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U128' ), 924 'IEM_MC_FETCH_MEM_SEG_U128_NO_AC': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U128_NO_AC' ), 925 'IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U128_ALIGN_SSE' ), 926 'IEM_MC_FETCH_MEM_SEG_XMM': ( 1, 'IEM_MC_FETCH_MEM_FLAT_XMM' ), 927 'IEM_MC_FETCH_MEM_SEG_XMM_NO_AC': ( 1, 'IEM_MC_FETCH_MEM_FLAT_XMM_NO_AC' ), 928 'IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE': ( 1, 'IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE' ), 929 'IEM_MC_FETCH_MEM_SEG_XMM_U32': ( 2, 'IEM_MC_FETCH_MEM_FLAT_XMM_U32' ), 930 'IEM_MC_FETCH_MEM_SEG_XMM_U64': ( 2, 'IEM_MC_FETCH_MEM_FLAT_XMM_U64' ), 931 'IEM_MC_FETCH_MEM_SEG_U256': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U256' ), 932 'IEM_MC_FETCH_MEM_SEG_U256_NO_AC': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U256_NO_AC' ), 933 'IEM_MC_FETCH_MEM_SEG_U256_ALIGN_AVX': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U256_ALIGN_AVX' ), 934 'IEM_MC_FETCH_MEM_SEG_YMM': ( 1, 'IEM_MC_FETCH_MEM_FLAT_YMM' ), 935 'IEM_MC_FETCH_MEM_SEG_YMM_NO_AC': ( 1, 'IEM_MC_FETCH_MEM_FLAT_YMM_NO_AC' ), 936 'IEM_MC_FETCH_MEM_SEG_YMM_ALIGN_AVX': ( 1, 'IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX' ), 937 'IEM_MC_FETCH_MEM_SEG_U8_ZX_U16': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U8_ZX_U16' ), 938 'IEM_MC_FETCH_MEM_SEG_U8_ZX_U32': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U8_ZX_U32' ), 939 'IEM_MC_FETCH_MEM_SEG_U8_ZX_U64': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U8_ZX_U64' ), 940 'IEM_MC_FETCH_MEM_SEG_U16_ZX_U32': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U16_ZX_U32' ), 941 'IEM_MC_FETCH_MEM_SEG_U16_ZX_U64': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U16_ZX_U64' ), 942 'IEM_MC_FETCH_MEM_SEG_U32_ZX_U64': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U32_ZX_U64' ), 943 'IEM_MC_FETCH_MEM_SEG_U8_SX_U16': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U8_SX_U16' ), 944 'IEM_MC_FETCH_MEM_SEG_U8_SX_U32': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U8_SX_U32' ), 945 'IEM_MC_FETCH_MEM_SEG_U8_SX_U64': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U8_SX_U64' ), 946 'IEM_MC_FETCH_MEM_SEG_U16_SX_U32': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U16_SX_U32' ), 947 'IEM_MC_FETCH_MEM_SEG_U16_SX_U64': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U16_SX_U64' ), 948 'IEM_MC_FETCH_MEM_SEG_U32_SX_U64': ( 1, 'IEM_MC_FETCH_MEM_FLAT_U32_SX_U64' ), 949 'IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128': ( 2, 'IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128' ), 950 'IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE_AND_XREG_XMM': ( 2, 'IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE_AND_XREG_XMM' ), 951 'IEM_MC_FETCH_MEM_SEG_XMM_NO_AC_AND_XREG_XMM': ( 2, 'IEM_MC_FETCH_MEM_FLAT_XMM_NO_AC_AND_XREG_XMM' ), 952 'IEM_MC_FETCH_MEM_SEG_XMM_U32_AND_XREG_XMM': ( 3, 'IEM_MC_FETCH_MEM_FLAT_XMM_U32_AND_XREG_XMM' ), 953 'IEM_MC_FETCH_MEM_SEG_XMM_U64_AND_XREG_XMM': ( 3, 'IEM_MC_FETCH_MEM_FLAT_XMM_U64_AND_XREG_XMM' ), 954 'IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_RAX_RDX_U64': 955 955 ( 2, 'IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_RAX_RDX_U64' ), 956 'IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64':956 'IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64': 957 957 ( 2, 'IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64' ), 958 'IEM_MC_FETCH_MEM_ YMM_NO_AC_AND_YREG_YMM': ( 2, 'IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX_AND_YREG_YMM' ),958 'IEM_MC_FETCH_MEM_SEG_YMM_NO_AC_AND_YREG_YMM': ( 2, 'IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX_AND_YREG_YMM' ), 959 959 'IEM_MC_STORE_MEM_U8': ( 0, 'IEM_MC_STORE_MEM_FLAT_U8' ), 960 960 'IEM_MC_STORE_MEM_U16': ( 0, 'IEM_MC_STORE_MEM_FLAT_U16' ), … … 1718 1718 ## Used by analyzeAndAnnotateName for memory MC blocks. 1719 1719 kdAnnotateNameMemStmts = { 1720 'IEM_MC_FETCH_MEM16_ U8':'__mem8',1721 'IEM_MC_FETCH_MEM32_ U8':'__mem8',1722 'IEM_MC_FETCH_MEM_ D80':'__mem80',1723 'IEM_MC_FETCH_MEM_ I16':'__mem16',1724 'IEM_MC_FETCH_MEM_ I32':'__mem32',1725 'IEM_MC_FETCH_MEM_ I64':'__mem64',1726 'IEM_MC_FETCH_MEM_ R32':'__mem32',1727 'IEM_MC_FETCH_MEM_ R64':'__mem64',1728 'IEM_MC_FETCH_MEM_ R80':'__mem80',1729 'IEM_MC_FETCH_MEM_ U128':'__mem128',1730 'IEM_MC_FETCH_MEM_ U128_ALIGN_SSE':'__mem128',1731 'IEM_MC_FETCH_MEM_ U128_NO_AC':'__mem128',1732 'IEM_MC_FETCH_MEM_ U16':'__mem16',1733 'IEM_MC_FETCH_MEM_ U16_DISP':'__mem16',1734 'IEM_MC_FETCH_MEM_ U16_SX_U32':'__mem16sx32',1735 'IEM_MC_FETCH_MEM_ U16_SX_U64':'__mem16sx64',1736 'IEM_MC_FETCH_MEM_ U16_ZX_U32':'__mem16zx32',1737 'IEM_MC_FETCH_MEM_ U16_ZX_U64':'__mem16zx64',1738 'IEM_MC_FETCH_MEM_ U256':'__mem256',1739 'IEM_MC_FETCH_MEM_ U256_ALIGN_AVX':'__mem256',1740 'IEM_MC_FETCH_MEM_ U256_NO_AC':'__mem256',1741 'IEM_MC_FETCH_MEM_ U32':'__mem32',1742 'IEM_MC_FETCH_MEM_ U32_DISP':'__mem32',1743 'IEM_MC_FETCH_MEM_ U32_SX_U64':'__mem32sx64',1744 'IEM_MC_FETCH_MEM_ U32_ZX_U64':'__mem32zx64',1745 'IEM_MC_FETCH_MEM_ U64':'__mem64',1746 'IEM_MC_FETCH_MEM_ U64_ALIGN_U128':'__mem64',1747 'IEM_MC_FETCH_MEM_ U64_DISP':'__mem64',1748 'IEM_MC_FETCH_MEM_ U8':'__mem8',1749 'IEM_MC_FETCH_MEM_ U8_DISP':'__mem8',1750 'IEM_MC_FETCH_MEM_ U8_SX_U16':'__mem8sx16',1751 'IEM_MC_FETCH_MEM_ U8_SX_U32':'__mem8sx32',1752 'IEM_MC_FETCH_MEM_ U8_SX_U64':'__mem8sx64',1753 'IEM_MC_FETCH_MEM_ U8_ZX_U16':'__mem8zx16',1754 'IEM_MC_FETCH_MEM_ U8_ZX_U32':'__mem8zx32',1755 'IEM_MC_FETCH_MEM_ U8_ZX_U64':'__mem8zx64',1756 'IEM_MC_FETCH_MEM_ XMM':'__mem128',1757 'IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE':'__mem128',1758 'IEM_MC_FETCH_MEM_ XMM_NO_AC':'__mem128',1759 'IEM_MC_FETCH_MEM_ XMM_U32':'__mem32',1760 'IEM_MC_FETCH_MEM_ XMM_U64':'__mem64',1761 'IEM_MC_FETCH_MEM_ U128_AND_XREG_U128':'__mem128',1762 'IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE_AND_XREG_XMM': '__mem128',1763 'IEM_MC_FETCH_MEM_ XMM_NO_AC_AND_XREG_XMM':'__mem128',1764 'IEM_MC_FETCH_MEM_ XMM_U32_AND_XREG_XMM':'__mem32',1765 'IEM_MC_FETCH_MEM_ XMM_U64_AND_XREG_XMM':'__mem64',1766 'IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_RAX_RDX_U64': '__mem128',1767 'IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64': '__mem128',1720 'IEM_MC_FETCH_MEM16_SEG_U8': '__mem8', 1721 'IEM_MC_FETCH_MEM32_SEG_U8': '__mem8', 1722 'IEM_MC_FETCH_MEM_SEG_D80': '__mem80', 1723 'IEM_MC_FETCH_MEM_SEG_I16': '__mem16', 1724 'IEM_MC_FETCH_MEM_SEG_I32': '__mem32', 1725 'IEM_MC_FETCH_MEM_SEG_I64': '__mem64', 1726 'IEM_MC_FETCH_MEM_SEG_R32': '__mem32', 1727 'IEM_MC_FETCH_MEM_SEG_R64': '__mem64', 1728 'IEM_MC_FETCH_MEM_SEG_R80': '__mem80', 1729 'IEM_MC_FETCH_MEM_SEG_U128': '__mem128', 1730 'IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE': '__mem128', 1731 'IEM_MC_FETCH_MEM_SEG_U128_NO_AC': '__mem128', 1732 'IEM_MC_FETCH_MEM_SEG_U16': '__mem16', 1733 'IEM_MC_FETCH_MEM_SEG_U16_DISP': '__mem16', 1734 'IEM_MC_FETCH_MEM_SEG_U16_SX_U32': '__mem16sx32', 1735 'IEM_MC_FETCH_MEM_SEG_U16_SX_U64': '__mem16sx64', 1736 'IEM_MC_FETCH_MEM_SEG_U16_ZX_U32': '__mem16zx32', 1737 'IEM_MC_FETCH_MEM_SEG_U16_ZX_U64': '__mem16zx64', 1738 'IEM_MC_FETCH_MEM_SEG_U256': '__mem256', 1739 'IEM_MC_FETCH_MEM_SEG_U256_ALIGN_AVX': '__mem256', 1740 'IEM_MC_FETCH_MEM_SEG_U256_NO_AC': '__mem256', 1741 'IEM_MC_FETCH_MEM_SEG_U32': '__mem32', 1742 'IEM_MC_FETCH_MEM_SEG_U32_DISP': '__mem32', 1743 'IEM_MC_FETCH_MEM_SEG_U32_SX_U64': '__mem32sx64', 1744 'IEM_MC_FETCH_MEM_SEG_U32_ZX_U64': '__mem32zx64', 1745 'IEM_MC_FETCH_MEM_SEG_U64': '__mem64', 1746 'IEM_MC_FETCH_MEM_SEG_U64_ALIGN_U128': '__mem64', 1747 'IEM_MC_FETCH_MEM_SEG_U64_DISP': '__mem64', 1748 'IEM_MC_FETCH_MEM_SEG_U8': '__mem8', 1749 'IEM_MC_FETCH_MEM_SEG_U8_DISP': '__mem8', 1750 'IEM_MC_FETCH_MEM_SEG_U8_SX_U16': '__mem8sx16', 1751 'IEM_MC_FETCH_MEM_SEG_U8_SX_U32': '__mem8sx32', 1752 'IEM_MC_FETCH_MEM_SEG_U8_SX_U64': '__mem8sx64', 1753 'IEM_MC_FETCH_MEM_SEG_U8_ZX_U16': '__mem8zx16', 1754 'IEM_MC_FETCH_MEM_SEG_U8_ZX_U32': '__mem8zx32', 1755 'IEM_MC_FETCH_MEM_SEG_U8_ZX_U64': '__mem8zx64', 1756 'IEM_MC_FETCH_MEM_SEG_XMM': '__mem128', 1757 'IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE': '__mem128', 1758 'IEM_MC_FETCH_MEM_SEG_XMM_NO_AC': '__mem128', 1759 'IEM_MC_FETCH_MEM_SEG_XMM_U32': '__mem32', 1760 'IEM_MC_FETCH_MEM_SEG_XMM_U64': '__mem64', 1761 'IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128': '__mem128', 1762 'IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE_AND_XREG_XMM': '__mem128', 1763 'IEM_MC_FETCH_MEM_SEG_XMM_NO_AC_AND_XREG_XMM': '__mem128', 1764 'IEM_MC_FETCH_MEM_SEG_XMM_U32_AND_XREG_XMM': '__mem32', 1765 'IEM_MC_FETCH_MEM_SEG_XMM_U64_AND_XREG_XMM': '__mem64', 1766 'IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_RAX_RDX_U64': '__mem128', 1767 'IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64': '__mem128', 1768 1768 1769 1769 'IEM_MC_STORE_MEM_I16_CONST_BY_REF': '__mem16', … … 2255 2255 asVariations = (ThreadedFunctionVariation.ksVariation_Default,); 2256 2256 2257 elif iai.McStmt.findStmtByNames(aoStmts, { 'IEM_MC_CALC_RM_EFF_ADDR' : True,2258 'IEM_MC_FETCH_MEM_ U8' : True, # mov_AL_Ob ++2259 'IEM_MC_FETCH_MEM_ U16' : True, # mov_rAX_Ov ++2260 'IEM_MC_FETCH_MEM_ U32' : True,2261 'IEM_MC_FETCH_MEM_ U64' : True,2257 elif iai.McStmt.findStmtByNames(aoStmts, { 'IEM_MC_CALC_RM_EFF_ADDR' : True, 2258 'IEM_MC_FETCH_MEM_SEG_U8' : True, # mov_AL_Ob ++ 2259 'IEM_MC_FETCH_MEM_SEG_U16' : True, # mov_rAX_Ov ++ 2260 'IEM_MC_FETCH_MEM_SEG_U32' : True, 2261 'IEM_MC_FETCH_MEM_SEG_U64' : True, 2262 2262 'IEM_MC_STORE_MEM_U8' : True, # mov_Ob_AL ++ 2263 2263 'IEM_MC_STORE_MEM_U16' : True, # mov_Ov_rAX ++ -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstCommon-x86.cpp.h
r108267 r108288 946 946 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 947 947 IEM_MC_ARG(uint16_t, offSeg, 1); 948 IEM_MC_FETCH_MEM_ U16(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEff); /** @todo check memory access pattern */948 IEM_MC_FETCH_MEM_SEG_U16(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEff); /** @todo check memory access pattern */ 949 949 IEM_MC_ARG(uint16_t, uSel, 0); 950 IEM_MC_FETCH_MEM_ U16_DISP(uSel, pVCpu->iem.s.iEffSeg, GCPtrEff, 2);950 IEM_MC_FETCH_MEM_SEG_U16_DISP(uSel, pVCpu->iem.s.iEffSeg, GCPtrEff, 2); 951 951 IEM_MC_ARG_CONST(uint8_t, iSegRegArg,/*=*/iSegReg, 2); 952 952 IEM_MC_ARG_CONST(uint8_t, iGRegArg, /*=*/iGReg, 3); … … 968 968 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 969 969 IEM_MC_ARG(uint16_t, offSeg, 1); 970 IEM_MC_FETCH_MEM_ U16(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEff); /** @todo check memory access pattern */970 IEM_MC_FETCH_MEM_SEG_U16(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEff); /** @todo check memory access pattern */ 971 971 IEM_MC_ARG(uint16_t, uSel, 0); 972 IEM_MC_FETCH_MEM_ U16_DISP(uSel, pVCpu->iem.s.iEffSeg, GCPtrEff, 2);972 IEM_MC_FETCH_MEM_SEG_U16_DISP(uSel, pVCpu->iem.s.iEffSeg, GCPtrEff, 2); 973 973 IEM_MC_ARG_CONST(uint8_t, iSegRegArg,/*=*/iSegReg, 2); 974 974 IEM_MC_ARG_CONST(uint8_t, iGRegArg, /*=*/iGReg, 3); … … 992 992 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 993 993 IEM_MC_ARG(uint32_t, offSeg, 1); /** @todo check memory access pattern */ 994 IEM_MC_FETCH_MEM_ U32(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEff);994 IEM_MC_FETCH_MEM_SEG_U32(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEff); 995 995 IEM_MC_ARG(uint16_t, uSel, 0); 996 IEM_MC_FETCH_MEM_ U16_DISP(uSel, pVCpu->iem.s.iEffSeg, GCPtrEff, 4);996 IEM_MC_FETCH_MEM_SEG_U16_DISP(uSel, pVCpu->iem.s.iEffSeg, GCPtrEff, 4); 997 997 IEM_MC_ARG_CONST(uint8_t, iSegRegArg,/*=*/iSegReg, 2); 998 998 IEM_MC_ARG_CONST(uint8_t, iGRegArg, /*=*/iGReg, 3); … … 1014 1014 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1015 1015 IEM_MC_ARG(uint32_t, offSeg, 1); /** @todo check memory access pattern */ 1016 IEM_MC_FETCH_MEM_ U32(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEff);1016 IEM_MC_FETCH_MEM_SEG_U32(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEff); 1017 1017 IEM_MC_ARG(uint16_t, uSel, 0); 1018 IEM_MC_FETCH_MEM_ U16_DISP(uSel, pVCpu->iem.s.iEffSeg, GCPtrEff, 4);1018 IEM_MC_FETCH_MEM_SEG_U16_DISP(uSel, pVCpu->iem.s.iEffSeg, GCPtrEff, 4); 1019 1019 IEM_MC_ARG_CONST(uint8_t, iSegRegArg,/*=*/iSegReg, 2); 1020 1020 IEM_MC_ARG_CONST(uint8_t, iGRegArg, /*=*/iGReg, 3); … … 1039 1039 IEM_MC_NO_NATIVE_RECOMPILE(); /** @todo sort out the IEM_IS_GUEST_CPU_AMD stuff. */ 1040 1040 if (IEM_IS_GUEST_CPU_AMD(pVCpu)) /** @todo testcase: rev 3.15 of the amd manuals claims it only loads a 32-bit greg. */ 1041 IEM_MC_FETCH_MEM_ U32_SX_U64(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEff);1041 IEM_MC_FETCH_MEM_SEG_U32_SX_U64(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEff); 1042 1042 else 1043 IEM_MC_FETCH_MEM_ U64(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEff);1044 IEM_MC_FETCH_MEM_ U16_DISP(uSel, pVCpu->iem.s.iEffSeg, GCPtrEff, 8);1043 IEM_MC_FETCH_MEM_SEG_U64(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEff); 1044 IEM_MC_FETCH_MEM_SEG_U16_DISP(uSel, pVCpu->iem.s.iEffSeg, GCPtrEff, 8); 1045 1045 IEM_MC_ARG_CONST(uint8_t, iSegRegArg,/*=*/iSegReg, 2); 1046 1046 IEM_MC_ARG_CONST(uint8_t, iGRegArg, /*=*/iGReg, 3); -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstCommonBodyMacros-x86.h
r108267 r108288 133 133 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 134 134 IEM_MC_ARG(uint16_t, u16Src, 2); \ 135 IEM_MC_FETCH_MEM_ U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \135 IEM_MC_FETCH_MEM_SEG_U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 136 136 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 137 137 IEM_MC_LOCAL(uint16_t, u16Dst); \ … … 158 158 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 159 159 IEM_MC_ARG(uint32_t, u32Src, 2); \ 160 IEM_MC_FETCH_MEM_ U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \160 IEM_MC_FETCH_MEM_SEG_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 161 161 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 162 162 IEM_MC_LOCAL(uint32_t, u32Dst); \ … … 184 184 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 185 185 IEM_MC_ARG(uint64_t, u64Src, 2); \ 186 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \186 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 187 187 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 188 188 IEM_MC_LOCAL(uint64_t, u64Dst); \ … … 309 309 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 310 310 IEM_MC_ARG(uint16_t, u16Src, 1); \ 311 IEM_MC_FETCH_MEM_ U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \311 IEM_MC_FETCH_MEM_SEG_U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 312 312 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 313 313 IEM_MC_LOCAL(uint16_t, u16Dst); \ … … 334 334 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 335 335 IEM_MC_ARG(uint32_t, u32Src, 1); \ 336 IEM_MC_FETCH_MEM_ U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \336 IEM_MC_FETCH_MEM_SEG_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 337 337 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 338 338 IEM_MC_LOCAL(uint32_t, u32Dst); \ … … 360 360 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 361 361 IEM_MC_ARG(uint64_t, u64Src, 1); \ 362 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \362 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 363 363 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 364 364 IEM_MC_LOCAL(uint64_t, u64Dst); \ -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstOneByte-x86.cpp.h
r108287 r108288 201 201 IEM_MC_NATIVE_IF(0) { \ 202 202 IEM_MC_LOCAL(uint8_t, u8Dst); \ 203 IEM_MC_FETCH_MEM_ U8(u8Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \203 IEM_MC_FETCH_MEM_SEG_U8(u8Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 204 204 IEM_MC_LOCAL(uint8_t, u8SrcEmit); \ 205 205 IEM_MC_FETCH_GREG_U8(u8SrcEmit, IEM_GET_MODRM_REG(pVCpu, a_bRm)); \ … … 271 271 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 272 272 IEM_MC_ARG(uint8_t, u8Src, 2); \ 273 IEM_MC_FETCH_MEM_ U8(u8Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \273 IEM_MC_FETCH_MEM_SEG_U8(u8Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 274 274 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 275 275 IEM_MC_LOCAL(uint8_t, u8Dst); \ … … 330 330 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 331 331 IEM_MC_ARG(uint8_t, u8Src, 2); \ 332 IEM_MC_FETCH_MEM_ U8(u8Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \332 IEM_MC_FETCH_MEM_SEG_U8(u8Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 333 333 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 334 334 IEM_MC_LOCAL(uint8_t, u8Dst); \ … … 677 677 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 678 678 IEM_MC_LOCAL(uint16_t, u16Dst); \ 679 IEM_MC_FETCH_MEM_ U16(u16Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \679 IEM_MC_FETCH_MEM_SEG_U16(u16Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 680 680 IEM_MC_LOCAL(uint16_t, u16SrcEmit); \ 681 681 IEM_MC_FETCH_GREG_U16(u16SrcEmit, IEM_GET_MODRM_REG(pVCpu, a_bRm)); \ … … 705 705 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 706 706 IEM_MC_LOCAL(uint32_t, u32Dst); \ 707 IEM_MC_FETCH_MEM_ U32(u32Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \707 IEM_MC_FETCH_MEM_SEG_U32(u32Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 708 708 IEM_MC_LOCAL(uint32_t, u32SrcEmit); \ 709 709 IEM_MC_FETCH_GREG_U32(u32SrcEmit, IEM_GET_MODRM_REG(pVCpu, a_bRm)); \ … … 733 733 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 734 734 IEM_MC_LOCAL(uint64_t, u64Dst); \ 735 IEM_MC_FETCH_MEM_ U64(u64Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \735 IEM_MC_FETCH_MEM_SEG_U64(u64Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 736 736 IEM_MC_LOCAL(uint64_t, u64SrcEmit); \ 737 737 IEM_MC_FETCH_GREG_U64(u64SrcEmit, IEM_GET_MODRM_REG(pVCpu, a_bRm)); \ … … 2029 2029 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 2030 2030 IEM_MC_ARG(uint16_t, u16Src, 2); \ 2031 IEM_MC_FETCH_MEM_ U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \2031 IEM_MC_FETCH_MEM_SEG_U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 2032 2032 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 2033 2033 IEM_MC_LOCAL(uint16_t, u16Dst); \ … … 2053 2053 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 2054 2054 IEM_MC_ARG(uint32_t, u32Src, 2); \ 2055 IEM_MC_FETCH_MEM_ U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \2055 IEM_MC_FETCH_MEM_SEG_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 2056 2056 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 2057 2057 IEM_MC_LOCAL(uint32_t, u32Dst); \ … … 2077 2077 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 2078 2078 IEM_MC_ARG(uint64_t, u64Src, 2); \ 2079 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \2079 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 2080 2080 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 2081 2081 IEM_MC_LOCAL(uint64_t, u64Dst); \ … … 3076 3076 3077 3077 IEM_MC_FETCH_GREG_I16(i16Index, IEM_GET_MODRM_REG_8(bRm)); 3078 IEM_MC_FETCH_MEM_ I16(i16LowerBounds, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3079 IEM_MC_FETCH_MEM_ I16_DISP(i16UpperBounds, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 2);3078 IEM_MC_FETCH_MEM_SEG_I16(i16LowerBounds, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3079 IEM_MC_FETCH_MEM_SEG_I16_DISP(i16UpperBounds, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 2); 3080 3080 3081 3081 IEM_MC_CALL_CIMPL_3(0, 0, iemCImpl_bound_16, i16Index, i16LowerBounds, i16UpperBounds); /* returns */ … … 3094 3094 3095 3095 IEM_MC_FETCH_GREG_I32(i32Index, IEM_GET_MODRM_REG_8(bRm)); 3096 IEM_MC_FETCH_MEM_ I32(i32LowerBounds, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3097 IEM_MC_FETCH_MEM_ I32_DISP(i32UpperBounds, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 4);3096 IEM_MC_FETCH_MEM_SEG_I32(i32LowerBounds, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3097 IEM_MC_FETCH_MEM_SEG_I32_DISP(i32UpperBounds, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 4); 3098 3098 3099 3099 IEM_MC_CALL_CIMPL_3(0, 0, iemCImpl_bound_32, i32Index, i32LowerBounds, i32UpperBounds); /* returns */ … … 3223 3223 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 3224 3224 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 3225 IEM_MC_FETCH_MEM_ U32_SX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);3225 IEM_MC_FETCH_MEM_SEG_U32_SX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 3226 3226 IEM_MC_STORE_GREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), u64Value); 3227 3227 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 3416 3416 3417 3417 IEM_MC_LOCAL(uint16_t, u16Tmp); 3418 IEM_MC_FETCH_MEM_ U16(u16Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst);3418 IEM_MC_FETCH_MEM_SEG_U16(u16Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 3419 3419 3420 3420 IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Dst, u16Tmp, 1); … … 3464 3464 3465 3465 IEM_MC_LOCAL(uint32_t, u32Tmp); 3466 IEM_MC_FETCH_MEM_ U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst);3466 IEM_MC_FETCH_MEM_SEG_U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 3467 3467 3468 3468 IEM_MC_ARG_LOCAL_REF(uint32_t *, pu32Dst, u32Tmp, 1); … … 3512 3512 3513 3513 IEM_MC_LOCAL(uint64_t, u64Tmp); 3514 IEM_MC_FETCH_MEM_ U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst);3514 IEM_MC_FETCH_MEM_SEG_U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 3515 3515 3516 3516 IEM_MC_ARG_LOCAL_REF(uint64_t *, pu64Dst, u64Tmp, 1); … … 3621 3621 3622 3622 IEM_MC_LOCAL(uint16_t, u16Tmp); 3623 IEM_MC_FETCH_MEM_ U16(u16Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst);3623 IEM_MC_FETCH_MEM_SEG_U16(u16Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 3624 3624 3625 3625 IEM_MC_ARG_LOCAL_REF(uint16_t *, pu16Dst, u16Tmp, 1); … … 3669 3669 3670 3670 IEM_MC_LOCAL(uint32_t, u32Tmp); 3671 IEM_MC_FETCH_MEM_ U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst);3671 IEM_MC_FETCH_MEM_SEG_U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 3672 3672 3673 3673 IEM_MC_ARG_LOCAL_REF(uint32_t *, pu32Dst, u32Tmp, 1); … … 3717 3717 3718 3718 IEM_MC_LOCAL(uint64_t, u64Tmp); 3719 IEM_MC_FETCH_MEM_ U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst);3719 IEM_MC_FETCH_MEM_SEG_U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 3720 3720 3721 3721 IEM_MC_ARG_LOCAL_REF(uint64_t *, pu64Dst, u64Tmp, 1); … … 4505 4505 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 4506 4506 IEM_MC_LOCAL(uint8_t, u8Dst); \ 4507 IEM_MC_FETCH_MEM_ U8(u8Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \4507 IEM_MC_FETCH_MEM_SEG_U8(u8Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 4508 4508 IEM_MC_LOCAL_EFLAGS(uEFlags); \ 4509 4509 IEM_MC_NATIVE_EMIT_3(RT_CONCAT3(iemNativeEmit_,a_InsNm,_r_i_efl)IEM_TEMPL_ARG_2(8, 8), u8Dst, u8Imm, uEFlags); \ … … 5006 5006 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 5007 5007 IEM_MC_LOCAL(uint16_t, u16Dst); \ 5008 IEM_MC_FETCH_MEM_ U16(u16Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \5008 IEM_MC_FETCH_MEM_SEG_U16(u16Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 5009 5009 IEM_MC_LOCAL_EFLAGS(uEFlags); \ 5010 5010 IEM_MC_NATIVE_EMIT_3(RT_CONCAT3(iemNativeEmit_,a_InsNm,_r_i_efl)IEM_TEMPL_ARG_2(16, 16), u16Dst, u16Imm, uEFlags); \ … … 5034 5034 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 5035 5035 IEM_MC_LOCAL(uint32_t, u32Dst); \ 5036 IEM_MC_FETCH_MEM_ U32(u32Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \5036 IEM_MC_FETCH_MEM_SEG_U32(u32Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 5037 5037 IEM_MC_LOCAL_EFLAGS(uEFlags); \ 5038 5038 IEM_MC_NATIVE_EMIT_3(RT_CONCAT3(iemNativeEmit_,a_InsNm,_r_i_efl)IEM_TEMPL_ARG_2(32, 32), u32Dst, u32Imm, uEFlags); \ … … 5062 5062 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 5063 5063 IEM_MC_LOCAL(uint64_t, u64Dst); \ 5064 IEM_MC_FETCH_MEM_ U64(u64Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \5064 IEM_MC_FETCH_MEM_SEG_U64(u64Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 5065 5065 IEM_MC_LOCAL_EFLAGS( uEFlags); \ 5066 5066 IEM_MC_NATIVE_EMIT_3(RT_CONCAT3(iemNativeEmit_,a_InsNm,_r_i_efl)IEM_TEMPL_ARG_2(64, 32), u64Dst, u64Imm, uEFlags); \ … … 5555 5555 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 5556 5556 IEM_MC_LOCAL(uint16_t, u16Dst); \ 5557 IEM_MC_FETCH_MEM_ U16(u16Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \5557 IEM_MC_FETCH_MEM_SEG_U16(u16Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 5558 5558 IEM_MC_LOCAL_EFLAGS( uEFlags); \ 5559 5559 IEM_MC_NATIVE_EMIT_3(RT_CONCAT3(iemNativeEmit_,a_InsNm,_r_i_efl)IEM_TEMPL_ARG_2(16, 8), u16Dst, (uint16_t)(int16_t)(int8_t)u8Imm, uEFlags); \ … … 5581 5581 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 5582 5582 IEM_MC_LOCAL(uint32_t, u32Dst); \ 5583 IEM_MC_FETCH_MEM_ U32(u32Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \5583 IEM_MC_FETCH_MEM_SEG_U32(u32Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 5584 5584 IEM_MC_LOCAL_EFLAGS( uEFlags); \ 5585 5585 IEM_MC_NATIVE_EMIT_3(RT_CONCAT3(iemNativeEmit_,a_InsNm,_r_i_efl)IEM_TEMPL_ARG_2(32, 8), u32Dst, (uint32_t)(int32_t)(int8_t)u8Imm, uEFlags); \ … … 5607 5607 IEM_MC_NATIVE_IF(a_fNativeArchs) { \ 5608 5608 IEM_MC_LOCAL(uint64_t, u64Dst); \ 5609 IEM_MC_FETCH_MEM_ U64(u64Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \5609 IEM_MC_FETCH_MEM_SEG_U64(u64Dst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 5610 5610 IEM_MC_LOCAL_EFLAGS( uEFlags); \ 5611 5611 IEM_MC_NATIVE_EMIT_3(RT_CONCAT3(iemNativeEmit_,a_InsNm,_r_i_efl)IEM_TEMPL_ARG_2(64, 8), u64Dst, (uint64_t)(int64_t)(int8_t)u8Imm, uEFlags); \ … … 6265 6265 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6266 6266 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6267 IEM_MC_FETCH_MEM_ U8(u8Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);6267 IEM_MC_FETCH_MEM_SEG_U8(u8Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 6268 6268 IEM_MC_STORE_GREG_U8(IEM_GET_MODRM_REG(pVCpu, bRm), u8Value); 6269 6269 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 6335 6335 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6336 6336 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6337 IEM_MC_FETCH_MEM_ U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);6337 IEM_MC_FETCH_MEM_SEG_U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 6338 6338 IEM_MC_STORE_GREG_U16(IEM_GET_MODRM_REG(pVCpu, bRm), u16Value); 6339 6339 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 6347 6347 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6348 6348 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6349 IEM_MC_FETCH_MEM_ U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);6349 IEM_MC_FETCH_MEM_SEG_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 6350 6350 IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), u32Value); 6351 6351 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 6359 6359 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 6360 6360 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6361 IEM_MC_FETCH_MEM_ U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);6361 IEM_MC_FETCH_MEM_SEG_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 6362 6362 IEM_MC_STORE_GREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), u64Value); 6363 6363 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 6608 6608 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 6609 6609 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 6610 IEM_MC_FETCH_MEM_ U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \6610 IEM_MC_FETCH_MEM_SEG_U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 6611 6611 IEM_MC_CALL_CIMPL_2(a_fCImplFlags, \ 6612 6612 RT_BIT_64(kIemNativeGstReg_SegSelFirst + iSegReg) \ … … 7252 7252 IEM_MC_LOCAL(uint8_t, u8Tmp); 7253 7253 IEM_MC_LOCAL_CONST(RTGCPTR, GCPtrMemOff, GCPtrMemOffDecode); 7254 IEM_MC_FETCH_MEM_ U8(u8Tmp, pVCpu->iem.s.iEffSeg, GCPtrMemOff);7254 IEM_MC_FETCH_MEM_SEG_U8(u8Tmp, pVCpu->iem.s.iEffSeg, GCPtrMemOff); 7255 7255 IEM_MC_STORE_GREG_U8(X86_GREG_xAX, u8Tmp); 7256 7256 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 7281 7281 IEM_MC_LOCAL(uint16_t, u16Tmp); 7282 7282 IEM_MC_LOCAL_CONST(RTGCPTR, GCPtrMemOff, GCPtrMemOffDecode); 7283 IEM_MC_FETCH_MEM_ U16(u16Tmp, pVCpu->iem.s.iEffSeg, GCPtrMemOff);7283 IEM_MC_FETCH_MEM_SEG_U16(u16Tmp, pVCpu->iem.s.iEffSeg, GCPtrMemOff); 7284 7284 IEM_MC_STORE_GREG_U16(X86_GREG_xAX, u16Tmp); 7285 7285 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 7292 7292 IEM_MC_LOCAL(uint32_t, u32Tmp); 7293 7293 IEM_MC_LOCAL_CONST(RTGCPTR, GCPtrMemOff, GCPtrMemOffDecode); 7294 IEM_MC_FETCH_MEM_ U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrMemOff);7294 IEM_MC_FETCH_MEM_SEG_U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrMemOff); 7295 7295 IEM_MC_STORE_GREG_U32(X86_GREG_xAX, u32Tmp); 7296 7296 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 7303 7303 IEM_MC_LOCAL(uint64_t, u64Tmp); 7304 7304 IEM_MC_LOCAL_CONST(RTGCPTR, GCPtrMemOff, GCPtrMemOffDecode); 7305 IEM_MC_FETCH_MEM_ U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrMemOff);7305 IEM_MC_FETCH_MEM_SEG_U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrMemOff); 7306 7306 IEM_MC_STORE_GREG_U64(X86_GREG_xAX, u64Tmp); 7307 7307 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 7401 7401 IEM_MC_LOCAL(RTGCPTR, uAddr); \ 7402 7402 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xSI); \ 7403 IEM_MC_FETCH_MEM_ U##ValBits(uValue, pVCpu->iem.s.iEffSeg, uAddr); \7403 IEM_MC_FETCH_MEM_SEG_U##ValBits(uValue, pVCpu->iem.s.iEffSeg, uAddr); \ 7404 7404 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \ 7405 7405 IEM_MC_STORE_MEM_U##ValBits(X86_SREG_ES, uAddr, uValue); \ … … 7600 7600 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr1, X86_GREG_xSI); \ 7601 7601 IEM_MC_LOCAL(uint##ValBits##_t, uValue1); \ 7602 IEM_MC_FETCH_MEM_ U##ValBits(uValue1, pVCpu->iem.s.iEffSeg, uAddr1); \7602 IEM_MC_FETCH_MEM_SEG_U##ValBits(uValue1, pVCpu->iem.s.iEffSeg, uAddr1); \ 7603 7603 \ 7604 7604 IEM_MC_LOCAL(RTGCPTR, uAddr2); \ 7605 7605 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr2, X86_GREG_xDI); \ 7606 7606 IEM_MC_ARG(uint##ValBits##_t, uValue2, 2); \ 7607 IEM_MC_FETCH_MEM_ U##ValBits(uValue2, X86_SREG_ES, uAddr2); \7607 IEM_MC_FETCH_MEM_SEG_U##ValBits(uValue2, X86_SREG_ES, uAddr2); \ 7608 7608 \ 7609 7609 IEM_MC_ARG_LOCAL_REF(uint##ValBits##_t *, puValue1, uValue1, 1); \ … … 8116 8116 IEM_MC_LOCAL(RTGCPTR, uAddr); \ 8117 8117 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xSI); \ 8118 IEM_MC_FETCH_MEM_ U##ValBits(uValue, pVCpu->iem.s.iEffSeg, uAddr); \8118 IEM_MC_FETCH_MEM_SEG_U##ValBits(uValue, pVCpu->iem.s.iEffSeg, uAddr); \ 8119 8119 IEM_MC_STORE_GREG_U##ValBits(X86_GREG_xAX, uValue); \ 8120 8120 IEM_MC_IF_EFL_BIT_SET(X86_EFL_DF) { \ … … 8312 8312 \ 8313 8313 IEM_MC_ARG(uint##ValBits##_t, uValue, 2); \ 8314 IEM_MC_FETCH_MEM_ U##ValBits(uValue, X86_SREG_ES, uAddr); \8314 IEM_MC_FETCH_MEM_SEG_U##ValBits(uValue, X86_SREG_ES, uAddr); \ 8315 8315 IEM_MC_ARG(uint##ValBits##_t *, puRax, 1); \ 8316 8316 IEM_MC_REF_GREG_U##ValBits(puRax, X86_GREG_xAX); \ … … 10506 10506 IEM_MC_FETCH_GREG_U8_ZX_U16(u16Addr, X86_GREG_xAX); 10507 10507 IEM_MC_ADD_GREG_U16_TO_LOCAL(u16Addr, X86_GREG_xBX); 10508 IEM_MC_FETCH_MEM16_ U8(u8Tmp, pVCpu->iem.s.iEffSeg, u16Addr);10508 IEM_MC_FETCH_MEM16_SEG_U8(u8Tmp, pVCpu->iem.s.iEffSeg, u16Addr); 10509 10509 IEM_MC_STORE_GREG_U8(X86_GREG_xAX, u8Tmp); 10510 10510 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 10519 10519 IEM_MC_FETCH_GREG_U8_ZX_U32(u32Addr, X86_GREG_xAX); 10520 10520 IEM_MC_ADD_GREG_U32_TO_LOCAL(u32Addr, X86_GREG_xBX); 10521 IEM_MC_FETCH_MEM32_ U8(u8Tmp, pVCpu->iem.s.iEffSeg, u32Addr);10521 IEM_MC_FETCH_MEM32_SEG_U8(u8Tmp, pVCpu->iem.s.iEffSeg, u32Addr); 10522 10522 IEM_MC_STORE_GREG_U8(X86_GREG_xAX, u8Tmp); 10523 10523 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 10532 10532 IEM_MC_FETCH_GREG_U8_ZX_U64(u64Addr, X86_GREG_xAX); 10533 10533 IEM_MC_ADD_GREG_U64_TO_LOCAL(u64Addr, X86_GREG_xBX); 10534 IEM_MC_FETCH_MEM_ U8(u8Tmp, pVCpu->iem.s.iEffSeg, u64Addr);10534 IEM_MC_FETCH_MEM_SEG_U8(u8Tmp, pVCpu->iem.s.iEffSeg, u64Addr); 10535 10535 IEM_MC_STORE_GREG_U8(X86_GREG_xAX, u8Tmp); 10536 10536 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 10722 10722 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 10723 10723 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 10724 IEM_MC_FETCH_MEM_ R32(r32Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);10724 IEM_MC_FETCH_MEM_SEG_R32(r32Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 10725 10725 10726 10726 IEM_MC_PREPARE_FPU_USAGE(); … … 10771 10771 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 10772 10772 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 10773 IEM_MC_FETCH_MEM_ R32(r32Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);10773 IEM_MC_FETCH_MEM_SEG_R32(r32Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 10774 10774 10775 10775 IEM_MC_PREPARE_FPU_USAGE(); … … 10804 10804 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 10805 10805 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 10806 IEM_MC_FETCH_MEM_ R32(r32Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);10806 IEM_MC_FETCH_MEM_SEG_R32(r32Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 10807 10807 10808 10808 IEM_MC_PREPARE_FPU_USAGE(); … … 10910 10910 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 10911 10911 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 10912 IEM_MC_FETCH_MEM_ R32(r32Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);10912 IEM_MC_FETCH_MEM_SEG_R32(r32Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 10913 10913 IEM_MC_PREPARE_FPU_USAGE(); 10914 10914 IEM_MC_IF_FPUREG_IS_EMPTY(7) { … … 11035 11035 11036 11036 IEM_MC_ARG(uint16_t, u16Fsw, 0); 11037 IEM_MC_FETCH_MEM_ U16(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);11037 IEM_MC_FETCH_MEM_SEG_U16(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 11038 11038 11039 11039 IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_FPU, RT_BIT_64(kIemNativeGstReg_FpuFcw), … … 11848 11848 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 11849 11849 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 11850 IEM_MC_FETCH_MEM_ I32(i32Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);11850 IEM_MC_FETCH_MEM_SEG_I32(i32Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 11851 11851 11852 11852 IEM_MC_PREPARE_FPU_USAGE(); … … 11897 11897 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 11898 11898 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 11899 IEM_MC_FETCH_MEM_ I32(i32Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);11899 IEM_MC_FETCH_MEM_SEG_I32(i32Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 11900 11900 11901 11901 IEM_MC_PREPARE_FPU_USAGE(); … … 11930 11930 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 11931 11931 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 11932 IEM_MC_FETCH_MEM_ I32(i32Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);11932 IEM_MC_FETCH_MEM_SEG_I32(i32Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 11933 11933 11934 11934 IEM_MC_PREPARE_FPU_USAGE(); … … 12037 12037 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 12038 12038 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 12039 IEM_MC_FETCH_MEM_ I32(i32Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);12039 IEM_MC_FETCH_MEM_SEG_I32(i32Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 12040 12040 12041 12041 IEM_MC_PREPARE_FPU_USAGE(); … … 12186 12186 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 12187 12187 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 12188 IEM_MC_FETCH_MEM_ R80(r80Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);12188 IEM_MC_FETCH_MEM_SEG_R80(r80Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 12189 12189 12190 12190 IEM_MC_PREPARE_FPU_USAGE(); … … 12596 12596 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 12597 12597 12598 IEM_MC_FETCH_MEM_ R64(r64Factor2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);12598 IEM_MC_FETCH_MEM_SEG_R64(r64Factor2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 12599 12599 IEM_MC_PREPARE_FPU_USAGE(); 12600 12600 IEM_MC_IF_FPUREG_NOT_EMPTY_REF_R80(pr80Factor1, 0) { … … 12644 12644 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 12645 12645 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 12646 IEM_MC_FETCH_MEM_ R64(r64Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);12646 IEM_MC_FETCH_MEM_SEG_R64(r64Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 12647 12647 12648 12648 IEM_MC_PREPARE_FPU_USAGE(); … … 12677 12677 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 12678 12678 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 12679 IEM_MC_FETCH_MEM_ R64(r64Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);12679 IEM_MC_FETCH_MEM_SEG_R64(r64Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 12680 12680 12681 12681 IEM_MC_PREPARE_FPU_USAGE(); … … 12782 12782 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 12783 12783 12784 IEM_MC_FETCH_MEM_ R64(r64Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);12784 IEM_MC_FETCH_MEM_SEG_R64(r64Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 12785 12785 IEM_MC_PREPARE_FPU_USAGE(); 12786 12786 IEM_MC_IF_FPUREG_IS_EMPTY(7) { … … 13158 13158 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 13159 13159 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 13160 IEM_MC_FETCH_MEM_ I16(i16Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);13160 IEM_MC_FETCH_MEM_SEG_I16(i16Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 13161 13161 13162 13162 IEM_MC_PREPARE_FPU_USAGE(); … … 13207 13207 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 13208 13208 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 13209 IEM_MC_FETCH_MEM_ I16(i16Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);13209 IEM_MC_FETCH_MEM_SEG_I16(i16Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 13210 13210 13211 13211 IEM_MC_PREPARE_FPU_USAGE(); … … 13240 13240 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 13241 13241 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 13242 IEM_MC_FETCH_MEM_ I16(i16Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);13242 IEM_MC_FETCH_MEM_SEG_I16(i16Val2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 13243 13243 13244 13244 IEM_MC_PREPARE_FPU_USAGE(); … … 13403 13403 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 13404 13404 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 13405 IEM_MC_FETCH_MEM_ I16(i16Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);13405 IEM_MC_FETCH_MEM_SEG_I16(i16Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 13406 13406 13407 13407 IEM_MC_PREPARE_FPU_USAGE(); … … 13552 13552 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 13553 13553 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 13554 IEM_MC_FETCH_MEM_ D80(d80Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);13554 IEM_MC_FETCH_MEM_SEG_D80(d80Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 13555 13555 13556 13556 IEM_MC_PREPARE_FPU_USAGE(); … … 13584 13584 IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE(); 13585 13585 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 13586 IEM_MC_FETCH_MEM_ I64(i64Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);13586 IEM_MC_FETCH_MEM_SEG_I64(i64Val, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 13587 13587 13588 13588 IEM_MC_PREPARE_FPU_USAGE(); … … 14585 14585 \ 14586 14586 IEM_MC_ARG(uint8_t, u8Value, 1); \ 14587 IEM_MC_FETCH_MEM_ U8(u8Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \14587 IEM_MC_FETCH_MEM_SEG_U8(u8Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 14588 14588 IEM_MC_ARG(uint16_t *, pu16AX, 0); \ 14589 14589 IEM_MC_REF_GREG_U16(pu16AX, X86_GREG_xAX); \ … … 14677 14677 \ 14678 14678 IEM_MC_ARG(uint16_t, u16Value, 2); \ 14679 IEM_MC_FETCH_MEM_ U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \14679 IEM_MC_FETCH_MEM_SEG_U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 14680 14680 IEM_MC_ARG(uint16_t *, pu16AX, 0); \ 14681 14681 IEM_MC_REF_GREG_U16(pu16AX, X86_GREG_xAX); \ … … 14698 14698 \ 14699 14699 IEM_MC_ARG(uint32_t, u32Value, 2); \ 14700 IEM_MC_FETCH_MEM_ U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \14700 IEM_MC_FETCH_MEM_SEG_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 14701 14701 IEM_MC_ARG(uint32_t *, pu32AX, 0); \ 14702 14702 IEM_MC_REF_GREG_U32(pu32AX, X86_GREG_xAX); \ … … 14721 14721 \ 14722 14722 IEM_MC_ARG(uint64_t, u64Value, 2); \ 14723 IEM_MC_FETCH_MEM_ U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \14723 IEM_MC_FETCH_MEM_SEG_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 14724 14724 IEM_MC_ARG(uint64_t *, pu64AX, 0); \ 14725 14725 IEM_MC_REF_GREG_U64(pu64AX, X86_GREG_xAX); \ … … 15164 15164 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 15165 15165 IEM_MC_LOCAL(uint16_t, u16Target); 15166 IEM_MC_FETCH_MEM_ U16(u16Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);15166 IEM_MC_FETCH_MEM_SEG_U16(u16Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 15167 15167 IEM_MC_IND_CALL_U16_AND_FINISH(u16Target); 15168 15168 IEM_MC_END(); … … 15175 15175 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 15176 15176 IEM_MC_LOCAL(uint32_t, u32Target); 15177 IEM_MC_FETCH_MEM_ U32(u32Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);15177 IEM_MC_FETCH_MEM_SEG_U32(u32Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 15178 15178 IEM_MC_IND_CALL_U32_AND_FINISH(u32Target); 15179 15179 IEM_MC_END(); … … 15186 15186 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 15187 15187 IEM_MC_LOCAL(uint64_t, u64Target); 15188 IEM_MC_FETCH_MEM_ U64(u64Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);15188 IEM_MC_FETCH_MEM_SEG_U64(u64Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 15189 15189 IEM_MC_IND_CALL_U64_AND_FINISH(u64Target); 15190 15190 IEM_MC_END(); … … 15221 15221 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, a_bRm, 0); \ 15222 15222 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 15223 IEM_MC_FETCH_MEM_ U16(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \15224 IEM_MC_FETCH_MEM_ U16_DISP(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 2); \15223 IEM_MC_FETCH_MEM_SEG_U16(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 15224 IEM_MC_FETCH_MEM_SEG_U16_DISP(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 2); \ 15225 15225 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_BRANCH_INDIRECT | IEM_CIMPL_F_BRANCH_FAR | (a_fCImplExtra) \ 15226 15226 | IEM_CIMPL_F_MODE | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT, 0, \ … … 15237 15237 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, a_bRm, 0); \ 15238 15238 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 15239 IEM_MC_FETCH_MEM_ U32(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \15240 IEM_MC_FETCH_MEM_ U16_DISP(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 4); \15239 IEM_MC_FETCH_MEM_SEG_U32(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 15240 IEM_MC_FETCH_MEM_SEG_U16_DISP(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 4); \ 15241 15241 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_BRANCH_INDIRECT | IEM_CIMPL_F_BRANCH_FAR | (a_fCImplExtra) \ 15242 15242 | IEM_CIMPL_F_MODE | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT, 0, \ … … 15254 15254 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, a_bRm, 0); \ 15255 15255 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 15256 IEM_MC_FETCH_MEM_ U64(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \15257 IEM_MC_FETCH_MEM_ U16_DISP(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 8); \15256 IEM_MC_FETCH_MEM_SEG_U64(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 15257 IEM_MC_FETCH_MEM_SEG_U16_DISP(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 8); \ 15258 15258 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_BRANCH_INDIRECT | IEM_CIMPL_F_BRANCH_FAR | (a_fCImplExtra) \ 15259 15259 | IEM_CIMPL_F_MODE /* no gates */, 0, \ … … 15332 15332 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 15333 15333 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 15334 IEM_MC_FETCH_MEM_ U16(u16Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);15334 IEM_MC_FETCH_MEM_SEG_U16(u16Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 15335 15335 IEM_MC_IND_JMP_U16_AND_FINISH(u16Target); 15336 15336 IEM_MC_END(); … … 15343 15343 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 15344 15344 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 15345 IEM_MC_FETCH_MEM_ U32(u32Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);15345 IEM_MC_FETCH_MEM_SEG_U32(u32Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 15346 15346 IEM_MC_IND_JMP_U32_AND_FINISH(u32Target); 15347 15347 IEM_MC_END(); … … 15354 15354 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 15355 15355 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 15356 IEM_MC_FETCH_MEM_ U64(u64Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);15356 IEM_MC_FETCH_MEM_SEG_U64(u64Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 15357 15357 IEM_MC_IND_JMP_U64_AND_FINISH(u64Target); 15358 15358 IEM_MC_END(); … … 15398 15398 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 15399 15399 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 15400 IEM_MC_FETCH_MEM_ U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);15400 IEM_MC_FETCH_MEM_SEG_U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 15401 15401 IEM_MC_PUSH_U16(u16Src); 15402 15402 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 15410 15410 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 15411 15411 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 15412 IEM_MC_FETCH_MEM_ U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);15412 IEM_MC_FETCH_MEM_SEG_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 15413 15413 IEM_MC_PUSH_U32(u32Src); 15414 15414 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 15422 15422 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 15423 15423 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 15424 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);15424 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 15425 15425 IEM_MC_PUSH_U64(u64Src); 15426 15426 IEM_MC_ADVANCE_PC_AND_FINISH(); -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstThree0f38-x86.cpp.h
r108267 r108288 81 81 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3); 82 82 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 83 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);83 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 84 84 85 85 IEM_MC_PREPARE_FPU_USAGE(); … … 141 141 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3); 142 142 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 143 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);143 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 144 144 145 145 IEM_MC_PREPARE_SSE_USAGE(); … … 199 199 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 200 200 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 201 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);201 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 202 202 203 203 IEM_MC_PREPARE_SSE_USAGE(); … … 255 255 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse42); 256 256 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 257 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);257 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 258 258 259 259 IEM_MC_PREPARE_SSE_USAGE(); … … 314 314 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fAesNi); 315 315 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 316 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);316 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 317 317 318 318 IEM_MC_PREPARE_SSE_USAGE(); … … 374 374 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSha); 375 375 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 376 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);376 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 377 377 378 378 IEM_MC_PREPARE_SSE_USAGE(); … … 668 668 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); \ 669 669 IEM_MC_PREPARE_SSE_USAGE(); \ 670 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \670 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 671 671 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 672 672 IEM_MC_REF_XREG_U128_CONST(puMask, 0); \ … … 768 768 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 769 769 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 770 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);770 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 771 771 772 772 IEM_MC_PREPARE_SSE_USAGE(); … … 892 892 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); \ 893 893 IEM_MC_PREPARE_SSE_USAGE(); \ 894 IEM_MC_FETCH_MEM_ U## a_SrcWidth (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \894 IEM_MC_FETCH_MEM_SEG_U## a_SrcWidth (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 895 895 IEM_MC_NATIVE_IF(a_fMemNativeArchs) { \ 896 896 IEM_MC_NATIVE_EMIT_2(RT_CONCAT3(iemNativeEmit_,a_Instr,_rv_u128), IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); \ … … 1010 1010 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 1011 1011 1012 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1012 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1013 1013 IEM_MC_STORE_XREG_U128(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 1014 1014 … … 1563 1563 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSha); 1564 1564 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 1565 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1565 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1566 1566 1567 1567 IEM_MC_PREPARE_SSE_USAGE(); … … 1704 1704 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1705 1705 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1706 IEM_MC_FETCH_MEM_ U16(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1706 IEM_MC_FETCH_MEM_SEG_U16(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1707 1707 1708 1708 IEM_MC_BSWAP_LOCAL_U16(uSrc); … … 1720 1720 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1721 1721 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1722 IEM_MC_FETCH_MEM_ U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1722 IEM_MC_FETCH_MEM_SEG_U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1723 1723 1724 1724 IEM_MC_BSWAP_LOCAL_U32(uSrc); … … 1736 1736 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1737 1737 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1738 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1738 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1739 1739 1740 1740 IEM_MC_BSWAP_LOCAL_U64(uSrc); … … 1795 1795 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1796 1796 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1797 IEM_MC_FETCH_MEM_ U8(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1797 IEM_MC_FETCH_MEM_SEG_U8(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1798 1798 1799 1799 IEM_MC_REF_GREG_U32(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); … … 1950 1950 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1951 1951 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1952 IEM_MC_FETCH_MEM_ U16(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1952 IEM_MC_FETCH_MEM_SEG_U16(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1953 1953 1954 1954 IEM_MC_REF_GREG_U32(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); … … 1969 1969 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1970 1970 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1971 IEM_MC_FETCH_MEM_ U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1971 IEM_MC_FETCH_MEM_SEG_U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1972 1972 1973 1973 IEM_MC_REF_GREG_U32(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); … … 1988 1988 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1989 1989 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1990 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1990 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1991 1991 1992 1992 IEM_MC_REF_GREG_U32(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); … … 2059 2059 \ 2060 2060 IEM_MC_ARG(uint64_t, u64Src, 2); \ 2061 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \2061 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 2062 2062 IEM_MC_ARG(uint64_t *, pu64Dst, 1); \ 2063 2063 IEM_MC_REF_GREG_U64(pu64Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ … … 2097 2097 \ 2098 2098 IEM_MC_ARG(uint32_t, u32Src, 2); \ 2099 IEM_MC_FETCH_MEM_ U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \2099 IEM_MC_FETCH_MEM_SEG_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 2100 2100 IEM_MC_ARG(uint32_t *, pu32Dst, 1); \ 2101 2101 IEM_MC_REF_GREG_U32(pu32Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstThree0f3a-x86.cpp.h
r108267 r108288 81 81 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3); 82 82 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 83 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);83 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 84 84 85 85 IEM_MC_PREPARE_SSE_USAGE(); … … 140 140 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 141 141 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 142 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);142 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 143 143 144 144 IEM_MC_PREPARE_SSE_USAGE(); … … 207 207 IEM_MC_PREPARE_SSE_USAGE(); 208 208 209 IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc);209 IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 210 210 IEM_MC_CALL_SSE_AIMPL_3(pfnU128, pDst, pSrc, bImmArg); 211 211 IEM_MC_STORE_XREG_XMM(IEM_GET_MODRM_REG(pVCpu, bRm), Dst); … … 264 264 IEM_MC_PREPARE_SSE_USAGE(); 265 265 IEM_MC_LOCAL(X86XMMREG, uSrc); 266 IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);266 IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 267 267 IEM_MC_LOCAL(X86XMMREG, uDst); 268 268 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, puDst, uDst, 0); … … 324 324 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fAesNi); 325 325 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 326 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);326 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 327 327 328 328 IEM_MC_PREPARE_SSE_USAGE(); … … 410 410 IEM_MC_PREPARE_SSE_USAGE(); 411 411 412 IEM_MC_FETCH_MEM_ XMM_U32_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm),412 IEM_MC_FETCH_MEM_SEG_XMM_U32_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 413 413 0 /*a_iDword*/, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 414 414 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_roundss_u128, pDst, pSrc, bImmArg); … … 468 468 IEM_MC_PREPARE_SSE_USAGE(); 469 469 470 IEM_MC_FETCH_MEM_ XMM_U64_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm),470 IEM_MC_FETCH_MEM_SEG_XMM_U64_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 471 471 0 /*a_iQword */, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 472 472 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_roundsd_u128, pDst, pSrc, bImmArg); … … 550 550 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3); 551 551 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 552 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);552 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 553 553 554 554 IEM_MC_PREPARE_FPU_USAGE(); … … 855 855 IEM_MC_PREPARE_SSE_USAGE(); 856 856 857 IEM_MC_FETCH_MEM_ U8(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);857 IEM_MC_FETCH_MEM_SEG_U8(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 858 858 IEM_MC_STORE_XREG_U8(IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 15 /*a_iByte*/, uSrc); 859 859 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 901 901 902 902 IEM_MC_LOCAL(uint32_t, uSrc); 903 IEM_MC_FETCH_MEM_ U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);903 IEM_MC_FETCH_MEM_SEG_U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 904 904 IEM_MC_STORE_XREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), (bImm >> 4) & 3, uSrc); 905 905 IEM_MC_CLEAR_XREG_U32_MASK(IEM_GET_MODRM_REG(pVCpu, bRm), bImm); … … 952 952 IEM_MC_PREPARE_SSE_USAGE(); 953 953 954 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);954 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 955 955 IEM_MC_STORE_XREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 1 /*a_iQword*/, uSrc); 956 956 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 999 999 IEM_MC_PREPARE_SSE_USAGE(); 1000 1000 1001 IEM_MC_FETCH_MEM_ U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1001 IEM_MC_FETCH_MEM_SEG_U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1002 1002 IEM_MC_STORE_XREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 3 /*a_iDword*/, uSrc); 1003 1003 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 1115 1115 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fPclMul); 1116 1116 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 1117 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1117 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1118 1118 1119 1119 IEM_MC_PREPARE_SSE_USAGE(); … … 1218 1218 IEM_MC_PREPARE_SSE_USAGE(); 1219 1219 1220 IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_RAX_RDX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm),1220 IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_RAX_RDX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 1221 1221 pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1222 1222 IEM_MC_REF_XREG_U128(puDst, 0 /*xmm0*/); … … 1276 1276 IEM_MC_PREPARE_SSE_USAGE(); 1277 1277 1278 IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm),1278 IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 1279 1279 pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1280 1280 IEM_MC_REF_XREG_U128(puDst, 0 /*xmm0*/); … … 1350 1350 IEM_MC_PREPARE_SSE_USAGE(); 1351 1351 1352 IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_RAX_RDX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm),1352 IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_RAX_RDX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 1353 1353 pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1354 1354 IEM_MC_REF_GREG_U32(pu32Ecx, X86_GREG_xCX); … … 1412 1412 IEM_MC_PREPARE_SSE_USAGE(); 1413 1413 1414 IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm),1414 IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 1415 1415 pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1416 1416 IEM_MC_REF_GREG_U32(pu32Ecx, X86_GREG_xCX); … … 1484 1484 IEM_MC_PREPARE_SSE_USAGE(); 1485 1485 1486 IEM_MC_FETCH_MEM_ U128_AND_XREG_U128(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1486 IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1487 1487 IEM_MC_REF_XREG_U128(puDst, 0 /*xmm0*/); 1488 1488 IEM_MC_REF_EFLAGS(pEFlags); … … 1556 1556 IEM_MC_PREPARE_SSE_USAGE(); 1557 1557 1558 IEM_MC_FETCH_MEM_ U128(Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1558 IEM_MC_FETCH_MEM_SEG_U128(Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1559 1559 IEM_MC_REF_XREG_U128_CONST(pSrc1, IEM_GET_MODRM_REG(pVCpu, bRm)); 1560 1560 IEM_MC_REF_EFLAGS(pEFlags); … … 1647 1647 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSha); 1648 1648 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 1649 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1649 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1650 1650 1651 1651 IEM_MC_PREPARE_SSE_USAGE(); -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstTwoByte0f-x86.cpp.h
r108287 r108288 82 82 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx); 83 83 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 84 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);84 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 85 85 86 86 IEM_MC_PREPARE_FPU_USAGE(); … … 144 144 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts); 145 145 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 146 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);146 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 147 147 148 148 IEM_MC_PREPARE_FPU_USAGE(); … … 204 204 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 205 205 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 206 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);206 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 207 207 208 208 IEM_MC_PREPARE_FPU_USAGE(); … … 264 264 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse); 265 265 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 266 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);266 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 267 267 268 268 IEM_MC_PREPARE_SSE_USAGE(); … … 321 321 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 322 322 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 323 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);323 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 324 324 325 325 IEM_MC_PREPARE_SSE_USAGE(); … … 372 372 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); \ 373 373 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); \ 374 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \374 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 375 375 IEM_MC_PREPARE_SSE_USAGE(); \ 376 376 IEM_MC_NATIVE_IF(a_fRegNativeArchs) { \ … … 432 432 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx); 433 433 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 434 IEM_MC_FETCH_MEM_ U32_ZX_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);434 IEM_MC_FETCH_MEM_SEG_U32_ZX_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 435 435 436 436 IEM_MC_PREPARE_FPU_USAGE(); … … 495 495 * CPUs actually does and whether it will do a TLB load for the high 496 496 * part or skip any associated \#PF. Ditto for segmentation \#GPs. */ 497 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);497 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 498 498 499 499 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); … … 555 555 * CPUs actually does and whether it will do a TLB load for the high 556 556 * part or skip any associated \#PF. Ditto for segmentation \#GPs. */ 557 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);557 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 558 558 559 559 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); … … 614 614 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx); 615 615 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 616 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); /* intel docs this to be full 64-bit read */616 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); /* intel docs this to be full 64-bit read */ 617 617 618 618 IEM_MC_PREPARE_FPU_USAGE(); … … 677 677 * CPUs actually does and whether it will do a TLB load for the lower 678 678 * part or skip any associated \#PF. */ 679 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);679 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 680 680 681 681 IEM_MC_PREPARE_SSE_USAGE(); … … 738 738 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse); 739 739 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 740 IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);740 IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 741 741 742 742 IEM_MC_PREPARE_SSE_USAGE(); … … 794 794 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse); \ 795 795 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); \ 796 IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \796 IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 797 797 IEM_MC_PREPARE_SSE_USAGE(); \ 798 798 IEM_MC_NATIVE_IF(a_fRegNativeArchs) { \ … … 862 862 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse); 863 863 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 864 IEM_MC_FETCH_MEM_ R32(r32Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);864 IEM_MC_FETCH_MEM_SEG_R32(r32Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 865 865 866 866 IEM_MC_PREPARE_SSE_USAGE(); … … 924 924 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 925 925 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 926 IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);926 IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 927 927 928 928 IEM_MC_PREPARE_SSE_USAGE(); … … 986 986 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 987 987 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 988 IEM_MC_FETCH_MEM_ R64(r64Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);988 IEM_MC_FETCH_MEM_SEG_R64(r64Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 989 989 990 990 IEM_MC_PREPARE_SSE_USAGE(); … … 1047 1047 * CPUs actually does and whether it will do a TLB load for the lower 1048 1048 * part or skip any associated \#PF. */ 1049 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1049 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1050 1050 1051 1051 IEM_MC_PREPARE_SSE_USAGE(); … … 1108 1108 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse3); 1109 1109 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 1110 IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1110 IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1111 1111 1112 1112 IEM_MC_PREPARE_SSE_USAGE(); … … 1196 1196 IEMOP_HLP_DECODED_NL_1(OP_LLDT, IEMOPFORM_M_MEM, OP_PARM_Ew, DISOPTYPE_DANGEROUS); 1197 1197 IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO(); /** @todo test order */ 1198 IEM_MC_FETCH_MEM_ U16(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1198 IEM_MC_FETCH_MEM_SEG_U16(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1199 1199 IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_VMEXIT, 0, iemCImpl_lldt, u16Sel); 1200 1200 IEM_MC_END(); … … 1227 1227 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1228 1228 IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO(); /** @todo test order */ 1229 IEM_MC_FETCH_MEM_ U16(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1229 IEM_MC_FETCH_MEM_SEG_U16(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1230 1230 IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_VMEXIT, 0, iemCImpl_ltr, u16Sel); 1231 1231 IEM_MC_END(); … … 1257 1257 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 1258 1258 IEMOP_HLP_DECODED_NL_1(fWrite ? OP_VERW : OP_VERR, IEMOPFORM_M_MEM, OP_PARM_Ew, DISOPTYPE_DANGEROUS | DISOPTYPE_PRIVILEGED_NOTRAP); \ 1259 IEM_MC_FETCH_MEM_ U16(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \1259 IEM_MC_FETCH_MEM_SEG_U16(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 1260 1260 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_STATUS_FLAGS, 0, iemCImpl_VerX, u16Sel, fWriteArg); \ 1261 1261 IEM_MC_END(); \ … … 1661 1661 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 1662 1662 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1663 IEM_MC_FETCH_MEM_ U16(u16Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst);1663 IEM_MC_FETCH_MEM_SEG_U16(u16Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 1664 1664 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_MODE | IEM_CIMPL_F_VMEXIT, RT_BIT_64(kIemNativeGstReg_Cr0), 1665 1665 iemCImpl_lmsw, u16Tmp, GCPtrEffDst); … … 1849 1849 IEMOP_HLP_DECODED_NL_2(fIsLar ? OP_LAR : OP_LSL, IEMOPFORM_RM_MEM, OP_PARM_Gv, OP_PARM_Ew, DISOPTYPE_DANGEROUS | DISOPTYPE_PRIVILEGED_NOTRAP); 1850 1850 1851 IEM_MC_FETCH_MEM_ U16(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1851 IEM_MC_FETCH_MEM_SEG_U16(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1852 1852 IEM_MC_REF_GREG_U16(pu16Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); 1853 1853 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_STATUS_FLAGS, RT_BIT_64(kIemNativeGstReg_GprFirst + IEM_GET_MODRM_REG(pVCpu, bRm)), … … 1869 1869 /** @todo testcase: make sure it's a 16-bit read. */ 1870 1870 1871 IEM_MC_FETCH_MEM_ U16(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1871 IEM_MC_FETCH_MEM_SEG_U16(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1872 1872 IEM_MC_REF_GREG_U64(pu64Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); 1873 1873 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_STATUS_FLAGS, RT_BIT_64(kIemNativeGstReg_GprFirst + IEM_GET_MODRM_REG(pVCpu, bRm)), … … 2092 2092 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 2093 2093 2094 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2094 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2095 2095 IEM_MC_STORE_XREG_U128(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 2096 2096 … … 2143 2143 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 2144 2144 2145 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2145 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2146 2146 IEM_MC_STORE_XREG_U128(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 2147 2147 … … 2196 2196 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 2197 2197 2198 IEM_MC_FETCH_MEM_ U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2198 IEM_MC_FETCH_MEM_SEG_U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2199 2199 IEM_MC_STORE_XREG_U32_ZX_U128(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 2200 2200 … … 2249 2249 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 2250 2250 2251 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2251 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2252 2252 IEM_MC_STORE_XREG_U64_ZX_U128(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 2253 2253 … … 2518 2518 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 2519 2519 2520 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2520 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2521 2521 IEM_MC_STORE_XREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), 0 /* a_iQword*/, uSrc); 2522 2522 … … 2553 2553 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 2554 2554 2555 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2555 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2556 2556 IEM_MC_STORE_XREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), 0 /* a_iQword*/, uSrc); 2557 2557 … … 2623 2623 IEM_MC_PREPARE_SSE_USAGE(); 2624 2624 2625 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2625 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2626 2626 IEM_MC_STORE_XREG_U32_U128(IEM_GET_MODRM_REG(pVCpu, bRm), 0, uSrc, 0); 2627 2627 IEM_MC_STORE_XREG_U32_U128(IEM_GET_MODRM_REG(pVCpu, bRm), 1, uSrc, 0); … … 2681 2681 IEM_MC_PREPARE_SSE_USAGE(); 2682 2682 2683 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2683 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2684 2684 IEM_MC_STORE_XREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), 0 /* a_iQword*/, uSrc); 2685 2685 IEM_MC_STORE_XREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), 1 /* a_iQword*/, uSrc); … … 2938 2938 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 2939 2939 2940 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2940 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2941 2941 IEM_MC_STORE_XREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), 1 /*a_iQword*/, uSrc); 2942 2942 … … 2973 2973 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 2974 2974 2975 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2975 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2976 2976 IEM_MC_STORE_XREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), 1 /*a_iQword*/, uSrc); 2977 2977 … … 3043 3043 IEM_MC_PREPARE_SSE_USAGE(); 3044 3044 3045 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3045 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3046 3046 IEM_MC_STORE_XREG_U32_U128(IEM_GET_MODRM_REG(pVCpu, bRm), 0, uSrc, 1); 3047 3047 IEM_MC_STORE_XREG_U32_U128(IEM_GET_MODRM_REG(pVCpu, bRm), 1, uSrc, 1); … … 3416 3416 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 3417 3417 3418 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3418 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3419 3419 IEM_MC_STORE_XREG_U128(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 3420 3420 … … 3465 3465 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 3466 3466 3467 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3467 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3468 3468 IEM_MC_STORE_XREG_U128(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 3469 3469 … … 3624 3624 IEM_MC_PREPARE_FPU_USAGE(); 3625 3625 3626 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3626 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3627 3627 IEM_MC_FETCH_XREG_XMM(Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); /* Need it because the high quadword remains unchanged. */ 3628 3628 … … 3679 3679 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 3680 3680 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 3681 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3681 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3682 3682 3683 3683 /* Doesn't cause a transition to MMX mode. */ … … 3735 3735 IEM_MC_PREPARE_SSE_USAGE(); /** @todo: This is superfluous because IEM_MC_CALL_SSE_AIMPL_2() is calling this but the tstIEMCheckMc testcase depends on it. */ 3736 3736 3737 IEM_MC_FETCH_MEM_ I64(i64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3737 IEM_MC_FETCH_MEM_SEG_I64(i64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3738 3738 IEM_MC_CALL_SSE_AIMPL_2(iemAImpl_cvtsi2ss_r32_i64, pr32Dst, pi64Src); 3739 3739 IEM_MC_STORE_XREG_R32(IEM_GET_MODRM_REG(pVCpu, bRm), r32Dst); … … 3779 3779 IEM_MC_PREPARE_SSE_USAGE(); /** @todo This is superfluous because IEM_MC_CALL_SSE_AIMPL_2() is calling this but the tstIEMCheckMc testcase depends on it. */ 3780 3780 3781 IEM_MC_FETCH_MEM_ I32(i32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3781 IEM_MC_FETCH_MEM_SEG_I32(i32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3782 3782 IEM_MC_CALL_SSE_AIMPL_2(iemAImpl_cvtsi2ss_r32_i32, pr32Dst, pi32Src); 3783 3783 IEM_MC_STORE_XREG_R32(IEM_GET_MODRM_REG(pVCpu, bRm), r32Dst); … … 3832 3832 IEM_MC_PREPARE_SSE_USAGE(); /** @todo This is superfluous because IEM_MC_CALL_SSE_AIMPL_2() is calling this but the tstIEMCheckMc testcase depends on it. */ 3833 3833 3834 IEM_MC_FETCH_MEM_ I64(i64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3834 IEM_MC_FETCH_MEM_SEG_I64(i64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3835 3835 IEM_MC_CALL_SSE_AIMPL_2(iemAImpl_cvtsi2sd_r64_i64, pr64Dst, pi64Src); 3836 3836 IEM_MC_STORE_XREG_R64(IEM_GET_MODRM_REG(pVCpu, bRm), r64Dst); … … 3876 3876 IEM_MC_PREPARE_SSE_USAGE(); /** @todo: This is superfluous because IEM_MC_CALL_SSE_AIMPL_2() is calling this but the tstIEMCheckMc testcase depends on it. */ 3877 3877 3878 IEM_MC_FETCH_MEM_ I32(i32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3878 IEM_MC_FETCH_MEM_SEG_I32(i32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3879 3879 IEM_MC_CALL_SSE_AIMPL_2(iemAImpl_cvtsi2sd_r64_i32, pr64Dst, pi32Src); 3880 3880 IEM_MC_STORE_XREG_R64(IEM_GET_MODRM_REG(pVCpu, bRm), r64Dst); … … 4011 4011 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 4012 4012 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 4013 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4013 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4014 4014 4015 4015 IEM_MC_PREPARE_FPU_USAGE(); … … 4069 4069 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 4070 4070 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 4071 IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4071 IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4072 4072 4073 4073 IEM_MC_PREPARE_FPU_USAGE(); … … 4125 4125 IEM_MC_PREPARE_SSE_USAGE(); /** @todo: This is superfluous because IEM_MC_CALL_SSE_AIMPL_2() is calling this but the tstIEMCheckMc testcase depends on it. */ 4126 4126 4127 IEM_MC_FETCH_MEM_ U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4127 IEM_MC_FETCH_MEM_SEG_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4128 4128 IEM_MC_CALL_SSE_AIMPL_2(iemAImpl_cvttss2si_i64_r32, pi64Dst, pu32Src); 4129 4129 IEM_MC_STORE_GREG_I64(IEM_GET_MODRM_REG(pVCpu, bRm), i64Dst); … … 4169 4169 IEM_MC_PREPARE_SSE_USAGE(); /** @todo: This is superfluous because IEM_MC_CALL_SSE_AIMPL_2() is calling this but the tstIEMCheckMc testcase depends on it. */ 4170 4170 4171 IEM_MC_FETCH_MEM_ U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4171 IEM_MC_FETCH_MEM_SEG_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4172 4172 IEM_MC_CALL_SSE_AIMPL_2(iemAImpl_cvttss2si_i32_r32, pi32Dst, pu32Src); 4173 4173 IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), i32Dst); … … 4222 4222 IEM_MC_PREPARE_SSE_USAGE(); /** @todo: This is superfluous because IEM_MC_CALL_SSE_AIMPL_2() is calling this but the tstIEMCheckMc testcase depends on it. */ 4223 4223 4224 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4224 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4225 4225 IEM_MC_CALL_SSE_AIMPL_2(iemAImpl_cvttsd2si_i64_r64, pi64Dst, pu64Src); 4226 4226 IEM_MC_STORE_GREG_I64(IEM_GET_MODRM_REG(pVCpu, bRm), i64Dst); … … 4266 4266 IEM_MC_PREPARE_SSE_USAGE(); /** @todo: This is superfluous because IEM_MC_CALL_SSE_AIMPL_2() is calling this but the tstIEMCheckMc testcase depends on it. */ 4267 4267 4268 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4268 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4269 4269 IEM_MC_CALL_SSE_AIMPL_2(iemAImpl_cvttsd2si_i32_r64, pi32Dst, pu64Src); 4270 4270 IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), i32Dst); … … 4321 4321 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 4322 4322 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 4323 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4323 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4324 4324 4325 4325 IEM_MC_PREPARE_FPU_USAGE(); … … 4380 4380 IEM_MC_MAYBE_RAISE_FPU_XCPT(); 4381 4381 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 4382 IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4382 IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4383 4383 4384 4384 IEM_MC_PREPARE_FPU_USAGE(); … … 4436 4436 IEM_MC_PREPARE_SSE_USAGE(); /** @todo: This is superfluous because IEM_MC_CALL_SSE_AIMPL_2() is calling this but the tstIEMCheckMc testcase depends on it. */ 4437 4437 4438 IEM_MC_FETCH_MEM_ U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4438 IEM_MC_FETCH_MEM_SEG_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4439 4439 IEM_MC_CALL_SSE_AIMPL_2(iemAImpl_cvtss2si_i64_r32, pi64Dst, pu32Src); 4440 4440 IEM_MC_STORE_GREG_I64(IEM_GET_MODRM_REG(pVCpu, bRm), i64Dst); … … 4480 4480 IEM_MC_PREPARE_SSE_USAGE(); /** @todo: This is superfluous because IEM_MC_CALL_SSE_AIMPL_2() is calling this but the tstIEMCheckMc testcase depends on it. */ 4481 4481 4482 IEM_MC_FETCH_MEM_ U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4482 IEM_MC_FETCH_MEM_SEG_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4483 4483 IEM_MC_CALL_SSE_AIMPL_2(iemAImpl_cvtss2si_i32_r32, pi32Dst, pu32Src); 4484 4484 IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), i32Dst); … … 4533 4533 IEM_MC_PREPARE_SSE_USAGE(); /** @todo: This is superfluous because IEM_MC_CALL_SSE_AIMPL_3() is calling this but the tstIEMCheckMc testcase depends on it. */ 4534 4534 4535 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4535 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4536 4536 IEM_MC_CALL_SSE_AIMPL_2(iemAImpl_cvtsd2si_i64_r64, pi64Dst, pu64Src); 4537 4537 IEM_MC_STORE_GREG_I64(IEM_GET_MODRM_REG(pVCpu, bRm), i64Dst); … … 4577 4577 IEM_MC_PREPARE_SSE_USAGE(); /** @todo: This is superfluous because IEM_MC_CALL_SSE_AIMPL_2() is calling this but the tstIEMCheckMc testcase depends on it. */ 4578 4578 4579 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4579 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4580 4580 IEM_MC_CALL_SSE_AIMPL_2(iemAImpl_cvtsd2si_i32_r64, pi32Dst, pu64Src); 4581 4581 IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), i32Dst); … … 4635 4635 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse); 4636 4636 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 4637 IEM_MC_FETCH_MEM_ R32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4637 IEM_MC_FETCH_MEM_SEG_R32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4638 4638 4639 4639 IEM_MC_PREPARE_SSE_USAGE(); … … 4696 4696 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 4697 4697 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 4698 IEM_MC_FETCH_MEM_ R64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4698 IEM_MC_FETCH_MEM_SEG_R64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4699 4699 4700 4700 IEM_MC_PREPARE_SSE_USAGE(); … … 4761 4761 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse); 4762 4762 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 4763 IEM_MC_FETCH_MEM_ R32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4763 IEM_MC_FETCH_MEM_SEG_R32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4764 4764 4765 4765 IEM_MC_PREPARE_SSE_USAGE(); … … 4822 4822 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 4823 4823 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 4824 IEM_MC_FETCH_MEM_ R64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4824 IEM_MC_FETCH_MEM_SEG_R64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4825 4825 4826 4826 IEM_MC_PREPARE_SSE_USAGE(); … … 4999 4999 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 5000 5000 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 5001 IEM_MC_FETCH_MEM_ U16(u16Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \5001 IEM_MC_FETCH_MEM_SEG_U16(u16Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 5002 5002 a_Cnd { \ 5003 5003 IEM_MC_STORE_GREG_U16(IEM_GET_MODRM_REG(pVCpu, bRm), u16Tmp); \ … … 5013 5013 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 5014 5014 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 5015 IEM_MC_FETCH_MEM_ U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \5015 IEM_MC_FETCH_MEM_SEG_U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 5016 5016 a_Cnd { \ 5017 5017 IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), u32Tmp); \ … … 5029 5029 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 5030 5030 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 5031 IEM_MC_FETCH_MEM_ U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \5031 IEM_MC_FETCH_MEM_SEG_U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 5032 5032 a_Cnd { \ 5033 5033 IEM_MC_STORE_GREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), u64Tmp); \ … … 5540 5540 IEM_MC_LOCAL(uint64_t, u64Src); 5541 5541 IEM_MC_ARG_LOCAL_REF(uint64_t const *, pu64Src, u64Src, 1); /* (see comment above wrt type) */ 5542 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);5542 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 5543 5543 5544 5544 IEM_MC_PREPARE_SSE_USAGE(); … … 6051 6051 IEM_MC_ACTUALIZE_FPU_STATE_FOR_CHANGE(); 6052 6052 6053 IEM_MC_FETCH_MEM_ U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6053 IEM_MC_FETCH_MEM_SEG_U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6054 6054 IEM_MC_STORE_MREG_U64(IEM_GET_MODRM_REG_8(bRm), u64Tmp); 6055 6055 IEM_MC_FPU_TO_MMX_MODE(); … … 6103 6103 IEM_MC_ACTUALIZE_FPU_STATE_FOR_CHANGE(); 6104 6104 6105 IEM_MC_FETCH_MEM_ U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6105 IEM_MC_FETCH_MEM_SEG_U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6106 6106 IEM_MC_STORE_MREG_U32_ZX_U64(IEM_GET_MODRM_REG_8(bRm), u32Tmp); 6107 6107 IEM_MC_FPU_TO_MMX_MODE(); … … 6157 6157 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 6158 6158 6159 IEM_MC_FETCH_MEM_ U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6159 IEM_MC_FETCH_MEM_SEG_U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6160 6160 IEM_MC_STORE_XREG_U64_ZX_U128(IEM_GET_MODRM_REG(pVCpu, bRm), u64Tmp); 6161 6161 … … 6207 6207 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 6208 6208 6209 IEM_MC_FETCH_MEM_ U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6209 IEM_MC_FETCH_MEM_SEG_U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6210 6210 IEM_MC_STORE_XREG_U32_ZX_U128(IEM_GET_MODRM_REG(pVCpu, bRm), u32Tmp); 6211 6211 … … 6265 6265 IEM_MC_ACTUALIZE_FPU_STATE_FOR_CHANGE(); 6266 6266 6267 IEM_MC_FETCH_MEM_ U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6267 IEM_MC_FETCH_MEM_SEG_U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6268 6268 IEM_MC_FPU_TO_MMX_MODE(); 6269 6269 … … 6318 6318 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 6319 6319 6320 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6320 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6321 6321 IEM_MC_STORE_XREG_U128(IEM_GET_MODRM_REG(pVCpu, bRm), u128Tmp); 6322 6322 … … 6366 6366 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 6367 6367 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 6368 IEM_MC_FETCH_MEM_ U128_NO_AC(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6368 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6369 6369 IEM_MC_STORE_XREG_U128(IEM_GET_MODRM_REG(pVCpu, bRm), u128Tmp); 6370 6370 … … 6419 6419 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts); 6420 6420 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 6421 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6421 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6422 6422 6423 6423 IEM_MC_PREPARE_FPU_USAGE(); … … 6482 6482 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 6483 6483 6484 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6484 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6485 6485 IEM_MC_PREPARE_SSE_USAGE(); 6486 6486 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); … … 7420 7420 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 7421 7421 7422 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);7422 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 7423 7423 IEM_MC_STORE_XREG_U64_ZX_U128(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 7424 7424 … … 10537 10537 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10538 10538 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10539 IEM_MC_FETCH_MEM_ U8_ZX_U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);10539 IEM_MC_FETCH_MEM_SEG_U8_ZX_U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 10540 10540 IEM_MC_STORE_GREG_U16(IEM_GET_MODRM_REG(pVCpu, bRm), u16Value); 10541 10541 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 10549 10549 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10550 10550 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10551 IEM_MC_FETCH_MEM_ U8_ZX_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);10551 IEM_MC_FETCH_MEM_SEG_U8_ZX_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 10552 10552 IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), u32Value); 10553 10553 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 10561 10561 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10562 10562 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10563 IEM_MC_FETCH_MEM_ U8_ZX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);10563 IEM_MC_FETCH_MEM_SEG_U8_ZX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 10564 10564 IEM_MC_STORE_GREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), u64Value); 10565 10565 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 10626 10626 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10627 10627 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10628 IEM_MC_FETCH_MEM_ U16_ZX_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);10628 IEM_MC_FETCH_MEM_SEG_U16_ZX_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 10629 10629 IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), u32Value); 10630 10630 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 10638 10638 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 10639 10639 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10640 IEM_MC_FETCH_MEM_ U16_ZX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);10640 IEM_MC_FETCH_MEM_SEG_U16_ZX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 10641 10641 IEM_MC_STORE_GREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), u64Value); 10642 10642 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 11226 11226 \ 11227 11227 IEM_MC_ARG(uint16_t, u16Src, 2); \ 11228 IEM_MC_FETCH_MEM_ U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \11228 IEM_MC_FETCH_MEM_SEG_U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 11229 11229 IEM_MC_ARG(uint16_t *, pu16Dst, 1); \ 11230 11230 IEM_MC_REF_GREG_U16(pu16Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ … … 11244 11244 \ 11245 11245 IEM_MC_ARG(uint32_t, u32Src, 2); \ 11246 IEM_MC_FETCH_MEM_ U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \11246 IEM_MC_FETCH_MEM_SEG_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 11247 11247 IEM_MC_ARG(uint32_t *, pu32Dst, 1); \ 11248 11248 IEM_MC_REF_GREG_U32(pu32Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ … … 11265 11265 \ 11266 11266 IEM_MC_ARG(uint64_t, u64Src, 2); \ 11267 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \11267 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 11268 11268 IEM_MC_ARG(uint64_t *, pu64Dst, 1); \ 11269 11269 IEM_MC_REF_GREG_U64(pu64Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ … … 11453 11453 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 11454 11454 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11455 IEM_MC_FETCH_MEM_ U8_SX_U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);11455 IEM_MC_FETCH_MEM_SEG_U8_SX_U16(u16Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 11456 11456 IEM_MC_STORE_GREG_U16(IEM_GET_MODRM_REG(pVCpu, bRm), u16Value); 11457 11457 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 11465 11465 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 11466 11466 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11467 IEM_MC_FETCH_MEM_ U8_SX_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);11467 IEM_MC_FETCH_MEM_SEG_U8_SX_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 11468 11468 IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), u32Value); 11469 11469 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 11477 11477 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 11478 11478 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11479 IEM_MC_FETCH_MEM_ U8_SX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);11479 IEM_MC_FETCH_MEM_SEG_U8_SX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 11480 11480 IEM_MC_STORE_GREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), u64Value); 11481 11481 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 11538 11538 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 11539 11539 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11540 IEM_MC_FETCH_MEM_ U16_SX_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);11540 IEM_MC_FETCH_MEM_SEG_U16_SX_U32(u32Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 11541 11541 IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), u32Value); 11542 11542 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 11550 11550 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 11551 11551 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 11552 IEM_MC_FETCH_MEM_ U16_SX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst);11552 IEM_MC_FETCH_MEM_SEG_U16_SX_U64(u64Value, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 11553 11553 IEM_MC_STORE_GREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), u64Value); 11554 11554 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 11841 11841 IEM_MC_PREPARE_SSE_USAGE(); 11842 11842 11843 IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc);11843 IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 11844 11844 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_cmpps_u128, pDst, pSrc, bImmArg); 11845 11845 IEM_MC_STORE_XREG_XMM(IEM_GET_MODRM_REG(pVCpu, bRm), Dst); … … 11898 11898 IEM_MC_PREPARE_SSE_USAGE(); 11899 11899 11900 IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc);11900 IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 11901 11901 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_cmppd_u128, pDst, pSrc, bImmArg); 11902 11902 IEM_MC_STORE_XREG_XMM(IEM_GET_MODRM_REG(pVCpu, bRm), Dst); … … 11955 11955 IEM_MC_PREPARE_SSE_USAGE(); 11956 11956 11957 IEM_MC_FETCH_MEM_ XMM_U32_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm),11957 IEM_MC_FETCH_MEM_SEG_XMM_U32_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 11958 11958 0 /*a_iDword*/, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 11959 11959 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_cmpss_u128, pDst, pSrc, bImmArg); … … 12013 12013 IEM_MC_PREPARE_SSE_USAGE(); 12014 12014 12015 IEM_MC_FETCH_MEM_ XMM_U64_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm),12015 IEM_MC_FETCH_MEM_SEG_XMM_U64_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 12016 12016 0 /*a_iQword */, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 12017 12017 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_cmpsd_u128, pDst, pSrc, bImmArg); … … 12121 12121 IEM_MC_PREPARE_FPU_USAGE(); 12122 12122 12123 IEM_MC_FETCH_MEM_ U16(uValue, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);12123 IEM_MC_FETCH_MEM_SEG_U16(uValue, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 12124 12124 IEM_MC_FPU_TO_MMX_MODE(); 12125 12125 IEM_MC_STORE_MREG_U16(IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 3, uValue); … … 12169 12169 IEM_MC_PREPARE_SSE_USAGE(); 12170 12170 12171 IEM_MC_FETCH_MEM_ U16(uValue, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);12171 IEM_MC_FETCH_MEM_SEG_U16(uValue, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 12172 12172 IEM_MC_STORE_XREG_U16(IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 7, uValue); 12173 12173 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 12280 12280 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse); 12281 12281 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 12282 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);12282 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 12283 12283 12284 12284 IEM_MC_PREPARE_SSE_USAGE(); … … 12332 12332 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 12333 12333 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 12334 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);12334 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 12335 12335 12336 12336 IEM_MC_PREPARE_SSE_USAGE(); … … 13732 13732 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 13733 13733 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 13734 IEM_MC_FETCH_MEM_ U128_NO_AC(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);13734 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 13735 13735 IEM_MC_STORE_XREG_U128(IEM_GET_MODRM_REG(pVCpu, bRm), u128Tmp); 13736 13736 … … 13869 13869 13870 13870 IEM_MC_FETCH_GREG_U64(u64EffAddr, X86_GREG_xDI); 13871 IEM_MC_FETCH_MEM_ U64(u64Mem, pVCpu->iem.s.iEffSeg, u64EffAddr);13871 IEM_MC_FETCH_MEM_SEG_U64(u64Mem, pVCpu->iem.s.iEffSeg, u64EffAddr); 13872 13872 IEM_MC_REF_MREG_U64_CONST(puSrc, IEM_GET_MODRM_REG_8(bRm)); 13873 13873 IEM_MC_REF_MREG_U64_CONST(puMsk, IEM_GET_MODRM_RM_8(bRm)); … … 13907 13907 13908 13908 IEM_MC_FETCH_GREG_U64(u64EffAddr, X86_GREG_xDI); 13909 IEM_MC_FETCH_MEM_ U128(u128Mem, pVCpu->iem.s.iEffSeg, u64EffAddr);13909 IEM_MC_FETCH_MEM_SEG_U128(u128Mem, pVCpu->iem.s.iEffSeg, u64EffAddr); 13910 13910 IEM_MC_REF_XREG_U128_CONST(puSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 13911 13911 IEM_MC_REF_XREG_U128_CONST(puMsk, IEM_GET_MODRM_RM(pVCpu, bRm)); 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trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstVexMap1-x86.cpp.h
r108267 r108288 105 105 IEM_MC_LOCAL(X86YMMREG, uSrc2); 106 106 IEM_MC_ARG_LOCAL_REF(PCX86YMMREG, puSrc2, uSrc2, 2); 107 IEM_MC_FETCH_MEM_ YMM_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);107 IEM_MC_FETCH_MEM_SEG_YMM_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 108 108 IEM_MC_LOCAL(X86YMMREG, uSrc1); 109 109 IEM_MC_ARG_LOCAL_REF(PCX86YMMREG, puSrc1, uSrc1, 1); … … 129 129 IEM_MC_LOCAL(X86XMMREG, uSrc2); 130 130 IEM_MC_ARG_LOCAL_REF(PCX86XMMREG, puSrc2, uSrc2, 2); 131 IEM_MC_FETCH_MEM_ XMM_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);131 IEM_MC_FETCH_MEM_SEG_XMM_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 132 132 IEM_MC_ARG(PCX86XMMREG, puSrc1, 1); 133 133 IEM_MC_REF_XREG_XMM_CONST(puSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); … … 192 192 IEM_MC_LOCAL(RTFLOAT32U, r32Src2); 193 193 IEM_MC_ARG_LOCAL_REF(PCRTFLOAT32U, pr32Src2, r32Src2, 2); 194 IEM_MC_FETCH_MEM_ R32(r32Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);194 IEM_MC_FETCH_MEM_SEG_R32(r32Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 195 195 IEM_MC_LOCAL(X86XMMREG, uDst); 196 196 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, puDst, uDst, 0); … … 255 255 IEM_MC_LOCAL(RTFLOAT64U, r64Src2); 256 256 IEM_MC_ARG_LOCAL_REF(PCRTFLOAT64U, pr64Src2, r64Src2, 2); 257 IEM_MC_FETCH_MEM_ R64(r64Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);257 IEM_MC_FETCH_MEM_SEG_R64(r64Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 258 258 IEM_MC_LOCAL(X86XMMREG, uDst); 259 259 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, puDst, uDst, 0); … … 344 344 IEM_MC_PREPARE_AVX_USAGE(); 345 345 346 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);346 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 347 347 IEM_MC_FETCH_YREG_U256(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 348 348 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnU256, puDst, puSrc1, puSrc2); … … 366 366 IEM_MC_PREPARE_AVX_USAGE(); 367 367 368 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);368 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 369 369 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 370 370 IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); … … 479 479 IEM_MC_PREPARE_AVX_USAGE(); 480 480 481 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);481 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 482 482 IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnU256, puDst, puSrc); 483 483 IEM_MC_STORE_YREG_U256_ZX_VLMAX( IEM_GET_MODRM_REG(pVCpu, bRm), uDst); … … 499 499 IEM_MC_PREPARE_AVX_USAGE(); 500 500 501 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);501 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 502 502 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 503 503 IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnU128, puDst, puSrc); … … 577 577 IEM_MC_LOCAL(X86YMMREG, uSrc); 578 578 IEM_MC_ARG_LOCAL_REF(PCX86YMMREG, puSrc, uSrc, 1); 579 IEM_MC_FETCH_MEM_ YMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);579 IEM_MC_FETCH_MEM_SEG_YMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 580 580 IEM_MC_LOCAL(X86YMMREG, uDst); 581 581 IEM_MC_ARG_LOCAL_REF(PX86YMMREG, puDst, uDst, 0); … … 598 598 IEM_MC_LOCAL(X86XMMREG, uSrc); 599 599 IEM_MC_ARG_LOCAL_REF(PCX86XMMREG, puSrc, uSrc, 1); 600 IEM_MC_FETCH_MEM_ XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);600 IEM_MC_FETCH_MEM_SEG_XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 601 601 IEM_MC_CALL_AVX_AIMPL_2(pImpl->pfnU128, puDst, puSrc); 602 602 IEM_MC_STORE_XREG_XMM( IEM_GET_MODRM_REG(pVCpu, bRm), uDst); … … 681 681 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 682 682 683 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);683 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 684 684 IEM_MC_STORE_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 685 685 … … 701 701 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 702 702 703 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);703 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 704 704 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 705 705 … … 756 756 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 757 757 758 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);758 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 759 759 IEM_MC_STORE_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 760 760 … … 776 776 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 777 777 778 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);778 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 779 779 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 780 780 … … 839 839 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 840 840 841 IEM_MC_FETCH_MEM_ U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);841 IEM_MC_FETCH_MEM_SEG_U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 842 842 IEM_MC_STORE_YREG_U32_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 843 843 … … 903 903 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 904 904 905 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);905 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 906 906 IEM_MC_STORE_YREG_U64_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 907 907 … … 1247 1247 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 1248 1248 1249 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1249 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1250 1250 IEM_MC_MERGE_YREG_U64LOCAL_U64HI_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), 1251 1251 uSrc, … … 1286 1286 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 1287 1287 1288 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1288 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1289 1289 IEM_MC_MERGE_YREG_U64LOCAL_U64HI_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), 1290 1290 uSrc, … … 1390 1390 IEM_MC_PREPARE_AVX_USAGE(); 1391 1391 1392 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1392 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1393 1393 IEM_MC_STORE_XREG_U32_U128(IEM_GET_MODRM_REG(pVCpu, bRm), 0, uSrc, 0); 1394 1394 IEM_MC_STORE_XREG_U32_U128(IEM_GET_MODRM_REG(pVCpu, bRm), 1, uSrc, 0); … … 1410 1410 1411 1411 IEM_MC_LOCAL(RTUINT256U, uSrc); 1412 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1412 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1413 1413 1414 1414 IEM_MC_STORE_YREG_U32_U256(IEM_GET_MODRM_REG(pVCpu, bRm), 0, uSrc, 0); … … 1504 1504 IEM_MC_PREPARE_AVX_USAGE(); 1505 1505 1506 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1506 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1507 1507 IEM_MC_STORE_XREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), 0 /* a_iQword*/, uSrc); 1508 1508 IEM_MC_STORE_XREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), 1 /* a_iQword*/, uSrc); … … 1523 1523 1524 1524 IEM_MC_LOCAL(RTUINT256U, uSrc); 1525 IEM_MC_FETCH_MEM_ U256(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1525 IEM_MC_FETCH_MEM_SEG_U256(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1526 1526 1527 1527 IEM_MC_STORE_YREG_U64_U256(IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iQwDst*/, uSrc, 0 /*a_iQwSrc*/); … … 1729 1729 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 1730 1730 1731 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1731 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1732 1732 IEM_MC_MERGE_YREG_U64LO_U64LOCAL_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), 1733 1733 IEM_GET_EFFECTIVE_VVVV(pVCpu) /*Hq*/, … … 1764 1764 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 1765 1765 1766 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1766 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1767 1767 IEM_MC_MERGE_YREG_U64LO_U64LOCAL_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), 1768 1768 IEM_GET_EFFECTIVE_VVVV(pVCpu) /*Hq*/, … … 1864 1864 IEM_MC_PREPARE_AVX_USAGE(); 1865 1865 1866 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1866 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1867 1867 IEM_MC_STORE_XREG_U32_U128(IEM_GET_MODRM_REG(pVCpu, bRm), 0, uSrc, 1); 1868 1868 IEM_MC_STORE_XREG_U32_U128(IEM_GET_MODRM_REG(pVCpu, bRm), 1, uSrc, 1); … … 1884 1884 1885 1885 IEM_MC_LOCAL(RTUINT256U, uSrc); 1886 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1886 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1887 1887 1888 1888 IEM_MC_STORE_YREG_U32_U256(IEM_GET_MODRM_REG(pVCpu, bRm), 0, uSrc, 1); … … 2070 2070 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 2071 2071 2072 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2072 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2073 2073 IEM_MC_STORE_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 2074 2074 … … 2087 2087 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 2088 2088 2089 IEM_MC_FETCH_MEM_ U256_ALIGN_AVX(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2089 IEM_MC_FETCH_MEM_SEG_U256_ALIGN_AVX(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2090 2090 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 2091 2091 … … 2147 2147 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 2148 2148 2149 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2149 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2150 2150 IEM_MC_STORE_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 2151 2151 … … 2164 2164 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 2165 2165 2166 IEM_MC_FETCH_MEM_ U256_ALIGN_AVX(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2166 IEM_MC_FETCH_MEM_SEG_U256_ALIGN_AVX(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2167 2167 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 2168 2168 … … 2416 2416 IEM_MC_LOCAL(int64_t, i64Src2); 2417 2417 IEM_MC_ARG_LOCAL_REF(const int64_t *, pi64Src2, i64Src2, 2); 2418 IEM_MC_FETCH_MEM_ I64(i64Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2418 IEM_MC_FETCH_MEM_SEG_I64(i64Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2419 2419 IEM_MC_CALL_AVX_AIMPL_3(IEM_SELECT_HOST_OR_FALLBACK(fAvx, iemAImpl_vcvtsi2ss_u128_i64, iemAImpl_vcvtsi2ss_u128_i64_fallback), 2420 2420 puDst, puSrc1, pi64Src2); … … 2464 2464 IEM_MC_LOCAL(int32_t, i32Src2); 2465 2465 IEM_MC_ARG_LOCAL_REF(const int32_t *, pi32Src2, i32Src2, 2); 2466 IEM_MC_FETCH_MEM_ I32(i32Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2466 IEM_MC_FETCH_MEM_SEG_I32(i32Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2467 2467 IEM_MC_CALL_AVX_AIMPL_3(IEM_SELECT_HOST_OR_FALLBACK(fAvx, iemAImpl_vcvtsi2ss_u128_i32, iemAImpl_vcvtsi2ss_u128_i32_fallback), 2468 2468 puDst, puSrc1, pi32Src2); … … 2521 2521 IEM_MC_LOCAL(int64_t, i64Src2); 2522 2522 IEM_MC_ARG_LOCAL_REF(const int64_t *, pi64Src2, i64Src2, 2); 2523 IEM_MC_FETCH_MEM_ I64(i64Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2523 IEM_MC_FETCH_MEM_SEG_I64(i64Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2524 2524 IEM_MC_CALL_AVX_AIMPL_3(IEM_SELECT_HOST_OR_FALLBACK(fAvx, iemAImpl_vcvtsi2sd_u128_i64, iemAImpl_vcvtsi2sd_u128_i64_fallback), 2525 2525 puDst, puSrc1, pi64Src2); … … 2569 2569 IEM_MC_LOCAL(int32_t, i32Src2); 2570 2570 IEM_MC_ARG_LOCAL_REF(const int32_t *, pi32Src2, i32Src2, 2); 2571 IEM_MC_FETCH_MEM_ I32(i32Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2571 IEM_MC_FETCH_MEM_SEG_I32(i32Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2572 2572 IEM_MC_CALL_AVX_AIMPL_3(IEM_SELECT_HOST_OR_FALLBACK(fAvx, iemAImpl_vcvtsi2sd_u128_i32, iemAImpl_vcvtsi2sd_u128_i32_fallback), 2573 2573 puDst, puSrc1, pi32Src2); … … 2762 2762 IEM_MC_LOCAL(RTFLOAT32U, r32Src); \ 2763 2763 IEM_MC_ARG_LOCAL_REF(PCRTFLOAT32U, pr32Src, r32Src, 1); \ 2764 IEM_MC_FETCH_MEM_ R32(r32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \2764 IEM_MC_FETCH_MEM_SEG_R32(r32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 2765 2765 IEM_MC_LOCAL( int64_t, i64Dst); \ 2766 2766 IEM_MC_ARG_LOCAL_REF(int64_t *, pi64Dst, i64Dst, 0); \ … … 2806 2806 IEM_MC_LOCAL(RTFLOAT32U, r32Src); \ 2807 2807 IEM_MC_ARG_LOCAL_REF(PCRTFLOAT32U, pr32Src, r32Src, 1); \ 2808 IEM_MC_FETCH_MEM_ R32(r32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \2808 IEM_MC_FETCH_MEM_SEG_R32(r32Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 2809 2809 IEM_MC_LOCAL( int32_t, i32Dst); \ 2810 2810 IEM_MC_ARG_LOCAL_REF(int32_t *, pi32Dst, i32Dst, 0); \ … … 2856 2856 IEM_MC_LOCAL(RTFLOAT64U, r64Src); \ 2857 2857 IEM_MC_ARG_LOCAL_REF(PCRTFLOAT64U, pr64Src, r64Src, 1); \ 2858 IEM_MC_FETCH_MEM_ R64(r64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \2858 IEM_MC_FETCH_MEM_SEG_R64(r64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 2859 2859 IEM_MC_LOCAL( int64_t, i64Dst); \ 2860 2860 IEM_MC_ARG_LOCAL_REF(int64_t *, pi64Dst, i64Dst, 0); \ … … 2900 2900 IEM_MC_LOCAL(RTFLOAT64U, r64Src); \ 2901 2901 IEM_MC_ARG_LOCAL_REF(PCRTFLOAT64U, pr64Src, r64Src, 1); \ 2902 IEM_MC_FETCH_MEM_ R64(r64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \2902 IEM_MC_FETCH_MEM_SEG_R64(r64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 2903 2903 IEM_MC_LOCAL( int32_t, i32Dst); \ 2904 2904 IEM_MC_ARG_LOCAL_REF(int32_t *, pi32Dst, i32Dst, 0); \ … … 3000 3000 IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx); 3001 3001 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); 3002 IEM_MC_FETCH_MEM_ R32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3002 IEM_MC_FETCH_MEM_SEG_R32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3003 3003 3004 3004 IEM_MC_PREPARE_AVX_USAGE(); … … 3063 3063 IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx); 3064 3064 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); 3065 IEM_MC_FETCH_MEM_ R64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3065 IEM_MC_FETCH_MEM_SEG_R64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3066 3066 3067 3067 IEM_MC_PREPARE_AVX_USAGE(); … … 3129 3129 IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx); 3130 3130 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); 3131 IEM_MC_FETCH_MEM_ R32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3131 IEM_MC_FETCH_MEM_SEG_R32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3132 3132 3133 3133 IEM_MC_PREPARE_AVX_USAGE(); … … 3192 3192 IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx); 3193 3193 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); 3194 IEM_MC_FETCH_MEM_ R64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3194 IEM_MC_FETCH_MEM_SEG_R64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3195 3195 3196 3196 IEM_MC_PREPARE_AVX_USAGE(); … … 3658 3658 IEM_MC_LOCAL(X86XMMREG, uSrc); 3659 3659 IEM_MC_ARG_LOCAL_REF(PCX86XMMREG, puSrc, uSrc, 1); 3660 IEM_MC_FETCH_MEM_ XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3660 IEM_MC_FETCH_MEM_SEG_XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3661 3661 IEM_MC_LOCAL(X86YMMREG, uDst); 3662 3662 IEM_MC_ARG_LOCAL_REF(PX86YMMREG, puDst, uDst, 0); … … 3680 3680 IEM_MC_LOCAL( uint64_t, u64Src); 3681 3681 IEM_MC_ARG_LOCAL_REF(const uint64_t *, pu64Src, u64Src, 1); 3682 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3682 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3683 3683 IEM_MC_LOCAL( X86XMMREG, uDst); 3684 3684 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, puDst, uDst, 0); … … 3764 3764 IEM_MC_LOCAL( X86YMMREG, uSrc); 3765 3765 IEM_MC_ARG_LOCAL_REF(PCX86YMMREG, puSrc, uSrc, 1); 3766 IEM_MC_FETCH_MEM_ YMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3766 IEM_MC_FETCH_MEM_SEG_YMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3767 3767 IEM_MC_LOCAL( X86XMMREG, uDst); 3768 3768 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, puDst, uDst, 0); … … 3787 3787 IEM_MC_LOCAL(X86XMMREG, uSrc); 3788 3788 IEM_MC_ARG_LOCAL_REF(PCX86XMMREG, puSrc, uSrc, 1); 3789 IEM_MC_FETCH_MEM_ XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3789 IEM_MC_FETCH_MEM_SEG_XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3790 3790 IEM_MC_LOCAL( X86XMMREG, uDst); 3791 3791 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, puDst, uDst, 0); … … 4155 4155 // IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 4156 4156 // IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 4157 // IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); /* Most CPUs probably only right high qword */4157 // IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); /* Most CPUs probably only right high qword */ 4158 4158 // 4159 4159 // IEM_MC_PREPARE_SSE_USAGE(); … … 4305 4305 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 4306 4306 4307 IEM_MC_FETCH_MEM_ U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4307 IEM_MC_FETCH_MEM_SEG_U64(u64Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4308 4308 IEM_MC_STORE_YREG_U64_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), u64Tmp); 4309 4309 … … 4355 4355 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 4356 4356 4357 IEM_MC_FETCH_MEM_ U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4357 IEM_MC_FETCH_MEM_SEG_U32(u32Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4358 4358 IEM_MC_STORE_YREG_U32_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), u32Tmp); 4359 4359 … … 4417 4417 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 4418 4418 4419 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4419 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4420 4420 IEM_MC_STORE_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), u128Tmp); 4421 4421 … … 4437 4437 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 4438 4438 4439 IEM_MC_FETCH_MEM_ U256_ALIGN_AVX(u256Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4439 IEM_MC_FETCH_MEM_SEG_U256_ALIGN_AVX(u256Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4440 4440 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), u256Tmp); 4441 4441 … … 4492 4492 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 4493 4493 4494 IEM_MC_FETCH_MEM_ U128_NO_AC(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4494 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4495 4495 IEM_MC_STORE_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), u128Tmp); 4496 4496 … … 4512 4512 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 4513 4513 4514 IEM_MC_FETCH_MEM_ U256_NO_AC(u256Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4514 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(u256Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4515 4515 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), u256Tmp); 4516 4516 … … 4595 4595 IEM_MC_PREPARE_AVX_USAGE(); 4596 4596 4597 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4597 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4598 4598 IEM_MC_CALL_VOID_AIMPL_3(pfnU256, puDst, puSrc, bImmArg); 4599 4599 IEM_MC_STORE_YREG_U256_ZX_VLMAX( IEM_GET_MODRM_REG(pVCpu, bRm), uDst); … … 4617 4617 IEM_MC_PREPARE_AVX_USAGE(); 4618 4618 4619 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);4619 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 4620 4620 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 4621 4621 IEM_MC_CALL_VOID_AIMPL_3(pfnU128, puDst, puSrc, bImmArg); … … 5334 5334 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 5335 5335 5336 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);5336 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 5337 5337 IEM_MC_STORE_YREG_U64_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 5338 5338 … … 5781 5781 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2YMMSRC, puSrc, uSrc, 1); \ 5782 5782 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); \ 5783 IEM_MC_FETCH_MEM_ YMM_NO_AC_AND_YREG_YMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu), pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \5783 IEM_MC_FETCH_MEM_SEG_YMM_NO_AC_AND_YREG_YMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu), pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 5784 5784 IEM_MC_CALL_AVX_AIMPL_3(IEM_SELECT_HOST_OR_FALLBACK(fAvx, \ 5785 5785 RT_CONCAT3(iemAImpl_,a_Instr,_u256), \ … … 5804 5804 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, puSrc, uSrc, 1); \ 5805 5805 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); \ 5806 IEM_MC_FETCH_MEM_ XMM_NO_AC_AND_XREG_XMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu), pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \5806 IEM_MC_FETCH_MEM_SEG_XMM_NO_AC_AND_XREG_XMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu), pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 5807 5807 IEM_MC_CALL_AVX_AIMPL_3(IEM_SELECT_HOST_OR_FALLBACK(fAvx, \ 5808 5808 RT_CONCAT3(iemAImpl_,a_Instr,_u128), \ … … 5879 5879 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, uSrc); 5880 5880 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, puSrc, uSrc, 1); 5881 IEM_MC_FETCH_MEM_ XMM_U32_AND_XREG_XMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu),5881 IEM_MC_FETCH_MEM_SEG_XMM_U32_AND_XREG_XMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu), 5882 5882 0 /*a_iDword*/, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 5883 5883 IEM_MC_LOCAL(X86XMMREG, uDst); … … 5939 5939 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, uSrc); 5940 5940 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, puSrc, uSrc, 1); 5941 IEM_MC_FETCH_MEM_ XMM_U64_AND_XREG_XMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu),5941 IEM_MC_FETCH_MEM_SEG_XMM_U64_AND_XREG_XMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu), 5942 5942 0 /*a_iQword*/, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 5943 5943 IEM_MC_LOCAL(X86XMMREG, uDst); … … 6005 6005 6006 6006 IEM_MC_FETCH_XREG_U128(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 6007 IEM_MC_FETCH_MEM_ U16(uValue, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6007 IEM_MC_FETCH_MEM_SEG_U16(uValue, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6008 6008 IEM_MC_STORE_XREG_U128( IEM_GET_MODRM_REG(pVCpu, bRm), uSrc1); 6009 6009 IEM_MC_STORE_XREG_U16( IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 7, uValue); … … 6122 6122 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); \ 6123 6123 IEM_MC_PREPARE_AVX_USAGE(); \ 6124 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \6124 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 6125 6125 IEM_MC_FETCH_YREG_U256(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ 6126 6126 IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fAvx2, iemAImpl_ ## a_Instr ## _u256, \ … … 6144 6144 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); \ 6145 6145 IEM_MC_PREPARE_AVX_USAGE(); \ 6146 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \6146 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 6147 6147 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 6148 6148 IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ … … 6665 6665 IEM_MC_LOCAL( X86YMMREG, uSrc); 6666 6666 IEM_MC_ARG_LOCAL_REF(PCX86YMMREG, puSrc, uSrc, 1); 6667 IEM_MC_FETCH_MEM_ YMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6667 IEM_MC_FETCH_MEM_SEG_YMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6668 6668 IEM_MC_LOCAL( X86XMMREG, uDst); 6669 6669 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, puDst, uDst, 0); … … 6688 6688 IEM_MC_LOCAL(X86XMMREG, uSrc); 6689 6689 IEM_MC_ARG_LOCAL_REF(PCX86XMMREG, puSrc, uSrc, 1); 6690 IEM_MC_FETCH_MEM_ XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6690 IEM_MC_FETCH_MEM_SEG_XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6691 6691 IEM_MC_LOCAL( X86XMMREG, uDst); 6692 6692 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, puDst, uDst, 0); … … 6770 6770 IEM_MC_LOCAL(X86XMMREG, uSrc); 6771 6771 IEM_MC_ARG_LOCAL_REF(PCX86XMMREG, puSrc, uSrc, 1); 6772 IEM_MC_FETCH_MEM_ XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6772 IEM_MC_FETCH_MEM_SEG_XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6773 6773 IEM_MC_LOCAL(X86YMMREG, uDst); 6774 6774 IEM_MC_ARG_LOCAL_REF(PX86YMMREG, puDst, uDst, 0); … … 6792 6792 IEM_MC_LOCAL( uint64_t, u64Src); 6793 6793 IEM_MC_ARG_LOCAL_REF(const uint64_t *, pu64Src, u64Src, 1); 6794 IEM_MC_FETCH_MEM_ U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6794 IEM_MC_FETCH_MEM_SEG_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6795 6795 IEM_MC_LOCAL( X86XMMREG, uDst); 6796 6796 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, puDst, uDst, 0); … … 6876 6876 IEM_MC_LOCAL( X86YMMREG, uSrc); 6877 6877 IEM_MC_ARG_LOCAL_REF(PCX86YMMREG, puSrc, uSrc, 1); 6878 IEM_MC_FETCH_MEM_ YMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6878 IEM_MC_FETCH_MEM_SEG_YMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6879 6879 IEM_MC_LOCAL( X86XMMREG, uDst); 6880 6880 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, puDst, uDst, 0); … … 6899 6899 IEM_MC_LOCAL(X86XMMREG, uSrc); 6900 6900 IEM_MC_ARG_LOCAL_REF(PCX86XMMREG, puSrc, uSrc, 1); 6901 IEM_MC_FETCH_MEM_ XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6901 IEM_MC_FETCH_MEM_SEG_XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6902 6902 IEM_MC_LOCAL( X86XMMREG, uDst); 6903 6903 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, puDst, uDst, 0); … … 7146 7146 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 7147 7147 7148 IEM_MC_FETCH_MEM_ U128_NO_AC(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);7148 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 7149 7149 IEM_MC_STORE_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), u128Tmp); 7150 7150 … … 7166 7166 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 7167 7167 7168 IEM_MC_FETCH_MEM_ U256_NO_AC(u256Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);7168 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(u256Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 7169 7169 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), u256Tmp); 7170 7170 … … 7272 7272 7273 7273 IEM_MC_FETCH_GREG_U64(u64EffAddr, X86_GREG_xDI); 7274 IEM_MC_FETCH_MEM_ U128(u128Mem, pVCpu->iem.s.iEffSeg, u64EffAddr);7274 IEM_MC_FETCH_MEM_SEG_U128(u128Mem, pVCpu->iem.s.iEffSeg, u64EffAddr); 7275 7275 IEM_MC_REF_XREG_U128_CONST(puSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 7276 7276 IEM_MC_REF_XREG_U128_CONST(puMsk, IEM_GET_MODRM_RM(pVCpu, bRm)); -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstVexMap2-x86.cpp.h
r108267 r108288 81 81 IEM_MC_LOCAL(RTUINT128U, uSrc2); 82 82 IEM_MC_ARG_LOCAL_REF(PCRTUINT128U, puSrc2, uSrc2, 2); 83 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);83 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 84 84 IEM_MC_ARG(PCRTUINT128U, puSrc1, 1); 85 85 IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); … … 338 338 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); \ 339 339 IEM_MC_PREPARE_AVX_USAGE(); \ 340 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \340 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 341 341 IEM_MC_FETCH_YREG_U256(uSrc1, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 342 342 IEM_MC_REF_EFLAGS(pEFlags); \ … … 359 359 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); \ 360 360 IEM_MC_PREPARE_AVX_USAGE(); \ 361 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \361 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 362 362 IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 363 363 IEM_MC_REF_EFLAGS(pEFlags); \ … … 464 464 IEM_MC_LOCAL(RTUINT256U, uSrc2); 465 465 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc2, uSrc2, 2); 466 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);466 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 467 467 IEM_MC_LOCAL(RTUINT256U, uSrc1); 468 468 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc1, uSrc1, 1); … … 552 552 IEM_MC_PREPARE_AVX_USAGE(); 553 553 554 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);554 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 555 555 IEM_MC_FETCH_YREG_U256(uSrc1, IEM_GET_MODRM_REG(pVCpu, bRm)); 556 556 IEM_MC_REF_EFLAGS(pEFlags); … … 575 575 IEM_MC_PREPARE_AVX_USAGE(); 576 576 577 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);577 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 578 578 IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_MODRM_REG(pVCpu, bRm)); 579 579 IEM_MC_REF_EFLAGS(pEFlags); … … 646 646 IEM_MC_PREPARE_AVX_USAGE(); 647 647 648 IEM_MC_FETCH_MEM_ U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);648 IEM_MC_FETCH_MEM_SEG_U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 649 649 IEM_MC_BROADCAST_YREG_U32_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 650 650 … … 663 663 IEM_MC_PREPARE_AVX_USAGE(); 664 664 665 IEM_MC_FETCH_MEM_ U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);665 IEM_MC_FETCH_MEM_SEG_U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 666 666 IEM_MC_BROADCAST_XREG_U32_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 667 667 … … 730 730 IEM_MC_PREPARE_AVX_USAGE(); 731 731 732 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);732 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 733 733 IEM_MC_BROADCAST_YREG_U64_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 734 734 … … 768 768 IEM_MC_PREPARE_AVX_USAGE(); 769 769 770 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);770 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 771 771 IEM_MC_BROADCAST_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 772 772 … … 896 896 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); \ 897 897 IEM_MC_PREPARE_AVX_USAGE(); \ 898 IEM_MC_FETCH_MEM_ U ## a_SrcWidth (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \898 IEM_MC_FETCH_MEM_SEG_U ## a_SrcWidth (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 899 899 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 900 900 IEM_MC_CALL_VOID_AIMPL_2(IEM_SELECT_HOST_OR_FALLBACK(fAvx2, iemAImpl_ ## a_Instr ## _u128, \ … … 913 913 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 914 914 IEMOP_MNEMONIC2(VEX_RM, VPMOVSXBW, vpmovsxbw, Vx, Wq, DISOPTYPE_HARMLESS, 0); 915 IEMOP_BODY_VPMOV_S_Z(vpmovsxbw, 64, IEM_MC_FETCH_MEM_ U128_NO_AC);915 IEMOP_BODY_VPMOV_S_Z(vpmovsxbw, 64, IEM_MC_FETCH_MEM_SEG_U128_NO_AC); 916 916 } 917 917 … … 922 922 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 923 923 IEMOP_MNEMONIC2(VEX_RM, VPMOVSXBD, vpmovsxbd, Vx, Wq, DISOPTYPE_HARMLESS, 0); 924 IEMOP_BODY_VPMOV_S_Z(vpmovsxbd, 32, IEM_MC_FETCH_MEM_ U128);924 IEMOP_BODY_VPMOV_S_Z(vpmovsxbd, 32, IEM_MC_FETCH_MEM_SEG_U128); 925 925 } 926 926 … … 931 931 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 932 932 IEMOP_MNEMONIC2(VEX_RM, VPMOVSXBQ, vpmovsxbq, Vx, Wq, DISOPTYPE_HARMLESS, 0); 933 IEMOP_BODY_VPMOV_S_Z(vpmovsxbq, 16, IEM_MC_FETCH_MEM_ U128);933 IEMOP_BODY_VPMOV_S_Z(vpmovsxbq, 16, IEM_MC_FETCH_MEM_SEG_U128); 934 934 } 935 935 … … 940 940 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 941 941 IEMOP_MNEMONIC2(VEX_RM, VPMOVSXWD, vpmovsxwd, Vx, Wq, DISOPTYPE_HARMLESS, 0); 942 IEMOP_BODY_VPMOV_S_Z(vpmovsxwd, 64, IEM_MC_FETCH_MEM_ U128_NO_AC);942 IEMOP_BODY_VPMOV_S_Z(vpmovsxwd, 64, IEM_MC_FETCH_MEM_SEG_U128_NO_AC); 943 943 } 944 944 … … 949 949 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 950 950 IEMOP_MNEMONIC2(VEX_RM, VPMOVSXWQ, vpmovsxwq, Vx, Wq, DISOPTYPE_HARMLESS, 0); 951 IEMOP_BODY_VPMOV_S_Z(vpmovsxwq, 32, IEM_MC_FETCH_MEM_ U128);951 IEMOP_BODY_VPMOV_S_Z(vpmovsxwq, 32, IEM_MC_FETCH_MEM_SEG_U128); 952 952 } 953 953 … … 958 958 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 959 959 IEMOP_MNEMONIC2(VEX_RM, VPMOVSXDQ, vpmovsxdq, Vx, Wq, DISOPTYPE_HARMLESS, 0); 960 IEMOP_BODY_VPMOV_S_Z(vpmovsxdq, 64, IEM_MC_FETCH_MEM_ U128_NO_AC);960 IEMOP_BODY_VPMOV_S_Z(vpmovsxdq, 64, IEM_MC_FETCH_MEM_SEG_U128_NO_AC); 961 961 } 962 962 … … 1014 1014 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 1015 1015 1016 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1016 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1017 1017 IEM_MC_STORE_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 1018 1018 … … 1045 1045 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 1046 1046 1047 IEM_MC_FETCH_MEM_ U256_ALIGN_AVX(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1047 IEM_MC_FETCH_MEM_SEG_U256_ALIGN_AVX(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1048 1048 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 1049 1049 … … 1310 1310 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 1311 1311 IEMOP_MNEMONIC2(VEX_RM, VPMOVZXBW, vpmovzxbw, Vx, Wq, DISOPTYPE_HARMLESS, 0); 1312 IEMOP_BODY_VPMOV_S_Z(vpmovzxbw, 64, IEM_MC_FETCH_MEM_ U128_NO_AC);1312 IEMOP_BODY_VPMOV_S_Z(vpmovzxbw, 64, IEM_MC_FETCH_MEM_SEG_U128_NO_AC); 1313 1313 } 1314 1314 … … 1319 1319 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 1320 1320 IEMOP_MNEMONIC2(VEX_RM, VPMOVZXBD, vpmovzxbd, Vx, Wq, DISOPTYPE_HARMLESS, 0); 1321 IEMOP_BODY_VPMOV_S_Z(vpmovzxbd, 32, IEM_MC_FETCH_MEM_ U128);1321 IEMOP_BODY_VPMOV_S_Z(vpmovzxbd, 32, IEM_MC_FETCH_MEM_SEG_U128); 1322 1322 } 1323 1323 … … 1328 1328 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 1329 1329 IEMOP_MNEMONIC2(VEX_RM, VPMOVZXBQ, vpmovzxbq, Vx, Wq, DISOPTYPE_HARMLESS, 0); 1330 IEMOP_BODY_VPMOV_S_Z(vpmovzxbq, 16, IEM_MC_FETCH_MEM_ U128);1330 IEMOP_BODY_VPMOV_S_Z(vpmovzxbq, 16, IEM_MC_FETCH_MEM_SEG_U128); 1331 1331 } 1332 1332 … … 1337 1337 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 1338 1338 IEMOP_MNEMONIC2(VEX_RM, VPMOVZXWD, vpmovzxwd, Vx, Wq, DISOPTYPE_HARMLESS, 0); 1339 IEMOP_BODY_VPMOV_S_Z(vpmovzxwd, 64, IEM_MC_FETCH_MEM_ U128_NO_AC);1339 IEMOP_BODY_VPMOV_S_Z(vpmovzxwd, 64, IEM_MC_FETCH_MEM_SEG_U128_NO_AC); 1340 1340 } 1341 1341 … … 1346 1346 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 1347 1347 IEMOP_MNEMONIC2(VEX_RM, VPMOVZXWQ, vpmovzxwq, Vx, Wq, DISOPTYPE_HARMLESS, 0); 1348 IEMOP_BODY_VPMOV_S_Z(vpmovzxwq, 32, IEM_MC_FETCH_MEM_ U128);1348 IEMOP_BODY_VPMOV_S_Z(vpmovzxwq, 32, IEM_MC_FETCH_MEM_SEG_U128); 1349 1349 } 1350 1350 … … 1355 1355 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 1356 1356 IEMOP_MNEMONIC2(VEX_RM, VPMOVZXDQ, vpmovzxdq, Vx, Wq, DISOPTYPE_HARMLESS, 0); 1357 IEMOP_BODY_VPMOV_S_Z(vpmovzxdq, 64, IEM_MC_FETCH_MEM_ U128_NO_AC);1357 IEMOP_BODY_VPMOV_S_Z(vpmovzxdq, 64, IEM_MC_FETCH_MEM_SEG_U128_NO_AC); 1358 1358 } 1359 1359 … … 1399 1399 IEM_MC_LOCAL(RTUINT256U, uSrc2); 1400 1400 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc2, uSrc2, 2); 1401 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1401 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1402 1402 IEM_MC_LOCAL(RTUINT256U, uSrc1); 1403 1403 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc1, uSrc1, 1); … … 1544 1544 IEM_MC_PREPARE_AVX_USAGE(); 1545 1545 1546 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1546 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1547 1547 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 1548 1548 IEM_MC_CALL_VOID_AIMPL_2(IEM_SELECT_HOST_OR_FALLBACK(fAvx, iemAImpl_vphminposuw_u128, iemAImpl_vphminposuw_u128_fallback), … … 1687 1687 IEM_MC_PREPARE_AVX_USAGE(); 1688 1688 1689 IEM_MC_FETCH_MEM_ U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1689 IEM_MC_FETCH_MEM_SEG_U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1690 1690 IEM_MC_BROADCAST_YREG_U32_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 1691 1691 … … 1704 1704 IEM_MC_PREPARE_AVX_USAGE(); 1705 1705 1706 IEM_MC_FETCH_MEM_ U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1706 IEM_MC_FETCH_MEM_SEG_U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1707 1707 IEM_MC_BROADCAST_XREG_U32_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 1708 1708 … … 1770 1770 IEM_MC_PREPARE_AVX_USAGE(); 1771 1771 1772 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1772 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1773 1773 IEM_MC_BROADCAST_YREG_U64_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 1774 1774 … … 1787 1787 IEM_MC_PREPARE_AVX_USAGE(); 1788 1788 1789 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1789 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1790 1790 IEM_MC_BROADCAST_XREG_U64_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 1791 1791 … … 1823 1823 IEM_MC_PREPARE_AVX_USAGE(); 1824 1824 1825 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1825 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1826 1826 IEM_MC_BROADCAST_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 1827 1827 … … 1921 1921 IEM_MC_PREPARE_AVX_USAGE(); 1922 1922 1923 IEM_MC_FETCH_MEM_ U8(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1923 IEM_MC_FETCH_MEM_SEG_U8(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1924 1924 IEM_MC_BROADCAST_YREG_U8_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 1925 1925 … … 1938 1938 IEM_MC_PREPARE_AVX_USAGE(); 1939 1939 1940 IEM_MC_FETCH_MEM_ U8(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1940 IEM_MC_FETCH_MEM_SEG_U8(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1941 1941 IEM_MC_BROADCAST_XREG_U8_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 1942 1942 … … 2004 2004 IEM_MC_PREPARE_AVX_USAGE(); 2005 2005 2006 IEM_MC_FETCH_MEM_ U16(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2006 IEM_MC_FETCH_MEM_SEG_U16(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2007 2007 IEM_MC_BROADCAST_YREG_U16_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 2008 2008 … … 2021 2021 IEM_MC_PREPARE_AVX_USAGE(); 2022 2022 2023 IEM_MC_FETCH_MEM_ U16(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2023 IEM_MC_FETCH_MEM_SEG_U16(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2024 2024 IEM_MC_BROADCAST_XREG_U16_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 2025 2025 … … 2532 2532 IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX_2(fAvx, fAesNi); 2533 2533 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); 2534 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2534 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2535 2535 2536 2536 IEM_MC_PREPARE_AVX_USAGE(); … … 2678 2678 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 2679 2679 IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fBmi1); 2680 IEM_MC_FETCH_MEM_ U64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2680 IEM_MC_FETCH_MEM_SEG_U64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2681 2681 IEM_MC_FETCH_GREG_U64(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 2682 2682 IEM_MC_REF_GREG_U64(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); … … 2697 2697 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 2698 2698 IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fBmi1); 2699 IEM_MC_FETCH_MEM_ U32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2699 IEM_MC_FETCH_MEM_SEG_U32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2700 2700 IEM_MC_FETCH_GREG_U32(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 2701 2701 IEM_MC_REF_GREG_U32(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); … … 2776 2776 \ 2777 2777 IEM_MC_ARG(uint64_t, uSrc, 2); \ 2778 IEM_MC_FETCH_MEM_ U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \2778 IEM_MC_FETCH_MEM_SEG_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 2779 2779 IEM_MC_ARG(uint64_t *, pDst, 1); \ 2780 2780 IEM_MC_REF_GREG_U64(pDst, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ … … 2795 2795 \ 2796 2796 IEM_MC_ARG(uint32_t, uSrc, 2); \ 2797 IEM_MC_FETCH_MEM_ U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \2797 IEM_MC_FETCH_MEM_SEG_U32(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 2798 2798 IEM_MC_ARG(uint32_t *, pDst, 1); \ 2799 2799 IEM_MC_REF_GREG_U32(pDst, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ … … 2952 2952 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 2953 2953 IEMOP_HLP_DONE_VEX_DECODING_L0_EX(a_fFeatureMember); \ 2954 IEM_MC_FETCH_MEM_ U64(uSrc1, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \2954 IEM_MC_FETCH_MEM_SEG_U64(uSrc1, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 2955 2955 IEM_MC_FETCH_GREG_U64(uSrc2, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ 2956 2956 IEM_MC_REF_GREG_U64(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ … … 2972 2972 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 2973 2973 IEMOP_HLP_DONE_VEX_DECODING_L0_EX(a_fFeatureMember); \ 2974 IEM_MC_FETCH_MEM_ U32(uSrc1, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \2974 IEM_MC_FETCH_MEM_SEG_U32(uSrc1, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 2975 2975 IEM_MC_FETCH_GREG_U32(uSrc2, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ 2976 2976 IEM_MC_REF_GREG_U32(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ … … 3041 3041 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 3042 3042 IEMOP_HLP_DONE_VEX_DECODING_L0_EX(a_fFeatureMember); \ 3043 IEM_MC_FETCH_MEM_ U64(uSrc1, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \3043 IEM_MC_FETCH_MEM_SEG_U64(uSrc1, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 3044 3044 IEM_MC_FETCH_GREG_U64(uSrc2, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ 3045 3045 IEM_MC_REF_GREG_U64(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ … … 3058 3058 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 3059 3059 IEMOP_HLP_DONE_VEX_DECODING_L0_EX(a_fFeatureMember); \ 3060 IEM_MC_FETCH_MEM_ U32(uSrc1, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \3060 IEM_MC_FETCH_MEM_SEG_U32(uSrc1, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 3061 3061 IEM_MC_FETCH_GREG_U32(uSrc2, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ 3062 3062 IEM_MC_REF_GREG_U32(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ … … 3143 3143 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 3144 3144 IEMOP_HLP_DONE_VEX_DECODING_L0_EX(a_fFeatureMember); \ 3145 IEM_MC_FETCH_MEM_ U64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \3145 IEM_MC_FETCH_MEM_SEG_U64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 3146 3146 IEM_MC_FETCH_GREG_U64(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ 3147 3147 IEM_MC_REF_GREG_U64(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ … … 3161 3161 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 3162 3162 IEMOP_HLP_DONE_VEX_DECODING_L0_EX(a_fFeatureMember); \ 3163 IEM_MC_FETCH_MEM_ U32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \3163 IEM_MC_FETCH_MEM_SEG_U32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 3164 3164 IEM_MC_FETCH_GREG_U32(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ 3165 3165 IEM_MC_REF_GREG_U32(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ … … 3263 3263 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 3264 3264 IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fBmi2); 3265 IEM_MC_FETCH_MEM_ U64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3265 IEM_MC_FETCH_MEM_SEG_U64(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3266 3266 IEM_MC_FETCH_GREG_U64(uSrc1, X86_GREG_xDX); 3267 3267 IEM_MC_REF_GREG_U64(pDst2, IEM_GET_EFFECTIVE_VVVV(pVCpu)); … … 3282 3282 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 3283 3283 IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fBmi2); 3284 IEM_MC_FETCH_MEM_ U32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3284 IEM_MC_FETCH_MEM_SEG_U32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3285 3285 IEM_MC_FETCH_GREG_U32(uSrc1, X86_GREG_xDX); 3286 3286 IEM_MC_REF_GREG_U32(pDst2, IEM_GET_EFFECTIVE_VVVV(pVCpu)); -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstVexMap3-x86.cpp.h
r108267 r108288 116 116 IEM_MC_PREPARE_AVX_USAGE(); 117 117 118 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);118 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 119 119 IEM_MC_FETCH_YREG_U256(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 120 120 IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnU256, puDst, puSrc1, puSrc2, bImmArg); … … 140 140 IEM_MC_PREPARE_AVX_USAGE(); 141 141 142 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);142 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 143 143 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 144 144 IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); … … 223 223 IEM_MC_ARG_LOCAL_REF(PCX86YMMREG, puSrc, uSrc, 1); 224 224 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 225 IEM_MC_FETCH_MEM_ YMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);225 IEM_MC_FETCH_MEM_SEG_YMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 226 226 IEM_MC_CALL_AVX_AIMPL_3(pImpl->pfnU256, puDst, puSrc, bImmArg); 227 227 IEM_MC_STORE_YREG_YMM_ZX_VLMAX( IEM_GET_MODRM_REG(pVCpu, bRm), uDst); … … 243 243 IEM_MC_ARG_LOCAL_REF(PCX86XMMREG, puSrc, uSrc, 1); 244 244 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 245 IEM_MC_FETCH_MEM_ XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);245 IEM_MC_FETCH_MEM_SEG_XMM_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 246 246 IEM_MC_CALL_AVX_AIMPL_3(pImpl->pfnU128, puDst, puSrc, bImmArg); 247 247 IEM_MC_STORE_XREG_XMM( IEM_GET_MODRM_REG(pVCpu, bRm), uDst); … … 327 327 IEM_MC_PREPARE_AVX_USAGE(); 328 328 329 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);329 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 330 330 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnU256, puDst, puSrc, bImmArg); 331 331 IEM_MC_STORE_YREG_U256_ZX_VLMAX( IEM_GET_MODRM_REG(pVCpu, bRm), uDst); … … 349 349 IEM_MC_PREPARE_AVX_USAGE(); 350 350 351 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);351 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 352 352 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 353 353 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnU128, puDst, puSrc, bImmArg); … … 441 441 IEM_MC_PREPARE_AVX_USAGE(); 442 442 443 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);443 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 444 444 IEM_MC_FETCH_YREG_U256(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 445 445 IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnU256, puDst, puSrc1, puSrc2, bImmArg); … … 465 465 IEM_MC_PREPARE_AVX_USAGE(); 466 466 467 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);467 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 468 468 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 469 469 IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); … … 519 519 IEM_MC_LOCAL(RTUINT256U, uSrc); 520 520 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc, uSrc, 1); 521 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);521 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 522 522 IEM_MC_LOCAL(RTUINT256U, uDst); 523 523 IEM_MC_ARG_LOCAL_REF(PRTUINT256U, puDst, uDst, 0); … … 573 573 IEM_MC_LOCAL(RTUINT256U, uSrc); 574 574 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc, uSrc, 1); 575 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);575 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 576 576 IEM_MC_LOCAL(RTUINT256U, uDst); 577 577 IEM_MC_ARG_LOCAL_REF(PRTUINT256U, puDst, uDst, 0); … … 671 671 672 672 IEM_MC_FETCH_YREG_U256(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 673 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);673 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 674 674 IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fAvx, iemAImpl_vperm2f128_u256, iemAImpl_vperm2f128_u256_fallback), 675 675 puDst, puSrc1, puSrc2, bImmArg); … … 746 746 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 747 747 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 748 IEM_MC_FETCH_MEM_ XMM_U32_AND_XREG_XMM(Src, IEM_GET_EFFECTIVE_VVVV(pVCpu),748 IEM_MC_FETCH_MEM_SEG_XMM_U32_AND_XREG_XMM(Src, IEM_GET_EFFECTIVE_VVVV(pVCpu), 749 749 0 /*a_iDword*/, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 750 750 IEM_MC_LOCAL(X86XMMREG, uDst); … … 803 803 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 804 804 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 805 IEM_MC_FETCH_MEM_ XMM_U64_AND_XREG_XMM(Src, IEM_GET_EFFECTIVE_VVVV(pVCpu),805 IEM_MC_FETCH_MEM_SEG_XMM_U64_AND_XREG_XMM(Src, IEM_GET_EFFECTIVE_VVVV(pVCpu), 806 806 0 /*a_iQword*/, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 807 807 IEM_MC_LOCAL(X86XMMREG, uDst); … … 1138 1138 IEM_MC_PREPARE_AVX_USAGE(); 1139 1139 1140 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1140 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1141 1141 IEM_MC_COPY_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), IEM_GET_EFFECTIVE_VVVV(pVCpu)); 1142 1142 IEM_MC_STORE_YREG_U128( IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 1, uSrc); … … 1248 1248 1249 1249 IEM_MC_FETCH_XREG_U128(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 1250 IEM_MC_FETCH_MEM_ U8(uValue, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1250 IEM_MC_FETCH_MEM_SEG_U8(uValue, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1251 1251 IEM_MC_STORE_XREG_U128( IEM_GET_MODRM_REG(pVCpu, bRm), uSrc1); 1252 1252 IEM_MC_STORE_XREG_U8( IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 15, uValue); … … 1301 1301 1302 1302 IEM_MC_FETCH_XREG_U128(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 1303 IEM_MC_FETCH_MEM_ U32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1303 IEM_MC_FETCH_MEM_SEG_U32(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1304 1304 IEM_MC_STORE_XREG_U128( IEM_GET_MODRM_REG(pVCpu, bRm), uSrc1); 1305 1305 IEM_MC_STORE_XREG_U32( IEM_GET_MODRM_REG(pVCpu, bRm), (bImm >> 4) & 3, uSrc2); … … 1356 1356 1357 1357 IEM_MC_FETCH_XREG_U128(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 1358 IEM_MC_FETCH_MEM_ U64(uValue, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1358 IEM_MC_FETCH_MEM_SEG_U64(uValue, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1359 1359 IEM_MC_STORE_XREG_U128( IEM_GET_MODRM_REG(pVCpu, bRm), uSrc1); 1360 1360 IEM_MC_STORE_XREG_U64( IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 1, uValue); … … 1404 1404 1405 1405 IEM_MC_FETCH_XREG_U128(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 1406 IEM_MC_FETCH_MEM_ U32(uValue, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1406 IEM_MC_FETCH_MEM_SEG_U32(uValue, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1407 1407 IEM_MC_STORE_XREG_U128( IEM_GET_MODRM_REG(pVCpu, bRm), uSrc1); 1408 1408 IEM_MC_STORE_XREG_U32( IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 3, uValue); … … 1479 1479 IEM_MC_PREPARE_AVX_USAGE(); 1480 1480 1481 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1481 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1482 1482 IEM_MC_COPY_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), IEM_GET_EFFECTIVE_VVVV(pVCpu)); 1483 1483 IEM_MC_STORE_YREG_U128( IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 1, uSrc); … … 1612 1612 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2YMMSRC, puSrc, uSrc, 1); 1613 1613 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 1614 IEM_MC_FETCH_MEM_ YMM_NO_AC_AND_YREG_YMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu),1614 IEM_MC_FETCH_MEM_SEG_YMM_NO_AC_AND_YREG_YMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu), 1615 1615 pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1616 1616 IEM_MC_LOCAL(X86YMMREG, uDst); … … 1634 1634 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, puSrc, uSrc, 1); 1635 1635 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 1636 IEM_MC_FETCH_MEM_ XMM_NO_AC_AND_XREG_XMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu),1636 IEM_MC_FETCH_MEM_SEG_XMM_NO_AC_AND_XREG_XMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu), 1637 1637 pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1638 1638 IEM_MC_LOCAL(X86XMMREG, uDst); … … 1692 1692 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, puSrc, uSrc, 1); 1693 1693 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 1694 IEM_MC_FETCH_MEM_ XMM_NO_AC_AND_XREG_XMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu),1694 IEM_MC_FETCH_MEM_SEG_XMM_NO_AC_AND_XREG_XMM(uSrc, IEM_GET_EFFECTIVE_VVVV(pVCpu), 1695 1695 pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1696 1696 IEM_MC_LOCAL(X86XMMREG, uDst); … … 1765 1765 IEM_MC_PREPARE_AVX_USAGE(); 1766 1766 1767 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1767 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1768 1768 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 1769 1769 IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); … … 1833 1833 1834 1834 IEM_MC_FETCH_YREG_U256(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 1835 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1835 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1836 1836 IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fAvx2, iemAImpl_vperm2i128_u256, iemAImpl_vperm2i128_u256_fallback), 1837 1837 puDst, puSrc1, puSrc2, bImmArg); … … 1927 1927 IEM_MC_LOCAL(RTUINT256U, uSrc2); 1928 1928 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc2, uSrc2, 2); 1929 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1929 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1930 1930 1931 1931 IEM_MC_LOCAL(RTUINT256U, uSrc1); … … 1955 1955 IEM_MC_LOCAL(RTUINT128U, uSrc2); 1956 1956 IEM_MC_ARG_LOCAL_REF(PCRTUINT128U, puSrc2, uSrc2, 2); 1957 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1957 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1958 1958 1959 1959 IEM_MC_ARG(PRTUINT128U, puDst, 0); … … 2077 2077 IEM_MC_LOCAL(RTUINT256U, uSrc2); 2078 2078 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc2, uSrc2, 2); 2079 IEM_MC_FETCH_MEM_ U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2079 IEM_MC_FETCH_MEM_SEG_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2080 2080 2081 2081 IEM_MC_LOCAL(RTUINT256U, uSrc1); … … 2109 2109 IEM_MC_LOCAL(RTUINT128U, uSrc2); 2110 2110 IEM_MC_ARG_LOCAL_REF(PCRTUINT128U, puSrc2, uSrc2, 2); 2111 IEM_MC_FETCH_MEM_ U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2111 IEM_MC_FETCH_MEM_SEG_U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2112 2112 2113 2113 IEM_MC_ARG(PRTUINT128U, puDst, 0); … … 2223 2223 IEM_MC_PREPARE_SSE_USAGE(); 2224 2224 2225 IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_RAX_RDX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm),2225 IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_RAX_RDX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 2226 2226 pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2227 2227 IEM_MC_REF_XREG_U128(puDst, 0 /*xmm0*/); … … 2281 2281 IEM_MC_PREPARE_SSE_USAGE(); 2282 2282 2283 IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm),2283 IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 2284 2284 pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2285 2285 IEM_MC_REF_XREG_U128(puDst, 0 /*xmm0*/); … … 2355 2355 IEM_MC_PREPARE_SSE_USAGE(); 2356 2356 2357 IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_RAX_RDX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm),2357 IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_RAX_RDX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 2358 2358 pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2359 2359 IEM_MC_REF_GREG_U32(pu32Ecx, X86_GREG_xCX); … … 2417 2417 IEM_MC_PREPARE_SSE_USAGE(); 2418 2418 2419 IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm),2419 IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 2420 2420 pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2421 2421 IEM_MC_REF_GREG_U32(pu32Ecx, X86_GREG_xCX); … … 2489 2489 IEM_MC_PREPARE_SSE_USAGE(); 2490 2490 2491 IEM_MC_FETCH_MEM_ U128_AND_XREG_U128(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2491 IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2492 2492 IEM_MC_REF_XREG_U128(puDst, 0 /*xmm0*/); 2493 2493 IEM_MC_REF_EFLAGS(pEFlags); … … 2561 2561 IEM_MC_PREPARE_SSE_USAGE(); 2562 2562 2563 IEM_MC_FETCH_MEM_ U128(Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2563 IEM_MC_FETCH_MEM_SEG_U128(Src2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2564 2564 IEM_MC_REF_XREG_U128_CONST(pSrc1, IEM_GET_MODRM_REG(pVCpu, bRm)); 2565 2565 IEM_MC_REF_EFLAGS(pEFlags); … … 2704 2704 IEM_MC_LOCAL(RTUINT128U, uSrc); 2705 2705 IEM_MC_ARG_LOCAL_REF(PCRTUINT128U, puSrc, uSrc, 1); 2706 IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2706 IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2707 2707 IEM_MC_CALL_VOID_AIMPL_3(IEM_SELECT_HOST_OR_FALLBACK(fAesNi, iemAImpl_vaeskeygenassist_u128, iemAImpl_vaeskeygenassist_u128_fallback), 2708 2708 puDst, puSrc, bImmArg); … … 2772 2772 IEM_MC_ARG_CONST(uint64_t, uSrc2, bImm8, 2); 2773 2773 IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fBmi2); 2774 IEM_MC_FETCH_MEM_ U64(uSrc1, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2774 IEM_MC_FETCH_MEM_SEG_U64(uSrc1, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2775 2775 IEM_MC_REF_GREG_U64(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 2776 2776 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_rorx_u64, pDst, uSrc1, uSrc2); … … 2788 2788 IEM_MC_ARG_CONST(uint32_t, uSrc2, bImm8, 2); 2789 2789 IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fBmi2); 2790 IEM_MC_FETCH_MEM_ U32(uSrc1, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2790 IEM_MC_FETCH_MEM_SEG_U32(uSrc1, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2791 2791 IEM_MC_REF_GREG_U32(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 2792 2792 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_rorx_u32, pDst, uSrc1, uSrc2); -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllN8veLiveness-x86.h
r108287 r108288 824 824 #define IEM_MC_CLEAR_ZREG_256_UP(a_iYReg) NOP() 825 825 826 #define IEM_MC_FETCH_MEM_ U8(a_u8Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)827 #define IEM_MC_FETCH_MEM16_ U8(a_u8Dst, a_iSeg, a_GCPtrMem16)IEM_LIVENESS_MEM_SEG(a_iSeg)828 #define IEM_MC_FETCH_MEM32_ U8(a_u8Dst, a_iSeg, a_GCPtrMem32)IEM_LIVENESS_MEM_SEG(a_iSeg)826 #define IEM_MC_FETCH_MEM_SEG_U8(a_u8Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 827 #define IEM_MC_FETCH_MEM16_SEG_U8(a_u8Dst, a_iSeg, a_GCPtrMem16) IEM_LIVENESS_MEM_SEG(a_iSeg) 828 #define IEM_MC_FETCH_MEM32_SEG_U8(a_u8Dst, a_iSeg, a_GCPtrMem32) IEM_LIVENESS_MEM_SEG(a_iSeg) 829 829 830 830 #define IEM_MC_FETCH_MEM_FLAT_U8(a_u8Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() … … 832 832 #define IEM_MC_FETCH_MEM32_FLAT_U8(a_u8Dst, a_GCPtrMem32) IEM_LIVENESS_MEM_FLAT() 833 833 834 #define IEM_MC_FETCH_MEM_ U16(a_u16Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)835 #define IEM_MC_FETCH_MEM_ U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp)IEM_LIVENESS_MEM_SEG(a_iSeg)836 #define IEM_MC_FETCH_MEM_ I16(a_i16Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)837 #define IEM_MC_FETCH_MEM_ I16_DISP(a_i16Dst, a_iSeg, a_GCPtrMem, a_offDisp)IEM_LIVENESS_MEM_SEG(a_iSeg)834 #define IEM_MC_FETCH_MEM_SEG_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 835 #define IEM_MC_FETCH_MEM_SEG_U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_SEG(a_iSeg) 836 #define IEM_MC_FETCH_MEM_SEG_I16(a_i16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 837 #define IEM_MC_FETCH_MEM_SEG_I16_DISP(a_i16Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_SEG(a_iSeg) 838 838 839 839 #define IEM_MC_FETCH_MEM_FLAT_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() … … 842 842 #define IEM_MC_FETCH_MEM_FLAT_I16_DISP(a_i16Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT() 843 843 844 #define IEM_MC_FETCH_MEM_ U32(a_u32Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)845 #define IEM_MC_FETCH_MEM_ U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp)IEM_LIVENESS_MEM_SEG(a_iSeg)846 #define IEM_MC_FETCH_MEM_ I32(a_i32Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)847 #define IEM_MC_FETCH_MEM_ I32_DISP(a_i32Dst, a_iSeg, a_GCPtrMem, a_offDisp)IEM_LIVENESS_MEM_SEG(a_iSeg)844 #define IEM_MC_FETCH_MEM_SEG_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 845 #define IEM_MC_FETCH_MEM_SEG_U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_SEG(a_iSeg) 846 #define IEM_MC_FETCH_MEM_SEG_I32(a_i32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 847 #define IEM_MC_FETCH_MEM_SEG_I32_DISP(a_i32Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_SEG(a_iSeg) 848 848 849 849 #define IEM_MC_FETCH_MEM_FLAT_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() … … 852 852 #define IEM_MC_FETCH_MEM_FLAT_I32_DISP(a_i32Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT() 853 853 854 #define IEM_MC_FETCH_MEM_ U64(a_u64Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)855 #define IEM_MC_FETCH_MEM_ U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp)IEM_LIVENESS_MEM_SEG(a_iSeg)856 #define IEM_MC_FETCH_MEM_ U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)857 #define IEM_MC_FETCH_MEM_ I64(a_i64Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)854 #define IEM_MC_FETCH_MEM_SEG_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 855 #define IEM_MC_FETCH_MEM_SEG_U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_SEG(a_iSeg) 856 #define IEM_MC_FETCH_MEM_SEG_U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 857 #define IEM_MC_FETCH_MEM_SEG_I64(a_i64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 858 858 859 859 #define IEM_MC_FETCH_MEM_FLAT_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() … … 862 862 #define IEM_MC_FETCH_MEM_FLAT_I64(a_i64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 863 863 864 #define IEM_MC_FETCH_MEM_ R32(a_r32Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)865 #define IEM_MC_FETCH_MEM_ R64(a_r64Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)866 #define IEM_MC_FETCH_MEM_ R80(a_r80Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)867 #define IEM_MC_FETCH_MEM_ D80(a_d80Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)864 #define IEM_MC_FETCH_MEM_SEG_R32(a_r32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 865 #define IEM_MC_FETCH_MEM_SEG_R64(a_r64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 866 #define IEM_MC_FETCH_MEM_SEG_R80(a_r80Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 867 #define IEM_MC_FETCH_MEM_SEG_D80(a_d80Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 868 868 869 869 #define IEM_MC_FETCH_MEM_FLAT_R32(a_r32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() … … 872 872 #define IEM_MC_FETCH_MEM_FLAT_D80(a_d80Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 873 873 874 #define IEM_MC_FETCH_MEM_ U128(a_u128Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)875 #define IEM_MC_FETCH_MEM_ U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)876 #define IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)877 878 #define IEM_MC_FETCH_MEM_ XMM(a_XmmDst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)879 #define IEM_MC_FETCH_MEM_ XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)880 #define IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)874 #define IEM_MC_FETCH_MEM_SEG_U128(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 875 #define IEM_MC_FETCH_MEM_SEG_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 876 #define IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 877 878 #define IEM_MC_FETCH_MEM_SEG_XMM(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 879 #define IEM_MC_FETCH_MEM_SEG_XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 880 #define IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 881 881 882 882 #define IEM_MC_FETCH_MEM_FLAT_U128(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() … … 888 888 #define IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 889 889 890 #define IEM_MC_FETCH_MEM_ U128_AND_XREG_U128(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2)IEM_LIVENESS_MEM_SEG(a_iSeg)890 #define IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM_SEG(a_iSeg) 891 891 #define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT() 892 892 893 #define IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2)IEM_LIVENESS_MEM_SEG(a_iSeg)894 #define IEM_MC_FETCH_MEM_ XMM_NO_AC_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2)IEM_LIVENESS_MEM_SEG(a_iSeg)893 #define IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM_SEG(a_iSeg) 894 #define IEM_MC_FETCH_MEM_SEG_XMM_NO_AC_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM_SEG(a_iSeg) 895 895 #define IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT() 896 896 #define IEM_MC_FETCH_MEM_FLAT_XMM_NO_AC_AND_XREG_XMM(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT() 897 #define IEM_MC_FETCH_MEM_ XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM_SEG(a_iSeg)897 #define IEM_MC_FETCH_MEM_SEG_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM_SEG(a_iSeg) 898 898 #define IEM_MC_FETCH_MEM_FLAT_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT() 899 #define IEM_MC_FETCH_MEM_ XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM_SEG(a_iSeg)899 #define IEM_MC_FETCH_MEM_SEG_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM_SEG(a_iSeg) 900 900 #define IEM_MC_FETCH_MEM_FLAT_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT() 901 901 902 #define IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \902 #define IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 903 903 do { IEM_LIVENESS_MEM_SEG(a_iSeg2); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0) 904 #define IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \904 #define IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 905 905 do { IEM_LIVENESS_MEM_SEG(a_iSeg2); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0) 906 906 … … 911 911 912 912 913 #define IEM_MC_FETCH_MEM_ U256(a_u256Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)914 #define IEM_MC_FETCH_MEM_ U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)915 #define IEM_MC_FETCH_MEM_ U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)916 917 #define IEM_MC_FETCH_MEM_ YMM(a_YmmDst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)918 #define IEM_MC_FETCH_MEM_ YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)919 #define IEM_MC_FETCH_MEM_ YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)913 #define IEM_MC_FETCH_MEM_SEG_U256(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 914 #define IEM_MC_FETCH_MEM_SEG_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 915 #define IEM_MC_FETCH_MEM_SEG_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 916 917 #define IEM_MC_FETCH_MEM_SEG_YMM(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 918 #define IEM_MC_FETCH_MEM_SEG_YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 919 #define IEM_MC_FETCH_MEM_SEG_YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 920 920 921 921 #define IEM_MC_FETCH_MEM_FLAT_U256(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() … … 927 927 #define IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 928 928 929 #define IEM_MC_FETCH_MEM_ U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)930 #define IEM_MC_FETCH_MEM_ U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)931 #define IEM_MC_FETCH_MEM_ U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)932 #define IEM_MC_FETCH_MEM_ U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)933 #define IEM_MC_FETCH_MEM_ U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)934 #define IEM_MC_FETCH_MEM_ U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)929 #define IEM_MC_FETCH_MEM_SEG_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 930 #define IEM_MC_FETCH_MEM_SEG_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 931 #define IEM_MC_FETCH_MEM_SEG_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 932 #define IEM_MC_FETCH_MEM_SEG_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 933 #define IEM_MC_FETCH_MEM_SEG_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 934 #define IEM_MC_FETCH_MEM_SEG_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 935 935 936 936 #define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() … … 941 941 #define IEM_MC_FETCH_MEM_FLAT_U32_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 942 942 943 #define IEM_MC_FETCH_MEM_ U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)944 #define IEM_MC_FETCH_MEM_ U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)945 #define IEM_MC_FETCH_MEM_ U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)946 #define IEM_MC_FETCH_MEM_ U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)947 #define IEM_MC_FETCH_MEM_ U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)948 #define IEM_MC_FETCH_MEM_ U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem)IEM_LIVENESS_MEM_SEG(a_iSeg)943 #define IEM_MC_FETCH_MEM_SEG_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 944 #define IEM_MC_FETCH_MEM_SEG_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 945 #define IEM_MC_FETCH_MEM_SEG_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 946 #define IEM_MC_FETCH_MEM_SEG_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 947 #define IEM_MC_FETCH_MEM_SEG_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 948 #define IEM_MC_FETCH_MEM_SEG_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM_SEG(a_iSeg) 949 949 950 950 #define IEM_MC_FETCH_MEM_FLAT_U8_SX_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllN8veRecompFuncs-x86.h
r108287 r108288 7124 7124 } IEMNATIVEMITMEMOP; 7125 7125 7126 /** Emits code for IEM_MC_FETCH_MEM_ U8/16/32/64 and IEM_MC_STORE_MEM_U8/16/32/64,7126 /** Emits code for IEM_MC_FETCH_MEM_SEG_U8/16/32/64 and IEM_MC_STORE_MEM_U8/16/32/64, 7127 7127 * and IEM_MC_FETCH_MEM_FLAT_U8/16/32/64 and IEM_MC_STORE_MEM_FLAT_U8/16/32/64 7128 7128 * (with iSegReg = UINT8_MAX). */ … … 7715 7715 7716 7716 /* 8-bit segmented: */ 7717 #define IEM_MC_FETCH_MEM_ U8(a_u8Dst, a_iSeg, a_GCPtrMem) \7717 #define IEM_MC_FETCH_MEM_SEG_U8(a_u8Dst, a_iSeg, a_GCPtrMem) \ 7718 7718 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint8_t), 0 /*fAlignMaskAndCtl*/, kIemNativeEmitMemOp_Fetch>( \ 7719 7719 pReNative, off, a_u8Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU8, pCallEntry->idxInstr) 7720 7720 7721 #define IEM_MC_FETCH_MEM_ U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) \7721 #define IEM_MC_FETCH_MEM_SEG_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) \ 7722 7722 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint8_t), 0 /*fAlignMaskAndCtl*/, kIemNativeEmitMemOp_Fetch_Zx_U16>( \ 7723 7723 pReNative, off, a_u16Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU8, pCallEntry->idxInstr) 7724 7724 7725 #define IEM_MC_FETCH_MEM_ U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \7725 #define IEM_MC_FETCH_MEM_SEG_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \ 7726 7726 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint8_t), 0 /*fAlignMaskAndCtl*/, kIemNativeEmitMemOp_Fetch_Zx_U32>( \ 7727 7727 pReNative, off, a_u32Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU8, pCallEntry->idxInstr) 7728 7728 7729 #define IEM_MC_FETCH_MEM_ U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \7729 #define IEM_MC_FETCH_MEM_SEG_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 7730 7730 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint8_t), 0 /*fAlignMaskAndCtl*/, kIemNativeEmitMemOp_Fetch_Zx_U64>( \ 7731 7731 pReNative, off, a_u64Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU8, pCallEntry->idxInstr) 7732 7732 7733 #define IEM_MC_FETCH_MEM_ U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) \7733 #define IEM_MC_FETCH_MEM_SEG_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) \ 7734 7734 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint8_t), 0 /*fAlignMaskAndCtl*/, kIemNativeEmitMemOp_Fetch_Sx_U16>(\ 7735 7735 pReNative, off, a_u16Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU8_Sx_U16, pCallEntry->idxInstr) 7736 7736 7737 #define IEM_MC_FETCH_MEM_ U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \7737 #define IEM_MC_FETCH_MEM_SEG_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \ 7738 7738 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint8_t), 0 /*fAlignMaskAndCtl*/, kIemNativeEmitMemOp_Fetch_Sx_U32>(\ 7739 7739 pReNative, off, a_u32Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU8_Sx_U32, pCallEntry->idxInstr) 7740 7740 7741 #define IEM_MC_FETCH_MEM_ U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \7741 #define IEM_MC_FETCH_MEM_SEG_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 7742 7742 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint8_t), 0 /*fAlignMaskAndCtl*/, kIemNativeEmitMemOp_Fetch_Sx_U64>(\ 7743 7743 pReNative, off, a_u64Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU8_Sx_U64, pCallEntry->idxInstr) 7744 7744 7745 7745 /* 16-bit segmented: */ 7746 #define IEM_MC_FETCH_MEM_ U16(a_u16Dst, a_iSeg, a_GCPtrMem) \7746 #define IEM_MC_FETCH_MEM_SEG_U16(a_u16Dst, a_iSeg, a_GCPtrMem) \ 7747 7747 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint16_t), sizeof(uint16_t) - 1, kIemNativeEmitMemOp_Fetch>(\ 7748 7748 pReNative, off, a_u16Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU16, pCallEntry->idxInstr) 7749 7749 7750 #define IEM_MC_FETCH_MEM_ U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) \7750 #define IEM_MC_FETCH_MEM_SEG_U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 7751 7751 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint16_t), sizeof(uint16_t) - 1, kIemNativeEmitMemOp_Fetch>(\ 7752 7752 pReNative, off, a_u16Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU16, pCallEntry->idxInstr, a_offDisp) 7753 7753 7754 #define IEM_MC_FETCH_MEM_ U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \7754 #define IEM_MC_FETCH_MEM_SEG_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \ 7755 7755 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint16_t), sizeof(uint16_t) - 1, kIemNativeEmitMemOp_Fetch_Zx_U32>(\ 7756 7756 pReNative, off, a_u32Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU16, pCallEntry->idxInstr) 7757 7757 7758 #define IEM_MC_FETCH_MEM_ U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \7758 #define IEM_MC_FETCH_MEM_SEG_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 7759 7759 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint16_t), sizeof(uint16_t) - 1, kIemNativeEmitMemOp_Fetch_Zx_U64>(\ 7760 7760 pReNative, off, a_u64Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU16, pCallEntry->idxInstr) 7761 7761 7762 #define IEM_MC_FETCH_MEM_ U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \7762 #define IEM_MC_FETCH_MEM_SEG_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \ 7763 7763 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint16_t), sizeof(uint16_t) - 1, kIemNativeEmitMemOp_Fetch_Sx_U32>(\ 7764 7764 pReNative, off, a_u32Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU16_Sx_U32, pCallEntry->idxInstr) 7765 7765 7766 #define IEM_MC_FETCH_MEM_ U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \7766 #define IEM_MC_FETCH_MEM_SEG_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 7767 7767 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint16_t), sizeof(uint16_t) - 1, kIemNativeEmitMemOp_Fetch_Sx_U64>(\ 7768 7768 pReNative, off, a_u64Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU16_Sx_U64, pCallEntry->idxInstr) … … 7770 7770 7771 7771 /* 32-bit segmented: */ 7772 #define IEM_MC_FETCH_MEM_ U32(a_u32Dst, a_iSeg, a_GCPtrMem) \7772 #define IEM_MC_FETCH_MEM_SEG_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \ 7773 7773 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint32_t), sizeof(uint32_t) - 1, kIemNativeEmitMemOp_Fetch>(\ 7774 7774 pReNative, off, a_u32Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU32, pCallEntry->idxInstr) 7775 7775 7776 #define IEM_MC_FETCH_MEM_ U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) \7776 #define IEM_MC_FETCH_MEM_SEG_U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 7777 7777 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint32_t), sizeof(uint32_t) - 1, kIemNativeEmitMemOp_Fetch>(\ 7778 7778 pReNative, off, a_u32Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU32, pCallEntry->idxInstr, a_offDisp) 7779 7779 7780 #define IEM_MC_FETCH_MEM_ U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \7780 #define IEM_MC_FETCH_MEM_SEG_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 7781 7781 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint32_t), sizeof(uint32_t) - 1, kIemNativeEmitMemOp_Fetch_Zx_U64>(\ 7782 7782 pReNative, off, a_u64Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU32, pCallEntry->idxInstr) 7783 7783 7784 #define IEM_MC_FETCH_MEM_ U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \7784 #define IEM_MC_FETCH_MEM_SEG_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 7785 7785 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint32_t), sizeof(uint32_t) - 1, kIemNativeEmitMemOp_Fetch_Sx_U64>(\ 7786 7786 pReNative, off, a_u64Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU32_Sx_U64, pCallEntry->idxInstr) 7787 7787 7788 #define IEM_MC_FETCH_MEM_ I16(a_i16Dst, a_iSeg, a_GCPtrMem) \7788 #define IEM_MC_FETCH_MEM_SEG_I16(a_i16Dst, a_iSeg, a_GCPtrMem) \ 7789 7789 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(int16_t), sizeof(int16_t) - 1, kIemNativeEmitMemOp_Fetch_Sx_U32>(\ 7790 7790 pReNative, off, a_i16Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU16_Sx_U32, pCallEntry->idxInstr) 7791 7791 7792 #define IEM_MC_FETCH_MEM_ I16_DISP(a_i16Dst, a_iSeg, a_GCPtrMem, a_offDisp) \7792 #define IEM_MC_FETCH_MEM_SEG_I16_DISP(a_i16Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 7793 7793 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(int16_t), sizeof(int16_t) - 1, kIemNativeEmitMemOp_Fetch_Sx_U32>(\ 7794 7794 pReNative, off, a_i16Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU16_Sx_U32, pCallEntry->idxInstr, \ 7795 7795 a_offDisp) 7796 7796 7797 #define IEM_MC_FETCH_MEM_ I32(a_i32Dst, a_iSeg, a_GCPtrMem) \7797 #define IEM_MC_FETCH_MEM_SEG_I32(a_i32Dst, a_iSeg, a_GCPtrMem) \ 7798 7798 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(int32_t), sizeof(int32_t) - 1, kIemNativeEmitMemOp_Fetch>(\ 7799 7799 pReNative, off, a_i32Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU32, pCallEntry->idxInstr) 7800 7800 7801 #define IEM_MC_FETCH_MEM_ I32_DISP(a_i32Dst, a_iSeg, a_GCPtrMem, a_offDisp) \7801 #define IEM_MC_FETCH_MEM_SEG_I32_DISP(a_i32Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 7802 7802 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(int32_t), sizeof(int32_t) - 1, kIemNativeEmitMemOp_Fetch>(\ 7803 7803 pReNative, off, a_i32Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU32, pCallEntry->idxInstr, a_offDisp) 7804 7804 7805 #define IEM_MC_FETCH_MEM_ I64(a_i64Dst, a_iSeg, a_GCPtrMem) \7805 #define IEM_MC_FETCH_MEM_SEG_I64(a_i64Dst, a_iSeg, a_GCPtrMem) \ 7806 7806 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(int64_t), sizeof(int64_t) - 1, kIemNativeEmitMemOp_Fetch>(\ 7807 7807 pReNative, off, a_i64Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU64, pCallEntry->idxInstr) 7808 7808 7809 7809 AssertCompileSize(RTFLOAT32U, sizeof(uint32_t)); 7810 #define IEM_MC_FETCH_MEM_ R32(a_r32Dst, a_iSeg, a_GCPtrMem) \7810 #define IEM_MC_FETCH_MEM_SEG_R32(a_r32Dst, a_iSeg, a_GCPtrMem) \ 7811 7811 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(RTFLOAT32U), sizeof(RTFLOAT32U) - 1, kIemNativeEmitMemOp_Fetch>(\ 7812 7812 pReNative, off, a_r32Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU32, pCallEntry->idxInstr) … … 7814 7814 7815 7815 /* 64-bit segmented: */ 7816 #define IEM_MC_FETCH_MEM_ U64(a_u64Dst, a_iSeg, a_GCPtrMem) \7816 #define IEM_MC_FETCH_MEM_SEG_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 7817 7817 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint64_t), sizeof(uint64_t) - 1, kIemNativeEmitMemOp_Fetch>(\ 7818 7818 pReNative, off, a_u64Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU64, pCallEntry->idxInstr) 7819 7819 7820 7820 AssertCompileSize(RTFLOAT64U, sizeof(uint64_t)); 7821 #define IEM_MC_FETCH_MEM_ R64(a_r64Dst, a_iSeg, a_GCPtrMem) \7821 #define IEM_MC_FETCH_MEM_SEG_R64(a_r64Dst, a_iSeg, a_GCPtrMem) \ 7822 7822 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(RTFLOAT64U), sizeof(RTFLOAT64U) - 1, kIemNativeEmitMemOp_Fetch>(\ 7823 7823 pReNative, off, a_r64Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU64, pCallEntry->idxInstr) … … 7932 7932 7933 7933 /* 128-bit segmented: */ 7934 #define IEM_MC_FETCH_MEM_ U128(a_u128Dst, a_iSeg, a_GCPtrMem) \7934 #define IEM_MC_FETCH_MEM_SEG_U128(a_u128Dst, a_iSeg, a_GCPtrMem) \ 7935 7935 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(RTUINT128U), sizeof(RTUINT128U) - 1, kIemNativeEmitMemOp_Fetch>(\ 7936 7936 pReNative, off, a_u128Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU128, pCallEntry->idxInstr) 7937 7937 7938 #define IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) \7938 #define IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) \ 7939 7939 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(RTUINT128U), \ 7940 7940 (sizeof(RTUINT128U) - 1U) | IEM_MEMMAP_F_ALIGN_GP | IEM_MEMMAP_F_ALIGN_SSE, \ … … 7943 7943 7944 7944 AssertCompileSize(X86XMMREG, sizeof(RTUINT128U)); 7945 #define IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE(a_uXmmDst, a_iSeg, a_GCPtrMem) \7945 #define IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE(a_uXmmDst, a_iSeg, a_GCPtrMem) \ 7946 7946 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(X86XMMREG), \ 7947 7947 (sizeof(X86XMMREG) - 1U) | IEM_MEMMAP_F_ALIGN_GP | IEM_MEMMAP_F_ALIGN_SSE, \ … … 7949 7949 pReNative, off, a_uXmmDst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU128AlignedSse, pCallEntry->idxInstr) 7950 7950 7951 #define IEM_MC_FETCH_MEM_ U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) \7951 #define IEM_MC_FETCH_MEM_SEG_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) \ 7952 7952 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(RTUINT128U), sizeof(RTUINT128U) - 1, kIemNativeEmitMemOp_Fetch>(\ 7953 7953 pReNative, off, a_u128Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU128NoAc, pCallEntry->idxInstr) 7954 7954 7955 #define IEM_MC_FETCH_MEM_ XMM_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) \7955 #define IEM_MC_FETCH_MEM_SEG_XMM_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) \ 7956 7956 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(X86XMMREG), sizeof(X86XMMREG) - 1, kIemNativeEmitMemOp_Fetch>(\ 7957 7957 pReNative, off, a_u128Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU128NoAc, pCallEntry->idxInstr) … … 7984 7984 7985 7985 /* 256-bit segmented: */ 7986 #define IEM_MC_FETCH_MEM_ U256(a_u256Dst, a_iSeg, a_GCPtrMem) \7986 #define IEM_MC_FETCH_MEM_SEG_U256(a_u256Dst, a_iSeg, a_GCPtrMem) \ 7987 7987 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(RTUINT256U), sizeof(RTUINT256U) - 1, kIemNativeEmitMemOp_Fetch>(\ 7988 7988 pReNative, off, a_u256Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU256NoAc, pCallEntry->idxInstr) 7989 7989 7990 #define IEM_MC_FETCH_MEM_ U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) \7990 #define IEM_MC_FETCH_MEM_SEG_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) \ 7991 7991 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(RTUINT256U), sizeof(RTUINT256U) - 1, kIemNativeEmitMemOp_Fetch>(\ 7992 7992 pReNative, off, a_u256Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU256NoAc, pCallEntry->idxInstr) 7993 7993 7994 #define IEM_MC_FETCH_MEM_ U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) \7994 #define IEM_MC_FETCH_MEM_SEG_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) \ 7995 7995 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(RTUINT256U), \ 7996 7996 (sizeof(RTUINT256U) - 1U) | IEM_MEMMAP_F_ALIGN_GP, \ … … 7998 7998 pReNative, off, a_u256Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU256AlignedAvx, pCallEntry->idxInstr) 7999 7999 8000 #define IEM_MC_FETCH_MEM_ YMM_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) \8000 #define IEM_MC_FETCH_MEM_SEG_YMM_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) \ 8001 8001 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(X86YMMREG), sizeof(X86YMMREG) - 1, kIemNativeEmitMemOp_Fetch>(\ 8002 8002 pReNative, off, a_u256Dst, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFetchDataU256NoAc, pCallEntry->idxInstr) -
trunk/src/VBox/VMM/include/IEMMc.h
r108287 r108288 970 970 do { IEM_MC_INT_CLEAR_ZMM_256_UP(a_iYReg); } while (0) 971 971 972 #define IEM_MC_FETCH_MEM_ U8(a_u8Dst, a_iSeg, a_GCPtrMem) \972 #define IEM_MC_FETCH_MEM_SEG_U8(a_u8Dst, a_iSeg, a_GCPtrMem) \ 973 973 ((a_u8Dst) = iemMemFetchDataU8Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 974 #define IEM_MC_FETCH_MEM16_ U8(a_u8Dst, a_iSeg, a_GCPtrMem16) \974 #define IEM_MC_FETCH_MEM16_SEG_U8(a_u8Dst, a_iSeg, a_GCPtrMem16) \ 975 975 ((a_u8Dst) = iemMemFetchDataU8Jmp(pVCpu, (a_iSeg), (a_GCPtrMem16))) 976 #define IEM_MC_FETCH_MEM32_ U8(a_u8Dst, a_iSeg, a_GCPtrMem32) \976 #define IEM_MC_FETCH_MEM32_SEG_U8(a_u8Dst, a_iSeg, a_GCPtrMem32) \ 977 977 ((a_u8Dst) = iemMemFetchDataU8Jmp(pVCpu, (a_iSeg), (a_GCPtrMem32))) 978 978 … … 984 984 ((a_u8Dst) = iemMemFlatFetchDataU8Jmp(pVCpu, (a_GCPtrMem32))) 985 985 986 #define IEM_MC_FETCH_MEM_ U16(a_u16Dst, a_iSeg, a_GCPtrMem) \986 #define IEM_MC_FETCH_MEM_SEG_U16(a_u16Dst, a_iSeg, a_GCPtrMem) \ 987 987 ((a_u16Dst) = iemMemFetchDataU16Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 988 #define IEM_MC_FETCH_MEM_ U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) \988 #define IEM_MC_FETCH_MEM_SEG_U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 989 989 ((a_u16Dst) = iemMemFetchDataU16Jmp(pVCpu, (a_iSeg), (a_GCPtrMem) + (a_offDisp))) 990 #define IEM_MC_FETCH_MEM_ I16(a_i16Dst, a_iSeg, a_GCPtrMem) \990 #define IEM_MC_FETCH_MEM_SEG_I16(a_i16Dst, a_iSeg, a_GCPtrMem) \ 991 991 ((a_i16Dst) = (int16_t)iemMemFetchDataU16Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 992 #define IEM_MC_FETCH_MEM_ I16_DISP(a_i16Dst, a_iSeg, a_GCPtrMem, a_offDisp) \992 #define IEM_MC_FETCH_MEM_SEG_I16_DISP(a_i16Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 993 993 ((a_i16Dst) = (int16_t)iemMemFetchDataU16Jmp(pVCpu, (a_iSeg), (a_GCPtrMem) + (a_offDisp))) 994 994 … … 1002 1002 ((a_i16Dst) = (int16_t)iemMemFlatFetchDataU16Jmp(pVCpu, (a_GCPtrMem) + (a_offDisp))) 1003 1003 1004 #define IEM_MC_FETCH_MEM_ U32(a_u32Dst, a_iSeg, a_GCPtrMem) \1004 #define IEM_MC_FETCH_MEM_SEG_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \ 1005 1005 ((a_u32Dst) = iemMemFetchDataU32Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1006 #define IEM_MC_FETCH_MEM_ U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) \1006 #define IEM_MC_FETCH_MEM_SEG_U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 1007 1007 ((a_u32Dst) = iemMemFetchDataU32Jmp(pVCpu, (a_iSeg), (a_GCPtrMem) + (a_offDisp))) 1008 #define IEM_MC_FETCH_MEM_ I32(a_i32Dst, a_iSeg, a_GCPtrMem) \1008 #define IEM_MC_FETCH_MEM_SEG_I32(a_i32Dst, a_iSeg, a_GCPtrMem) \ 1009 1009 ((a_i32Dst) = (int32_t)iemMemFetchDataU32Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1010 #define IEM_MC_FETCH_MEM_ I32_DISP(a_i32Dst, a_iSeg, a_GCPtrMem, a_offDisp) \1010 #define IEM_MC_FETCH_MEM_SEG_I32_DISP(a_i32Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 1011 1011 ((a_i32Dst) = (int32_t)iemMemFetchDataU32Jmp(pVCpu, (a_iSeg), (a_GCPtrMem) + (a_offDisp))) 1012 1012 … … 1020 1020 ((a_i32Dst) = (int32_t)iemMemFlatFetchDataU32Jmp(pVCpu, (a_GCPtrMem) + (a_offDisp))) 1021 1021 1022 #define IEM_MC_FETCH_MEM_ U64(a_u64Dst, a_iSeg, a_GCPtrMem) \1022 #define IEM_MC_FETCH_MEM_SEG_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 1023 1023 ((a_u64Dst) = iemMemFetchDataU64Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1024 #define IEM_MC_FETCH_MEM_ U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) \1024 #define IEM_MC_FETCH_MEM_SEG_U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 1025 1025 ((a_u64Dst) = iemMemFetchDataU64Jmp(pVCpu, (a_iSeg), (a_GCPtrMem) + (a_offDisp))) 1026 #define IEM_MC_FETCH_MEM_ U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem) \1026 #define IEM_MC_FETCH_MEM_SEG_U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem) \ 1027 1027 ((a_u64Dst) = iemMemFetchDataU64AlignedU128Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1028 #define IEM_MC_FETCH_MEM_ I64(a_i64Dst, a_iSeg, a_GCPtrMem) \1028 #define IEM_MC_FETCH_MEM_SEG_I64(a_i64Dst, a_iSeg, a_GCPtrMem) \ 1029 1029 ((a_i64Dst) = (int64_t)iemMemFetchDataU64Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1030 1030 … … 1038 1038 ((a_i64Dst) = (int64_t)iemMemFlatFetchDataU64Jmp(pVCpu, (a_GCPtrMem))) 1039 1039 1040 #define IEM_MC_FETCH_MEM_ R32(a_r32Dst, a_iSeg, a_GCPtrMem) \1040 #define IEM_MC_FETCH_MEM_SEG_R32(a_r32Dst, a_iSeg, a_GCPtrMem) \ 1041 1041 ((a_r32Dst).u = iemMemFetchDataU32Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1042 #define IEM_MC_FETCH_MEM_ R64(a_r64Dst, a_iSeg, a_GCPtrMem) \1042 #define IEM_MC_FETCH_MEM_SEG_R64(a_r64Dst, a_iSeg, a_GCPtrMem) \ 1043 1043 ((a_r64Dst).u = iemMemFetchDataU64Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1044 #define IEM_MC_FETCH_MEM_ R80(a_r80Dst, a_iSeg, a_GCPtrMem) \1044 #define IEM_MC_FETCH_MEM_SEG_R80(a_r80Dst, a_iSeg, a_GCPtrMem) \ 1045 1045 iemMemFetchDataR80Jmp(pVCpu, &(a_r80Dst), (a_iSeg), (a_GCPtrMem)) 1046 #define IEM_MC_FETCH_MEM_ D80(a_d80Dst, a_iSeg, a_GCPtrMem) \1046 #define IEM_MC_FETCH_MEM_SEG_D80(a_d80Dst, a_iSeg, a_GCPtrMem) \ 1047 1047 iemMemFetchDataD80Jmp(pVCpu, &(a_d80Dst), (a_iSeg), (a_GCPtrMem)) 1048 1048 … … 1056 1056 iemMemFlatFetchDataD80Jmp(pVCpu, &(a_d80Dst), (a_GCPtrMem)) 1057 1057 1058 #define IEM_MC_FETCH_MEM_ U128(a_u128Dst, a_iSeg, a_GCPtrMem) \1058 #define IEM_MC_FETCH_MEM_SEG_U128(a_u128Dst, a_iSeg, a_GCPtrMem) \ 1059 1059 iemMemFetchDataU128Jmp(pVCpu, &(a_u128Dst), (a_iSeg), (a_GCPtrMem)) 1060 #define IEM_MC_FETCH_MEM_ U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) \1060 #define IEM_MC_FETCH_MEM_SEG_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) \ 1061 1061 iemMemFetchDataU128NoAcJmp(pVCpu, &(a_u128Dst), (a_iSeg), (a_GCPtrMem)) 1062 #define IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) \1062 #define IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) \ 1063 1063 iemMemFetchDataU128AlignedSseJmp(pVCpu, &(a_u128Dst), (a_iSeg), (a_GCPtrMem)) 1064 1064 1065 #define IEM_MC_FETCH_MEM_ XMM(a_XmmDst, a_iSeg, a_GCPtrMem) \1065 #define IEM_MC_FETCH_MEM_SEG_XMM(a_XmmDst, a_iSeg, a_GCPtrMem) \ 1066 1066 iemMemFetchDataU128Jmp(pVCpu, &(a_XmmDst).uXmm, (a_iSeg), (a_GCPtrMem)) 1067 #define IEM_MC_FETCH_MEM_ XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) \1067 #define IEM_MC_FETCH_MEM_SEG_XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) \ 1068 1068 iemMemFetchDataU128NoAcJmp(pVCpu, &(a_XmmDst).uXmm, (a_iSeg), (a_GCPtrMem)) 1069 #define IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem) \1069 #define IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem) \ 1070 1070 iemMemFetchDataU128AlignedSseJmp(pVCpu, &(a_XmmDst).uXmm, (a_iSeg), (a_GCPtrMem)) 1071 1071 … … 1084 1084 iemMemFlatFetchDataU128AlignedSseJmp(pVCpu, &(a_XmmDst).uXmm, (a_GCPtrMem)) 1085 1085 1086 #define IEM_MC_FETCH_MEM_ U128_AND_XREG_U128(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) do { \1086 #define IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) do { \ 1087 1087 iemMemFetchDataU128Jmp(pVCpu, &(a_Dst).uSrc2, (a_iSeg2), (a_GCPtrMem2)); \ 1088 1088 (a_Dst).uSrc1.au64[0] = pVCpu->cpum.GstCtx.XState.x87.aXMM[(a_iXReg1)].au64[0]; \ … … 1095 1095 } while (0) 1096 1096 1097 #define IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) do { \1097 #define IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) do { \ 1098 1098 iemMemFetchDataU128AlignedSseJmp(pVCpu, &(a_Dst).uSrc2.uXmm, (a_iSeg2), (a_GCPtrMem2)); \ 1099 1099 (a_Dst).uSrc1.uXmm.au64[0] = pVCpu->cpum.GstCtx.XState.x87.aXMM[(a_iXReg1)].au64[0]; \ … … 1101 1101 } while (0) 1102 1102 1103 #define IEM_MC_FETCH_MEM_ XMM_NO_AC_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) do { \1103 #define IEM_MC_FETCH_MEM_SEG_XMM_NO_AC_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) do { \ 1104 1104 iemMemFetchDataU128NoAcJmp(pVCpu, &(a_Dst).uSrc2.uXmm, (a_iSeg2), (a_GCPtrMem2)); \ 1105 1105 (a_Dst).uSrc1.uXmm.au64[0] = pVCpu->cpum.GstCtx.XState.x87.aXMM[(a_iXReg1)].au64[0]; \ … … 1119 1119 } while (0) 1120 1120 1121 #define IEM_MC_FETCH_MEM_ XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_iSeg2, a_GCPtrMem2) do { \1121 #define IEM_MC_FETCH_MEM_SEG_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_iSeg2, a_GCPtrMem2) do { \ 1122 1122 (a_Dst).uSrc2.uXmm.au64[0] = 0; \ 1123 1123 (a_Dst).uSrc2.uXmm.au64[1] = 0; \ … … 1134 1134 } while (0) 1135 1135 1136 #define IEM_MC_FETCH_MEM_ XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_iSeg2, a_GCPtrMem2) do { \1136 #define IEM_MC_FETCH_MEM_SEG_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_iSeg2, a_GCPtrMem2) do { \ 1137 1137 (a_Dst).uSrc2.uXmm.au64[!(a_iQWord2)] = 0; \ 1138 1138 (a_Dst).uSrc2.uXmm.au64[(a_iQWord2)] = iemMemFetchDataU64Jmp(pVCpu, (a_iSeg2), (a_GCPtrMem2)); \ … … 1148 1148 1149 1149 1150 #define IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) do { \1150 #define IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) do { \ 1151 1151 iemMemFetchDataU128Jmp(pVCpu, &(a_Dst).uSrc2, (a_iSeg2), (a_GCPtrMem2)); \ 1152 1152 (a_Dst).uSrc1.au64[0] = pVCpu->cpum.GstCtx.XState.x87.aXMM[(a_iXReg1)].au64[0]; \ … … 1155 1155 (a_Dst).u64Rdx = pVCpu->cpum.GstCtx.rdx; \ 1156 1156 } while (0) 1157 #define IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) do { \1157 #define IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) do { \ 1158 1158 iemMemFetchDataU128Jmp(pVCpu, &(a_Dst).uSrc2, (a_iSeg2), (a_GCPtrMem2)); \ 1159 1159 (a_Dst).uSrc1.au64[0] = pVCpu->cpum.GstCtx.XState.x87.aXMM[(a_iXReg1)].au64[0]; \ … … 1179 1179 1180 1180 1181 #define IEM_MC_FETCH_MEM_ U256(a_u256Dst, a_iSeg, a_GCPtrMem) \1181 #define IEM_MC_FETCH_MEM_SEG_U256(a_u256Dst, a_iSeg, a_GCPtrMem) \ 1182 1182 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem)) 1183 #define IEM_MC_FETCH_MEM_ U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) \1183 #define IEM_MC_FETCH_MEM_SEG_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) \ 1184 1184 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem)) 1185 #define IEM_MC_FETCH_MEM_ U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) \1185 #define IEM_MC_FETCH_MEM_SEG_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) \ 1186 1186 iemMemFetchDataU256AlignedAvxJmp(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem)) 1187 1187 1188 #define IEM_MC_FETCH_MEM_ YMM(a_YmmDst, a_iSeg, a_GCPtrMem) \1188 #define IEM_MC_FETCH_MEM_SEG_YMM(a_YmmDst, a_iSeg, a_GCPtrMem) \ 1189 1189 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem)) 1190 #define IEM_MC_FETCH_MEM_ YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem) \1190 #define IEM_MC_FETCH_MEM_SEG_YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem) \ 1191 1191 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem)) 1192 #define IEM_MC_FETCH_MEM_ YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem) \1192 #define IEM_MC_FETCH_MEM_SEG_YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem) \ 1193 1193 iemMemFetchDataU256AlignedAvxJmp(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem)) 1194 1194 1195 #define IEM_MC_FETCH_MEM_ YMM_NO_AC_AND_YREG_YMM(a_uYmmDst, a_iYRegSrc1, a_iSeg2, a_GCPtrMem2) do { \1195 #define IEM_MC_FETCH_MEM_SEG_YMM_NO_AC_AND_YREG_YMM(a_uYmmDst, a_iYRegSrc1, a_iSeg2, a_GCPtrMem2) do { \ 1196 1196 uintptr_t const a_iYRegSrc1Tmp = (a_iYRegSrc1); \ 1197 1197 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_uYmmDst).uSrc2.ymm, (a_iSeg2), (a_GCPtrMem2)); \ … … 1227 1227 1228 1228 1229 #define IEM_MC_FETCH_MEM_ U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) \1229 #define IEM_MC_FETCH_MEM_SEG_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) \ 1230 1230 ((a_u16Dst) = iemMemFetchDataU8Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1231 #define IEM_MC_FETCH_MEM_ U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \1231 #define IEM_MC_FETCH_MEM_SEG_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \ 1232 1232 ((a_u32Dst) = iemMemFetchDataU8Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1233 #define IEM_MC_FETCH_MEM_ U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \1233 #define IEM_MC_FETCH_MEM_SEG_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 1234 1234 ((a_u64Dst) = iemMemFetchDataU8Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1235 #define IEM_MC_FETCH_MEM_ U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \1235 #define IEM_MC_FETCH_MEM_SEG_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \ 1236 1236 ((a_u32Dst) = iemMemFetchDataU16Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1237 #define IEM_MC_FETCH_MEM_ U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \1237 #define IEM_MC_FETCH_MEM_SEG_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 1238 1238 ((a_u64Dst) = iemMemFetchDataU16Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1239 #define IEM_MC_FETCH_MEM_ U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \1239 #define IEM_MC_FETCH_MEM_SEG_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 1240 1240 ((a_u64Dst) = iemMemFetchDataU32Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1241 1241 … … 1253 1253 ((a_u64Dst) = iemMemFlatFetchDataU32Jmp(pVCpu, (a_GCPtrMem))) 1254 1254 1255 #define IEM_MC_FETCH_MEM_ U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) \1255 #define IEM_MC_FETCH_MEM_SEG_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) \ 1256 1256 ((a_u16Dst) = (int8_t)iemMemFetchDataU8Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1257 #define IEM_MC_FETCH_MEM_ U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \1257 #define IEM_MC_FETCH_MEM_SEG_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \ 1258 1258 ((a_u32Dst) = (int8_t)iemMemFetchDataU8Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1259 #define IEM_MC_FETCH_MEM_ U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \1259 #define IEM_MC_FETCH_MEM_SEG_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 1260 1260 ((a_u64Dst) = (int8_t)iemMemFetchDataU8Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1261 #define IEM_MC_FETCH_MEM_ U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \1261 #define IEM_MC_FETCH_MEM_SEG_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) \ 1262 1262 ((a_u32Dst) = (int16_t)iemMemFetchDataU16Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1263 #define IEM_MC_FETCH_MEM_ U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \1263 #define IEM_MC_FETCH_MEM_SEG_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 1264 1264 ((a_u64Dst) = (int16_t)iemMemFetchDataU16Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1265 #define IEM_MC_FETCH_MEM_ U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \1265 #define IEM_MC_FETCH_MEM_SEG_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) \ 1266 1266 ((a_u64Dst) = (int32_t)iemMemFetchDataU32Jmp(pVCpu, (a_iSeg), (a_GCPtrMem))) 1267 1267 -
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r108287 r108288 893 893 #define IEM_MC_CLEAR_ZREG_256_UP(a_iZReg) do { CHK_YREG_IDX(a_iZReg); (void)fAvxWrite; (void)fMcBegin; } while (0) 894 894 895 #define IEM_MC_FETCH_MEM_ U8(a_u8Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u8Dst); AssertCompile(sizeof(a_u8Dst) == (sizeof(uint8_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)896 #define IEM_MC_FETCH_MEM16_ U8(a_u8Dst, a_iSeg, a_GCPtrMem16) do { CHK_TYPE(uint16_t, a_GCPtrMem16); CHK_VAR(a_GCPtrMem16); CHK_VAR(a_u8Dst); AssertCompile(sizeof(a_u8Dst) == (sizeof(uint8_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)897 #define IEM_MC_FETCH_MEM32_ U8(a_u8Dst, a_iSeg, a_GCPtrMem32) do { CHK_TYPE(uint32_t, a_GCPtrMem32); CHK_VAR(a_GCPtrMem32); CHK_VAR(a_u8Dst); AssertCompile(sizeof(a_u8Dst) == (sizeof(uint8_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)898 #define IEM_MC_FETCH_MEM_ U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u16Dst); AssertCompile(sizeof(a_u16Dst) == (sizeof(uint16_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)899 #define IEM_MC_FETCH_MEM_ I16(a_i16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i16Dst); CHK_TYPE(int16_t, a_i16Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)900 #define IEM_MC_FETCH_MEM_ U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)901 #define IEM_MC_FETCH_MEM_ I32(a_i32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i32Dst); CHK_TYPE(int32_t, a_i32Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)902 #define IEM_MC_FETCH_MEM_ U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)903 #define IEM_MC_FETCH_MEM_ U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem) do{ CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)904 #define IEM_MC_FETCH_MEM_ I64(a_i64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i64Dst); CHK_TYPE(int64_t, a_i64Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)905 906 #define IEM_MC_FETCH_MEM_ U8_DISP( a_u8Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u8Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint8_t, a_u8Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)907 #define IEM_MC_FETCH_MEM_ U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u16Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint16_t, a_u16Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)908 #define IEM_MC_FETCH_MEM_ U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint32_t, a_u32Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)909 #define IEM_MC_FETCH_MEM_ U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint64_t, a_u64Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)910 911 #define IEM_MC_FETCH_MEM_ I16_DISP(a_i16Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i16Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(int16_t, a_i16Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)912 #define IEM_MC_FETCH_MEM_ I32_DISP(a_i32Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i32Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(int32_t, a_i32Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)913 914 #define IEM_MC_FETCH_MEM_ U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u16Dst); AssertCompile(sizeof(a_u16Dst) == (sizeof(uint16_t))); (void)fMcBegin; } while (0)915 #define IEM_MC_FETCH_MEM_ U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0)916 #define IEM_MC_FETCH_MEM_ U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0)917 #define IEM_MC_FETCH_MEM_ U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0)918 #define IEM_MC_FETCH_MEM_ U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0)919 #define IEM_MC_FETCH_MEM_ U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0)920 #define IEM_MC_FETCH_MEM_ U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u16Dst); AssertCompile(sizeof(a_u16Dst) == (sizeof(uint16_t))); (void)fMcBegin; } while (0)921 #define IEM_MC_FETCH_MEM_ U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0)922 #define IEM_MC_FETCH_MEM_ U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0)923 #define IEM_MC_FETCH_MEM_ U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0)924 #define IEM_MC_FETCH_MEM_ U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0)925 #define IEM_MC_FETCH_MEM_ U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0)926 #define IEM_MC_FETCH_MEM_ R32(a_r32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_r32Dst); CHK_TYPE(RTFLOAT32U, a_r32Dst); (void)fMcBegin; } while (0)927 #define IEM_MC_FETCH_MEM_ R64(a_r64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_r64Dst); CHK_TYPE(RTFLOAT64U, a_r64Dst); (void)fMcBegin; } while (0)928 #define IEM_MC_FETCH_MEM_ R80(a_r80Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_r80Dst); CHK_TYPE(RTFLOAT80U, a_r80Dst); (void)fMcBegin; } while (0)929 #define IEM_MC_FETCH_MEM_ D80(a_d80Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_d80Dst); CHK_TYPE(RTPBCD80U, a_d80Dst); (void)fMcBegin; } while (0)930 #define IEM_MC_FETCH_MEM_ U128(a_u128Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Dst); CHK_TYPE(RTUINT128U, a_u128Dst); (void)fMcBegin; } while (0)931 #define IEM_MC_FETCH_MEM_ U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Dst); CHK_TYPE(RTUINT128U, a_u128Dst); (void)fMcBegin; } while (0)932 #define IEM_MC_FETCH_MEM_ U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Dst); CHK_TYPE(RTUINT128U, a_u128Dst); (void)fMcBegin; } while (0)933 #define IEM_MC_FETCH_MEM_ XMM(a_XmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_XmmDst); CHK_TYPE(X86XMMREG, a_XmmDst); (void)fMcBegin; } while (0)934 #define IEM_MC_FETCH_MEM_ XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_XmmDst); CHK_TYPE(X86XMMREG, a_XmmDst); (void)fMcBegin; } while (0)935 #define IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_XmmDst); CHK_TYPE(X86XMMREG, a_XmmDst); (void)fMcBegin; } while (0)936 #define IEM_MC_FETCH_MEM_ U256(a_u256Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Dst); CHK_TYPE(RTUINT256U, a_u256Dst); (void)fMcBegin; } while (0)937 #define IEM_MC_FETCH_MEM_ U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Dst); CHK_TYPE(RTUINT256U, a_u256Dst); (void)fMcBegin; } while (0)938 #define IEM_MC_FETCH_MEM_ U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Dst); CHK_TYPE(RTUINT256U, a_u256Dst); (void)fMcBegin; } while (0)939 #define IEM_MC_FETCH_MEM_ YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_YmmDst); CHK_TYPE(X86YMMREG, a_YmmDst); (void)fMcBegin; } while (0)940 941 # define IEM_MC_FETCH_MEM_ U128_AND_XREG_U128(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \895 #define IEM_MC_FETCH_MEM_SEG_U8(a_u8Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u8Dst); AssertCompile(sizeof(a_u8Dst) == (sizeof(uint8_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 896 #define IEM_MC_FETCH_MEM16_SEG_U8(a_u8Dst, a_iSeg, a_GCPtrMem16) do { CHK_TYPE(uint16_t, a_GCPtrMem16); CHK_VAR(a_GCPtrMem16); CHK_VAR(a_u8Dst); AssertCompile(sizeof(a_u8Dst) == (sizeof(uint8_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 897 #define IEM_MC_FETCH_MEM32_SEG_U8(a_u8Dst, a_iSeg, a_GCPtrMem32) do { CHK_TYPE(uint32_t, a_GCPtrMem32); CHK_VAR(a_GCPtrMem32); CHK_VAR(a_u8Dst); AssertCompile(sizeof(a_u8Dst) == (sizeof(uint8_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 898 #define IEM_MC_FETCH_MEM_SEG_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u16Dst); AssertCompile(sizeof(a_u16Dst) == (sizeof(uint16_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 899 #define IEM_MC_FETCH_MEM_SEG_I16(a_i16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i16Dst); CHK_TYPE(int16_t, a_i16Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 900 #define IEM_MC_FETCH_MEM_SEG_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 901 #define IEM_MC_FETCH_MEM_SEG_I32(a_i32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i32Dst); CHK_TYPE(int32_t, a_i32Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 902 #define IEM_MC_FETCH_MEM_SEG_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 903 #define IEM_MC_FETCH_MEM_SEG_U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem) do{ CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 904 #define IEM_MC_FETCH_MEM_SEG_I64(a_i64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i64Dst); CHK_TYPE(int64_t, a_i64Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 905 906 #define IEM_MC_FETCH_MEM_SEG_U8_DISP( a_u8Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u8Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint8_t, a_u8Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 907 #define IEM_MC_FETCH_MEM_SEG_U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u16Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint16_t, a_u16Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 908 #define IEM_MC_FETCH_MEM_SEG_U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint32_t, a_u32Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 909 #define IEM_MC_FETCH_MEM_SEG_U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint64_t, a_u64Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 910 911 #define IEM_MC_FETCH_MEM_SEG_I16_DISP(a_i16Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i16Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(int16_t, a_i16Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 912 #define IEM_MC_FETCH_MEM_SEG_I32_DISP(a_i32Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i32Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(int32_t, a_i32Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 913 914 #define IEM_MC_FETCH_MEM_SEG_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u16Dst); AssertCompile(sizeof(a_u16Dst) == (sizeof(uint16_t))); (void)fMcBegin; } while (0) 915 #define IEM_MC_FETCH_MEM_SEG_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0) 916 #define IEM_MC_FETCH_MEM_SEG_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 917 #define IEM_MC_FETCH_MEM_SEG_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0) 918 #define IEM_MC_FETCH_MEM_SEG_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 919 #define IEM_MC_FETCH_MEM_SEG_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 920 #define IEM_MC_FETCH_MEM_SEG_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u16Dst); AssertCompile(sizeof(a_u16Dst) == (sizeof(uint16_t))); (void)fMcBegin; } while (0) 921 #define IEM_MC_FETCH_MEM_SEG_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0) 922 #define IEM_MC_FETCH_MEM_SEG_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 923 #define IEM_MC_FETCH_MEM_SEG_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0) 924 #define IEM_MC_FETCH_MEM_SEG_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 925 #define IEM_MC_FETCH_MEM_SEG_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 926 #define IEM_MC_FETCH_MEM_SEG_R32(a_r32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_r32Dst); CHK_TYPE(RTFLOAT32U, a_r32Dst); (void)fMcBegin; } while (0) 927 #define IEM_MC_FETCH_MEM_SEG_R64(a_r64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_r64Dst); CHK_TYPE(RTFLOAT64U, a_r64Dst); (void)fMcBegin; } while (0) 928 #define IEM_MC_FETCH_MEM_SEG_R80(a_r80Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_r80Dst); CHK_TYPE(RTFLOAT80U, a_r80Dst); (void)fMcBegin; } while (0) 929 #define IEM_MC_FETCH_MEM_SEG_D80(a_d80Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_d80Dst); CHK_TYPE(RTPBCD80U, a_d80Dst); (void)fMcBegin; } while (0) 930 #define IEM_MC_FETCH_MEM_SEG_U128(a_u128Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Dst); CHK_TYPE(RTUINT128U, a_u128Dst); (void)fMcBegin; } while (0) 931 #define IEM_MC_FETCH_MEM_SEG_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Dst); CHK_TYPE(RTUINT128U, a_u128Dst); (void)fMcBegin; } while (0) 932 #define IEM_MC_FETCH_MEM_SEG_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Dst); CHK_TYPE(RTUINT128U, a_u128Dst); (void)fMcBegin; } while (0) 933 #define IEM_MC_FETCH_MEM_SEG_XMM(a_XmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_XmmDst); CHK_TYPE(X86XMMREG, a_XmmDst); (void)fMcBegin; } while (0) 934 #define IEM_MC_FETCH_MEM_SEG_XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_XmmDst); CHK_TYPE(X86XMMREG, a_XmmDst); (void)fMcBegin; } while (0) 935 #define IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_XmmDst); CHK_TYPE(X86XMMREG, a_XmmDst); (void)fMcBegin; } while (0) 936 #define IEM_MC_FETCH_MEM_SEG_U256(a_u256Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Dst); CHK_TYPE(RTUINT256U, a_u256Dst); (void)fMcBegin; } while (0) 937 #define IEM_MC_FETCH_MEM_SEG_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Dst); CHK_TYPE(RTUINT256U, a_u256Dst); (void)fMcBegin; } while (0) 938 #define IEM_MC_FETCH_MEM_SEG_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Dst); CHK_TYPE(RTUINT256U, a_u256Dst); (void)fMcBegin; } while (0) 939 #define IEM_MC_FETCH_MEM_SEG_YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_YmmDst); CHK_TYPE(X86YMMREG, a_YmmDst); (void)fMcBegin; } while (0) 940 941 # define IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 942 942 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMPCMPISTRXSRC, a_Dst); (void)fMcBegin; } while (0) 943 # define IEM_MC_FETCH_MEM_ XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \943 # define IEM_MC_FETCH_MEM_SEG_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 944 944 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMMEDIAF2XMMSRC, a_Dst); (void)fMcBegin; } while (0) 945 # define IEM_MC_FETCH_MEM_ XMM_NO_AC_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \945 # define IEM_MC_FETCH_MEM_SEG_XMM_NO_AC_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 946 946 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMMEDIAF2XMMSRC, a_Dst); (void)fMcBegin; } while (0) 947 # define IEM_MC_FETCH_MEM_ XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_iSeg2, a_GCPtrMem2) \947 # define IEM_MC_FETCH_MEM_SEG_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_iSeg2, a_GCPtrMem2) \ 948 948 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMMEDIAF2XMMSRC, a_Dst); AssertCompile((a_iDWord2) < RT_ELEMENTS((a_Dst).uSrc2.uXmm.au32)); (void)fMcBegin; } while (0) 949 # define IEM_MC_FETCH_MEM_ XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_iSeg2, a_GCPtrMem2) \949 # define IEM_MC_FETCH_MEM_SEG_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_iSeg2, a_GCPtrMem2) \ 950 950 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMMEDIAF2XMMSRC, a_Dst); AssertCompile((a_iQWord2) < RT_ELEMENTS((a_Dst).uSrc2.uXmm.au64)); (void)fMcBegin; } while (0) 951 # define IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \951 # define IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 952 952 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMPCMPESTRXSRC, a_Dst); (void)fMcBegin; } while (0) 953 # define IEM_MC_FETCH_MEM_ U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \953 # define IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 954 954 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMPCMPESTRXSRC, a_Dst); (void)fMcBegin; } while (0) 955 # define IEM_MC_FETCH_MEM_ YMM_NO_AC_AND_YREG_YMM(a_uYmmDst, a_iYRegSrc1, a_iSeg2, a_GCPtrMem2) \955 # define IEM_MC_FETCH_MEM_SEG_YMM_NO_AC_AND_YREG_YMM(a_uYmmDst, a_iYRegSrc1, a_iSeg2, a_GCPtrMem2) \ 956 956 do { CHK_XREG_IDX(a_iYRegSrc1); (void)fAvxRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_uYmmDst); CHK_TYPE(IEMMEDIAF2YMMSRC, a_uYmmDst); (void)fMcBegin; } while (0) 957 957
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