Changeset 108296 in vbox
- Timestamp:
- Feb 19, 2025 2:44:11 PM (3 weeks ago)
- svn:sync-xref-src-repo-rev:
- 167640
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 12 edited
-
VMMAll/IEMAllInstPython.py (modified) (1 diff)
-
VMMAll/IEMAllThrdPython.py (modified) (4 diffs)
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VMMAll/target-x86/IEMAllInstOneByte-x86.cpp.h (modified) (17 diffs)
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VMMAll/target-x86/IEMAllInstThree0f38-x86.cpp.h (modified) (3 diffs)
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VMMAll/target-x86/IEMAllInstThree0f3a-x86.cpp.h (modified) (5 diffs)
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VMMAll/target-x86/IEMAllInstTwoByte0f-x86.cpp.h (modified) (42 diffs)
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VMMAll/target-x86/IEMAllInstVexMap1-x86.cpp.h (modified) (28 diffs)
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VMMAll/target-x86/IEMAllInstVexMap3-x86.cpp.h (modified) (7 diffs)
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VMMAll/target-x86/IEMAllN8veLiveness-x86.h (modified) (4 diffs)
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VMMAll/target-x86/IEMAllN8veRecompFuncs-x86.h (modified) (6 diffs)
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include/IEMMc.h (modified) (4 diffs)
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testcase/tstIEMCheckMc.cpp (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py
r108294 r108296 3425 3425 'IEM_MC_STORE_MEM_BY_REF_R64_NEG_QNAN': (McBlock.parseMcGeneric, True, True, False, ), 3426 3426 'IEM_MC_STORE_MEM_BY_REF_R80_NEG_QNAN': (McBlock.parseMcGeneric, True, True, False, ), 3427 'IEM_MC_STORE_MEM_ U128':(McBlock.parseMcGeneric, True, True, False, ),3428 'IEM_MC_STORE_MEM_ U128_NO_AC':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3429 'IEM_MC_STORE_MEM_ U128_ALIGN_SSE':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3430 'IEM_MC_STORE_MEM_ U16':(McBlock.parseMcGeneric, True, True, True, ),3431 'IEM_MC_STORE_MEM_ U16_CONST':(McBlock.parseMcGeneric, True, True, True, ),3432 'IEM_MC_STORE_MEM_ U256':(McBlock.parseMcGeneric, True, True, False, ),3433 'IEM_MC_STORE_MEM_ U256_NO_AC':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3434 'IEM_MC_STORE_MEM_ U256_ALIGN_AVX':(McBlock.parseMcGeneric, True, True, g_fNativeSimd),3435 'IEM_MC_STORE_MEM_ U32':(McBlock.parseMcGeneric, True, True, True, ),3436 'IEM_MC_STORE_MEM_ U32_CONST':(McBlock.parseMcGeneric, True, True, True, ),3437 'IEM_MC_STORE_MEM_ U64':(McBlock.parseMcGeneric, True, True, True, ),3438 'IEM_MC_STORE_MEM_ U64_CONST':(McBlock.parseMcGeneric, True, True, True, ),3439 'IEM_MC_STORE_MEM_ U8':(McBlock.parseMcGeneric, True, True, True, ),3440 'IEM_MC_STORE_MEM_ U8_CONST':(McBlock.parseMcGeneric, True, True, True, ),3427 'IEM_MC_STORE_MEM_SEG_U128': (McBlock.parseMcGeneric, True, True, False, ), 3428 'IEM_MC_STORE_MEM_SEG_U128_NO_AC': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3429 'IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3430 'IEM_MC_STORE_MEM_SEG_U16': (McBlock.parseMcGeneric, True, True, True, ), 3431 'IEM_MC_STORE_MEM_SEG_U16_CONST': (McBlock.parseMcGeneric, True, True, True, ), 3432 'IEM_MC_STORE_MEM_SEG_U256': (McBlock.parseMcGeneric, True, True, False, ), 3433 'IEM_MC_STORE_MEM_SEG_U256_NO_AC': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3434 'IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3435 'IEM_MC_STORE_MEM_SEG_U32': (McBlock.parseMcGeneric, True, True, True, ), 3436 'IEM_MC_STORE_MEM_SEG_U32_CONST': (McBlock.parseMcGeneric, True, True, True, ), 3437 'IEM_MC_STORE_MEM_SEG_U64': (McBlock.parseMcGeneric, True, True, True, ), 3438 'IEM_MC_STORE_MEM_SEG_U64_CONST': (McBlock.parseMcGeneric, True, True, True, ), 3439 'IEM_MC_STORE_MEM_SEG_U8': (McBlock.parseMcGeneric, True, True, True, ), 3440 'IEM_MC_STORE_MEM_SEG_U8_CONST': (McBlock.parseMcGeneric, True, True, True, ), 3441 3441 'IEM_MC_STORE_MREG_U8': (McBlock.parseMcGeneric, True, True, False, ), 3442 3442 'IEM_MC_STORE_MREG_U16': (McBlock.parseMcGeneric, True, True, False, ), -
trunk/src/VBox/VMM/VMMAll/IEMAllThrdPython.py
r108294 r108296 957 957 ( 2, 'IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64' ), 958 958 'IEM_MC_FETCH_MEM_SEG_YMM_NO_AC_AND_YREG_YMM': ( 2, 'IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX_AND_YREG_YMM' ), 959 'IEM_MC_STORE_MEM_ U8':( 0, 'IEM_MC_STORE_MEM_FLAT_U8' ),960 'IEM_MC_STORE_MEM_ U16':( 0, 'IEM_MC_STORE_MEM_FLAT_U16' ),961 'IEM_MC_STORE_MEM_ U32':( 0, 'IEM_MC_STORE_MEM_FLAT_U32' ),962 'IEM_MC_STORE_MEM_ U64':( 0, 'IEM_MC_STORE_MEM_FLAT_U64' ),963 'IEM_MC_STORE_MEM_ U8_CONST':( 0, 'IEM_MC_STORE_MEM_FLAT_U8_CONST' ),964 'IEM_MC_STORE_MEM_ U16_CONST':( 0, 'IEM_MC_STORE_MEM_FLAT_U16_CONST' ),965 'IEM_MC_STORE_MEM_ U32_CONST':( 0, 'IEM_MC_STORE_MEM_FLAT_U32_CONST' ),966 'IEM_MC_STORE_MEM_ U64_CONST':( 0, 'IEM_MC_STORE_MEM_FLAT_U64_CONST' ),967 'IEM_MC_STORE_MEM_ U128':( 0, 'IEM_MC_STORE_MEM_FLAT_U128' ),968 'IEM_MC_STORE_MEM_ U128_NO_AC':( 0, 'IEM_MC_STORE_MEM_FLAT_U128_NO_AC' ),969 'IEM_MC_STORE_MEM_ U128_ALIGN_SSE':( 0, 'IEM_MC_STORE_MEM_FLAT_U128_ALIGN_SSE' ),970 'IEM_MC_STORE_MEM_ U256':( 0, 'IEM_MC_STORE_MEM_FLAT_U256' ),971 'IEM_MC_STORE_MEM_ U256_NO_AC':( 0, 'IEM_MC_STORE_MEM_FLAT_U256_NO_AC' ),972 'IEM_MC_STORE_MEM_ U256_ALIGN_AVX':( 0, 'IEM_MC_STORE_MEM_FLAT_U256_ALIGN_AVX' ),959 'IEM_MC_STORE_MEM_SEG_U8': ( 0, 'IEM_MC_STORE_MEM_FLAT_U8' ), 960 'IEM_MC_STORE_MEM_SEG_U16': ( 0, 'IEM_MC_STORE_MEM_FLAT_U16' ), 961 'IEM_MC_STORE_MEM_SEG_U32': ( 0, 'IEM_MC_STORE_MEM_FLAT_U32' ), 962 'IEM_MC_STORE_MEM_SEG_U64': ( 0, 'IEM_MC_STORE_MEM_FLAT_U64' ), 963 'IEM_MC_STORE_MEM_SEG_U8_CONST': ( 0, 'IEM_MC_STORE_MEM_FLAT_U8_CONST' ), 964 'IEM_MC_STORE_MEM_SEG_U16_CONST': ( 0, 'IEM_MC_STORE_MEM_FLAT_U16_CONST' ), 965 'IEM_MC_STORE_MEM_SEG_U32_CONST': ( 0, 'IEM_MC_STORE_MEM_FLAT_U32_CONST' ), 966 'IEM_MC_STORE_MEM_SEG_U64_CONST': ( 0, 'IEM_MC_STORE_MEM_FLAT_U64_CONST' ), 967 'IEM_MC_STORE_MEM_SEG_U128': ( 0, 'IEM_MC_STORE_MEM_FLAT_U128' ), 968 'IEM_MC_STORE_MEM_SEG_U128_NO_AC': ( 0, 'IEM_MC_STORE_MEM_FLAT_U128_NO_AC' ), 969 'IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE': ( 0, 'IEM_MC_STORE_MEM_FLAT_U128_ALIGN_SSE' ), 970 'IEM_MC_STORE_MEM_SEG_U256': ( 0, 'IEM_MC_STORE_MEM_FLAT_U256' ), 971 'IEM_MC_STORE_MEM_SEG_U256_NO_AC': ( 0, 'IEM_MC_STORE_MEM_FLAT_U256_NO_AC' ), 972 'IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX': ( 0, 'IEM_MC_STORE_MEM_FLAT_U256_ALIGN_AVX' ), 973 973 'IEM_MC_MEM_SEG_MAP_D80_WO': ( 2, 'IEM_MC_MEM_FLAT_MAP_D80_WO' ), 974 974 'IEM_MC_MEM_SEG_MAP_I16_WO': ( 2, 'IEM_MC_MEM_FLAT_MAP_I16_WO' ), … … 1184 1184 elif ( self.sVariation in self.kdVariationsWithFlatAddress 1185 1185 and ( oNewStmt.sName.startswith('IEM_MC_FETCH_MEM') 1186 or (oNewStmt.sName.startswith('IEM_MC_STORE_MEM_') and oNewStmt.sName.find('_BY_REF') < 0)1186 or oNewStmt.sName.startswith('IEM_MC_STORE_MEM_SEG') 1187 1187 or oNewStmt.sName.startswith('IEM_MC_MEM_SEG_MAP') )): 1188 1188 idxEffSeg = self.kdMemMcToFlatInfo[oNewStmt.sName][0]; … … 1767 1767 'IEM_MC_FETCH_MEM_SEG_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64': '__mem128', 1768 1768 1769 'IEM_MC_STORE_MEM_BY_REF_I16_CONST': 1770 'IEM_MC_STORE_MEM_BY_REF_I32_CONST': 1771 'IEM_MC_STORE_MEM_BY_REF_I64_CONST': 1772 'IEM_MC_STORE_MEM_BY_REF_I8_CONST': 1773 'IEM_MC_STORE_MEM_BY_REF_D80_INDEF': 1774 'IEM_MC_STORE_MEM_BY_REF_R32_NEG_QNAN': 1775 'IEM_MC_STORE_MEM_BY_REF_R64_NEG_QNAN': 1776 'IEM_MC_STORE_MEM_BY_REF_R80_NEG_QNAN': 1777 'IEM_MC_STORE_MEM_ U128':'__mem128',1778 'IEM_MC_STORE_MEM_ U128_ALIGN_SSE':'__mem128',1779 'IEM_MC_STORE_MEM_ U128_NO_AC':'__mem128',1780 'IEM_MC_STORE_MEM_ U16':'__mem16',1781 'IEM_MC_STORE_MEM_ U16_CONST':'__mem16c',1782 'IEM_MC_STORE_MEM_ U256':'__mem256',1783 'IEM_MC_STORE_MEM_ U256_ALIGN_AVX':'__mem256',1784 'IEM_MC_STORE_MEM_ U256_NO_AC':'__mem256',1785 'IEM_MC_STORE_MEM_ U32':'__mem32',1786 'IEM_MC_STORE_MEM_ U32_CONST':'__mem32c',1787 'IEM_MC_STORE_MEM_ U64':'__mem64',1788 'IEM_MC_STORE_MEM_ U64_CONST':'__mem64c',1789 'IEM_MC_STORE_MEM_ U8':'__mem8',1790 'IEM_MC_STORE_MEM_ U8_CONST':'__mem8c',1769 'IEM_MC_STORE_MEM_BY_REF_I16_CONST': '__mem16', 1770 'IEM_MC_STORE_MEM_BY_REF_I32_CONST': '__mem32', 1771 'IEM_MC_STORE_MEM_BY_REF_I64_CONST': '__mem64', 1772 'IEM_MC_STORE_MEM_BY_REF_I8_CONST': '__mem8', 1773 'IEM_MC_STORE_MEM_BY_REF_D80_INDEF': '__mem80', 1774 'IEM_MC_STORE_MEM_BY_REF_R32_NEG_QNAN': '__mem32', 1775 'IEM_MC_STORE_MEM_BY_REF_R64_NEG_QNAN': '__mem64', 1776 'IEM_MC_STORE_MEM_BY_REF_R80_NEG_QNAN': '__mem80', 1777 'IEM_MC_STORE_MEM_SEG_U128': '__mem128', 1778 'IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE': '__mem128', 1779 'IEM_MC_STORE_MEM_SEG_U128_NO_AC': '__mem128', 1780 'IEM_MC_STORE_MEM_SEG_U16': '__mem16', 1781 'IEM_MC_STORE_MEM_SEG_U16_CONST': '__mem16c', 1782 'IEM_MC_STORE_MEM_SEG_U256': '__mem256', 1783 'IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX': '__mem256', 1784 'IEM_MC_STORE_MEM_SEG_U256_NO_AC': '__mem256', 1785 'IEM_MC_STORE_MEM_SEG_U32': '__mem32', 1786 'IEM_MC_STORE_MEM_SEG_U32_CONST': '__mem32c', 1787 'IEM_MC_STORE_MEM_SEG_U64': '__mem64', 1788 'IEM_MC_STORE_MEM_SEG_U64_CONST': '__mem64c', 1789 'IEM_MC_STORE_MEM_SEG_U8': '__mem8', 1790 'IEM_MC_STORE_MEM_SEG_U8_CONST': '__mem8c', 1791 1791 1792 1792 'IEM_MC_MEM_SEG_MAP_D80_WO': '__mem80', … … 2260 2260 'IEM_MC_FETCH_MEM_SEG_U32' : True, 2261 2261 'IEM_MC_FETCH_MEM_SEG_U64' : True, 2262 'IEM_MC_STORE_MEM_ U8' : True, # mov_Ob_AL ++2263 'IEM_MC_STORE_MEM_ U16' : True, # mov_Ov_rAX ++2264 'IEM_MC_STORE_MEM_ U32' : True,2265 'IEM_MC_STORE_MEM_ U64' : True, }):2262 'IEM_MC_STORE_MEM_SEG_U8' : True, # mov_Ob_AL ++ 2263 'IEM_MC_STORE_MEM_SEG_U16' : True, # mov_Ov_rAX ++ 2264 'IEM_MC_STORE_MEM_SEG_U32' : True, 2265 'IEM_MC_STORE_MEM_SEG_U64' : True, }): 2266 2266 if 'IEM_MC_F_64BIT' in self.oMcBlock.dsMcFlags: 2267 2267 asVariations = ThreadedFunctionVariation.kasVariationsWithAddressOnly64; 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trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstOneByte-x86.cpp.h
r108294 r108296 6128 6128 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6129 6129 IEM_MC_FETCH_GREG_U8(u8Value, IEM_GET_MODRM_REG(pVCpu, bRm)); 6130 IEM_MC_STORE_MEM_ U8(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u8Value);6130 IEM_MC_STORE_MEM_SEG_U8(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u8Value); 6131 6131 IEM_MC_ADVANCE_PC_AND_FINISH(); 6132 6132 IEM_MC_END(); … … 6198 6198 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6199 6199 IEM_MC_FETCH_GREG_U16(u16Value, IEM_GET_MODRM_REG(pVCpu, bRm)); 6200 IEM_MC_STORE_MEM_ U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Value);6200 IEM_MC_STORE_MEM_SEG_U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Value); 6201 6201 IEM_MC_ADVANCE_PC_AND_FINISH(); 6202 6202 IEM_MC_END(); … … 6210 6210 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6211 6211 IEM_MC_FETCH_GREG_U32(u32Value, IEM_GET_MODRM_REG(pVCpu, bRm)); 6212 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u32Value);6212 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u32Value); 6213 6213 IEM_MC_ADVANCE_PC_AND_FINISH(); 6214 6214 IEM_MC_END(); … … 6222 6222 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6223 6223 IEM_MC_FETCH_GREG_U64(u64Value, IEM_GET_MODRM_REG(pVCpu, bRm)); 6224 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u64Value);6224 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u64Value); 6225 6225 IEM_MC_ADVANCE_PC_AND_FINISH(); 6226 6226 IEM_MC_END(); … … 6458 6458 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6459 6459 IEM_MC_FETCH_SREG_U16(u16Value, iSegReg); 6460 IEM_MC_STORE_MEM_ U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Value);6460 IEM_MC_STORE_MEM_SEG_U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Value); 6461 6461 IEM_MC_ADVANCE_PC_AND_FINISH(); 6462 6462 IEM_MC_END(); … … 7334 7334 IEM_MC_FETCH_GREG_U8(u8Tmp, X86_GREG_xAX); 7335 7335 IEM_MC_LOCAL_CONST(RTGCPTR, GCPtrMemOff, GCPtrMemOffDecode); 7336 IEM_MC_STORE_MEM_ U8(pVCpu->iem.s.iEffSeg, GCPtrMemOff, u8Tmp);7336 IEM_MC_STORE_MEM_SEG_U8(pVCpu->iem.s.iEffSeg, GCPtrMemOff, u8Tmp); 7337 7337 IEM_MC_ADVANCE_PC_AND_FINISH(); 7338 7338 IEM_MC_END(); … … 7363 7363 IEM_MC_FETCH_GREG_U16(u16Tmp, X86_GREG_xAX); 7364 7364 IEM_MC_LOCAL_CONST(RTGCPTR, GCPtrMemOff, GCPtrMemOffDecode); 7365 IEM_MC_STORE_MEM_ U16(pVCpu->iem.s.iEffSeg, GCPtrMemOff, u16Tmp);7365 IEM_MC_STORE_MEM_SEG_U16(pVCpu->iem.s.iEffSeg, GCPtrMemOff, u16Tmp); 7366 7366 IEM_MC_ADVANCE_PC_AND_FINISH(); 7367 7367 IEM_MC_END(); … … 7374 7374 IEM_MC_FETCH_GREG_U32(u32Tmp, X86_GREG_xAX); 7375 7375 IEM_MC_LOCAL_CONST(RTGCPTR, GCPtrMemOff, GCPtrMemOffDecode); 7376 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrMemOff, u32Tmp);7376 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrMemOff, u32Tmp); 7377 7377 IEM_MC_ADVANCE_PC_AND_FINISH(); 7378 7378 IEM_MC_END(); … … 7385 7385 IEM_MC_FETCH_GREG_U64(u64Tmp, X86_GREG_xAX); 7386 7386 IEM_MC_LOCAL_CONST(RTGCPTR, GCPtrMemOff, GCPtrMemOffDecode); 7387 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrMemOff, u64Tmp);7387 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrMemOff, u64Tmp); 7388 7388 IEM_MC_ADVANCE_PC_AND_FINISH(); 7389 7389 IEM_MC_END(); … … 7403 7403 IEM_MC_FETCH_MEM_SEG_U##ValBits(uValue, pVCpu->iem.s.iEffSeg, uAddr); \ 7404 7404 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \ 7405 IEM_MC_STORE_MEM_ U##ValBits(X86_SREG_ES, uAddr, uValue); \7405 IEM_MC_STORE_MEM_SEG_U##ValBits(X86_SREG_ES, uAddr, uValue); \ 7406 7406 IEM_MC_IF_EFL_BIT_SET(X86_EFL_DF) { \ 7407 7407 IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \ … … 7936 7936 IEM_MC_FETCH_GREG_U##ValBits(uValue, X86_GREG_xAX); \ 7937 7937 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \ 7938 IEM_MC_STORE_MEM_ U##ValBits(X86_SREG_ES, uAddr, uValue); \7938 IEM_MC_STORE_MEM_SEG_U##ValBits(X86_SREG_ES, uAddr, uValue); \ 7939 7939 IEM_MC_IF_EFL_BIT_SET(X86_EFL_DF) { \ 7940 7940 IEM_MC_SUB_GREG_U##AddrBits(X86_GREG_xDI, ValBits / 8); \ … … 9389 9389 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 9390 9390 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9391 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u8Imm);9391 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u8Imm); 9392 9392 IEM_MC_ADVANCE_PC_AND_FINISH(); 9393 9393 IEM_MC_END(); … … 9452 9452 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 9453 9453 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9454 IEM_MC_STORE_MEM_ U16_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Imm);9454 IEM_MC_STORE_MEM_SEG_U16_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Imm); 9455 9455 IEM_MC_ADVANCE_PC_AND_FINISH(); 9456 9456 IEM_MC_END(); … … 9463 9463 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); 9464 9464 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9465 IEM_MC_STORE_MEM_ U32_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u32Imm);9465 IEM_MC_STORE_MEM_SEG_U32_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u32Imm); 9466 9466 IEM_MC_ADVANCE_PC_AND_FINISH(); 9467 9467 IEM_MC_END(); … … 9474 9474 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); 9475 9475 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9476 IEM_MC_STORE_MEM_ U64_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u64Imm);9476 IEM_MC_STORE_MEM_SEG_U64_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u64Imm); 9477 9477 IEM_MC_ADVANCE_PC_AND_FINISH(); 9478 9478 IEM_MC_END(); … … 11075 11075 IEM_MC_ACTUALIZE_FPU_STATE_FOR_READ(); 11076 11076 IEM_MC_FETCH_FCW(u16Fcw); 11077 IEM_MC_STORE_MEM_ U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Fcw);11077 IEM_MC_STORE_MEM_SEG_U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Fcw); 11078 11078 IEM_MC_ADVANCE_PC_AND_FINISH(); /* C0-C3 are documented as undefined, we leave them unmodified. */ 11079 11079 IEM_MC_END(); … … 12969 12969 IEM_MC_ACTUALIZE_FPU_STATE_FOR_READ(); 12970 12970 IEM_MC_FETCH_FSW(u16Tmp); 12971 IEM_MC_STORE_MEM_ U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Tmp);12971 IEM_MC_STORE_MEM_SEG_U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Tmp); 12972 12972 IEM_MC_ADVANCE_PC_AND_FINISH(); 12973 12973 -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstThree0f38-x86.cpp.h
r108288 r108296 1830 1830 IEM_MC_FETCH_GREG_U16(u16Value, IEM_GET_MODRM_REG(pVCpu, bRm)); 1831 1831 IEM_MC_BSWAP_LOCAL_U16(u16Value); 1832 IEM_MC_STORE_MEM_ U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Value);1832 IEM_MC_STORE_MEM_SEG_U16(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u16Value); 1833 1833 IEM_MC_ADVANCE_PC_AND_FINISH(); 1834 1834 IEM_MC_END(); … … 1843 1843 IEM_MC_FETCH_GREG_U32(u32Value, IEM_GET_MODRM_REG(pVCpu, bRm)); 1844 1844 IEM_MC_BSWAP_LOCAL_U32(u32Value); 1845 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u32Value);1845 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u32Value); 1846 1846 IEM_MC_ADVANCE_PC_AND_FINISH(); 1847 1847 IEM_MC_END(); … … 1856 1856 IEM_MC_FETCH_GREG_U64(u64Value, IEM_GET_MODRM_REG(pVCpu, bRm)); 1857 1857 IEM_MC_BSWAP_LOCAL_U64(u64Value); 1858 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u64Value);1858 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u64Value); 1859 1859 IEM_MC_ADVANCE_PC_AND_FINISH(); 1860 1860 IEM_MC_END(); -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstThree0f3a-x86.cpp.h
r108288 r108296 617 617 618 618 IEM_MC_FETCH_XREG_U8(uValue, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 15 /*a_iByte*/); 619 IEM_MC_STORE_MEM_ U8(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uValue);619 IEM_MC_STORE_MEM_SEG_U8(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uValue); 620 620 IEM_MC_ADVANCE_PC_AND_FINISH(); 621 621 IEM_MC_END(); … … 661 661 662 662 IEM_MC_FETCH_XREG_U16(uValue, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 7 /*a_iWord*/); 663 IEM_MC_STORE_MEM_ U16(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uValue);663 IEM_MC_STORE_MEM_SEG_U16(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uValue); 664 664 IEM_MC_ADVANCE_PC_AND_FINISH(); 665 665 IEM_MC_END(); … … 712 712 713 713 IEM_MC_FETCH_XREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 1 /*a_iQword*/); 714 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);714 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 715 715 IEM_MC_ADVANCE_PC_AND_FINISH(); 716 716 IEM_MC_END(); … … 758 758 IEM_MC_PREPARE_SSE_USAGE(); 759 759 IEM_MC_FETCH_XREG_U32(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 3 /*a_iDword*/); 760 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);760 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 761 761 IEM_MC_ADVANCE_PC_AND_FINISH(); 762 762 IEM_MC_END(); … … 802 802 IEM_MC_PREPARE_SSE_USAGE(); 803 803 IEM_MC_FETCH_XREG_U32(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 3 /*a_iDword*/); 804 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);804 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 805 805 IEM_MC_ADVANCE_PC_AND_FINISH(); 806 806 IEM_MC_END(); -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstTwoByte0f-x86.cpp.h
r108288 r108296 2300 2300 2301 2301 IEM_MC_FETCH_XREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 2302 IEM_MC_STORE_MEM_ U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2302 IEM_MC_STORE_MEM_SEG_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2303 2303 2304 2304 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2350 2350 2351 2351 IEM_MC_FETCH_XREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 2352 IEM_MC_STORE_MEM_ U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2352 IEM_MC_STORE_MEM_SEG_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2353 2353 2354 2354 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2403 2403 2404 2404 IEM_MC_FETCH_XREG_U32(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDword*/); 2405 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2405 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2406 2406 2407 2407 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2456 2456 2457 2457 IEM_MC_FETCH_XREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /* a_iQword*/); 2458 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2458 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2459 2459 2460 2460 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2718 2718 2719 2719 IEM_MC_FETCH_XREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /* a_iQword*/); 2720 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2720 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2721 2721 2722 2722 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2766 2766 2767 2767 IEM_MC_FETCH_XREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /* a_iQword*/); 2768 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2768 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2769 2769 2770 2770 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 3093 3093 3094 3094 IEM_MC_FETCH_XREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 1 /* a_iQword*/); 3095 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);3095 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 3096 3096 3097 3097 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 3141 3141 3142 3142 IEM_MC_FETCH_XREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 1 /* a_iQword*/); 3143 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);3143 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 3144 3144 3145 3145 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 3518 3518 3519 3519 IEM_MC_FETCH_XREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 3520 IEM_MC_STORE_MEM_ U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);3520 IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 3521 3521 3522 3522 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 3567 3567 3568 3568 IEM_MC_FETCH_XREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 3569 IEM_MC_STORE_MEM_ U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);3569 IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 3570 3570 3571 3571 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 3916 3916 3917 3917 IEM_MC_FETCH_XREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 3918 IEM_MC_STORE_MEM_ U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);3918 IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 3919 3919 3920 3920 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 3955 3955 3956 3956 IEM_MC_FETCH_XREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 3957 IEM_MC_STORE_MEM_ U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);3957 IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 3958 3958 3959 3959 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 7210 7210 7211 7211 IEM_MC_FETCH_MREG_U64(u64Tmp, IEM_GET_MODRM_REG_8(bRm)); 7212 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u64Tmp);7212 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u64Tmp); 7213 7213 IEM_MC_FPU_TO_MMX_MODE(); 7214 7214 … … 7262 7262 7263 7263 IEM_MC_FETCH_MREG_U32(u32Tmp, IEM_GET_MODRM_REG_8(bRm), 0); 7264 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u32Tmp);7264 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u32Tmp); 7265 7265 IEM_MC_FPU_TO_MMX_MODE(); 7266 7266 … … 7317 7317 7318 7318 IEM_MC_FETCH_XREG_U64(u64Tmp, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /* a_iQword*/); 7319 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u64Tmp);7319 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u64Tmp); 7320 7320 7321 7321 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 7367 7367 7368 7368 IEM_MC_FETCH_XREG_U32(u32Tmp, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDword*/); 7369 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u32Tmp);7369 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u32Tmp); 7370 7370 7371 7371 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 7471 7471 7472 7472 IEM_MC_FETCH_MREG_U64(u64Tmp, IEM_GET_MODRM_REG_8(bRm)); 7473 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u64Tmp);7473 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u64Tmp); 7474 7474 IEM_MC_FPU_TO_MMX_MODE(); 7475 7475 … … 7513 7513 7514 7514 IEM_MC_FETCH_XREG_U128(u128Tmp, IEM_GET_MODRM_REG(pVCpu, bRm)); 7515 IEM_MC_STORE_MEM_ U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp);7515 IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp); 7516 7516 7517 7517 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 7554 7554 7555 7555 IEM_MC_FETCH_XREG_U128(u128Tmp, IEM_GET_MODRM_REG(pVCpu, bRm)); 7556 IEM_MC_STORE_MEM_ U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp);7556 IEM_MC_STORE_MEM_SEG_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp); 7557 7557 7558 7558 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8174 8174 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8175 8175 IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF) { 8176 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8176 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8177 8177 } IEM_MC_ELSE() { 8178 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8178 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8179 8179 } IEM_MC_ENDIF(); 8180 8180 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8218 8218 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8219 8219 IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF) { 8220 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8220 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8221 8221 } IEM_MC_ELSE() { 8222 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8222 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8223 8223 } IEM_MC_ENDIF(); 8224 8224 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8262 8262 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8263 8263 IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) { 8264 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8264 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8265 8265 } IEM_MC_ELSE() { 8266 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8266 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8267 8267 } IEM_MC_ENDIF(); 8268 8268 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8306 8306 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8307 8307 IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) { 8308 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8308 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8309 8309 } IEM_MC_ELSE() { 8310 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8310 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8311 8311 } IEM_MC_ENDIF(); 8312 8312 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8350 8350 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8351 8351 IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF) { 8352 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8352 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8353 8353 } IEM_MC_ELSE() { 8354 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8354 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8355 8355 } IEM_MC_ENDIF(); 8356 8356 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8394 8394 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8395 8395 IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF) { 8396 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8396 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8397 8397 } IEM_MC_ELSE() { 8398 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8398 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8399 8399 } IEM_MC_ENDIF(); 8400 8400 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8438 8438 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8439 8439 IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) { 8440 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8440 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8441 8441 } IEM_MC_ELSE() { 8442 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8442 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8443 8443 } IEM_MC_ENDIF(); 8444 8444 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8482 8482 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8483 8483 IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) { 8484 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8484 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8485 8485 } IEM_MC_ELSE() { 8486 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8486 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8487 8487 } IEM_MC_ENDIF(); 8488 8488 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8526 8526 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8527 8527 IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF) { 8528 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8528 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8529 8529 } IEM_MC_ELSE() { 8530 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8530 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8531 8531 } IEM_MC_ENDIF(); 8532 8532 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8570 8570 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8571 8571 IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF) { 8572 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8572 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8573 8573 } IEM_MC_ELSE() { 8574 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8574 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8575 8575 } IEM_MC_ENDIF(); 8576 8576 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8614 8614 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8615 8615 IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF) { 8616 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8616 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8617 8617 } IEM_MC_ELSE() { 8618 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8618 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8619 8619 } IEM_MC_ENDIF(); 8620 8620 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8658 8658 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8659 8659 IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF) { 8660 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8660 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8661 8661 } IEM_MC_ELSE() { 8662 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8662 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8663 8663 } IEM_MC_ENDIF(); 8664 8664 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8702 8702 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8703 8703 IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF) { 8704 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8704 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8705 8705 } IEM_MC_ELSE() { 8706 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8706 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8707 8707 } IEM_MC_ENDIF(); 8708 8708 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8746 8746 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8747 8747 IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF) { 8748 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8748 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8749 8749 } IEM_MC_ELSE() { 8750 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8750 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8751 8751 } IEM_MC_ENDIF(); 8752 8752 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8790 8790 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8791 8791 IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) { 8792 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8792 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8793 8793 } IEM_MC_ELSE() { 8794 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8794 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8795 8795 } IEM_MC_ENDIF(); 8796 8796 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 8834 8834 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8835 8835 IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) { 8836 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0);8836 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0); 8837 8837 } IEM_MC_ELSE() { 8838 IEM_MC_STORE_MEM_ U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1);8838 IEM_MC_STORE_MEM_SEG_U8_CONST(pVCpu->iem.s.iEffSeg, GCPtrEffDst, 1); 8839 8839 } IEM_MC_ENDIF(); 8840 8840 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 12045 12045 12046 12046 IEM_MC_FETCH_GREG_U32(u32Value, IEM_GET_MODRM_REG(pVCpu, bRm)); 12047 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u32Value);12047 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u32Value); 12048 12048 IEM_MC_ADVANCE_PC_AND_FINISH(); 12049 12049 IEM_MC_END(); … … 12059 12059 12060 12060 IEM_MC_FETCH_GREG_U64(u64Value, IEM_GET_MODRM_REG(pVCpu, bRm)); 12061 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u64Value);12061 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffDst, u64Value); 12062 12062 IEM_MC_ADVANCE_PC_AND_FINISH(); 12063 12063 IEM_MC_END(); … … 12984 12984 12985 12985 IEM_MC_FETCH_XREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /* a_iQword*/); 12986 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);12986 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 12987 12987 12988 12988 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 13477 13477 13478 13478 IEM_MC_FETCH_MREG_U64(uSrc, IEM_GET_MODRM_REG_8(bRm)); 13479 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);13479 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 13480 13480 13481 13481 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 13523 13523 13524 13524 IEM_MC_FETCH_XREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 13525 IEM_MC_STORE_MEM_ U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);13525 IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 13526 13526 13527 13527 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 13873 13873 IEM_MC_REF_MREG_U64_CONST(puMsk, IEM_GET_MODRM_RM_8(bRm)); 13874 13874 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_maskmovq_u64, pu64Mem, puSrc, puMsk); 13875 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, u64EffAddr, u64Mem);13875 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, u64EffAddr, u64Mem); 13876 13876 13877 13877 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 13911 13911 IEM_MC_REF_XREG_U128_CONST(puMsk, IEM_GET_MODRM_RM(pVCpu, bRm)); 13912 13912 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_maskmovdqu_u128, pu128Mem, puSrc, puMsk); 13913 IEM_MC_STORE_MEM_ U128(pVCpu->iem.s.iEffSeg, u64EffAddr, u128Mem);13913 IEM_MC_STORE_MEM_SEG_U128(pVCpu->iem.s.iEffSeg, u64EffAddr, u128Mem); 13914 13914 13915 13915 IEM_MC_ADVANCE_PC_AND_FINISH(); -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstVexMap1-x86.cpp.h
r108288 r108296 959 959 960 960 IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/); 961 IEM_MC_STORE_MEM_ U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);961 IEM_MC_STORE_MEM_SEG_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 962 962 963 963 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 979 979 980 980 IEM_MC_FETCH_YREG_U256(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 981 IEM_MC_STORE_MEM_ U256_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);981 IEM_MC_STORE_MEM_SEG_U256_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 982 982 983 983 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 1034 1034 1035 1035 IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/); 1036 IEM_MC_STORE_MEM_ U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);1036 IEM_MC_STORE_MEM_SEG_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 1037 1037 1038 1038 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 1054 1054 1055 1055 IEM_MC_FETCH_YREG_U256(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 1056 IEM_MC_STORE_MEM_ U256_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);1056 IEM_MC_STORE_MEM_SEG_U256_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 1057 1057 1058 1058 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 1117 1117 1118 1118 IEM_MC_FETCH_YREG_U32(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 1119 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);1119 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 1120 1120 1121 1121 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 1181 1181 1182 1182 IEM_MC_FETCH_YREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iQWord*/); 1183 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);1183 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 1184 1184 1185 1185 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 1565 1565 1566 1566 IEM_MC_FETCH_YREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iQWord*/); 1567 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);1567 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 1568 1568 1569 1569 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 1612 1612 1613 1613 IEM_MC_FETCH_YREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iQWord*/); 1614 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);1614 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 1615 1615 1616 1616 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 1931 1931 1932 1932 IEM_MC_FETCH_YREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 1 /*a_iQWord*/); 1933 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);1933 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 1934 1934 1935 1935 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 1977 1977 1978 1978 IEM_MC_FETCH_YREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 1 /*a_iQWord*/); 1979 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);1979 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 1980 1980 1981 1981 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2244 2244 2245 2245 IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/); 2246 IEM_MC_STORE_MEM_ U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2246 IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2247 2247 2248 2248 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2261 2261 2262 2262 IEM_MC_FETCH_YREG_U256(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 2263 IEM_MC_STORE_MEM_ U256_ALIGN_AVX(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2263 IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2264 2264 2265 2265 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2320 2320 2321 2321 IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/); 2322 IEM_MC_STORE_MEM_ U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2322 IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2323 2323 2324 2324 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2337 2337 2338 2338 IEM_MC_FETCH_YREG_U256(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 2339 IEM_MC_STORE_MEM_ U256_ALIGN_AVX(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2339 IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2340 2340 2341 2341 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2614 2614 2615 2615 IEM_MC_FETCH_XREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 2616 IEM_MC_STORE_MEM_ U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2616 IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2617 2617 2618 2618 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2631 2631 2632 2632 IEM_MC_FETCH_YREG_U256(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 2633 IEM_MC_STORE_MEM_ U256_ALIGN_AVX(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2633 IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2634 2634 2635 2635 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2675 2675 2676 2676 IEM_MC_FETCH_XREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 2677 IEM_MC_STORE_MEM_ U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2677 IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2678 2678 2679 2679 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 2692 2692 2693 2693 IEM_MC_FETCH_YREG_U256(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 2694 IEM_MC_STORE_MEM_ U256_ALIGN_AVX(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2694 IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2695 2695 2696 2696 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 5232 5232 5233 5233 IEM_MC_FETCH_YREG_U64(u64Tmp, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iQWord*/); 5234 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u64Tmp);5234 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u64Tmp); 5235 5235 5236 5236 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 5282 5282 5283 5283 IEM_MC_FETCH_YREG_U32(u32Tmp, IEM_GET_MODRM_REG(pVCpu, bRm)); 5284 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u32Tmp);5284 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u32Tmp); 5285 5285 5286 5286 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 5395 5395 5396 5396 IEM_MC_FETCH_YREG_U128(u128Tmp, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/); 5397 IEM_MC_STORE_MEM_ U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp);5397 IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp); 5398 5398 5399 5399 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 5415 5415 5416 5416 IEM_MC_FETCH_YREG_U256(u256Tmp, IEM_GET_MODRM_REG(pVCpu, bRm)); 5417 IEM_MC_STORE_MEM_ U256_ALIGN_AVX(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u256Tmp);5417 IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u256Tmp); 5418 5418 5419 5419 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 5471 5471 5472 5472 IEM_MC_FETCH_YREG_U128(u128Tmp, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/); 5473 IEM_MC_STORE_MEM_ U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp);5473 IEM_MC_STORE_MEM_SEG_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp); 5474 5474 5475 5475 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 5491 5491 5492 5492 IEM_MC_FETCH_YREG_U256(u256Tmp, IEM_GET_MODRM_REG(pVCpu, bRm)); 5493 IEM_MC_STORE_MEM_ U256_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u256Tmp);5493 IEM_MC_STORE_MEM_SEG_U256_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u256Tmp); 5494 5494 5495 5495 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 6329 6329 6330 6330 IEM_MC_FETCH_YREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iQWord*/); 6331 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);6331 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 6332 6332 6333 6333 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 6949 6949 6950 6950 IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/); 6951 IEM_MC_STORE_MEM_ U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);6951 IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 6952 6952 6953 6953 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 6969 6969 6970 6970 IEM_MC_FETCH_YREG_U256(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 6971 IEM_MC_STORE_MEM_ U256_ALIGN_AVX(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);6971 IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 6972 6972 6973 6973 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 7276 7276 IEM_MC_REF_XREG_U128_CONST(puMsk, IEM_GET_MODRM_RM(pVCpu, bRm)); 7277 7277 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_maskmovdqu_u128, pu128Mem, puSrc, puMsk); 7278 IEM_MC_STORE_MEM_ U128(pVCpu->iem.s.iEffSeg, u64EffAddr, u128Mem);7278 IEM_MC_STORE_MEM_SEG_U128(pVCpu->iem.s.iEffSeg, u64EffAddr, u128Mem); 7279 7279 7280 7280 IEM_MC_ADVANCE_PC_AND_FINISH(); -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllInstVexMap3-x86.cpp.h
r108288 r108296 904 904 IEM_MC_LOCAL(uint8_t, uValue); 905 905 IEM_MC_FETCH_XREG_U8(uValue, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 15 /*a_iByte*/); 906 IEM_MC_STORE_MEM_ U8(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uValue);906 IEM_MC_STORE_MEM_SEG_U8(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uValue); 907 907 IEM_MC_ADVANCE_PC_AND_FINISH(); 908 908 IEM_MC_END(); … … 951 951 952 952 IEM_MC_FETCH_XREG_U16(uValue, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 7); 953 IEM_MC_STORE_MEM_ U16(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uValue);953 IEM_MC_STORE_MEM_SEG_U16(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uValue); 954 954 IEM_MC_ADVANCE_PC_AND_FINISH(); 955 955 IEM_MC_END(); … … 999 999 1000 1000 IEM_MC_FETCH_XREG_U64(uValue, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 1); 1001 IEM_MC_STORE_MEM_ U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uValue);1001 IEM_MC_STORE_MEM_SEG_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uValue); 1002 1002 IEM_MC_ADVANCE_PC_AND_FINISH(); 1003 1003 IEM_MC_END(); … … 1044 1044 1045 1045 IEM_MC_FETCH_XREG_U32(uValue, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 3); 1046 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uValue);1046 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uValue); 1047 1047 IEM_MC_ADVANCE_PC_AND_FINISH(); 1048 1048 IEM_MC_END(); … … 1091 1091 1092 1092 IEM_MC_FETCH_XREG_U32(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 3 /*a_iDword*/); 1093 IEM_MC_STORE_MEM_ U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);1093 IEM_MC_STORE_MEM_SEG_U32(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 1094 1094 IEM_MC_ADVANCE_PC_AND_FINISH(); 1095 1095 IEM_MC_END(); … … 1188 1188 IEM_MC_LOCAL(RTUINT128U, uDst); 1189 1189 IEM_MC_FETCH_YREG_U128(uDst, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 1); 1190 IEM_MC_STORE_MEM_ U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uDst);1190 IEM_MC_STORE_MEM_SEG_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uDst); 1191 1191 1192 1192 IEM_MC_ADVANCE_PC_AND_FINISH(); … … 1529 1529 IEM_MC_LOCAL(RTUINT128U, uDst); 1530 1530 IEM_MC_FETCH_YREG_U128(uDst, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 1); 1531 IEM_MC_STORE_MEM_ U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uDst);1531 IEM_MC_STORE_MEM_SEG_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uDst); 1532 1532 1533 1533 IEM_MC_ADVANCE_PC_AND_FINISH(); -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllN8veLiveness-x86.h
r108294 r108296 955 955 #define IEM_MC_FETCH_MEM_FLAT_U32_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT() 956 956 957 #define IEM_MC_STORE_MEM_ U8(a_iSeg, a_GCPtrMem, a_u8Value)IEM_LIVENESS_MEM_SEG(a_iSeg)958 #define IEM_MC_STORE_MEM_ U16(a_iSeg, a_GCPtrMem, a_u16Value)IEM_LIVENESS_MEM_SEG(a_iSeg)959 #define IEM_MC_STORE_MEM_ U32(a_iSeg, a_GCPtrMem, a_u32Value)IEM_LIVENESS_MEM_SEG(a_iSeg)960 #define IEM_MC_STORE_MEM_ U64(a_iSeg, a_GCPtrMem, a_u64Value)IEM_LIVENESS_MEM_SEG(a_iSeg)957 #define IEM_MC_STORE_MEM_SEG_U8(a_iSeg, a_GCPtrMem, a_u8Value) IEM_LIVENESS_MEM_SEG(a_iSeg) 958 #define IEM_MC_STORE_MEM_SEG_U16(a_iSeg, a_GCPtrMem, a_u16Value) IEM_LIVENESS_MEM_SEG(a_iSeg) 959 #define IEM_MC_STORE_MEM_SEG_U32(a_iSeg, a_GCPtrMem, a_u32Value) IEM_LIVENESS_MEM_SEG(a_iSeg) 960 #define IEM_MC_STORE_MEM_SEG_U64(a_iSeg, a_GCPtrMem, a_u64Value) IEM_LIVENESS_MEM_SEG(a_iSeg) 961 961 962 962 #define IEM_MC_STORE_MEM_FLAT_U8(a_GCPtrMem, a_u8Value) IEM_LIVENESS_MEM_FLAT() … … 965 965 #define IEM_MC_STORE_MEM_FLAT_U64(a_GCPtrMem, a_u64Value) IEM_LIVENESS_MEM_FLAT() 966 966 967 #define IEM_MC_STORE_MEM_ U8_CONST(a_iSeg, a_GCPtrMem, a_u8C)IEM_LIVENESS_MEM_SEG(a_iSeg)968 #define IEM_MC_STORE_MEM_ U16_CONST(a_iSeg, a_GCPtrMem, a_u16C)IEM_LIVENESS_MEM_SEG(a_iSeg)969 #define IEM_MC_STORE_MEM_ U32_CONST(a_iSeg, a_GCPtrMem, a_u32C)IEM_LIVENESS_MEM_SEG(a_iSeg)970 #define IEM_MC_STORE_MEM_ U64_CONST(a_iSeg, a_GCPtrMem, a_u64C)IEM_LIVENESS_MEM_SEG(a_iSeg)967 #define IEM_MC_STORE_MEM_SEG_U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) IEM_LIVENESS_MEM_SEG(a_iSeg) 968 #define IEM_MC_STORE_MEM_SEG_U16_CONST(a_iSeg, a_GCPtrMem, a_u16C) IEM_LIVENESS_MEM_SEG(a_iSeg) 969 #define IEM_MC_STORE_MEM_SEG_U32_CONST(a_iSeg, a_GCPtrMem, a_u32C) IEM_LIVENESS_MEM_SEG(a_iSeg) 970 #define IEM_MC_STORE_MEM_SEG_U64_CONST(a_iSeg, a_GCPtrMem, a_u64C) IEM_LIVENESS_MEM_SEG(a_iSeg) 971 971 972 972 #define IEM_MC_STORE_MEM_FLAT_U8_CONST(a_GCPtrMem, a_u8C) IEM_LIVENESS_MEM_FLAT() … … 984 984 #define IEM_MC_STORE_MEM_BY_REF_D80_INDEF(a_pd80Dst) NOP() 985 985 986 #define IEM_MC_STORE_MEM_ U128(a_iSeg, a_GCPtrMem, a_u128Value)IEM_LIVENESS_MEM_SEG(a_iSeg)987 #define IEM_MC_STORE_MEM_ U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value)IEM_LIVENESS_MEM_SEG(a_iSeg)988 #define IEM_MC_STORE_MEM_ U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Value)IEM_LIVENESS_MEM_SEG(a_iSeg)986 #define IEM_MC_STORE_MEM_SEG_U128(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_SEG(a_iSeg) 987 #define IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_SEG(a_iSeg) 988 #define IEM_MC_STORE_MEM_SEG_U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_SEG(a_iSeg) 989 989 990 990 #define IEM_MC_STORE_MEM_FLAT_U128(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT() … … 992 992 #define IEM_MC_STORE_MEM_FLAT_U128_NO_AC(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT() 993 993 994 #define IEM_MC_STORE_MEM_ U256(a_iSeg, a_GCPtrMem, a_u256Value)IEM_LIVENESS_MEM_SEG(a_iSeg)995 #define IEM_MC_STORE_MEM_ U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value)IEM_LIVENESS_MEM_SEG(a_iSeg)996 #define IEM_MC_STORE_MEM_ U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Value)IEM_LIVENESS_MEM_SEG(a_iSeg)994 #define IEM_MC_STORE_MEM_SEG_U256(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_SEG(a_iSeg) 995 #define IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_SEG(a_iSeg) 996 #define IEM_MC_STORE_MEM_SEG_U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_SEG(a_iSeg) 997 997 998 998 #define IEM_MC_STORE_MEM_FLAT_U256(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT() -
trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllN8veRecompFuncs-x86.h
r108288 r108296 7124 7124 } IEMNATIVEMITMEMOP; 7125 7125 7126 /** Emits code for IEM_MC_FETCH_MEM_SEG_U8/16/32/64 and IEM_MC_STORE_MEM_ U8/16/32/64,7126 /** Emits code for IEM_MC_FETCH_MEM_SEG_U8/16/32/64 and IEM_MC_STORE_MEM_SEG_U8/16/32/64, 7127 7127 * and IEM_MC_FETCH_MEM_FLAT_U8/16/32/64 and IEM_MC_STORE_MEM_FLAT_U8/16/32/64 7128 7128 * (with iSegReg = UINT8_MAX). */ … … 8028 8028 *********************************************************************************************************************************/ 8029 8029 8030 #define IEM_MC_STORE_MEM_ U8(a_iSeg, a_GCPtrMem, a_u8Value) \8030 #define IEM_MC_STORE_MEM_SEG_U8(a_iSeg, a_GCPtrMem, a_u8Value) \ 8031 8031 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint8_t), 0 /*fAlignMaskAndCtl*/, kIemNativeEmitMemOp_Store>(\ 8032 8032 pReNative, off, a_u8Value, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemStoreDataU8, pCallEntry->idxInstr) 8033 8033 8034 #define IEM_MC_STORE_MEM_ U16(a_iSeg, a_GCPtrMem, a_u16Value) \8034 #define IEM_MC_STORE_MEM_SEG_U16(a_iSeg, a_GCPtrMem, a_u16Value) \ 8035 8035 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint16_t), sizeof(uint16_t) - 1, kIemNativeEmitMemOp_Store>(\ 8036 8036 pReNative, off, a_u16Value, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemStoreDataU16, pCallEntry->idxInstr) 8037 8037 8038 #define IEM_MC_STORE_MEM_ U32(a_iSeg, a_GCPtrMem, a_u32Value) \8038 #define IEM_MC_STORE_MEM_SEG_U32(a_iSeg, a_GCPtrMem, a_u32Value) \ 8039 8039 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint32_t), sizeof(uint32_t) - 1, kIemNativeEmitMemOp_Store>(\ 8040 8040 pReNative, off, a_u32Value, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemStoreDataU32, pCallEntry->idxInstr) 8041 8041 8042 #define IEM_MC_STORE_MEM_ U64(a_iSeg, a_GCPtrMem, a_u64Value) \8042 #define IEM_MC_STORE_MEM_SEG_U64(a_iSeg, a_GCPtrMem, a_u64Value) \ 8043 8043 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(uint64_t), sizeof(uint64_t) - 1, kIemNativeEmitMemOp_Store>(\ 8044 8044 pReNative, off, a_u64Value, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemStoreDataU64, pCallEntry->idxInstr) … … 8062 8062 8063 8063 8064 #define IEM_MC_STORE_MEM_ U8_CONST(a_iSeg, a_GCPtrMem, a_u8ConstValue) \8064 #define IEM_MC_STORE_MEM_SEG_U8_CONST(a_iSeg, a_GCPtrMem, a_u8ConstValue) \ 8065 8065 off = iemNativeEmitMemStoreConstDataCommon<sizeof(uint8_t)>(\ 8066 8066 pReNative, off, a_u8ConstValue, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemStoreDataU8, pCallEntry->idxInstr) 8067 8067 8068 #define IEM_MC_STORE_MEM_ U16_CONST(a_iSeg, a_GCPtrMem, a_u16ConstValue) \8068 #define IEM_MC_STORE_MEM_SEG_U16_CONST(a_iSeg, a_GCPtrMem, a_u16ConstValue) \ 8069 8069 off = iemNativeEmitMemStoreConstDataCommon<sizeof(uint16_t)>(\ 8070 8070 pReNative, off, a_u16ConstValue, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemStoreDataU16, pCallEntry->idxInstr) 8071 8071 8072 #define IEM_MC_STORE_MEM_ U32_CONST(a_iSeg, a_GCPtrMem, a_u32ConstValue) \8072 #define IEM_MC_STORE_MEM_SEG_U32_CONST(a_iSeg, a_GCPtrMem, a_u32ConstValue) \ 8073 8073 off = iemNativeEmitMemStoreConstDataCommon<sizeof(uint32_t)>(\ 8074 8074 pReNative, off, a_u32ConstValue, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemStoreDataU32, pCallEntry->idxInstr) 8075 8075 8076 #define IEM_MC_STORE_MEM_ U64_CONST(a_iSeg, a_GCPtrMem, a_u64ConstValue) \8076 #define IEM_MC_STORE_MEM_SEG_U64_CONST(a_iSeg, a_GCPtrMem, a_u64ConstValue) \ 8077 8077 off = iemNativeEmitMemStoreConstDataCommon<sizeof(uint64_t)>(\ 8078 8078 pReNative, off, a_u64ConstValue, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemStoreDataU64, pCallEntry->idxInstr) … … 8095 8095 pReNative, off, a_u64ConstValue, UINT8_MAX, a_GCPtrMem, (uintptr_t)iemNativeHlpMemFlatStoreDataU64, pCallEntry->idxInstr) 8096 8096 8097 /** Emits code for IEM_MC_STORE_MEM_ U8/16/32/64_CONST and8097 /** Emits code for IEM_MC_STORE_MEM_SEG_U8/16/32/64_CONST and 8098 8098 * IEM_MC_STORE_MEM_FLAT_U8/16/32/64_CONST (with iSegReg = UINT8_MAX). */ 8099 8099 template<uint8_t const a_cbMem, bool a_fFlat = false> … … 8116 8116 8117 8117 8118 #define IEM_MC_STORE_MEM_ U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) \8118 #define IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) \ 8119 8119 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(RTUINT128U), \ 8120 8120 (sizeof(RTUINT128U) - 1U) | IEM_MEMMAP_F_ALIGN_GP | IEM_MEMMAP_F_ALIGN_SSE, \ … … 8122 8122 pReNative, off, a_u128Value, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemStoreDataU128AlignedSse, pCallEntry->idxInstr) 8123 8123 8124 #define IEM_MC_STORE_MEM_ U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Value) \8124 #define IEM_MC_STORE_MEM_SEG_U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Value) \ 8125 8125 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(RTUINT128U), sizeof(RTUINT128U) - 1, kIemNativeEmitMemOp_Store>(\ 8126 8126 pReNative, off, a_u128Value, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemStoreDataU128NoAc, pCallEntry->idxInstr) 8127 8127 8128 #define IEM_MC_STORE_MEM_ U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Value) \8128 #define IEM_MC_STORE_MEM_SEG_U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Value) \ 8129 8129 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(RTUINT256U), sizeof(RTUINT256U) - 1, kIemNativeEmitMemOp_Store>(\ 8130 8130 pReNative, off, a_u256Value, a_iSeg, a_GCPtrMem, (uintptr_t)iemNativeHlpMemStoreDataU256NoAc, pCallEntry->idxInstr) 8131 8131 8132 #define IEM_MC_STORE_MEM_ U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value) \8132 #define IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value) \ 8133 8133 off = iemNativeEmitMemFetchStoreDataCommon<sizeof(RTUINT256U), \ 8134 8134 (sizeof(RTUINT256U) - 1U) | IEM_MEMMAP_F_ALIGN_GP, \ -
trunk/src/VBox/VMM/include/IEMMc.h
r108294 r108296 1279 1279 ((a_u64Dst) = (int32_t)iemMemFlatFetchDataU32Jmp(pVCpu, (a_GCPtrMem))) 1280 1280 1281 #define IEM_MC_STORE_MEM_ U8(a_iSeg, a_GCPtrMem, a_u8Value) \1281 #define IEM_MC_STORE_MEM_SEG_U8(a_iSeg, a_GCPtrMem, a_u8Value) \ 1282 1282 iemMemStoreDataU8Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u8Value)) 1283 #define IEM_MC_STORE_MEM_ U16(a_iSeg, a_GCPtrMem, a_u16Value) \1283 #define IEM_MC_STORE_MEM_SEG_U16(a_iSeg, a_GCPtrMem, a_u16Value) \ 1284 1284 iemMemStoreDataU16Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u16Value)) 1285 #define IEM_MC_STORE_MEM_ U32(a_iSeg, a_GCPtrMem, a_u32Value) \1285 #define IEM_MC_STORE_MEM_SEG_U32(a_iSeg, a_GCPtrMem, a_u32Value) \ 1286 1286 iemMemStoreDataU32Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u32Value)) 1287 #define IEM_MC_STORE_MEM_ U64(a_iSeg, a_GCPtrMem, a_u64Value) \1287 #define IEM_MC_STORE_MEM_SEG_U64(a_iSeg, a_GCPtrMem, a_u64Value) \ 1288 1288 iemMemStoreDataU64Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u64Value)) 1289 1289 … … 1297 1297 iemMemFlatStoreDataU64Jmp(pVCpu, (a_GCPtrMem), (a_u64Value)) 1298 1298 1299 #define IEM_MC_STORE_MEM_ U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) \1299 #define IEM_MC_STORE_MEM_SEG_U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) \ 1300 1300 iemMemStoreDataU8Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u8C)) 1301 #define IEM_MC_STORE_MEM_ U16_CONST(a_iSeg, a_GCPtrMem, a_u16C) \1301 #define IEM_MC_STORE_MEM_SEG_U16_CONST(a_iSeg, a_GCPtrMem, a_u16C) \ 1302 1302 iemMemStoreDataU16Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u16C)) 1303 #define IEM_MC_STORE_MEM_ U32_CONST(a_iSeg, a_GCPtrMem, a_u32C) \1303 #define IEM_MC_STORE_MEM_SEG_U32_CONST(a_iSeg, a_GCPtrMem, a_u32C) \ 1304 1304 iemMemStoreDataU32Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u32C)) 1305 #define IEM_MC_STORE_MEM_ U64_CONST(a_iSeg, a_GCPtrMem, a_u64C) \1305 #define IEM_MC_STORE_MEM_SEG_U64_CONST(a_iSeg, a_GCPtrMem, a_u64C) \ 1306 1306 iemMemStoreDataU64Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u64C)) 1307 1307 … … 1332 1332 } while (0) 1333 1333 1334 #define IEM_MC_STORE_MEM_ U128(a_iSeg, a_GCPtrMem, a_u128Value) \1334 #define IEM_MC_STORE_MEM_SEG_U128(a_iSeg, a_GCPtrMem, a_u128Value) \ 1335 1335 iemMemStoreDataU128Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u128Value)) 1336 #define IEM_MC_STORE_MEM_ U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Value) \1336 #define IEM_MC_STORE_MEM_SEG_U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Value) \ 1337 1337 iemMemStoreDataU128NoAcJmp(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u128Value)) 1338 #define IEM_MC_STORE_MEM_ U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) \1338 #define IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) \ 1339 1339 iemMemStoreDataU128AlignedSseJmp(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u128Value)) 1340 1340 … … 1346 1346 iemMemStoreDataU128AlignedSseJmp(pVCpu, UINT8_MAX, (a_GCPtrMem), (a_u128Value)) 1347 1347 1348 #define IEM_MC_STORE_MEM_ U256(a_iSeg, a_GCPtrMem, a_u256Value) \1348 #define IEM_MC_STORE_MEM_SEG_U256(a_iSeg, a_GCPtrMem, a_u256Value) \ 1349 1349 iemMemStoreDataU256Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u256Value)) 1350 #define IEM_MC_STORE_MEM_ U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Value) \1350 #define IEM_MC_STORE_MEM_SEG_U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Value) \ 1351 1351 iemMemStoreDataU256NoAcJmp(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u256Value)) 1352 #define IEM_MC_STORE_MEM_ U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value) \1352 #define IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value) \ 1353 1353 iemMemStoreDataU256AlignedAvxJmp(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u256Value)) 1354 1354 -
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r108294 r108296 956 956 do { CHK_XREG_IDX(a_iYRegSrc1); (void)fAvxRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_uYmmDst); CHK_TYPE(IEMMEDIAF2YMMSRC, a_uYmmDst); (void)fMcBegin; } while (0) 957 957 958 #define IEM_MC_STORE_MEM_ U8(a_iSeg, a_GCPtrMem, a_u8Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_TYPE(uint8_t, a_u8Value); CHK_VAR(a_u8Value); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)959 #define IEM_MC_STORE_MEM_ U16(a_iSeg, a_GCPtrMem, a_u16Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_TYPE(uint16_t, a_u16Value); CHK_VAR(a_u16Value); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)960 #define IEM_MC_STORE_MEM_ U32(a_iSeg, a_GCPtrMem, a_u32Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_TYPE(uint32_t, a_u32Value); CHK_VAR(a_u32Value); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)961 #define IEM_MC_STORE_MEM_ U64(a_iSeg, a_GCPtrMem, a_u64Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_TYPE(uint64_t, a_u64Value); CHK_VAR(a_u64Value); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)962 #define IEM_MC_STORE_MEM_ U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); uint8_t const uTmp = (a_u8C); RT_NOREF(uTmp); (void)fMcBegin; } while (0)963 #define IEM_MC_STORE_MEM_ U16_CONST(a_iSeg, a_GCPtrMem, a_u16C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); uint16_t const uTmp = (a_u16C); RT_NOREF(uTmp); (void)fMcBegin; } while (0)964 #define IEM_MC_STORE_MEM_ U32_CONST(a_iSeg, a_GCPtrMem, a_u32C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); uint32_t const uTmp = (a_u32C); RT_NOREF(uTmp); (void)fMcBegin; } while (0)965 #define IEM_MC_STORE_MEM_ U64_CONST(a_iSeg, a_GCPtrMem, a_u64C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); uint64_t const uTmp = (a_u64C); RT_NOREF(uTmp); (void)fMcBegin; } while (0)958 #define IEM_MC_STORE_MEM_SEG_U8(a_iSeg, a_GCPtrMem, a_u8Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_TYPE(uint8_t, a_u8Value); CHK_VAR(a_u8Value); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 959 #define IEM_MC_STORE_MEM_SEG_U16(a_iSeg, a_GCPtrMem, a_u16Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_TYPE(uint16_t, a_u16Value); CHK_VAR(a_u16Value); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 960 #define IEM_MC_STORE_MEM_SEG_U32(a_iSeg, a_GCPtrMem, a_u32Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_TYPE(uint32_t, a_u32Value); CHK_VAR(a_u32Value); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 961 #define IEM_MC_STORE_MEM_SEG_U64(a_iSeg, a_GCPtrMem, a_u64Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_TYPE(uint64_t, a_u64Value); CHK_VAR(a_u64Value); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 962 #define IEM_MC_STORE_MEM_SEG_U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); uint8_t const uTmp = (a_u8C); RT_NOREF(uTmp); (void)fMcBegin; } while (0) 963 #define IEM_MC_STORE_MEM_SEG_U16_CONST(a_iSeg, a_GCPtrMem, a_u16C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); uint16_t const uTmp = (a_u16C); RT_NOREF(uTmp); (void)fMcBegin; } while (0) 964 #define IEM_MC_STORE_MEM_SEG_U32_CONST(a_iSeg, a_GCPtrMem, a_u32C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); uint32_t const uTmp = (a_u32C); RT_NOREF(uTmp); (void)fMcBegin; } while (0) 965 #define IEM_MC_STORE_MEM_SEG_U64_CONST(a_iSeg, a_GCPtrMem, a_u64C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); uint64_t const uTmp = (a_u64C); RT_NOREF(uTmp); (void)fMcBegin; } while (0) 966 966 #define IEM_MC_STORE_MEM_BY_REF_I8_CONST( a_pi8Dst, a_i8C) do { CHK_VAR(a_pi8Dst); CHK_TYPE(int8_t *, a_pi8Dst); CHK_CONST(int8_t, a_i8C); (void)fMcBegin; } while (0) 967 967 #define IEM_MC_STORE_MEM_BY_REF_I16_CONST(a_pi16Dst, a_i16C) do { CHK_VAR(a_pi16Dst); CHK_TYPE(int16_t *, a_pi16Dst); CHK_CONST(int16_t, a_i16C); (void)fMcBegin; } while (0) … … 972 972 #define IEM_MC_STORE_MEM_BY_REF_R80_NEG_QNAN(a_pr80Dst) do { CHK_VAR(a_pr80Dst); CHK_TYPE(PRTFLOAT80U, a_pr80Dst); (void)fMcBegin; } while (0) 973 973 #define IEM_MC_STORE_MEM_BY_REF_D80_INDEF(a_pd80Dst) do { CHK_VAR(a_pd80Dst); CHK_TYPE(PRTPBCD80U, a_pd80Dst); (void)fMcBegin; } while (0) 974 #define IEM_MC_STORE_MEM_ U128(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Src); CHK_TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0)975 #define IEM_MC_STORE_MEM_ U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Src); CHK_TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0)976 #define IEM_MC_STORE_MEM_ U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Src); CHK_TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0)977 #define IEM_MC_STORE_MEM_ U256(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Src); CHK_TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0)978 #define IEM_MC_STORE_MEM_ U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Src); CHK_TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0)979 #define IEM_MC_STORE_MEM_ U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Src); CHK_TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0)974 #define IEM_MC_STORE_MEM_SEG_U128(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Src); CHK_TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0) 975 #define IEM_MC_STORE_MEM_SEG_U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Src); CHK_TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0) 976 #define IEM_MC_STORE_MEM_SEG_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Src); CHK_TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0) 977 #define IEM_MC_STORE_MEM_SEG_U256(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Src); CHK_TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0) 978 #define IEM_MC_STORE_MEM_SEG_U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Src); CHK_TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0) 979 #define IEM_MC_STORE_MEM_SEG_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Src); CHK_TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0) 980 980 981 981 #define IEM_MC_PUSH_U16(a_u16Value) do { CHK_VAR(a_u16Value); (void)fMcBegin; } while (0)
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