Changeset 108409 in vbox for trunk/src/VBox/VMM/VMMAll/target-x86

Timestamp:

Feb 27, 2025 10:35:39 AM (8 weeks ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

167777

Message:

VMM/IEM: Made IEMAll.cpp build targeting arm. jiraref:VBP-1531

Location:

trunk/src/VBox/VMM/VMMAll/target-x86

Files:

• IEMAllCImplSvmInstr-x86.cpp (modified) (1 diff)
• IEMAllCImplVmxInstr-x86.cpp (modified) (1 diff)
• IEMAllExec-x86.cpp (modified) (1 diff)
• IEMInline-x86.h (modified) (1 diff)
• IEMInlineExec-x86.h (added)

trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllCImplSvmInstr-x86.cpp

@@ -58 +58 @@
 #include "IEMInline.h"
 #include "IEMInline-x86.h"
+#include "IEMInlineExec.h"
+#include "IEMInlineExec-x86.h"
 
 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM /* Almost the whole file. */

trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllCImplVmxInstr-x86.cpp

@@ -60 +60 @@
 #include "IEMInline.h"
 #include "IEMInline-x86.h"
+#include "IEMInlineExec.h"
+#include "IEMInlineExec-x86.h"
 
 

trunk/src/VBox/VMM/VMMAll/target-x86/IEMAllExec-x86.cpp

@@ -51 +51 @@
 #include "IEMInline.h"
 #include "IEMInline-x86.h"
+#include "IEMInlineExec.h"
+#include "IEMInlineExec-x86.h"
 
 

trunk/src/VBox/VMM/VMMAll/target-x86/IEMInline-x86.h

@@ -283 +283 @@
 
 #endif /* VBOX_INCLUDED_vmm_dbgf_h */
-
-
-#ifndef IEM_WITH_OPAQUE_DECODER_STATE
-# ifdef VBOX_STRICT
-DECLINLINE(void) iemInitExecTargetStrict(PVMCPUCC pVCpu) RT_NOEXCEPT
-{
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->cpum.GstCtx.cs));
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->cpum.GstCtx.ss));
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->cpum.GstCtx.es));
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->cpum.GstCtx.ds));
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->cpum.GstCtx.fs));
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->cpum.GstCtx.gs));
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->cpum.GstCtx.ldtr));
-    Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pVCpu->cpum.GstCtx.tr));
-
-    pVCpu->iem.s.enmDefAddrMode     = (IEMMODE)0xfe;
-    pVCpu->iem.s.enmEffAddrMode     = (IEMMODE)0xfe;
-    pVCpu->iem.s.enmDefOpSize       = (IEMMODE)0xfe;
-    pVCpu->iem.s.enmEffOpSize       = (IEMMODE)0xfe;
-    pVCpu->iem.s.fPrefixes          = 0xfeedbeef;
-    pVCpu->iem.s.uRexReg            = 127;
-    pVCpu->iem.s.uRexB              = 127;
-    pVCpu->iem.s.offModRm           = 127;
-    pVCpu->iem.s.uRexIndex          = 127;
-    pVCpu->iem.s.iEffSeg            = 127;
-    pVCpu->iem.s.idxPrefix          = 127;
-    pVCpu->iem.s.uVex3rdReg         = 127;
-    pVCpu->iem.s.uVexLength         = 127;
-    pVCpu->iem.s.fEvexStuff         = 127;
-    pVCpu->iem.s.uFpuOpcode         = UINT16_MAX;
-#  ifdef IEM_WITH_CODE_TLB
-    pVCpu->iem.s.offInstrNextByte   = UINT16_MAX;
-    pVCpu->iem.s.pbInstrBuf         = NULL;
-    pVCpu->iem.s.cbInstrBuf         = UINT16_MAX;
-    pVCpu->iem.s.cbInstrBufTotal    = UINT16_MAX;
-    pVCpu->iem.s.offCurInstrStart   = INT16_MAX;
-    pVCpu->iem.s.uInstrBufPc        = UINT64_C(0xc0ffc0ffcff0c0ff);
-#   ifdef IEM_WITH_CODE_TLB_AND_OPCODE_BUF
-    pVCpu->iem.s.offOpcode          = 127;
-#   endif
-#  else
-    pVCpu->iem.s.offOpcode          = 127;
-    pVCpu->iem.s.cbOpcode           = 127;
-#  endif
-}
-# endif /* VBOX_STRICT */
-#endif /* !IEM_WITH_OPAQUE_DECODER_STATE */
-
 
 /**