- Timestamp:
- Mar 6, 2025 8:30:37 AM (2 months ago)
- svn:sync-xref-src-repo-rev:
- 167838
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
-
VMMAll/GICAll.cpp (modified) (2 diffs)
-
VMMR3/GICR3.cpp (modified) (9 diffs)
-
include/GICInternal.h (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/GICAll.cpp
r108452 r108464 2244 2244 break; 2245 2245 case GIC_DIST_REG_TYPER_OFF: 2246 Assert(pGicDev->uMaxSpi > 0 && pGicDev->uMaxSpi < GIC_DIST_REG_TYPER_NUM_ITLINES); 2246 { 2247 Assert(pGicDev->uMaxSpi > 0 && pGicDev->uMaxSpi <= GIC_DIST_REG_TYPER_NUM_ITLINES); 2248 Assert(pGicDev->fAffRoutingEnabled); 2247 2249 *puValue = GIC_DIST_REG_TYPER_NUM_ITLINES_SET(pGicDev->uMaxSpi) 2248 | GIC_DIST_REG_TYPER_NUM_PES_SET(0) /* 1 PE */ /** @todo r=ramshankar: Should this be pVCpu->cCpus? Currently it means 'ARE' must always be used? */ 2249 /*| GIC_DIST_REG_TYPER_ESPI*/ /** @todo */ 2250 /*| GIC_DIST_REG_TYPER_NMI*/ /** @todo Non-maskable interrupts */ 2251 /*| GIC_DIST_REG_TYPER_SECURITY_EXTN */ /** @todo */ 2252 /*| GIC_DIST_REG_TYPER_MBIS */ /** @todo Message based interrupts */ 2250 | GIC_DIST_REG_TYPER_NUM_PES_SET(0) /* Affinity routing is always enabled, hence this MBZ. */ 2251 /*| GIC_DIST_REG_TYPER_NMI*/ /** @todo Support non-maskable interrupts */ 2252 /*| GIC_DIST_REG_TYPER_SECURITY_EXTN */ /** @todo Support dual security states. */ 2253 /*| GIC_DIST_REG_TYPER_MBIS */ /** @todo Support message-based interrupts */ 2253 2254 /*| GIC_DIST_REG_TYPER_LPIS */ /** @todo Support LPIs */ 2254 2255 | (pGicDev->fRangeSelSupport ? GIC_DIST_REG_TYPER_RSS : 0) 2255 | GIC_DIST_REG_TYPER_IDBITS_SET(16); 2256 break; 2256 | GIC_DIST_REG_TYPER_IDBITS_SET(16); /* We only support 16-bit interrupt IDs. */ 2257 if (pGicDev->fExtSpi) 2258 *puValue |= GIC_DIST_REG_TYPER_ESPI 2259 | GIC_DIST_REG_TYPER_ESPI_RANGE_SET(pGicDev->uMaxExtSpi); 2260 break; 2261 } 2257 2262 case GIC_DIST_REG_STATUSR_OFF: 2258 2263 AssertReleaseFailed(); … … 2702 2707 { 2703 2708 PGICDEV pGicDev = PDMDEVINS_2_DATA(pDevIns, PGICDEV); 2704 Assert (idRedist == pVCpu->idCpu); /* Assert for now, maybe remove function parameter later. */2709 AssertRelease(idRedist == pVCpu->idCpu); 2705 2710 switch (offReg) 2706 2711 { 2707 2712 case GIC_REDIST_REG_TYPER_OFF: 2708 2713 { 2709 PCVMCC pVM = PDMDevHlpGetVM(pDevIns);2710 *puValue = ( (pVCpu->idCpu == pVM->cCpus - 1)? GIC_REDIST_REG_TYPER_LAST : 0)2714 PCVMCC pVM = pVCpu->CTX_SUFF(pVM); 2715 *puValue = (pVCpu->idCpu == pVM->cCpus - 1 ? GIC_REDIST_REG_TYPER_LAST : 0) 2711 2716 | GIC_REDIST_REG_TYPER_CPU_NUMBER_SET(idRedist) 2712 | GIC_REDIST_REG_TYPER_CMN_LPI_AFF_SET(GIC_REDIST_REG_TYPER_CMN_LPI_AFF_ALL); 2717 | GIC_REDIST_REG_TYPER_CMN_LPI_AFF_SET(GIC_REDIST_REG_TYPER_CMN_LPI_AFF_ALL) 2718 | (pGicDev->fExtPpi ? GIC_REDIST_REG_TYPER_PPI_NUM_SET(pGicDev->uMaxExtPpi) : 0); 2719 Assert(!pGicDev->fExtPpi || pGicDev->uMaxExtPpi > 0); 2713 2720 break; 2714 2721 } -
trunk/src/VBox/VMM/VMMR3/GICR3.cpp
r108463 r108464 51 51 *********************************************************************************************************************************/ 52 52 /** GIC saved state version. */ 53 #define GIC_SAVED_STATE_VERSION 353 #define GIC_SAVED_STATE_VERSION 4 54 54 55 55 # define GIC_SYSREGRANGE(a_uFirst, a_uLast, a_szName) \ … … 90 90 pHlp->pfnPrintf(pHlp, "GIC:\n"); 91 91 pHlp->pfnPrintf(pHlp, " uArchRev = %u\n", pGicDev->uArchRev); 92 pHlp->pfnPrintf(pHlp, " uMaxSpi = %u (upto IntId %u)\n", pGicDev->uMaxSpi, 32 * (pGicDev->uMaxSpi + 1)); 93 pHlp->pfnPrintf(pHlp, " fExtSpi = %RTbool\n", pGicDev->fExtSpi); 94 pHlp->pfnPrintf(pHlp, " uMaxExtSpi = %u (upto IntId %u)\n", pGicDev->uMaxExtSpi, 95 GIC_INTID_RANGE_EXT_SPI_START - 1 + 32 * (pGicDev->uMaxExtSpi + 1)); 96 pHlp->pfnPrintf(pHlp, " fExtPpi = %RTbool\n", pGicDev->fExtPpi); 97 pHlp->pfnPrintf(pHlp, " uMaxExtPpi = %u (upto IntId %u)\n", pGicDev->uMaxExtPpi, 98 pGicDev->uMaxExtPpi == GIC_REDIST_REG_TYPER_PPI_NUM_MAX_1087 ? 1087 : GIC_INTID_RANGE_EXT_PPI_LAST); 99 pHlp->pfnPrintf(pHlp, " fRangeSelSupport = %RTbool\n", pGicDev->fRangeSelSupport); 92 100 pHlp->pfnPrintf(pHlp, " fNmi = %RTbool\n", pGicDev->fNmi); 93 pHlp->pfnPrintf(pHlp, " f RangeSelSupport = %RTbool\n", pGicDev->fRangeSelSupport);101 pHlp->pfnPrintf(pHlp, " fMbi = %RTbool\n", pGicDev->fMbi); 94 102 } 95 103 … … 358 366 pHlp->pfnSSMPutU32(pSSM, pVM->cCpus); 359 367 pHlp->pfnSSMPutU8(pSSM, pGicDev->uArchRev); 368 pHlp->pfnSSMPutU8(pSSM, pGicDev->uMaxSpi); 369 pHlp->pfnSSMPutBool(pSSM, pGicDev->fExtSpi); 370 pHlp->pfnSSMPutU8(pSSM, pGicDev->uMaxExtSpi); 371 pHlp->pfnSSMPutBool(pSSM, pGicDev->fExtPpi); 372 pHlp->pfnSSMPutU8(pSSM, pGicDev->uMaxExtPpi); 373 pHlp->pfnSSMPutBool(pSSM, pGicDev->fRangeSelSupport); 360 374 pHlp->pfnSSMPutBool(pSSM, pGicDev->fNmi); 361 /** @todo I am not sure we really benefit offering this amount of customization 362 * right now. It makes the code way more complicated (lots of extra bounds 363 * checking in lots of places we cannot really test) and it only reduces 364 * functionality rather than increase it in the end. */ 365 #if 0 366 pHlp->pfnSSMPutU16(pSSM, pGicDev->uMaxSpi); 367 pHlp->pfnSSMPutU16(pSSM, pGicDev->uMaxExtSpi); 368 pHlp->pfnSSMPutU8(pSSM, pGicDev->fPpiNum); 369 pHlp->pfnSSMPutBool(pSSM, pGicDev->fExtSpi); 370 pHlp->pfnSSMPutBool(pSSM, pGicDev->fRangeSelSupport); 371 #endif 375 pHlp->pfnSSMPutBool(pSSM, pGicDev->fMbi); 372 376 373 377 /* Distributor state. */ … … 486 490 */ 487 491 if (uVersion != GIC_SAVED_STATE_VERSION) 488 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Invalid saved-state version %u (%#x)"), uVersion, uVersion);492 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Invalid saved-state version %u"), uVersion); 489 493 490 494 /* … … 498 502 PGICDEV pGicDev = PDMDEVINS_2_DATA(pDevIns, PGICDEV); 499 503 pHlp->pfnSSMGetU8(pSSM, &pGicDev->uArchRev); 504 pHlp->pfnSSMGetU8(pSSM, &pGicDev->uMaxSpi); 505 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fExtSpi); 506 pHlp->pfnSSMGetU8(pSSM, &pGicDev->uMaxExtSpi); 507 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fExtPpi); 508 pHlp->pfnSSMGetU8(pSSM, &pGicDev->uMaxExtPpi); 509 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fRangeSelSupport); 500 510 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fNmi); 501 #if 0 502 pHlp->pfnSSMGetU16(pSSM, &pGicDev->uMaxSpi); 503 pHlp->pfnSSMGetU16(pSSM, &pGicDev->uMaxExtSpi); 504 pHlp->pfnSSMGetU8(pSSM, &pGicDev->fPpiNum); 505 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fExtSpi); 506 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fRangeSelSupport); 507 #endif 511 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fMbi); 512 513 /* Sanity checks. */ 514 if (pGicDev->uMaxSpi - 1 < 31) 515 { /* likely */ } 516 else 517 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Invalid MaxSpi, got %u expected range [1,31]"), pGicDev->uMaxSpi); 518 if (pGicDev->uMaxExtSpi <= 31) 519 { /* likely */ } 520 else 521 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Invalid MaxExtSpi, got %u expected range [0,31]"), pGicDev->uMaxExtSpi); 522 if ( pGicDev->uMaxExtPpi == GIC_REDIST_REG_TYPER_PPI_NUM_MAX_1087 523 || pGicDev->uMaxExtPpi == GIC_REDIST_REG_TYPER_PPI_NUM_MAX_1119) 524 { /* likely */ } 525 else 526 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Invalid MaxExtPpi, got %u expected range [1,2]"), pGicDev->uMaxExtPpi); 508 527 509 528 /* Distributor state. */ … … 511 530 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fIntrGroup1Enabled); 512 531 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fAffRoutingEnabled); 513 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrGroup[0], sizeof(pGicDev->bmIntrGroup));514 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrConfig[0], sizeof(pGicDev->bmIntrConfig));515 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrEnabled[0], sizeof(pGicDev->bmIntrEnabled));516 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrPending[0], sizeof(pGicDev->bmIntrPending));517 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrActive[0], sizeof(pGicDev->bmIntrActive));518 pHlp->pfnSSMGetMem(pSSM, &pGicDev->abIntrPriority[0], sizeof(pGicDev->abIntrPriority));519 pHlp->pfnSSMGetMem(pSSM, &pGicDev->au32IntrRouting[0], sizeof(pGicDev->au32IntrRouting));520 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrRoutingMode[0], sizeof(pGicDev->bmIntrRoutingMode));532 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrGroup[0], sizeof(pGicDev->bmIntrGroup)); 533 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrConfig[0], sizeof(pGicDev->bmIntrConfig)); 534 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrEnabled[0], sizeof(pGicDev->bmIntrEnabled)); 535 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrPending[0], sizeof(pGicDev->bmIntrPending)); 536 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrActive[0], sizeof(pGicDev->bmIntrActive)); 537 pHlp->pfnSSMGetMem(pSSM, &pGicDev->abIntrPriority[0], sizeof(pGicDev->abIntrPriority)); 538 pHlp->pfnSSMGetMem(pSSM, &pGicDev->au32IntrRouting[0], sizeof(pGicDev->au32IntrRouting)); 539 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrRoutingMode[0], sizeof(pGicDev->bmIntrRoutingMode)); 521 540 522 541 /* … … 663 682 N_("Configuration error: \"ArchRev\" value %u is not supported"), pGicDev->uArchRev); 664 683 665 /** @devcfgm{gic, Nmi, bool, false} 666 * Configures whether NMIs are supported (GICD_TYPER.NMI). */ 667 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "Nmi", &pGicDev->fNmi, false); 668 AssertLogRelRCReturn(rc, rc); 669 670 /** @devcfgm{gic, ExtSpi, bool, false} 671 * Configures whether extended SPIs are supported (GICD_TYPER.ESPI). */ 672 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "ExtSpi", &pGicDev->fExtSpi, false); 673 AssertLogRelRCReturn(rc, rc); 674 675 /** @devcfgm{gic, MaxSpi, uint16_t, 1} 684 /** @devcfgm{gic, MaxSpi, uint8_t, 31} 676 685 * Configures GICD_TYPER.ItLinesNumber. 677 686 * 678 * For the I NTIDrange [32,1023], configures the maximum SPI supported. Valid values687 * For the IntId range [32,1023], configures the maximum SPI supported. Valid values 679 688 * are [1,31] which equates to interrupt IDs [63,1023]. A value of 0 implies SPIs 680 689 * are not supported. We don't allow configuring this value as it's expected that 681 690 * most guests would assume support for SPIs. */ 682 691 AssertCompile(GIC_DIST_REG_TYPER_NUM_ITLINES == 31); 683 rc = pHlp->pfnCFGMQueryU 16Def(pCfg, "MaxSpi", &pGicDev->uMaxSpi, 1 /* 63 INTIDs*/);692 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "MaxSpi", &pGicDev->uMaxSpi, 31 /* Upto and incl. IntId 1023 */); 684 693 AssertLogRelRCReturn(rc, rc); 685 694 if (pGicDev->uMaxSpi - 1 < 31) … … 690 699 GIC_DIST_REG_TYPER_NUM_ITLINES); 691 700 692 /** @devcfgm{gic, MaxExtSpi, uint16_t, 31} 701 /** @devcfgm{gic, ExtSpi, bool, false} 702 * Configures whether extended SPIs supported is enabled (GICD_TYPER.ESPI). */ 703 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "ExtSpi", &pGicDev->fExtSpi, false); 704 AssertLogRelRCReturn(rc, rc); 705 706 /** @devcfgm{gic, MaxExtSpi, uint8_t, 31} 693 707 * Configures GICD_TYPER.ESPI_range. 694 708 * 695 709 * For the extended SPI range [4096,5119], configures the maximum extended SPI 696 * supported. Valid values are [0,31] which equates to extended SPI INTIDs 697 * [4096,5119]. This is ignored (set to 0) when extended SPIs are disabled. */ 710 * supported. Valid values are [0,31] which equates to extended SPI IntIds 711 * [4127,5119]. This is ignored (set to 0 in the register) when extended SPIs are 712 * disabled. */ 698 713 AssertCompile(GIC_DIST_REG_TYPER_ESPI_RANGE >> GIC_DIST_REG_TYPER_ESPI_RANGE_BIT == 31); 699 rc = pHlp->pfnCFGMQueryU 16Def(pCfg, "MaxExtSpi", &pGicDev->uMaxExtSpi, 31);714 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "MaxExtSpi", &pGicDev->uMaxExtSpi, 31); 700 715 AssertLogRelRCReturn(rc, rc); 701 716 if (pGicDev->uMaxExtSpi <= 31) … … 705 720 N_("Configuration error: \"MaxExtSpi\" must be in the range [0,31]")); 706 721 707 /** @devcfgm{gic, MaxExtPpi, uint16_t, 0} 722 /** @devcfgm{gic, ExtPpi, bool, true} 723 * Configures whether extended PPIs support is enabled. */ 724 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "ExtPpi", &pGicDev->fExtPpi, true); 725 AssertLogRelRCReturn(rc, rc); 726 727 /** @devcfgm{gic, MaxExtPpi, uint8_t, 2} 708 728 * Configures GICR_TYPER.PPInum. 709 729 * 710 * For the extended PPI INTIDs [31,1056,1119], configures the maximum extended 711 * PPI supported. Valid values are [0,1,2] which equates [31,1087,1119]. A value of 712 * 0 implies extended PPIs are not supported. */ 713 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "PpiNum", &pGicDev->fPpiNum, 0); 714 AssertLogRelRCReturn(rc, rc); 715 if (pGicDev->fPpiNum <= GIC_REDIST_REG_TYPER_PPI_NUM_MAX_1119) 730 * For the extended PPI range [1056,5119], configures the maximum extended PPI 731 * supported. Valid values are [1,2] which equates to extended PPI IntIds 732 * [1087,1119]. This is unused when extended PPIs are disabled. */ 733 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "MaxExtPpi", &pGicDev->uMaxExtPpi, 2); 734 AssertLogRelRCReturn(rc, rc); 735 if ( pGicDev->uMaxExtPpi == GIC_REDIST_REG_TYPER_PPI_NUM_MAX_1087 736 || pGicDev->uMaxExtPpi == GIC_REDIST_REG_TYPER_PPI_NUM_MAX_1119) 716 737 { /* likely */ } 717 738 else 718 739 return PDMDevHlpVMSetError(pDevIns, VERR_INVALID_PARAMETER, RT_SRC_POS, 719 N_("Configuration error: \" PpiNum\" must be in the range [0,2]"));720 721 /** @devcfgm{gic, ExtSpi, bool, false}740 N_("Configuration error: \"MaxExtPpi\" must be in the range [0,2]")); 741 742 /** @devcfgm{gic, RangeSelSupport, bool, true} 722 743 * Configures whether range-selector support is enabled (GICD_TYPER.RSS and 723 744 * ICC_CTLR_EL1.RSS). */ 724 745 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "RangeSelSupport", &pGicDev->fRangeSelSupport, true); 746 AssertLogRelRCReturn(rc, rc); 747 748 /** @devcfgm{gic, Nmi, bool, false} 749 * Configures whether non-maskable interrupts (NMIs) are supported 750 * (GICD_TYPER.NMI). */ 751 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "Nmi", &pGicDev->fNmi, false); 752 AssertLogRelRCReturn(rc, rc); 753 754 /** @devcfgm{gic, Nmi, bool, false} 755 * Configures whether message-based interrupts (MBIs) are supported 756 * (GICD_TYPER.MBIS). */ 757 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "Mbi", &pGicDev->fMbi, false); 725 758 AssertLogRelRCReturn(rc, rc); 726 759 -
trunk/src/VBox/VMM/include/GICInternal.h
r108451 r108464 168 168 /** @name Configurables. 169 169 * @{ */ 170 /** The maximum SPI supported (GICD_TYPER.ItsLinesNumber). */171 uint16_t uMaxSpi;172 /** Maximum extended SPI supported (GICR_TYPER.ESPI_range). */173 uint16_t uMaxExtSpi;174 170 /** The GIC architecture (GICD_PIDR2.ArchRev and GICR_PIDR2.ArchRev). */ 175 171 uint8_t uArchRev; 176 /** Extended PPIs supported (GICR_TYPER.PpiNum). */177 uint8_t fPpiNum;178 /** Whether extended SPIs are supported (GICD_ TYPER.ESPI). */172 /** The maximum SPI supported (GICD_TYPER.ItLinesNumber). */ 173 uint8_t uMaxSpi; 174 /** Whether extended SPIs are supported (GICD_ESPI). */ 179 175 bool fExtSpi; 176 /** The maximum extended SPI supported (GICD_TYPER.ESPI_range). */ 177 uint8_t uMaxExtSpi; 178 /** Whether extended PPIs are supported. */ 179 bool fExtPpi; 180 /** The maximum extended PPI supported (GICR_TYPER.PPInum). */ 181 uint8_t uMaxExtPpi; 182 /** Whether range-selector is supported (GICD_TYPER.RSS and ICC_CTLR_EL1.RSS). */ 183 bool fRangeSelSupport; 180 184 /** Whether NMIs are supported (GICD_TYPER.NMI). */ 181 185 bool fNmi; 182 /** Whether range-selector is supported (GICD_TYPER.RSS and ICC_CTLR_EL1.RSS). */183 bool f RangeSelSupport;186 /** Whether message-based interrupts are supported (GICD_TYPER.MBIS). */ 187 bool fMbi; 184 188 /** Alignment. */ 185 bool af Alignment0[3];189 bool afPadding[3]; 186 190 /** @} */ 187 191 } GICDEV;
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