Changeset 108479 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Mar 7, 2025 1:46:26 PM (2 months ago)
- svn:sync-xref-src-repo-rev:
- 167866
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/GICAll.cpp
r108473 r108479 2044 2044 uint8_t const idxPreemptionLevel = bIntrPriority >> 1; 2045 2045 if (fGroup0) 2046 ASMBitSet(&pGicCpu->bmActivePriorityGroup0 , idxPreemptionLevel);2046 ASMBitSet(&pGicCpu->bmActivePriorityGroup0[0], idxPreemptionLevel); 2047 2047 if (fGroup1) 2048 ASMBitSet(&pGicCpu->bmActivePriorityGroup1 , idxPreemptionLevel);2048 ASMBitSet(&pGicCpu->bmActivePriorityGroup1[0], idxPreemptionLevel); 2049 2049 2050 2050 /* Drop priority. */ … … 2055 2055 bIntrPriority, 2056 2056 pGicCpu->idxRunningPriority, pGicCpu->idxRunningPriority + 1)); 2057 pGicCpu->abRunningPriorities[++pGicCpu->idxRunningPriority] = bIntrPriority; 2057 ++pGicCpu->idxRunningPriority; 2058 pGicCpu->abRunningPriorities[pGicCpu->idxRunningPriority] = bIntrPriority; 2058 2059 } 2059 2060 else 2060 AssertReleaseMsgFailed(("Index of running 2061 AssertReleaseMsgFailed(("Index of running-interrupt priority out-of-bounds %u\n", pGicCpu->idxRunningPriority)); 2061 2062 /** @todo Duplicate block Id=E5ED12D2-088D-4525-9609-8325C02846C3 (end). */ 2062 2063 … … 2085 2086 uint8_t const idxPreemptionLevel = bIntrPriority >> 1; 2086 2087 if (fGroup0) 2087 ASMBitSet(&pGicCpu->bmActivePriorityGroup0 , idxPreemptionLevel);2088 ASMBitSet(&pGicCpu->bmActivePriorityGroup0[0], idxPreemptionLevel); 2088 2089 if (fGroup1) 2089 ASMBitSet(&pGicCpu->bmActivePriorityGroup1 , idxPreemptionLevel);2090 ASMBitSet(&pGicCpu->bmActivePriorityGroup1[0], idxPreemptionLevel); 2090 2091 2091 2092 /* Drop priority. */ 2092 Assert(pGicCpu->idxRunningPriority < RT_ELEMENTS(pGicCpu->abRunningPriorities) - 1); 2093 2094 LogFlowFunc(("Dropping interrupt priority from %u -> %u (idxRunningPriority: %u -> %u)\n", 2095 pGicCpu->abRunningPriorities[pGicCpu->idxRunningPriority], 2096 bIntrPriority, 2097 pGicCpu->idxRunningPriority, pGicCpu->idxRunningPriority + 1)); 2098 pGicCpu->abRunningPriorities[++pGicCpu->idxRunningPriority] = bIntrPriority; 2093 if (RT_LIKELY(pGicCpu->idxRunningPriority < RT_ELEMENTS(pGicCpu->abRunningPriorities) - 1)) 2094 { 2095 LogFlowFunc(("Dropping interrupt priority from %u -> %u (idxRunningPriority: %u -> %u)\n", 2096 pGicCpu->abRunningPriorities[pGicCpu->idxRunningPriority], 2097 bIntrPriority, 2098 pGicCpu->idxRunningPriority, pGicCpu->idxRunningPriority + 1)); 2099 ++pGicCpu->idxRunningPriority; 2100 pGicCpu->abRunningPriorities[pGicCpu->idxRunningPriority] = bIntrPriority; 2101 } 2102 else 2103 AssertReleaseMsgFailed(("Index of running-interrupt priority out-of-bounds %u\n", pGicCpu->idxRunningPriority)); 2099 2104 /** @todo Duplicate block Id=E5ED12D2-088D-4525-9609-8325C02846C3 (end). */ 2100 2105 … … 3796 3801 * Drop priority by restoring previous interrupt. 3797 3802 */ 3798 Assert(pGicCpu->idxRunningPriority > 0); 3799 if (RT_LIKELY(pGicCpu->idxRunningPriority > 0)) 3803 if (RT_LIKELY(pGicCpu->idxRunningPriority)) 3800 3804 { 3801 3805 LogFlowFunc(("Restoring interrupt priority from %u -> %u (idxRunningPriority: %u -> %u)\n", … … 3804 3808 pGicCpu->idxRunningPriority, pGicCpu->idxRunningPriority - 1)); 3805 3809 3806 /* Update the active priorities bitmap. */ 3807 /** @todo Double check if this is doing the right thing :/ */ 3810 /* 3811 * Clear the interrupt priority from the active priorities bitmap. 3812 * It is up to the guest to ensure that writes to EOI registers are done in the exact 3813 * reverse order of the reads from the IAR registers. 3814 * 3815 * See ARM GIC spec 4.1.1 "Physical CPU interface". 3816 */ 3808 3817 uint8_t const idxPreemptionLevel = pGicCpu->abRunningPriorities[pGicCpu->idxRunningPriority] >> 1; 3809 3818 AssertCompile(sizeof(pGicCpu->bmActivePriorityGroup1) * 8 >= 128); 3810 ASMBitClear(&pGicCpu->bmActivePriorityGroup1 , idxPreemptionLevel);3819 ASMBitClear(&pGicCpu->bmActivePriorityGroup1[0], idxPreemptionLevel); 3811 3820 3812 3821 pGicCpu->idxRunningPriority--; 3822 Assert(pGicCpu->abRunningPriorities[0] == GIC_IDLE_PRIORITY); 3813 3823 } 3824 else 3825 AssertReleaseMsgFailed(("Index of running-priority interrupt out-of-bounds %u\n", pGicCpu->idxRunningPriority)); 3814 3826 rcStrict = gicReDistUpdateIrqState(pGicDev, pVCpu); 3815 3827 #endif … … 3881 3893 RT_ZERO(pGicCpu->bmIntrGroup); 3882 3894 RT_ZERO(pGicCpu->bmIntrConfig); 3895 /* SGIs are always edge-triggered, writes to GICR_ICFGR0 are to be ignored. */ 3896 pGicCpu->bmIntrConfig[0] = 0xaaaaaaaa; 3883 3897 RT_ZERO(pGicCpu->bmIntrEnabled); 3884 3898 RT_ZERO(pGicCpu->bmIntrPending); … … 3886 3900 RT_ZERO(pGicCpu->abIntrPriority); 3887 3901 3888 /* SGIs are always edge-triggered, writes to GICR_ICFGR0 are to be ignored. */3889 pGicCpu->bmIntrConfig[0] = 0xaaaaaaaa;3890 3891 3902 pGicCpu->uIccCtlr = ARMV8_ICC_CTLR_EL1_AARCH64_PMHE 3892 3903 | ARMV8_ICC_CTLR_EL1_AARCH64_PRIBITS_SET(4) … … 3894 3905 | (pGicDev->fRangeSelSupport ? ARMV8_ICC_CTLR_EL1_AARCH64_RSS : 0); 3895 3906 3907 pGicCpu->bIntrPriorityMask = 0; /* Means no interrupt gets through to the PE. */ 3908 pGicCpu->idxRunningPriority = 0; 3896 3909 memset((void *)&pGicCpu->abRunningPriorities[0], 0xff, sizeof(pGicCpu->abRunningPriorities)); 3897 pGicCpu->idxRunningPriority = 0; 3898 pGicCpu->bIntrPriorityMask = 0; /* Means no interrupt gets through to the PE. */ 3910 RT_ZERO(pGicCpu->bmActivePriorityGroup0); 3911 RT_ZERO(pGicCpu->bmActivePriorityGroup1); 3912 pGicCpu->bBinaryPtGroup0 = 0; 3913 pGicCpu->bBinaryPtGroup1 = 0; 3899 3914 pGicCpu->fIntrGroup0Enabled = false; 3900 3915 pGicCpu->fIntrGroup1Enabled = false; 3901 3902 /* The binary point register are undefined on reset, initialized3903 with arbitrarily chosen values in our implementation. */3904 pGicCpu->bBinaryPtGroup0 = 0;3905 pGicCpu->bBinaryPtGroup1 = 0;3906 3916 } 3907 3917 -
trunk/src/VBox/VMM/VMMR3/GICR3.cpp
r108472 r108479 51 51 *********************************************************************************************************************************/ 52 52 /** GIC saved state version. */ 53 #define GIC_SAVED_STATE_VERSION 453 #define GIC_SAVED_STATE_VERSION 5 54 54 55 55 # define GIC_SYSREGRANGE(a_uFirst, a_uLast, a_szName) \ … … 145 145 pHlp->pfnPrintf(pHlp, " IntId[%4u..%-4u] = %3u %3u %3u %3u %3u %3u %3u %3u" 146 146 " IntId[%4u..%-4u] = %3u %3u %3u %3u %3u %3u %3u %3u\n", 147 gicDistGetIntIdFromIndex(i), gicDistGetIntIdFromIndex(i + 7),148 pGicDev->abIntrPriority[i], pGicDev->abIntrPriority[i + 1],149 pGicDev->abIntrPriority[i + 2], pGicDev->abIntrPriority[i + 3],150 pGicDev->abIntrPriority[i + 4], pGicDev->abIntrPriority[i + 5],151 pGicDev->abIntrPriority[i + 6], pGicDev->abIntrPriority[i + 7],152 gicDistGetIntIdFromIndex(i + 8), gicDistGetIntIdFromIndex(i + 15),153 pGicDev->abIntrPriority[i + 8], pGicDev->abIntrPriority[i + 9],154 pGicDev->abIntrPriority[i + 10], pGicDev->abIntrPriority[i + 11],155 pGicDev->abIntrPriority[i + 12], pGicDev->abIntrPriority[i + 13],156 pGicDev->abIntrPriority[i + 14], pGicDev->abIntrPriority[i + 15]);147 gicDistGetIntIdFromIndex(i), gicDistGetIntIdFromIndex(i + 7), 148 pGicDev->abIntrPriority[i], pGicDev->abIntrPriority[i + 1], 149 pGicDev->abIntrPriority[i + 2], pGicDev->abIntrPriority[i + 3], 150 pGicDev->abIntrPriority[i + 4], pGicDev->abIntrPriority[i + 5], 151 pGicDev->abIntrPriority[i + 6], pGicDev->abIntrPriority[i + 7], 152 gicDistGetIntIdFromIndex(i + 8), gicDistGetIntIdFromIndex(i + 15), 153 pGicDev->abIntrPriority[i + 8], pGicDev->abIntrPriority[i + 9], 154 pGicDev->abIntrPriority[i + 10], pGicDev->abIntrPriority[i + 11], 155 pGicDev->abIntrPriority[i + 12], pGicDev->abIntrPriority[i + 13], 156 pGicDev->abIntrPriority[i + 14], pGicDev->abIntrPriority[i + 15]); 157 157 } 158 158 … … 166 166 pHlp->pfnPrintf(pHlp, " IntId[%4u..%-4u] = %3u %3u %3u %3u %3u %3u %3u %3u" 167 167 " IntId[%4u..%-4u] = %3u %3u %3u %3u %3u %3u %3u %3u\n", 168 gicDistGetIntIdFromIndex(i), gicDistGetIntIdFromIndex(i + 7),169 pGicDev->au32IntrRouting[i], pGicDev->au32IntrRouting[i + 1],170 pGicDev->au32IntrRouting[i + 2], pGicDev->au32IntrRouting[i + 3],171 pGicDev->au32IntrRouting[i + 4], pGicDev->au32IntrRouting[i + 5],172 pGicDev->au32IntrRouting[i + 6], pGicDev->au32IntrRouting[i + 7],173 gicDistGetIntIdFromIndex(i + 8), gicDistGetIntIdFromIndex(i + 15),174 pGicDev->au32IntrRouting[i + 8], pGicDev->au32IntrRouting[i + 9],175 pGicDev->au32IntrRouting[i + 10], pGicDev->au32IntrRouting[i + 11],176 pGicDev->au32IntrRouting[i + 12], pGicDev->au32IntrRouting[i + 13],177 pGicDev->au32IntrRouting[i + 14], pGicDev->au32IntrRouting[i + 15]);168 gicDistGetIntIdFromIndex(i), gicDistGetIntIdFromIndex(i + 7), 169 pGicDev->au32IntrRouting[i], pGicDev->au32IntrRouting[i + 1], 170 pGicDev->au32IntrRouting[i + 2], pGicDev->au32IntrRouting[i + 3], 171 pGicDev->au32IntrRouting[i + 4], pGicDev->au32IntrRouting[i + 5], 172 pGicDev->au32IntrRouting[i + 6], pGicDev->au32IntrRouting[i + 7], 173 gicDistGetIntIdFromIndex(i + 8), gicDistGetIntIdFromIndex(i + 15), 174 pGicDev->au32IntrRouting[i + 8], pGicDev->au32IntrRouting[i + 9], 175 pGicDev->au32IntrRouting[i + 10], pGicDev->au32IntrRouting[i + 11], 176 pGicDev->au32IntrRouting[i + 12], pGicDev->au32IntrRouting[i + 13], 177 pGicDev->au32IntrRouting[i + 14], pGicDev->au32IntrRouting[i + 15]); 178 178 } 179 179 … … 208 208 pHlp->pfnPrintf(pHlp, " bmIntrActive[0..2] = %#010x %#010x %#010x\n", pGicCpu->bmIntrActive[0], pGicCpu->bmIntrActive[1], pGicCpu->bmIntrActive[2]); 209 209 210 uint32_t const cPriorities = RT_ELEMENTS(pGicCpu->abIntrPriority); 211 AssertCompile(!(cPriorities % 16)); 212 pHlp->pfnPrintf(pHlp, " Interrupt priorities:\n"); 213 for (uint32_t i = 0; i < cPriorities; i += 16) 214 pHlp->pfnPrintf(pHlp, " IntId[%4u..%-4u] = %3u %3u %3u %3u %3u %3u %3u %3u" 215 " IntId[%4u..%-4u] = %3u %3u %3u %3u %3u %3u %3u %3u\n", 216 gicReDistGetIntIdFromIndex(i), gicReDistGetIntIdFromIndex(i + 7), 217 pGicCpu->abIntrPriority[i], pGicCpu->abIntrPriority[i + 1], 218 pGicCpu->abIntrPriority[i + 2], pGicCpu->abIntrPriority[i + 3], 219 pGicCpu->abIntrPriority[i + 4], pGicCpu->abIntrPriority[i + 5], 220 pGicCpu->abIntrPriority[i + 6], pGicCpu->abIntrPriority[i + 7], 221 gicReDistGetIntIdFromIndex(i + 8), gicReDistGetIntIdFromIndex(i + 15), 222 pGicCpu->abIntrPriority[i + 8], pGicCpu->abIntrPriority[i + 9], 223 pGicCpu->abIntrPriority[i + 10], pGicCpu->abIntrPriority[i + 11], 224 pGicCpu->abIntrPriority[i + 12], pGicCpu->abIntrPriority[i + 13], 225 pGicCpu->abIntrPriority[i + 14], pGicCpu->abIntrPriority[i + 15]); 226 227 pHlp->pfnPrintf(pHlp, "\nVCPU[%u] ICC state:\n", pVCpu->idCpu); 210 /* Interrupt priorities. */ 211 { 212 uint32_t const cPriorities = RT_ELEMENTS(pGicCpu->abIntrPriority); 213 AssertCompile(!(cPriorities % 16)); 214 pHlp->pfnPrintf(pHlp, " Interrupt priorities:\n"); 215 for (uint32_t i = 0; i < cPriorities; i += 16) 216 pHlp->pfnPrintf(pHlp, " IntId[%4u..%-4u] = %3u %3u %3u %3u %3u %3u %3u %3u" 217 " IntId[%4u..%-4u] = %3u %3u %3u %3u %3u %3u %3u %3u\n", 218 gicReDistGetIntIdFromIndex(i), gicReDistGetIntIdFromIndex(i + 7), 219 pGicCpu->abIntrPriority[i], pGicCpu->abIntrPriority[i + 1], 220 pGicCpu->abIntrPriority[i + 2], pGicCpu->abIntrPriority[i + 3], 221 pGicCpu->abIntrPriority[i + 4], pGicCpu->abIntrPriority[i + 5], 222 pGicCpu->abIntrPriority[i + 6], pGicCpu->abIntrPriority[i + 7], 223 gicReDistGetIntIdFromIndex(i + 8), gicReDistGetIntIdFromIndex(i + 15), 224 pGicCpu->abIntrPriority[i + 8], pGicCpu->abIntrPriority[i + 9], 225 pGicCpu->abIntrPriority[i + 10], pGicCpu->abIntrPriority[i + 11], 226 pGicCpu->abIntrPriority[i + 12], pGicCpu->abIntrPriority[i + 13], 227 pGicCpu->abIntrPriority[i + 14], pGicCpu->abIntrPriority[i + 15]); 228 } 229 230 pHlp->pfnPrintf(pHlp, "\nVCPU[%u] ICC system register state:\n", pVCpu->idCpu); 228 231 pHlp->pfnPrintf(pHlp, " uIccCtlr = %#RX64\n", pGicCpu->uIccCtlr); 229 232 pHlp->pfnPrintf(pHlp, " fIntrGroup0Enabled = %RTbool\n", pGicCpu->fIntrGroup0Enabled); … … 233 236 pHlp->pfnPrintf(pHlp, " idxRunningPriority = %#x\n", pGicCpu->idxRunningPriority); 234 237 pHlp->pfnPrintf(pHlp, " Running priority = %#x\n", pGicCpu->abRunningPriorities[pGicCpu->idxRunningPriority]); 238 239 /* Running interrupt priorities. */ 240 { 241 uint32_t const cPriorities = RT_ELEMENTS(pGicCpu->abRunningPriorities); 242 AssertCompile(!(cPriorities % 16)); 243 pHlp->pfnPrintf(pHlp, " Running-interrupt priorities:\n"); 244 for (uint32_t i = 0; i < cPriorities; i += 16) 245 pHlp->pfnPrintf(pHlp, " [%3u..%-3u] = %3u %3u %3u %3u %3u %3u %3u %3u" 246 " [%3u..%-3u] = %3u %3u %3u %3u %3u %3u %3u %3u\n", 247 i, i + 7, 248 pGicCpu->abRunningPriorities[i], pGicCpu->abRunningPriorities[i + 1], 249 pGicCpu->abRunningPriorities[i + 2], pGicCpu->abRunningPriorities[i + 3], 250 pGicCpu->abRunningPriorities[i + 4], pGicCpu->abRunningPriorities[i + 5], 251 pGicCpu->abRunningPriorities[i + 6], pGicCpu->abRunningPriorities[i + 7], 252 i + 8, i + 15, 253 pGicCpu->abRunningPriorities[i + 8], pGicCpu->abRunningPriorities[i + 9], 254 pGicCpu->abRunningPriorities[i + 10], pGicCpu->abRunningPriorities[i + 11], 255 pGicCpu->abRunningPriorities[i + 12], pGicCpu->abRunningPriorities[i + 13], 256 pGicCpu->abRunningPriorities[i + 14], pGicCpu->abRunningPriorities[i + 15]); 257 } 258 259 AssertCompile(RT_ELEMENTS(pGicCpu->bmActivePriorityGroup0) >= 4); 260 pHlp->pfnPrintf(pHlp, " Active-interrupt priorities Group 0:\n"); 261 pHlp->pfnPrintf(pHlp, " [0..3] = %#010x %#010x %#010x %#010x\n", 262 pGicCpu->bmActivePriorityGroup0[0], pGicCpu->bmActivePriorityGroup0[1], 263 pGicCpu->bmActivePriorityGroup0[2], pGicCpu->bmActivePriorityGroup0[3]); 264 AssertCompile(RT_ELEMENTS(pGicCpu->bmActivePriorityGroup1) >= 4); 265 pHlp->pfnPrintf(pHlp, " Active-interrupt priorities Group 1:\n"); 266 pHlp->pfnPrintf(pHlp, " [0..3] = %#010x %#010x %#010x %#010x\n", 267 pGicCpu->bmActivePriorityGroup1[0], pGicCpu->bmActivePriorityGroup1[1], 268 pGicCpu->bmActivePriorityGroup1[2], pGicCpu->bmActivePriorityGroup1[3]); 235 269 } 236 270 … … 405 439 406 440 /* ICC system register state. */ 407 pHlp->pfnSSMPutU64(pSSM, pGicCpu->uIccCtlr); 441 pHlp->pfnSSMPutU64(pSSM, pGicCpu->uIccCtlr); 442 pHlp->pfnSSMPutU8(pSSM, pGicCpu->bIntrPriorityMask); 443 pHlp->pfnSSMPutU8(pSSM, pGicCpu->idxRunningPriority); 408 444 pHlp->pfnSSMPutMem(pSSM, &pGicCpu->abRunningPriorities[0], sizeof(pGicCpu->abRunningPriorities)); 409 pHlp->pfnSSMPut U8(pSSM, pGicCpu->idxRunningPriority);410 pHlp->pfnSSMPut U8(pSSM, pGicCpu->bIntrPriorityMask);445 pHlp->pfnSSMPutMem(pSSM, &pGicCpu->bmActivePriorityGroup0[0], sizeof(pGicCpu->bmActivePriorityGroup0)); 446 pHlp->pfnSSMPutMem(pSSM, &pGicCpu->bmActivePriorityGroup1[0], sizeof(pGicCpu->bmActivePriorityGroup1)); 411 447 pHlp->pfnSSMPutU8(pSSM, pGicCpu->bBinaryPtGroup0); 412 448 pHlp->pfnSSMPutU8(pSSM, pGicCpu->bBinaryPtGroup1); … … 511 547 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fMbi); 512 548 513 /* Sanity checks. */ 549 /* Distributor state. */ 550 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fIntrGroup0Enabled); 551 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fIntrGroup1Enabled); 552 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fAffRoutingEnabled); 553 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrGroup[0], sizeof(pGicDev->bmIntrGroup)); 554 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrConfig[0], sizeof(pGicDev->bmIntrConfig)); 555 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrEnabled[0], sizeof(pGicDev->bmIntrEnabled)); 556 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrPending[0], sizeof(pGicDev->bmIntrPending)); 557 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrActive[0], sizeof(pGicDev->bmIntrActive)); 558 pHlp->pfnSSMGetMem(pSSM, &pGicDev->abIntrPriority[0], sizeof(pGicDev->abIntrPriority)); 559 pHlp->pfnSSMGetMem(pSSM, &pGicDev->au32IntrRouting[0], sizeof(pGicDev->au32IntrRouting)); 560 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrRoutingMode[0], sizeof(pGicDev->bmIntrRoutingMode)); 561 562 /* 563 * Load per-VCPU data. 564 */ 565 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++) 566 { 567 PGICCPU pGicCpu = VMCPU_TO_GICCPU(pVM->apCpusR3[idCpu]); 568 Assert(pGicCpu); 569 570 /* Redistributor state. */ 571 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->bmIntrGroup[0], sizeof(pGicCpu->bmIntrGroup)); 572 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->bmIntrConfig[0], sizeof(pGicCpu->bmIntrConfig)); 573 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->bmIntrEnabled[0], sizeof(pGicCpu->bmIntrEnabled)); 574 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->bmIntrPending[0], sizeof(pGicCpu->bmIntrPending)); 575 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->bmIntrActive[0], sizeof(pGicCpu->bmIntrActive)); 576 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->abIntrPriority[0], sizeof(pGicCpu->abIntrPriority)); 577 578 /* ICC system register state. */ 579 pHlp->pfnSSMGetU64(pSSM, &pGicCpu->uIccCtlr); 580 pHlp->pfnSSMGetU8(pSSM, &pGicCpu->bIntrPriorityMask); 581 pHlp->pfnSSMGetU8(pSSM, &pGicCpu->idxRunningPriority); 582 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->abRunningPriorities[0], sizeof(pGicCpu->abRunningPriorities)); 583 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->bmActivePriorityGroup0[0], sizeof(pGicCpu->bmActivePriorityGroup0)); 584 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->bmActivePriorityGroup1[0], sizeof(pGicCpu->bmActivePriorityGroup1)); 585 pHlp->pfnSSMGetU8(pSSM, &pGicCpu->bBinaryPtGroup0); 586 pHlp->pfnSSMGetU8(pSSM, &pGicCpu->bBinaryPtGroup1); 587 pHlp->pfnSSMGetBool(pSSM, &pGicCpu->fIntrGroup0Enabled); 588 pHlp->pfnSSMGetBool(pSSM, &pGicCpu->fIntrGroup1Enabled); 589 } 590 591 /* 592 * Check that we're still good wrt restored data. 593 */ 594 int rc = pHlp->pfnSSMHandleGetStatus(pSSM); 595 AssertRCReturn(rc, rc); 596 597 uint32_t uMarker = 0; 598 rc = pHlp->pfnSSMGetU32(pSSM, &uMarker); 599 AssertRCReturn(rc, rc); 600 if (uMarker == UINT32_MAX) 601 { /* likely */ } 602 else 603 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch: Marker: got=%u expected=%u"), uMarker, UINT32_MAX); 604 605 /* 606 * Finally, perform sanity checks. 607 */ 514 608 if (pGicDev->uMaxSpi - 1 < 31) 515 609 { /* likely */ } … … 526 620 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Invalid MaxExtPpi, got %u expected range [1,2]"), pGicDev->uMaxExtPpi); 527 621 528 /* Distributor state. */529 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fIntrGroup0Enabled);530 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fIntrGroup1Enabled);531 pHlp->pfnSSMGetBool(pSSM, &pGicDev->fAffRoutingEnabled);532 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrGroup[0], sizeof(pGicDev->bmIntrGroup));533 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrConfig[0], sizeof(pGicDev->bmIntrConfig));534 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrEnabled[0], sizeof(pGicDev->bmIntrEnabled));535 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrPending[0], sizeof(pGicDev->bmIntrPending));536 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrActive[0], sizeof(pGicDev->bmIntrActive));537 pHlp->pfnSSMGetMem(pSSM, &pGicDev->abIntrPriority[0], sizeof(pGicDev->abIntrPriority));538 pHlp->pfnSSMGetMem(pSSM, &pGicDev->au32IntrRouting[0], sizeof(pGicDev->au32IntrRouting));539 pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmIntrRoutingMode[0], sizeof(pGicDev->bmIntrRoutingMode));540 541 /*542 * Load per-VCPU data.543 */544 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)545 {546 PGICCPU pGicCpu = VMCPU_TO_GICCPU(pVM->apCpusR3[idCpu]);547 Assert(pGicCpu);548 549 /* Redistributor state. */550 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->bmIntrGroup[0], sizeof(pGicCpu->bmIntrGroup));551 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->bmIntrConfig[0], sizeof(pGicCpu->bmIntrConfig));552 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->bmIntrEnabled[0], sizeof(pGicCpu->bmIntrEnabled));553 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->bmIntrPending[0], sizeof(pGicCpu->bmIntrPending));554 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->bmIntrActive[0], sizeof(pGicCpu->bmIntrActive));555 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->abIntrPriority[0], sizeof(pGicCpu->abIntrPriority));556 557 /* ICC system register state. */558 pHlp->pfnSSMGetU64(pSSM, &pGicCpu->uIccCtlr);559 pHlp->pfnSSMGetMem(pSSM, &pGicCpu->abRunningPriorities[0], sizeof(pGicCpu->abRunningPriorities));560 pHlp->pfnSSMGetU8(pSSM, &pGicCpu->idxRunningPriority);561 pHlp->pfnSSMGetU8(pSSM, &pGicCpu->bIntrPriorityMask);562 pHlp->pfnSSMGetU8(pSSM, &pGicCpu->bBinaryPtGroup0);563 pHlp->pfnSSMGetU8(pSSM, &pGicCpu->bBinaryPtGroup1);564 pHlp->pfnSSMGetBool(pSSM, &pGicCpu->fIntrGroup0Enabled);565 pHlp->pfnSSMGetBool(pSSM, &pGicCpu->fIntrGroup1Enabled);566 }567 568 /*569 * Check that we're still good wrt restored data.570 */571 int rc = pHlp->pfnSSMHandleGetStatus(pSSM);572 AssertRCReturn(rc, rc);573 574 uint32_t uMarker = 0;575 rc = pHlp->pfnSSMGetU32(pSSM, &uMarker);576 AssertRCReturn(rc, rc);577 if (uMarker == UINT32_MAX)578 { /* likely */ }579 else580 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch: Marker: got=%u expected=%u"), uMarker, UINT32_MAX);581 622 return rc; 582 623 #undef GIC_SSM_GET_ARRAY
Note:
See TracChangeset
for help on using the changeset viewer.