Changeset 108480 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Mar 7, 2025 2:09:31 PM (2 months ago)
- svn:sync-xref-src-repo-rev:
- 167867
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/GICAll.cpp
r108479 r108480 3200 3200 PGICDEV pGicDev = PDMDEVINS_2_DATA(pDevIns, PGICDEV); 3201 3201 3202 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 3203 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 3202 #ifdef VBOX_WITH_STATISTICS 3203 PVMCPU pVCpu = VMMGetCpu(pVM); 3204 if (pVCpu) 3205 STAM_COUNTER_INC(&pVCpu->gic.s.CTX_SUFF_Z(StatSetSpi)); 3206 #endif 3204 3207 3205 3208 #if 0 … … 3216 3219 3217 3220 Assert(idxIntr >= GIC_INTID_RANGE_SPI_START); 3218 AssertMsgReturnStmt(idxIntr < sizeof(pGicDev->bmIntrPending) * 8, 3219 ("out-of-range SPI interrupt ID %RU32 (%RU32)\n", uIntId, uSpiIntId), 3220 PDMDevHlpCritSectLeave(pDevIns, pDevIns->pCritSectRoR3), 3221 VERR_INVALID_PARAMETER); 3221 AssertMsgReturn(idxIntr < sizeof(pGicDev->bmIntrPending) * 8, 3222 ("out-of-range SPI interrupt ID %RU32 (%RU32)\n", uIntId, uSpiIntId), 3223 VERR_INVALID_PARAMETER); 3224 3225 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 3226 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 3222 3227 3223 3228 /* Update the interrupt pending state. */ … … 3226 3231 else 3227 3232 ASMBitClear(&pGicDev->bmIntrPending[0], idxIntr); 3233 3228 3234 int const rc = VBOXSTRICTRC_VAL(gicDistUpdateIrqState(pVM, pGicDev)); 3229 3235 #endif … … 3244 3250 PCGICDEV pGicDev = PDMDEVINS_2_DATA(pDevIns, PCGICDEV); 3245 3251 PGICCPU pGicCpu = VMCPU_TO_GICCPU(pVCpu); 3246 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED);3247 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock);3248 3252 3249 3253 #if 0 … … 3255 3259 3256 3260 Assert(idxIntr >= GIC_INTID_RANGE_PPI_START); 3257 AssertMsgReturnStmt(idxIntr < sizeof(pGicCpu->bmIntrPending) * 8, 3258 ("out-of-range PPI interrupt ID %RU32 (%RU32)\n", uIntId, uPpiIntId), 3259 PDMDevHlpCritSectLeave(pDevIns, pDevIns->pCritSectRoR3), 3260 VERR_INVALID_PARAMETER); 3261 AssertMsgReturn(idxIntr < sizeof(pGicCpu->bmIntrPending) * 8, 3262 ("out-of-range PPI interrupt ID %RU32 (%RU32)\n", uIntId, uPpiIntId), 3263 VERR_INVALID_PARAMETER); 3264 3265 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED); 3266 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); 3261 3267 3262 3268 /* Update the interrupt pending state. */ … … 3265 3271 else 3266 3272 ASMBitClear(&pGicCpu->bmIntrPending[0], idxIntr); 3273 3267 3274 int const rc = VBOXSTRICTRC_VAL(gicReDistUpdateIrqState(pGicDev, pVCpu)); 3268 3275 #endif 3269 3276 3270 3277 PDMDevHlpCritSectLeave(pDevIns, pDevIns->pCritSectRoR3); 3271 3272 3278 return rc; 3273 3279 } … … 3397 3403 VMCPU_ASSERT_EMT(pVCpu); 3398 3404 Assert(pu64Value); 3405 3406 STAM_COUNTER_INC(&pVCpu->gic.s.CTX_SUFF_Z(StatSysRegRead)); 3399 3407 3400 3408 *pu64Value = 0; … … 3598 3606 VMCPU_ASSERT_EMT(pVCpu); 3599 3607 LogFlowFunc(("pVCpu=%p u32Reg=%#x{%s} u64Value=%RX64\n", pVCpu, u32Reg, gicIccGetRegDescription(u32Reg), u64Value)); 3608 3609 STAM_COUNTER_INC(&pVCpu->gic.s.CTX_SUFF_Z(StatSysRegWrite)); 3600 3610 3601 3611 PPDMDEVINS pDevIns = VMCPU_TO_DEVINS(pVCpu); -
trunk/src/VBox/VMM/VMMR3/GICR3.cpp
r108479 r108480 884 884 GIC_REG_COUNTER(&pGicCpu->StatSysRegReadR3, "%u/R3/SysRegRead", "Number of GIC system register reads in R3."); 885 885 GIC_REG_COUNTER(&pGicCpu->StatSysRegWriteR3, "%u/R3/SysRegWrite", "Number of GIC system register writes in R3."); 886 GIC_REG_COUNTER(&pGicCpu->StatSetSpiR3, "%u/R3/SetSpi", "Number of GIC set SPI callbacks in R3."); 887 GIC_REG_COUNTER(&pGicCpu->StatSetPpiR3, "%u/R3/SetPpi", "Number of GIC set PPI callbacks in R3."); 886 888 } 887 889 #endif -
trunk/src/VBox/VMM/include/GICInternal.h
r108474 r108480 290 290 /** Number of MSR writes in R3. */ 291 291 STAMCOUNTER StatSysRegWriteR3; 292 /** Number of set SPI callbacks. */ 293 STAMCOUNTER StatSetSpiR3; 294 /** Number of set PPI callbacks. */ 295 STAMCOUNTER StatSetPpiR3; 292 296 293 297 # if 0 /* No R0 for now. */
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