Changeset 108716 in vbox

Timestamp:

Mar 24, 2025 12:43:36 PM (3 weeks ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

168133

Message:

VMM/GIC: bugref:10877 ITS bits, trying guest to probe/enable the ITS. [work-in-progress]

Location:

trunk

Files:

• include/VBox/vmm/pdmgic.h (modified) (1 diff)
• src/VBox/VMM/VMMAll/GICAll.cpp (modified) (5 diffs)
• src/VBox/VMM/VMMAll/GITSAll.cpp (modified) (2 diffs)
• src/VBox/VMM/VMMR3/GICR3.cpp (modified) (13 diffs)
• src/VBox/VMM/include/GICInternal.h (modified) (1 diff)

trunk/include/VBox/vmm/pdmgic.h

@@ -127 +127 @@
      *                      Cannot be NIL_PCIBDF.
      * @param   pMsi        The MSI to send.
-     * @param   uEventId    TODO
+     * @param   uEventId    The event ID specified by the device.
      * @param   uTagSrc     The IRQ tag and source (for tracing).
      */

trunk/src/VBox/VMM/VMMAll/GICAll.cpp

@@ -2012 +2012 @@
             Assert(pGicDev->fAffRoutingEnabled);
             *puValue = GIC_DIST_REG_TYPER_NUM_ITLINES_SET(pGicDev->uMaxSpi)
-                     | GIC_DIST_REG_TYPER_NUM_PES_SET(0)      /* Affinity routing is always enabled, hence this MBZ. */
-                     /*| GIC_DIST_REG_TYPER_NMI*/             /** @todo Support non-maskable interrupts */
-                     /*| GIC_DIST_REG_TYPER_SECURITY_EXTN*/   /** @todo Support dual security states. */
+                     | GIC_DIST_REG_TYPER_NUM_PES_SET(0)             /* Affinity routing is always enabled, hence this MBZ. */
+                     /*| GIC_DIST_REG_TYPER_NMI*/                    /** @todo Support non-maskable interrupts */
+                     /*| GIC_DIST_REG_TYPER_SECURITY_EXTN*/          /** @todo Support dual security states. */
                      | (pGicDev->fMbi ? GIC_DIST_REG_TYPER_MBIS : 0)
-                     /*| GIC_DIST_REG_TYPER_LPIS*/            /** @todo Support LPIs */
                      | (pGicDev->fRangeSel ? GIC_DIST_REG_TYPER_RSS : 0)
-                     | GIC_DIST_REG_TYPER_IDBITS_SET(16)      /* We only support 16-bit interrupt IDs. */
+                     | GIC_DIST_REG_TYPER_IDBITS_SET(16)             /* We only support 16-bit interrupt IDs. */
                      | (pGicDev->fAff3Levels ? GIC_DIST_REG_TYPER_A3V : 0);
             if (pGicDev->fExtSpi)
                 *puValue |= GIC_DIST_REG_TYPER_ESPI
                          |  GIC_DIST_REG_TYPER_ESPI_RANGE_SET(pGicDev->uMaxExtSpi);
+            if (pGicDev->fLpi)
+            {
+                Assert(pGicDev->uMaxLpi - 2 < 13);
+                Assert(GIC_INTID_RANGE_LPI_START + (UINT32_C(2) << pGicDev->uMaxLpi) <= UINT16_MAX);
+                *puValue |= GIC_DIST_REG_TYPER_LPIS
+                         |  GIC_DIST_REG_TYPER_NUM_LPIS_SET(pGicDev->uMaxLpi);
+            }
             break;
         }
@@ -2319 +2325 @@
                      | GIC_REDIST_REG_TYPER_CPU_NUMBER_SET(idRedist)
                      | GIC_REDIST_REG_TYPER_CMN_LPI_AFF_SET(GIC_REDIST_REG_TYPER_CMN_LPI_AFF_ALL)
-                     | (pGicDev->fExtPpi ? GIC_REDIST_REG_TYPER_PPI_NUM_SET(pGicDev->uMaxExtPpi) : 0);
+                     | (pGicDev->fExtPpi ? GIC_REDIST_REG_TYPER_PPI_NUM_SET(pGicDev->uMaxExtPpi) : 0)
+                     | (pGicDev->fLpi    ? GIC_REDIST_REG_TYPER_PLPIS : 0);
             Assert(!pGicDev->fExtPpi || pGicDev->uMaxExtPpi > 0);
             break;
@@ -3071 +3078 @@
 {
     LogFlowFunc(("\n"));
-    PGICDEV pGicDev = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
+    PGICDEV  pGicDev  = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
+    PGITSDEV pGitsDev = &pGicDev->Gits;
+
     RT_ZERO(pGicDev->bmIntrGroup);
     RT_ZERO(pGicDev->bmIntrConfig);
@@ -3083 +3092 @@
     pGicDev->fIntrGroup1Enabled = false;
     pGicDev->fAffRoutingEnabled = true; /* GICv2 backwards compatibility is not implemented, so this is RA1/WI. */
+    RT_ZERO(pGicDev->bmLpiPending);
+    RT_ZERO(pGicDev->abLpiConfig);
+    gitsInit(pGitsDev);
 }
 
@@ -3135 +3147 @@
 {
     LogFlowFunc(("\n"));
-    PGICDEV  pGicDev  = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
-    PGITSDEV pGitsDev = &pGicDev->Gits;
-
     gicInit(pDevIns);
-    gitsInit(pGitsDev);
 }
 

trunk/src/VBox/VMM/VMMAll/GITSAll.cpp

@@ -135 +135 @@
 {
     Log4Func(("\n"));
-
     pGitsDev->fEnabled              = false;
     pGitsDev->fUnmappedMsiReporting = false;
@@ -147 +146 @@
 {
     RT_NOREF(pGitsDev, pHlp, pszArgs);
+    /** @todo Debug info dump. */
 }
 #endif /* IN_RING3 */

trunk/src/VBox/VMM/VMMR3/GICR3.cpp

@@ -51 +51 @@
 *********************************************************************************************************************************/
 /** GIC saved state version. */
-#define GIC_SAVED_STATE_VERSION                     6
+#define GIC_SAVED_STATE_VERSION                     7
 
 # define GIC_SYSREGRANGE(a_uFirst, a_uLast, a_szName) \
@@ -102 +102 @@
     pHlp->pfnPrintf(pHlp, "  fMbi             = %RTbool\n", pGicDev->fMbi);
     pHlp->pfnPrintf(pHlp, "  fAff3Levels      = %RTbool\n", pGicDev->fAff3Levels);
+    pHlp->pfnPrintf(pHlp, "  fLpi             = %RTbool\n", pGicDev->fLpi);
 }
 
@@ -319 +320 @@
     pHlp->pfnSSMPutBool(pSSM, pGicDev->fMbi);
     pHlp->pfnSSMPutBool(pSSM, pGicDev->fAff3Levels);
+    pHlp->pfnSSMPutBool(pSSM, pGicDev->fLpi);
 
     /* Distributor state. */
@@ -333 +335 @@
     pHlp->pfnSSMPutMem(pSSM,  &pGicDev->bmIntrRoutingMode[0], sizeof(pGicDev->bmIntrRoutingMode));
 
+    /* We store the size followed by the data because we currently do not support the full LPI range. */
+    pHlp->pfnSSMPutU32(pSSM,  sizeof(pGicDev->abLpiConfig));
+    pHlp->pfnSSMPutMem(pSSM,  &pGicDev->abLpiConfig[0],       sizeof(pGicDev->abLpiConfig));
+    pHlp->pfnSSMPutU32(pSSM,  sizeof(pGicDev->bmLpiPending));
+    pHlp->pfnSSMPutMem(pSSM,  &pGicDev->bmLpiPending[0],      sizeof(pGicDev->bmLpiPending));
+
+    /** @todo GITS data. */
+
     /*
      * Save per-VCPU data.
@@ -403 +413 @@
     pHlp->pfnSSMGetBool(pSSM, &pGicDev->fMbi);
     pHlp->pfnSSMGetBool(pSSM, &pGicDev->fAff3Levels);
+    pHlp->pfnSSMGetBool(pSSM, &pGicDev->fLpi);
 
     /* Distributor state. */
@@ -417 +428 @@
     pHlp->pfnSSMGetMem(pSSM,  &pGicDev->bmIntrRoutingMode[0], sizeof(pGicDev->bmIntrRoutingMode));
 
+    /* LPI config. */
+    {
+        uint32_t cbData = 0;
+        int const rc = pHlp->pfnSSMGetU32(pSSM, &cbData);
+        AssertRCReturn(rc, rc);
+        if (cbData <= sizeof(pGicDev->abLpiConfig))
+            pHlp->pfnSSMGetMem(pSSM, &pGicDev->abLpiConfig[0], cbData);
+        else
+            return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch: LPI config table size: got=%u expected=%u"),
+                                           cbData, sizeof(pGicDev->abLpiConfig));
+    }
+    /* LPI pending. */
+    {
+        uint32_t cbData = 0;
+        int const rc = pHlp->pfnSSMGetU32(pSSM, &cbData);
+        AssertRCReturn(rc, rc);
+        if (cbData <= sizeof(pGicDev->bmLpiPending))
+            pHlp->pfnSSMGetMem(pSSM, &pGicDev->bmLpiPending[0], cbData);
+        else
+            return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch: LPI pending bitmap size: got=%u expected=%u"),
+                                           cbData, sizeof(pGicDev->bmLpiPending));
+    }
+
+    /** @todo GITS data. */
+
     /*
      * Load per-VCPU data.
@@ -481 +517 @@
     else
         return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Invalid MaxExtPpi, got %u expected range [1,2]"), pGicDev->uMaxExtPpi);
+    bool const fIsGitsEnabled = RT_BOOL(pGicDev->hMmioGits != NIL_IOMMMIOHANDLE);
+    if (fIsGitsEnabled == pGicDev->fLpi)
+    { /* likely */ }
+    else
+        return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch: LPIs are %s when ITS is %s"),
+                                       fIsGitsEnabled ? "enabled" : "disabled", pGicDev->fLpi ? "enabled" : "disabled");
     return rc;
 }
@@ -587 +629 @@
      * most guests would assume support for SPIs. */
     AssertCompile(GIC_DIST_REG_TYPER_NUM_ITLINES == 31);
+    /** @todo This currently isn't implemented and the full range is always
+     *        supported. */
     rc = pHlp->pfnCFGMQueryU8Def(pCfg, "MaxSpi", &pGicDev->uMaxSpi, 31 /* Upto and incl. IntId 1023 */);
     AssertLogRelRCReturn(rc, rc);
@@ -609 +653 @@
      * disabled. */
     AssertCompile(GIC_DIST_REG_TYPER_ESPI_RANGE >> GIC_DIST_REG_TYPER_ESPI_RANGE_BIT == 31);
+    /** @todo This currently isn't implemented and the full range is always
+     *        supported. */
     rc = pHlp->pfnCFGMQueryU8Def(pCfg, "MaxExtSpi", &pGicDev->uMaxExtSpi, 31);
     AssertLogRelRCReturn(rc, rc);
@@ -628 +674 @@
      * supported. Valid values are [1,2] which equates to extended PPI IntIds
      * [1087,1119]. This is unused when extended PPIs are disabled. */
+    /** @todo This currently isn't implemented and the full range is always
+     *        supported. */
     rc = pHlp->pfnCFGMQueryU8Def(pCfg, "MaxExtPpi", &pGicDev->uMaxExtPpi, 2);
     AssertLogRelRCReturn(rc, rc);
@@ -657 +705 @@
     /** @devcfgm{gic, Aff3Levels, bool, true}
      * Configures whether non-zero affinity 3 levels (A3V) are supported
-     * (GICD_TYPER.A3V) and (ICC_CTLR.A3V). */
+     * (GICD_TYPER.A3V and ICC_CTLR.A3V). */
     rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "Aff3Levels", &pGicDev->fAff3Levels, true);
     AssertLogRelRCReturn(rc, rc);
+
+    /** @devcfgm{gic, Lpi, bool, true}
+     * Configures whether physical LPIs are supported (GICD_TYPER.LPIS and
+     * GICR_TYPER.PLPIS). */
+    rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "Lpi", &pGicDev->fLpi, true);
+    AssertLogRelRCReturn(rc, rc);
+
+    /** @devcfgm{gic, MaxLpi, uint8_t, 14}
+     * Configures GICD_TYPER.num_LPIs.
+     *
+     * For the physical LPI range [8192,65535], configures the number of physical LPI
+     * supported. Valid values are [3,14] which equates to LPI IntIds 8192 to
+     * [8207,40959]. A value of 15 or higher would exceed the maximum INTID size of
+     * 16-bits since 8192 + 2^(NumLpi+1) is >= 73727. A value of 2 or lower support
+     * fewer than 15 LPIs which seem pointless and is hence disallowed. This value is
+     * ignored (set to 0 in the register) when LPIs are disabled. */
+    rc = pHlp->pfnCFGMQueryU8Def(pCfg, "MaxLpi", &pGicDev->uMaxLpi, 10);
+    AssertLogRelRCReturn(rc, rc);
+
+    /* We currently support 2048 LPIs until we need to support more. */
+    if (pGicDev->uMaxLpi == 10)
+    { /* likely */ }
+    else
+        return PDMDevHlpVMSetError(pDevIns, VERR_INVALID_PARAMETER, RT_SRC_POS,
+                                   N_("Configuration error: \"MaxLpi\" must be in the range [3,14]"));
+    AssertRelease(UINT32_C(2) << pGicDev->uMaxLpi <= RT_ELEMENTS(pGicDev->abLpiConfig));
 
     /*
@@ -723 +797 @@
                                            &pGicDev->hMmioGits);
             AssertRCReturn(rc, rc);
+
+            /* When the ITS is enabled we must support LPIs. */
+            if (!pGicDev->fLpi)
+                return PDMDevHlpVMSetError(pDevIns, VERR_INVALID_PARAMETER, RT_SRC_POS,
+                                           N_("Configuration error: \"Lpi\" must be enabled when ITS is enabled\n"));
         }
         else
@@ -794 +873 @@
     bool const fMbi            = pGicDev->fMbi;
     bool const fAff3Levels     = pGicDev->fAff3Levels;
+    bool const fLpi            = pGicDev->fLpi;
     uint16_t const uExtPpiLast = uMaxExtPpi == GIC_REDIST_REG_TYPER_PPI_NUM_MAX_1087 ? 1087 : GIC_INTID_RANGE_EXT_PPI_LAST;
-    LogRel(("GIC: ArchRev=%u RangeSel=%RTbool Nmi=%RTbool Mbi=%RTbool Aff3Levels=%RTbool\n",
-            uArchRev, fRangeSel, fNmi, fMbi, fAff3Levels));
+    LogRel(("GIC: ArchRev=%u RangeSel=%RTbool Nmi=%RTbool Mbi=%RTbool Aff3Levels=%RTbool Lpi=%RTbool\n",
+            uArchRev, fRangeSel, fNmi, fMbi, fAff3Levels, fLpi));
     LogRel(("GIC: SPIs=true (%u:32..%u) ExtSPIs=%RTbool (%u:4095..%u) ExtPPIs=%RTbool (%u:1056..%u)\n",
             uMaxSpi, 32 * (uMaxSpi + 1),

trunk/src/VBox/VMM/include/GICInternal.h

@@ -127 +127 @@
      *  (ICC_CTLR.A3V). */
     bool                        fAff3Levels;
-    /** Alignment. */
-    bool                        afPadding[2];
+    /** Whether LPIs are supported (GICD_TYPER.PLPIS). */
+    bool                        fLpi;
+    /** The maximum LPI supported (GICD_TYPER.num_LPI). */
+    uint8_t                     uMaxLpi;
+    /** Padding. */
+    bool                        afPadding[4];
     /** @} */
 
     /** @name GITS device data and LPIs.
      * @{ */
+    /** ITS device state. */
     GITSDEV                     Gits;
-    uint8_t                     abLpiPriority[8192];
+    /** LPI configuration table (priority + enabled bit). */
+    uint8_t                     abLpiConfig[2048];
+    /** LPI pending bitmap. */
+    uint32_t                    bmLpiPending[64];
     /** @} */