Changeset 108762 in vbox

Timestamp:

Mar 27, 2025 10:16:28 AM (3 weeks ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

168189

Message:

VMM/GIC: bugref:10877 GITS work-in-progress.

Location:

trunk

Files:

• include/VBox/gic-its.h (modified) (3 diffs)
• src/VBox/VMM/VMMAll/GICAll.cpp (modified) (1 diff)
• src/VBox/VMM/VMMAll/GITSAll.cpp (modified) (7 diffs)
• src/VBox/VMM/include/GITSInternal.h (modified) (3 diffs)

trunk/include/VBox/gic-its.h

@@ -1 +1 @@
 /** @file
- * ARMv8 Generic Interrupt Controller (GIC) Interrupt Translation Service (ITS) definitions.
+ * ARMv8 GIC Interrupt Translation Service (ITS) definitions.
  */
 
@@ -41 +41 @@
 
 #include <iprt/types.h>
-#include <iprt/armv8.h>
+#include <iprt/assertcompile.h>
 
 /** Size of the ITS register frame. */
@@ -200 +200 @@
 #define GITS_CTRL_REG_CREADR_OFF                                0x0090
 
+/** GITS_BASER: ITS Table Descriptors - RW. */
 #define GITS_CTRL_REG_BASER_OFF_FIRST                           0x0100
+/** GITS_BASER: Size - Number of pages allocated to the table minus one. */
+#define GITS_BF_CTRL_REG_BASER_SIZE_SHIFT                       0
+#define GITS_BF_CTRL_REG_BASER_SIZE_MASK                        UINT64_C(0x00000000000000ff)
+/** GITS_BASER: Page_Size - Size of the page that the table uses. */
+#define GITS_BF_CTRL_REG_BASER_PAGESIZE_SHIFT                   8
+#define GITS_BF_CTRL_REG_BASER_PAGESIZE_MASK                    UINT64_C(0x0000000000000300)
+/** GITS_BASER: Shareability attributes of the table. */
+#define GITS_BF_CTRL_REG_BASER_SHAREABILITY_SHIFT               10
+#define GITS_BF_CTRL_REG_BASER_SHAREABILITY_MASK                UINT64_C(0x0000000000000c00)
+/** GITS_BASER: Physical_Address - Physical address of the table. */
+#define GITS_BF_CTRL_REG_BASER_PHYS_ADDR_SHIFT                  12
+#define GITS_BF_CTRL_REG_BASER_PHYS_ADDR_MASK                   UINT64_C(0x0000fffffffff000)
+/** GITS_BASER: Entry_Size - Size of each table entry minus one in bytes.   */
+#define GITS_BF_CTRL_REG_BASER_ENTRY_SIZE_SHIFT                 48
+#define GITS_BF_CTRL_REG_BASER_ENTRY_SIZE_MASK                  UINT64_C(0x001f000000000000)
+/** GITS_BASER: OuterCache - Outer cacheability attributes of the table. */
+#define GITS_BF_CTRL_REG_BASER_OUTER_CACHE_SHIFT                53
+#define GITS_BF_CTRL_REG_BASER_OUTER_CACHE_MASK                 UINT64_C(0x00e0000000000000)
+/** GITS_BASER: Type - The type of entity. */
+#define GITS_BF_CTRL_REG_BASER_TYPE_SHIFT                       56
+#define GITS_BF_CTRL_REG_BASER_TYPE_MASK                        UINT64_C(0x0700000000000000)
+/** GITS_BASER: InnerCache - Inner cacheability attribtues of the table. */
+#define GITS_BF_CTRL_REG_BASER_INNER_CACHE_SHIFT                59
+#define GITS_BF_CTRL_REG_BASER_INNER_CACHE_MASK                 UINT64_C(0x3800000000000000)
+/** GITS_BASER: Indirect - Whether this is a single or two-level table. */
+#define GITS_BF_CTRL_REG_BASER_INDIRECT_SHIFT                   62
+#define GITS_BF_CTRL_REG_BASER_INDIRECT_MASK                    UINT64_C(0x4000000000000000)
+/** GITS_BASER: Valid - Whether memory has been allocated for the table. */
+#define GITS_BF_CTRL_REG_BASER_VALID_SHIFT                      63
+#define GITS_BF_CTRL_REG_BASER_VALID_MASK                       UINT64_C(0x8000000000000000)
+/*  Sigh C macros... "PAGE_SIZE" is already defined here, just use "PAGESIZE" instead of temporarily undef, redef. */
+RT_BF_ASSERT_COMPILE_CHECKS(GITS_BF_CTRL_REG_BASER_, UINT64_C(0), UINT64_MAX,
+                            (SIZE, PAGESIZE, SHAREABILITY, PHYS_ADDR, ENTRY_SIZE, OUTER_CACHE, TYPE, INNER_CACHE, INDIRECT,
+                             VALID));
+
 #define GITS_CTRL_REG_BASER_OFF_LAST                            0x0138
 #define GITS_CTRL_REG_BASER_RANGE_SIZE                          (GITS_CTRL_REG_BASER_OFF_LAST + sizeof(uint64_t) - GITS_CTRL_REG_BASER_OFF_FIRST)

trunk/src/VBox/VMM/VMMAll/GICAll.cpp

@@ -3279 +3279 @@
     Assert(!(off & 0x3));
     Assert(cb == 4); RT_NOREF_PV(cb);
-
-    AssertReleaseFailed();
 
     PGICDEV  pGicDev  = PDMDEVINS_2_DATA(pDevIns, PGICDEV);

trunk/src/VBox/VMM/VMMAll/GITSAll.cpp

@@ -1 +1 @@
 /* $Id$ */
 /** @file
- * GITS - Generic Interrupt Controller Interrupt Translation Service (ITS) - All Contexts.
+ * GITS - GIC Interrupt Translation Service (ITS) - All Contexts.
  */
 
@@ -50 +50 @@
 *   Structures and Typedefs                                                                                                      *
 *********************************************************************************************************************************/
+/**
+ * Interrupt Table Entry (ITE).
+ */
+typedef struct GITSITE
+{
+    bool        fValid;
+    uint8_t     uType;
+    uint16_t    uIntrCollectId;
+    VMCPUID     idTargetCpu;
+} GITSITE;
+AssertCompileSize(GITSITE, 8);
 
 
@@ -91 +102 @@
     }
 }
-
-#endif
+#endif /* LOG_ENABLED */
 
 
 DECL_HIDDEN_CALLBACK(VBOXSTRICTRC) gitsMmioReadCtrl(PCGITSDEV pGitsDev, uint16_t offReg, uint32_t *puValue)
 {
-    Log4Func(("offReg=%#RX16\n",  offReg));
-
     VBOXSTRICTRC rcStrict = VINF_SUCCESS;
     switch (offReg)
     {
         case GITS_CTRL_REG_CTLR_OFF:
-            *puValue = pGitsDev->fUnmappedMsiReporting;
-            break;
+            *puValue = RT_BF_MAKE(GITS_BF_CTRL_REG_CTLR_ENABLED,   pGitsDev->fEnabled)
+                     | RT_BF_MAKE(GITS_BF_CTRL_REG_CTLR_QUIESCENT, pGitsDev->fQuiescent);
+            break;
+
         case GITS_CTRL_REG_PIDR2_OFF:
         {
@@ -114 +124 @@
             break;
         }
+
+        case GITS_CTRL_REG_TYPER_OFF:
+        {
+            uint64_t uLo = RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_PHYSICAL,       1)               /* Physical LPIs supported. */
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_VIRTUAL,        0) */            /* Virtual LPIs not supported. */
+                         | RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_CCT,            0)               /* Collections in memory not supported. */
+                         | RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_ITT_ENTRY_SIZE, sizeof(GITSITE)) /* ITE size in bytes. */
+                         | RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_ID_BITS,        31)              /* 32-bit event IDs. */
+                         | RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_DEV_BITS,       31)              /* 32-bit device IDs. */
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_SEIS,           0) */            /** @todo SEI support. */
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_PTA,            0) */            /* Target is VCPU ID not address. */
+                         | RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_HCC,            255);            /* Collection count. */
+            *puValue = RT_LO_U32(uLo);
+            break;
+        }
+
+        case GITS_CTRL_REG_TYPER_OFF + 4:
+        {
+            uint64_t uHi = 0
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_CID_BITS, 0) */   /* CIL specifies collection ID size. */
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_CIL,      0) */   /* 16-bit collection IDs. */
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_VMOVP,    0) */   /* VMOVP not supported. */
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_MPAM,     0) */   /* MPAM no supported. */
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_VSGI,     0) */   /* VSGI not supported. */
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_VMAPP,    0) */   /* VMAPP not supported. */
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_SVPET,    0) */   /* SVPET not supported. */
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_NID,      0) */   /* NID (doorbell) not supported. */
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_UMSI,     0) */   /** @todo Support reporting receipt of unmapped MSIs. */
+                       /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_UMSI_IRQ, 0) */   /** @todo Support generating interrupt on unmapped MSI. */
+                         | RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_INV,      1);     /* ITS caches are invalidated when clearing
+                                                                                   GITS_CTLR.Enabled and GITS_BASER<n>.Valid. */
+            *puValue = RT_HI_U32(uHi);
+            break;
+        }
+
         default:
             AssertReleaseMsgFailed(("offReg=%#x\n", offReg));
@@ -119 +164 @@
     }
 
+    Log4Func(("offReg=%#RX16 (%s) uValue=%#RX32\n", offReg, gitsGetCtrlRegDescription(offReg), *puValue));
     return rcStrict;
 }
@@ -133 +179 @@
 DECL_HIDDEN_CALLBACK(VBOXSTRICTRC) gitsMmioWriteCtrl(PGITSDEV pGitsDev, uint16_t offReg, uint32_t uValue)
 {
-    RT_NOREF(pGitsDev, offReg, uValue);
-    AssertReleaseMsgFailed(("offReg=%#x uValue=%#RX32\n", offReg, uValue));
-    return VERR_NOT_IMPLEMENTED;
+    /*
+     * GITS_BASER<n>.
+     */
+    if (GITS_IS_REG_IN_RANGE(offReg, GITS_CTRL_REG_BASER_OFF_FIRST,  GITS_CTRL_REG_BASER_RANGE_SIZE))
+    {
+        uint16_t const cbReg  = sizeof(uint64_t);
+        uint16_t const idxReg = (offReg - GITS_CTRL_REG_BASER_OFF_FIRST) / cbReg;
+        if (!(offReg & 7))
+            pGitsDev->aItsTableRegs[idxReg].s.Lo = uValue;
+        else
+            pGitsDev->aItsTableRegs[idxReg].s.Hi = uValue;
+        return VINF_SUCCESS;
+    }
+
+    VBOXSTRICTRC rcStrict = VINF_SUCCESS;
+    switch (offReg)
+    {
+        case GITS_CTRL_REG_CTLR_OFF:
+            pGitsDev->fEnabled = RT_BF_GET(uValue, GITS_BF_CTRL_REG_CTLR_ENABLED);
+            break;
+
+        default:
+            AssertReleaseMsgFailed(("offReg=%#x uValue=%#RX32\n", offReg, uValue));
+            break;
+    }
+
+    Log4Func(("offReg=%#RX16 (%s) uValue=%#RX32\n", offReg, gitsGetCtrlRegDescription(offReg), uValue));
+    return rcStrict;
 }
 
@@ -153 +224 @@
     pGitsDev->fUnmappedMsiReporting = false;
     pGitsDev->fQuiescent            = true;
-    RT_ZERO(pGitsDev->aBases);
+    RT_ZERO(pGitsDev->aItsTableRegs);
 }
 

trunk/src/VBox/VMM/include/GITSInternal.h

@@ -41 +41 @@
  */
 
+#if 0
 /**
  * Interrupt Translation Table Base.
@@ -48 +49 @@
     /** The physical address of the table. */
     RTGCPHYS                GCPhys;
-    /** Number of pages of memory allocated to this table. */
+    /** Size of every allocated page in bytes. */
+    uint32_t                cbPageSize;
+    /** Number of pages allocated. */
     uint8_t                 cPages;
-    /** Size of each page allocated. */
-    uint8_t                 cPageSize;
-    /** Size of each entry in the table in bytes. */
+    /** Size of each entry in bytes. */
     uint8_t                 cbEntry;
-    /** Whether this is a two-level table or not. */
+    /** Whether this is a two-level or flat table. */
     bool                    fTwoLevel;
+    /** Whether software has memory allocated for the table. */
+    bool                    fValid;
     /** Memory shareability attributes. */
     GITSATTRSHARE           AttrShare;
-    /** Memory cacheability attributes. */
-    GITSATTRMEM             AttrMem;
+    /** Memory cacheability attributes (Inner). */
+    GITSATTRMEM             AttrMemInner;
+    /** Memory cacheability attributes (Outer). */
+    GITSATTRMEM             AttrMemOuter;
 } GITSITSBASE;
+AssertCompileSizeAlignment(GITSITSBASE, 8);
+AssertCompileMemberAlignment(GITSITSBASE, AttrShare, 8);
+#endif
+
 
 /**
@@ -78 +87 @@
     bool                    fPadding0;
     /** The ITS table descriptor registers. */
-    GITSITSBASE             aBases[8];
+    RTUINT64U               aItsTableRegs[8];
     /** @} */