Changeset 108794 in vbox for trunk/src/VBox/Devices/EFI/FirmwareNew/IntelFsp2WrapperPkg/FspmWrapperPeim

Timestamp:

Mar 31, 2025 11:31:09 AM (5 weeks ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

168237

Message:

Devices/EFI/FirmwareNew: Merge edk2-stable202502 from the vendor branch and make it build for the important platforms, bugref:4643

Location:

trunk/src/VBox/Devices/EFI/FirmwareNew

Files:

• . (modified) (1 prop)
• IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c (modified) (7 diffs)
• IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf (modified) (2 diffs)

trunk/src/VBox/Devices/EFI/FirmwareNew/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c

@@ -4 +4 @@
   notify to call FspSiliconInit API.
 
-  Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2014 - 2024, Intel Corporation. All rights reserved.<BR>
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -39 +39 @@
 #include <FspGlobalData.h>
 #include <Library/FspCommonLib.h>
+#include <Guid/MigratedFvInfo.h>
 
 extern EFI_GUID  gFspHobGuid;
@@ -125 +126 @@
 
   //
-  // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status
-  //
-  if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {
-    DEBUG ((DEBUG_INFO, "FspMemoryInitApi requested reset %r\n", Status));
-    CallFspWrapperResetSystem (Status);
-  }
-
-  if ((Status != FSP_STATUS_VARIABLE_REQUEST) && EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "ERROR - Failed to execute FspMemoryInitApi(), Status = %r\n", Status));
-    ASSERT_EFI_ERROR (Status);
-  }
-
-  DEBUG ((DEBUG_INFO, "FspMemoryInit status: %r\n", Status));
-  if (Status == FSP_STATUS_VARIABLE_REQUEST) {
-    //
-    // call to Variable request handler
-    //
-    FspWrapperVariableRequestHandler (&FspHobListPtr, FspMultiPhaseMemInitApiIndex);
-  }
-
-  //
-  // See if MultiPhase process is required or not
-  //
-  FspWrapperMultiPhaseHandler (&FspHobListPtr, FspMultiPhaseMemInitApiIndex);    // FspM MultiPhase
-
-  //
-  // Create hobs after memory initialization and not in temp RAM. Hence passing the recorded timestamp here
-  //
-  PERF_START_EX (&gFspApiPerformanceGuid, "EventRec", NULL, TimeStampCounterStart, FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
-  PERF_END_EX (&gFspApiPerformanceGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
-  DEBUG ((DEBUG_INFO, "Total time spent executing FspMemoryInitApi: %d millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () - TimeStampCounterStart), 1000000)));
-
-  Status = TestFspMemoryInitApiOutput (FspmUpdDataPtr, &FspHobListPtr);
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "ERROR - TestFspMemoryInitApiOutput () fail, Status = %r\n", Status));
-  }
-
-  DEBUG ((DEBUG_INFO, "  FspHobListPtr (returned) - 0x%x\n", FspHobListPtr));
-  ASSERT (FspHobListPtr != NULL);
-
-  PostFspmHobProcess (FspHobListPtr);
-
-  //
   // FspHobList is not complete at this moment.
   // Save FspHobList pointer to hob, so that it can be got later
@@ -177 +135 @@
   ASSERT (HobData != NULL);
   CopyMem (HobData, &FspHobListPtr, sizeof (FspHobListPtr));
+
+  //
+  // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status
+  //
+  if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {
+    DEBUG ((DEBUG_INFO, "FspMemoryInitApi requested reset %r\n", Status));
+    CallFspWrapperResetSystem (Status);
+  }
+
+  if ((Status != FSP_STATUS_VARIABLE_REQUEST) && EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR, "ERROR - Failed to execute FspMemoryInitApi(), Status = %r\n", Status));
+    ASSERT_EFI_ERROR (Status);
+  }
+
+  DEBUG ((DEBUG_INFO, "FspMemoryInit status: %r\n", Status));
+  if (Status == FSP_STATUS_VARIABLE_REQUEST) {
+    //
+    // call to Variable request handler
+    //
+    FspWrapperVariableRequestHandler (&FspHobListPtr, FspMultiPhaseMemInitApiIndex);
+  }
+
+  //
+  // See if MultiPhase process is required or not
+  //
+  FspWrapperMultiPhaseHandler (&FspHobListPtr, FspMultiPhaseMemInitApiIndex);    // FspM MultiPhase
+
+  //
+  // Create hobs after memory initialization and not in temp RAM. Hence passing the recorded timestamp here
+  //
+  PERF_START_EX (&gFspApiPerformanceGuid, "EventRec", NULL, TimeStampCounterStart, FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
+  PERF_END_EX (&gFspApiPerformanceGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
+  DEBUG ((DEBUG_INFO, "Total time spent executing FspMemoryInitApi: %d millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () - TimeStampCounterStart), 1000000)));
+
+  Status = TestFspMemoryInitApiOutput (FspmUpdDataPtr, &FspHobListPtr);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR, "ERROR - TestFspMemoryInitApiOutput () fail, Status = %r\n", Status));
+  }
+
+  DEBUG ((DEBUG_INFO, "  FspHobListPtr (returned) - 0x%x\n", FspHobListPtr));
+  ASSERT (FspHobListPtr != NULL);
+
+  PostFspmHobProcess (FspHobListPtr);
 
   return Status;
@@ -279 +280 @@
   )
 {
-  UINT32  FspMeasureMask;
+  UINT32                  FspMeasureMask;
+  EFI_PHYSICAL_ADDRESS    FsptBaseAddress;
+  EFI_PHYSICAL_ADDRESS    FspmBaseAddress;
+  EDKII_MIGRATED_FV_INFO  *MigratedFvInfo;
+  EFI_PEI_HOB_POINTERS    Hob;
 
   DEBUG ((DEBUG_INFO, "TcgPpiNotify FSPM\n"));
 
-  FspMeasureMask = PcdGet32 (PcdFspMeasurementConfig);
+  FspMeasureMask  = PcdGet32 (PcdFspMeasurementConfig);
+  FsptBaseAddress = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdFsptBaseAddress);
+  FspmBaseAddress = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdFspmBaseAddress);
+  Hob.Raw         = GetFirstGuidHob (&gEdkiiMigratedFvInfoGuid);
+  while (Hob.Raw != NULL) {
+    MigratedFvInfo = GET_GUID_HOB_DATA (Hob);
+    if ((MigratedFvInfo->FvOrgBase == PcdGet32 (PcdFsptBaseAddress)) && (MigratedFvInfo->FvDataBase != 0)) {
+      //
+      // Found the migrated FspT raw data
+      //
+      FsptBaseAddress = MigratedFvInfo->FvDataBase;
+    }
+
+    if ((MigratedFvInfo->FvOrgBase == PcdGet32 (PcdFspmBaseAddress)) && (MigratedFvInfo->FvDataBase != 0)) {
+      FspmBaseAddress = MigratedFvInfo->FvDataBase;
+    }
+
+    Hob.Raw = GET_NEXT_HOB (Hob);
+    Hob.Raw = GetNextGuidHob (&gEdkiiMigratedFvInfoGuid, Hob.Raw);
+  }
 
   if ((FspMeasureMask & FSP_MEASURE_FSPT) != 0) {
@@ -289 +313 @@
       0,
       "FSPT",
-      PcdGet32 (PcdFsptBaseAddress),
-      (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFsptBaseAddress))->FvLength
+      FsptBaseAddress,
+      (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)FsptBaseAddress)->FvLength
       );
   }
@@ -298 +322 @@
       0,
       "FSPM",
-      PcdGet32 (PcdFspmBaseAddress),
-      (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFspmBaseAddress))->FvLength
+      FspmBaseAddress,
+      (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)FspmBaseAddress)->FvLength
       );
   }

trunk/src/VBox/Devices/EFI/FirmwareNew/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf

@@ -7 +7 @@
 # notify to call FspSiliconInit API.
 #
-#  Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>
+#  Copyright (c) 2014 - 2024, Intel Corporation. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -70 +70 @@
   gFspHobGuid                           ## PRODUCES ## HOB
   gFspApiPerformanceGuid                ## SOMETIMES_CONSUMES ## GUID
+  gEdkiiMigratedFvInfoGuid              ## SOMETIMES_CONSUMES ## HOB
 
 [Ppis]