Changeset 108822 in vbox for trunk/src

Timestamp:

Apr 2, 2025 5:36:47 AM (13 days ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

168268

Message:

VMM/CPUM: bugref:10877 Configure the ID_AA64PFR0_EL1 system register with the availability of the GIC CPU interface (required for EFI firmware).

File:

• trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId-armv8.cpp (modified) (4 diffs)

trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId-armv8.cpp

@@ -38 +38 @@
 #include "CPUMInternal-armv8.h"
 #include <VBox/vmm/vmcc.h>
+#include <VBox/gic.h>
 
 #include <VBox/err.h>
@@ -108 +109 @@
  * @param   pCpum       The CPUM instance data.
  * @param   pConfig     The CPUID configuration we've read from CFGM.
- */
-static int cpumR3CpuIdSanitize(PVM pVM, PCPUM pCpum, PCPUMCPUIDCONFIG pConfig)
+ * @param   pCpumCfg    The CPUM CFGM config.
+ */
+static int cpumR3CpuIdSanitize(PVM pVM, PCPUM pCpum, PCPUMCPUIDCONFIG pConfig, PCFGMNODE pCpumCfg)
 {
 #define PORTABLE_CLEAR_BITS_WHEN(Lvl, a_pLeafReg, FeatNm, fMask, uValue) \
@@ -168 +170 @@
     /* Write ID_AA64ISAR0_EL1 register back. */
     pVM->cpum.s.GuestIdRegs.u64RegIdAa64Isar0El1 = u64IdReg;
+
+    /* ID_AA64PFR0_EL1 */
+    u64IdReg = pVM->cpum.s.GuestIdRegs.u64RegIdAa64Pfr0El1;
+
+    uint8_t uArchRev;
+    int rc = CFGMR3QueryU8(pCpumCfg, "GicArchRev", &uArchRev);
+    AssertRCReturn(rc, rc);
+    if (uArchRev == GIC_DIST_REG_PIDR2_ARCHREV_GICV3)
+        u64IdReg = RT_BF_SET(u64IdReg, ARMV8_ID_AA64PFR0_EL1_GIC, ARMV8_ID_AA64PFR0_EL1_GIC_V3_V4); /* 3.0 */
+    else if (uArchRev == GIC_DIST_REG_PIDR2_ARCHREV_GICV4)
+    {
+        uint8_t uArchRevMinor = 0;
+        rc = CFGMR3QueryU8Def(pCpumCfg, "GicArchRevMinor", &uArchRevMinor, 0);
+        u64IdReg = uArchRevMinor == 0
+                 ? RT_BF_SET(u64IdReg, ARMV8_ID_AA64PFR0_EL1_GIC, ARMV8_ID_AA64PFR0_EL1_GIC_V3_V4)  /* 4.0 */
+                 : RT_BF_SET(u64IdReg, ARMV8_ID_AA64PFR0_EL1_GIC, ARMV8_ID_AA64PFR0_EL1_GIC_V4_1);  /* 4.1 */
+    }
+    else
+        Assert(RT_BF_GET(u64IdReg, ARMV8_ID_AA64PFR0_EL1_GIC) == ARMV8_ID_AA64PFR0_EL1_GIC_NOT_IMPL);
+
+    /* Write ID_AA64PFR0_EL1 register back. */
+    pVM->cpum.s.GuestIdRegs.u64RegIdAa64Pfr0El1 = u64IdReg;
 
     /** @todo Other ID and feature registers. */
@@ -424 +448 @@
      */
     if (RT_SUCCESS(rc))
-        rc = cpumR3CpuIdSanitize(pVM, pCpum, &Config);
+        rc = cpumR3CpuIdSanitize(pVM, pCpum, &Config, pCpumCfg);
 
     return rc;