VirtualBox

Changeset 108828 in vbox


Ignore:
Timestamp:
Apr 2, 2025 9:40:24 AM (2 weeks ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
168274
Message:

VMM/GIC: bugref:10877 GITS work-in-progress. GITS_CREADR register access.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/GITSAll.cpp

    r108780 r108828  
    4444/** The current GITS saved state version. */
    4545#define GITS_SAVED_STATE_VERSION                        1
     46
     47/** Gets whether the given register offset is within the specified range. */
    4648#define GITS_IS_REG_IN_RANGE(a_offReg, a_offFirst, a_cbRegion)    ((uint32_t)(a_offReg) - (a_offFirst) < (a_cbRegion))
    4749
     
    107109{
    108110    Assert(cb == 4 || cb == 8);
     111    RT_NOREF(cb);
    109112
    110113    /*
     
    112115     */
    113116    uint64_t uReg;
    114     if (GITS_IS_REG_IN_RANGE(offReg, GITS_CTRL_REG_BASER_OFF_FIRST,  GITS_CTRL_REG_BASER_RANGE_SIZE))
     117    if (GITS_IS_REG_IN_RANGE(offReg, GITS_CTRL_REG_BASER_OFF_FIRST, GITS_CTRL_REG_BASER_RANGE_SIZE))
    115118    {
    116119        uint16_t const cbReg  = sizeof(uint64_t);
    117120        uint16_t const idxReg = (offReg - GITS_CTRL_REG_BASER_OFF_FIRST) / cbReg;
    118         if (!(offReg & 7))
    119         {
    120             if (cb == 8)
    121                 uReg = pGitsDev->aItsTableRegs[idxReg].u;
    122             else
    123                 uReg = pGitsDev->aItsTableRegs[idxReg].s.Lo;
    124         }
    125         else
    126         {
    127             Assert(cb == 4);
    128             uReg = pGitsDev->aItsTableRegs[idxReg].s.Hi;
    129         }
     121        uReg = pGitsDev->aItsTableRegs[idxReg].u >> ((offReg & 7) << 3 /* to bits */);
    130122        return uReg;
    131123    }
     
    193185            break;
    194186
     187        case GITS_CTRL_REG_CREADR_OFF:
     188            uReg = pGitsDev->uCmdReadReg;
     189            break;
     190
     191        case GITS_CTRL_REG_CREADR_OFF + 4:
     192            uReg = 0;   /* Upper 32-bits are reserved, MBZ. */
     193            break;
     194
    195195        default:
    196196            AssertReleaseMsgFailed(("offReg=%#x (%s)\n", offReg, gitsGetCtrlRegDescription(offReg)));
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